TWI462191B - Pierced substrate on chip module structure - Google Patents

Pierced substrate on chip module structure Download PDF

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TWI462191B
TWI462191B TW101122113A TW101122113A TWI462191B TW I462191 B TWI462191 B TW I462191B TW 101122113 A TW101122113 A TW 101122113A TW 101122113 A TW101122113 A TW 101122113A TW I462191 B TWI462191 B TW I462191B
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substrate
wafer
module structure
circuit board
printed circuit
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TW201401382A (en
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Shin Dar Jan
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Description

晶片上鏤空基板之模組結構Module structure for hollowing out the substrate on the wafer

本發明係關於半導體元件結構,特別係一整合透鏡架以及影像感測器以降低元件尺寸之晶片上鏤空基板之模組結構。The present invention relates to a semiconductor device structure, and more particularly to a module structure in which a lens holder and an image sensor are integrated to reduce the size of the device.

半導體技術快速發展,傳統之覆晶結構中,錫球陣列形成於晶粒之表面,透過傳統之錫膏藉由錫球罩幕製作以形成所欲之圖案。封裝功能包含散熱、訊號傳輸、電源分配、保護等,當晶片更加複雜,傳統之封裝如導線架封裝、軟式封裝、剛性封裝、無法滿足高密度小尺寸晶片之需求。晶圓級封裝技術係為高級封裝技術,藉其晶粒係於晶圓上加以製造及測試,且接著藉切割而分離以用於在表面黏著生產線中組裝。因晶圓級封裝技術利用整個晶圓作為目標,而非利用單一晶片或晶粒,因此於進行分離程序之前,封裝及測試皆已完成。此外,晶圓級封裝係如此之高級技術,因此打線接合、晶粒黏著及底部填充之程序可予以省略。藉利用晶圓級封裝技術,可減少成本及製造時間且晶圓級封裝之最後結構尺寸可相當於晶粒大小,故此技術可滿足電子裝置之微型化需求。The rapid development of semiconductor technology, in the traditional flip-chip structure, the solder ball array is formed on the surface of the die, through the traditional solder paste by the solder ball mask to form the desired pattern. The package functions include heat dissipation, signal transmission, power distribution, protection, etc. When the chip is more complicated, the traditional package such as lead frame package, flexible package, rigid package, can not meet the needs of high-density small-size chips. Wafer-level packaging technology is an advanced packaging technology that is fabricated and tested by wafers on a wafer and then separated by cutting for assembly in a surface mount line. Because wafer-level packaging technology uses the entire wafer as a target rather than a single wafer or die, packaging and testing are done before the separation process. In addition, wafer level packaging is such an advanced technology that the procedures for wire bonding, die attach and underfill can be omitted. By using wafer-level packaging technology, cost and manufacturing time can be reduced and the final structure size of the wafer-level package can be equivalent to the die size, so the technology can meet the miniaturization requirements of electronic devices.

現用於照相模組的覆晶技術係以打線設備在整片晶圓上進行結線凸塊(stud bump)的製程,由結線凸塊來取代錫球。The flip chip technology currently used in the camera module uses a wire bonding device to perform a stud bump process on the entire wafer, and the solder ball is replaced by a wire bump.

藉由電子封裝技術,互補式金氧半場效電晶體(CMOS) 影像感測器晶片係製作於CMOS影像感測器模組之中。此模組被應用到各種電子產品中,並且CMOS影像感測器模組所需的封裝規格需求取決於此產品的特性。尤其是最近的CMOS影像感測器模組的傾向,高電性能力、小型化、高密度、低功耗、多功能、高速信號處理以及可靠度等,是電子產品的小型化的典型特徵。Complementary MOS Half Field Effect Transistor (CMOS) by electronic packaging technology The image sensor chip is fabricated in a CMOS image sensor module. This module is used in a variety of electronic products, and the package specification requirements for CMOS image sensor modules depend on the characteristics of the product. In particular, the recent trend of CMOS image sensor modules, high-power capability, miniaturization, high density, low power consumption, multi-function, high-speed signal processing, and reliability are typical features of miniaturization of electronic products.

相反於一般的CMOS晶片,CMOS影像感測器在過去的物理環境是可行的,然可能被雜質污染;當其大小不被認為是重要的,無引線晶片載體LCC型態封裝可以被使用。然而,在最近的市場趨勢,要求薄化以及簡單化的特點,例如照相手機、智慧型手機,板上晶片(chip-on-board:COB)、薄膜上晶片(chip-on-film:COF)或晶片尺寸封裝(CSP)等,也普遍地被使用。In contrast to general CMOS wafers, CMOS image sensors are feasible in the past physical environment and may be contaminated with impurities; when their size is not considered important, leadless wafer carrier LCC type packages can be used. However, in recent market trends, thinning and simplification characteristics are required, such as camera phones, smart phones, chip-on-board (COB), and chip-on-film (COF). Or wafer size packaging (CSP), etc., are also commonly used.

在目前的覆晶封裝結構中,雖然可以降低模組結構的高度,然而覆晶封裝的機器設備過於昂貴並且其量產速度(Unit Per Hour)過慢。因此,其投資需要龐大的經費,且良率低及不易控制。In the current flip chip package structure, although the height of the module structure can be reduced, the flip chip packaged machine equipment is too expensive and its mass production speed (Unit Per Hour) is too slow. Therefore, its investment requires huge funds, and the yield is low and difficult to control.

根據以上之習知技術的缺點,本發明提出一種嶄新的晶片上鏤空基板之模組結構,無需新增的投資成本,並且可以得到較佳的製程良率。According to the above disadvantages of the prior art, the present invention proposes a novel module structure for hollowing out the substrate on the wafer, which does not require additional investment cost, and can obtain a better process yield.

鑒於上述之缺點,本發明之一目的在於提供一種晶片上鏤空基板之模組結構,具有較小(薄)的模組結構高度。In view of the above disadvantages, it is an object of the present invention to provide a module structure for a hollow substrate on a wafer having a small (thin) module structure height.

本發明另一目的在於提供一整合透鏡架以及影像感測 器之晶片上鏤空基板模組結構,以提昇良率、可靠度以及降低模組結構尺寸。Another object of the present invention is to provide an integrated lens holder and image sensing The substrate module structure is hollowed out on the wafer to improve yield, reliability and reduce module size.

本發明再一目的在於提供具有良好的熱效能(thermal performance)、成本低廉且製程簡易之晶片上鏤空基板模組結構。Still another object of the present invention is to provide a hollow substrate module structure on a wafer having good thermal performance, low cost, and simple process.

本發明提供一種晶片上鏤空基板之模組結構,包含:一第一基板;一晶片,配置於第一基板之上,具有一第一接觸墊及一感測區域;一第二基板,配置於第一基板與晶片之上,具有凹槽結構、第一穿孔結構、第二穿孔結構及第二接觸墊,其中晶片置於凹槽結構中,第一接觸墊透過一焊接線電性連接第二接觸墊,第一接觸墊裸露於第一穿孔結構,感測區域裸露於第二穿孔結構;一透明基板,配置於第二基板以及晶片之上,約略對準感測區域;以及一透鏡架,配置於第二基板之上,一透鏡位於透鏡架之上方約略對準透明基板及感測區域。The present invention provides a module structure for a hollow substrate on a wafer, comprising: a first substrate; a wafer disposed on the first substrate, having a first contact pad and a sensing region; and a second substrate disposed on the substrate The first substrate and the wafer have a groove structure, a first perforation structure, a second perforation structure and a second contact pad, wherein the wafer is placed in the groove structure, and the first contact pad is electrically connected to the second through a bonding wire. a contact pad, the first contact pad is exposed to the first perforated structure, the sensing area is exposed to the second perforated structure; a transparent substrate is disposed on the second substrate and the wafer, approximately aligned with the sensing area; and a lens holder, The lens is disposed on the second substrate, and a lens is disposed above the lens holder approximately aligned with the transparent substrate and the sensing region.

上述模組結構更包含至少一被動元件或主動元件配置於該第一基板及/或第二基板之上。第一基板透過一導電層附著於該第二基板之上,以電性連接彼此。第二基板之材質包含環氧樹脂型FR5或FR4、BT、印刷電路板、玻璃、矽或陶瓷。此外,第一基板為一印刷電路板或軟性印刷電路板之上具有一導線。晶片透過一黏著層附著於第一基板之上。透鏡架透過一黏著層而附著於第二基板之上。The module structure further includes at least one passive component or active component disposed on the first substrate and/or the second substrate. The first substrate is attached to the second substrate through a conductive layer to electrically connect to each other. The material of the second substrate includes epoxy resin type FR5 or FR4, BT, printed circuit board, glass, tantalum or ceramic. In addition, the first substrate has a wire on a printed circuit board or a flexible printed circuit board. The wafer is attached to the first substrate through an adhesive layer. The lens holder is attached to the second substrate through an adhesive layer.

本發明將配合實施例與隨附之圖式詳述於下。應可理 解者為本發明中所有之實施例僅為例示之用,並非用以限制。因此除文中之實施例外,本發明亦可廣泛地應用在其他實施例中。且本發明並不受限於任何實施例,應以隨附之申請專利範圍及其同等領域而定。The invention will be described in conjunction with the embodiments and the accompanying drawings. Should be All of the embodiments of the present invention are for illustrative purposes only and are not intended to be limiting. Therefore, the invention may be applied to other embodiments in addition to the embodiments described herein. The invention is not limited to any embodiment, but should be determined by the scope of the appended claims and their equivalents.

本發明提供一種晶片上鏤空基板之模組結構(pierced substrate on chip module structure),此結構可以利用晶片直接封裝(chip-on-board:COB)的製程來完成。晶片直接封裝是積體電路封裝的一種方式,其係將晶片直接黏附在電路板或基板上,可有效地將晶片的封裝與測試步驟轉移到電路板組裝之後進行。The present invention provides a pierced substrate on chip module structure, which can be completed by a chip-on-board (COB) process. Direct wafer package is a way of integrating circuit package, which directly adheres the wafer to the circuit board or substrate, and can effectively transfer the package and test steps of the wafer to the circuit board after assembly.

第一圖顯示覆晶封裝結構之截面圖。如第一圖所示,其中覆晶封裝結構100包含基板106、晶片105、被動元件107、透鏡架104、透鏡101以及透明基板102。基板106具有形成於其內之凹槽結構以接收晶片105以及導電層108。晶片105與導電層108形成於基板106之下,其中導電層108電性連接基板106與晶片105上的電性接觸墊。 透鏡架104包括一夾具部分103,以用於固定透鏡101。至少一被動元件107可以形成(附著)於透鏡架104內之基板106上。透鏡101形成於透鏡架104之最上方。另外,透明基板102,可選擇性地配置於透鏡架104之內,以及透鏡101與晶片105之間。透鏡架104可以利用一黏著層附著於基板106之上。The first figure shows a cross-sectional view of a flip chip package structure. As shown in the first figure, the flip chip package structure 100 includes a substrate 106, a wafer 105, a passive component 107, a lens holder 104, a lens 101, and a transparent substrate 102. The substrate 106 has a recess structure formed therein to receive the wafer 105 and the conductive layer 108. The wafer 105 and the conductive layer 108 are formed under the substrate 106, wherein the conductive layer 108 is electrically connected to the substrate 106 and the electrical contact pads on the wafer 105. The lens holder 104 includes a clamp portion 103 for fixing the lens 101. At least one passive component 107 can be formed (attached) to the substrate 106 within the lens holder 104. The lens 101 is formed at the uppermost portion of the lens holder 104. In addition, the transparent substrate 102 can be selectively disposed within the lens holder 104 and between the lens 101 and the wafer 105. Lens holder 104 can be attached to substrate 106 using an adhesive layer.

第二圖顯示另一例子之覆晶封裝結構之截面圖。如第二圖所示,在本例子中,覆晶封裝結構更包括一印刷電路 板109(其上具有導線以電性連接其他電子部件)、導電層110及散熱層111。晶片105與印刷電路板109之間有一散熱層111以利於散熱。第一基板106透過一導電層110附著於該第二基板109之上,以電性連接彼此。The second figure shows a cross-sectional view of a flip chip package structure of another example. As shown in the second figure, in this example, the flip chip package structure further includes a printed circuit. A board 109 having wires thereon for electrically connecting other electronic components, a conductive layer 110, and a heat dissipation layer 111. A heat dissipation layer 111 is disposed between the wafer 105 and the printed circuit board 109 to facilitate heat dissipation. The first substrate 106 is attached to the second substrate 109 through a conductive layer 110 to electrically connect to each other.

第三圖顯示根據本發明之整合透鏡架以及影像感測器之晶片上鏤空基板之模組結構之截面圖。如第三圖所示,其中透明基板於晶片上之模組結構200整合透鏡架以及影像感測器而成為一具有感光作用的模組結構,其可以應用於手機之照相模組。其中透明基板於晶片上之模組結構200包含鏤空基板209及基板211、晶片206、主動元件或被動元件207及208、透鏡架203、透鏡201以及透明基板202。The third figure shows a cross-sectional view of the module structure of the integrated lens holder and the image sensor on the wafer in accordance with the present invention. As shown in the third figure, the module structure 200 on which the transparent substrate is mounted on the wafer integrates the lens holder and the image sensor to form a photosensitive module structure, which can be applied to a camera module of a mobile phone. The module structure 200 on which the transparent substrate is on the wafer includes a hollow substrate 209 and a substrate 211, a wafer 206, active or passive components 207 and 208, a lens holder 203, a lens 201, and a transparent substrate 202.

晶片206可以透過一導電層或非導電黏著層附著於基板211之上。在一例子中,主動元件或被動元件208電性連接基板211上的導線。舉例而言,晶片206為一影像感測器,其上表面具有一感測區域206a以及接觸墊204d形成於其上;主動元件208為一半導體積體電路(IC),被動元件208包括電容或電感;基板211為一印刷電路板或軟性印刷電路板。The wafer 206 can be attached to the substrate 211 through a conductive layer or a non-conductive adhesive layer. In an example, the active or passive component 208 is electrically coupled to the wires on the substrate 211. For example, the wafer 206 is an image sensor having an upper surface having a sensing region 206a and a contact pad 204d formed thereon; the active device 208 is a semiconductor integrated circuit (IC), and the passive component 208 includes a capacitor or Inductance; the substrate 211 is a printed circuit board or a flexible printed circuit board.

舉一實施例而言,基板209具有形成於其內之凹槽結構,以接收或容納晶片206以及主動元件或被動元件208得以配置於該凹槽結構之內,與穿孔結構具有開口區域(open area)220a、220b、220c以利於晶片206之感測(主動)區域206a以及接觸墊204d可以裸露出來,如第五圖所示。 開孔(口)的位置與數量僅為示意並非用以限制本發明。基板209的尺寸較晶片的尺寸大。舉例而言,上述穿孔結構(開口區域220a、220b、220c)可以藉由沖孔或鑽孔等製程而形成於基板209之中。上述開口區域220a、220b及220c分別約略對準感測區域206a、接觸墊(I/O墊)204d。此外,基板209上形成一接觸墊204c。基於基板209內具有凹槽結構,因此有更多的空間可以容納電子元件,以配置於模組結構中。In one embodiment, the substrate 209 has a recessed structure formed therein to receive or house the wafer 206 and the active or passive component 208 is disposed within the recessed structure, having an open area with the perforated structure (open Areas 220a, 220b, 220c to facilitate sensing (active) regions 206a of wafer 206 and contact pads 204d may be exposed, as shown in the fifth figure. The location and number of apertures are merely illustrative and are not intended to limit the invention. The size of the substrate 209 is larger than the size of the wafer. For example, the above-mentioned perforated structure (opening regions 220a, 220b, 220c) may be formed in the substrate 209 by a process such as punching or drilling. The opening regions 220a, 220b, and 220c are approximately aligned with the sensing region 206a and the contact pad (I/O pad) 204d, respectively. Further, a contact pad 204c is formed on the substrate 209. Since the substrate 209 has a groove structure therein, there is more space for accommodating the electronic components to be disposed in the module structure.

其中焊接線205電性連接基板209上之接觸墊204c以及晶片206上之接觸墊204d。其中接觸墊204c係形成於基板209上之焊接區域(wire bonding area)230之上。透明基板202形成於基板209之上。一黏著層204b形成於基板209之上,而透明基板202係藉由黏著層204b而附著於基板209之上。透明基板202例如為一玻璃基板或其他透明材料所形成之基板,形成於基板209之上以覆蓋感測區域206a,結果產生透明基板202及感測區域206a之間的間隙(凹洞)。透明基板202覆蓋影像感測晶片206之感測區域206a,可以降低粒子污染以提升模組結構之良率。透明基板202可以與感測區域206a所佔面積相同或者比其稍大。此外,至少一被動元件207可以選擇性地形成(附著)於透鏡架內之基板209之上。The bonding wires 205 are electrically connected to the contact pads 204c on the substrate 209 and the contact pads 204d on the wafer 206. The contact pads 204c are formed on the wire bonding area 230 on the substrate 209. The transparent substrate 202 is formed over the substrate 209. An adhesive layer 204b is formed on the substrate 209, and the transparent substrate 202 is adhered to the substrate 209 by the adhesive layer 204b. The transparent substrate 202 is, for example, a substrate formed of a glass substrate or other transparent material, and is formed on the substrate 209 to cover the sensing region 206a. As a result, a gap (a recess) between the transparent substrate 202 and the sensing region 206a is generated. The transparent substrate 202 covers the sensing area 206a of the image sensing wafer 206, which can reduce particle contamination to improve the yield of the module structure. The transparent substrate 202 may be the same as or slightly larger than the area occupied by the sensing area 206a. Additionally, at least one passive component 207 can be selectively formed (attached) over the substrate 209 within the lens holder.

透明基板(玻璃基板)202可以為圓形或方形型態。透明基板(玻璃基板)202可以選擇性地塗佈紅外線塗層以作為濾波之用,例如為紅外線濾波器,用於過濾通過透鏡201 的某一波段的光波。The transparent substrate (glass substrate) 202 may be in a circular or square shape. The transparent substrate (glass substrate) 202 can be selectively coated with an infrared coating for filtering, for example, an infrared filter for filtering through the lens 201 Light waves of a certain band.

透鏡架203,其可以為單純塑膠件或驅動機構(Actuator),附著於基板209之上,以完成本發明之模組結構200。一黏著層204形成於基板209之上,而透鏡架203之底部藉由黏著層204而附著於基板209之上。其中透鏡201係固定於透鏡架203之中,透過透鏡架203以支撐透鏡201。此外,透鏡架203亦可以固定於基板209上以支撐透鏡201。透鏡201可以選擇性地配置於透鏡架203之最上方。在本實施例之模組結構200中,透明基板202可選擇性地配置於透鏡架203之內,以及透鏡201與晶片206之間。換言之,透鏡201係約略對準透明基板202與晶片206。基板209上的導線得以透過該導電層210a而電性連接基板211上的導線。導電層210a可以作為一黏著層,形成於基板209的二側。在本發明之一實施例中,導電層210a之材料包括導電膠或導電膜,透過一印刷、塗佈或其它製程以形成一圖案膠於基板之上。導電材料層210a可以選擇性地塗佈於基板211之上。基板211的尺寸大於基板209的尺寸,使得二者黏著之後,基板211得以向基板209之外延伸。而透鏡架整合透明基板202、基板209、基板211之一部分以及影像感測器106,以形成立方體模組結構。 基於基板211向立方體模組結構之外延伸,透過基板211上的導線得以將模組結構200上的電訊號傳遞至結構體外的其他元件。The lens holder 203, which may be a simple plastic member or an actuator, is attached to the substrate 209 to complete the module structure 200 of the present invention. An adhesive layer 204 is formed on the substrate 209, and the bottom of the lens holder 203 is attached to the substrate 209 by the adhesive layer 204. The lens 201 is fixed to the lens holder 203 and passes through the lens holder 203 to support the lens 201. In addition, the lens holder 203 may also be fixed to the substrate 209 to support the lens 201. The lens 201 can be selectively disposed at the uppermost portion of the lens holder 203. In the module structure 200 of the present embodiment, the transparent substrate 202 can be selectively disposed within the lens holder 203 and between the lens 201 and the wafer 206. In other words, the lens 201 is approximately aligned with the transparent substrate 202 and the wafer 206. The wires on the substrate 209 are electrically connected to the wires on the substrate 211 through the conductive layer 210a. The conductive layer 210a may be formed as an adhesive layer on both sides of the substrate 209. In one embodiment of the invention, the material of the conductive layer 210a comprises a conductive paste or a conductive film through a printing, coating or other process to form a pattern of glue on the substrate. The conductive material layer 210a may be selectively coated on the substrate 211. The size of the substrate 211 is larger than the size of the substrate 209 such that the substrate 211 is extended beyond the substrate 209 after the two are adhered. The lens holder integrates the transparent substrate 202, the substrate 209, a portion of the substrate 211, and the image sensor 106 to form a cube module structure. Based on the substrate 211 extending beyond the cube module structure, the wires on the substrate structure 211 are transmitted through the wires on the substrate 211 to other components outside the structure.

如第四圖所示,顯示本發明之晶片上鏤空基板之模組 結構之另一實施例。在本實施例中,基板209係附著於晶片206表面之上。在本實施例中,基板209與晶片206表面之間係透過黏著層(膠)圖案204e而彼此黏附。同時晶片206亦形成(附著)於基板211之上;亦即基板209與晶片206透過導電層210一起附著於基板211之上。其它結構類似第三圖,因此詳細描述省略之。As shown in the fourth figure, the module for hollowing out the substrate on the wafer of the present invention is shown Another embodiment of the structure. In the present embodiment, the substrate 209 is attached to the surface of the wafer 206. In the present embodiment, the substrate 209 and the surface of the wafer 206 are adhered to each other through the adhesive layer (glue) pattern 204e. At the same time, the wafer 206 is also formed (attached) on the substrate 211; that is, the substrate 209 and the wafer 206 are attached to the substrate 211 through the conductive layer 210. Other structures are similar to the third figure, and thus the detailed description is omitted.

在本發明之一實施例中,基板209為一印刷電路板,其材質可為有機基板,例如具有預設開孔之環氧樹脂型FR5或FR4、BT(Bismaleimide Triazine)。此外,玻璃、陶瓷以及矽亦可以作為基板209之材質。In one embodiment of the present invention, the substrate 209 is a printed circuit board, and the material thereof may be an organic substrate, such as epoxy type FR5 or FR4 or BT (Bismaleimide Triazine) having a predetermined opening. Further, glass, ceramics, and tantalum may also be used as the material of the substrate 209.

本發明之優點包含:具有較小(薄)的模組結構高度,具有較多的空間可以容納元件,利用目前容易且較便宜的焊接線製程,良好的熱效能,成本低廉且製程簡易,易製作多晶片封裝。The advantages of the invention include: having a small (thin) module structure height, having more space for accommodating components, utilizing the current easy and cheaper welding line process, good thermal efficiency, low cost and simple process, easy Make multi-chip packages.

對熟悉此領域技藝者,本發明雖以實例闡明如上,然其並非用以限定本發明之精神。在不脫離本發明之精神與範圍內所作之修改與類似的配置,均應包含在下述之申請專利範圍內,此範圍應覆蓋所有類似修改與類似結構,且應做最寬廣的詮釋。The present invention has been described above by way of example, and is not intended to limit the scope of the invention. Modifications and similar configurations made within the spirit and scope of the invention are intended to be included within the scope of the appended claims.

100‧‧‧覆晶封裝結構100‧‧‧Flip chip package structure

101、201‧‧‧透鏡101, 201‧ ‧ lens

102、202‧‧‧透明基板102, 202‧‧‧ Transparent substrate

103‧‧‧夾具部分103‧‧‧Clamp section

104、204‧‧‧透鏡架104, 204‧‧‧ lens holder

105、206‧‧‧晶片105, 206‧‧‧ wafer

106、211‧‧‧基板106, 211‧‧‧ substrate

107‧‧‧被動元件107‧‧‧ Passive components

108‧‧‧導電層108‧‧‧ Conductive layer

109‧‧‧印刷電路板109‧‧‧Printed circuit board

110、210a‧‧‧導電層110, 210a‧‧‧ conductive layer

111‧‧‧散熱層111‧‧‧heat layer

200‧‧‧晶片上鏤空基板之模組結構200‧‧‧Modular structure of hollow substrate on wafer

204、204b‧‧‧黏著層204, 204b‧‧‧ adhesive layer

204c、204d‧‧‧接觸墊204c, 204d‧‧‧ contact pads

204e‧‧‧黏著層(膠)圖案204e‧‧‧Adhesive layer (glue) pattern

205‧‧‧焊接線205‧‧‧welding line

206a‧‧‧感測區域206a‧‧‧Sensing area

207、208‧‧‧主動元件或被動元件207, 208‧‧‧ active or passive components

209‧‧‧鏤空基板209‧‧‧ hollow substrate

210‧‧‧黏著層(膠)圖案210‧‧‧Adhesive layer (glue) pattern

220a、220b、220c‧‧‧開口區域220a, 220b, 220c‧‧‧open area

230‧‧‧焊接區域230‧‧‧ welding area

第一圖顯示覆晶封裝結構之截面示意圖。The first figure shows a schematic cross-sectional view of a flip chip package structure.

第二圖顯示另一例子之覆晶封裝結構之截面示意圖。The second figure shows a schematic cross-sectional view of a flip chip package structure of another example.

第三圖顯示根據本發明之整合透鏡架以及影像感測器之晶片上鏤空基板之模組結構之截面圖。The third figure shows a cross-sectional view of the module structure of the integrated lens holder and the image sensor on the wafer in accordance with the present invention.

第四圖顯示根據本發明之另一實施例之整合透鏡架以及影像感測器之晶片上鏤空基板之模組結構之截面圖。The fourth figure shows a cross-sectional view of a module structure of a hollow substrate on a wafer integrated with a lens holder and an image sensor according to another embodiment of the present invention.

第五圖根據本發明之實施例之基板之上視圖。Fifth Figure is a top view of a substrate in accordance with an embodiment of the present invention.

200‧‧‧晶片上鏤空基板之模組結構200‧‧‧Modular structure of hollow substrate on wafer

201‧‧‧透鏡201‧‧‧ lens

202‧‧‧透明基板202‧‧‧Transparent substrate

203‧‧‧透鏡架203‧‧‧ lens holder

204、204b‧‧‧黏著層204, 204b‧‧‧ adhesive layer

204c、204d‧‧‧接觸墊204c, 204d‧‧‧ contact pads

205‧‧‧焊接線205‧‧‧welding line

206‧‧‧晶片206‧‧‧ wafer

206a‧‧‧感測區域206a‧‧‧Sensing area

207、208‧‧‧主動元件或被動元件207, 208‧‧‧ active or passive components

209‧‧‧鏤空基板209‧‧‧ hollow substrate

210‧‧‧黏著層(膠)圖案210‧‧‧Adhesive layer (glue) pattern

210a‧‧‧導電層210a‧‧‧ Conductive layer

211‧‧‧基板211‧‧‧Substrate

Claims (12)

一種晶片上鏤空基板之模組結構,包含:一第一基板;一晶片,配置於該第一基板之上,具有一第一接觸墊及一感測區域;一第二基板,配置於該第一基板與該晶片之上,具有凹槽結構、第一穿孔結構、第二穿孔結構及第二接觸墊,其中該晶片置於該凹槽結構中,該第一接觸墊透過一焊接線電性連接該第二接觸墊,該第一接觸墊裸露於該第一穿孔結構,該感測區域裸露於該第二穿孔結構;一被動元件或主動元件,配置於該基板之上;以及一透鏡架,配置於該第二基板之上,一透鏡位於該透鏡架之上方約略對準該感測區域。 A module structure for a hollow substrate on a wafer, comprising: a first substrate; a wafer disposed on the first substrate, having a first contact pad and a sensing region; and a second substrate disposed on the first substrate a substrate and the wafer have a groove structure, a first perforation structure, a second perforation structure and a second contact pad, wherein the wafer is placed in the groove structure, and the first contact pad is electrically connected through a bonding wire Connecting the second contact pad, the first contact pad is exposed to the first perforated structure, the sensing area is exposed to the second perforated structure; a passive component or an active component is disposed on the substrate; and a lens holder And disposed on the second substrate, a lens is located above the lens holder approximately aligned with the sensing region. 如請求項第1項之晶片上鏤空基板之模組結構,其中該第一基板透過一導電層附著於該第二基板之上。 The module structure of the substrate on the wafer of claim 1, wherein the first substrate is adhered to the second substrate through a conductive layer. 如請求項第1項之晶片上鏤空基板之模組結構,其中該第一基板為一印刷電路板或一軟性印刷電路板,該第二基板為一印刷電路板,該第二基板之材質包含環氧樹脂型FR5或FR4、BT(Bismaleimide Triazine)、玻璃、矽或陶瓷,其中該印刷電路板或該軟性印刷電路板之上具有其各自的導線。 The module structure of the substrate on the wafer of claim 1, wherein the first substrate is a printed circuit board or a flexible printed circuit board, and the second substrate is a printed circuit board, and the material of the second substrate comprises Epoxy type FR5 or FR4, BT (Bismaleimide Triazine), glass, tantalum or ceramic, wherein the printed circuit board or the flexible printed circuit board has its own wires thereon. 如請求項第1項之晶片上鏤空基板之模組結構,其中該晶片透過一導電層或非導電黏著層附著於該第一基板之上。 The module structure of the substrate on the wafer of claim 1, wherein the wafer is attached to the first substrate through a conductive layer or a non-conductive adhesive layer. 如請求項第1項之晶片上鏤空基板之模組結構,其中該第二基板透過一黏著層而附著於該晶片之上。 The module structure of the substrate on the wafer of claim 1, wherein the second substrate is adhered to the wafer through an adhesive layer. 如請求項第1項之晶片上鏤空基板之模組結構,其中該透鏡架透過一黏著層而附著於該第二基板之上。 The module structure of the substrate on the wafer of claim 1, wherein the lens holder is attached to the second substrate through an adhesive layer. 如請求項第1項之晶片上鏤空基板之模組結構,更包含一透明基板,配置於該第二基板以及該晶片之上,約略對準該感測區域。 The module structure of the hollow substrate on the wafer of claim 1 further includes a transparent substrate disposed on the second substrate and the wafer, approximately aligned with the sensing region. 如請求項第7項之晶片上鏤空基板之模組結構,其中該第一基板透過一導電層附著於該第二基板之上。 The module structure of the substrate on the wafer of claim 7, wherein the first substrate is adhered to the second substrate through a conductive layer. 如請求項第7項之晶片上鏤空基板之模組結構,其中該第一基板為一印刷電路板或一軟性印刷電路板,該第二基板為一印刷電路板,該第二基板之材質包含環氧樹脂型FR5或FR4、BT(Bismaleimide Triazine)、玻璃、矽或陶瓷,其中該印刷電路板或該軟性印刷電路板之上具有其各自的導線。 The module structure of the substrate on the wafer of claim 7, wherein the first substrate is a printed circuit board or a flexible printed circuit board, the second substrate is a printed circuit board, and the material of the second substrate comprises Epoxy type FR5 or FR4, BT (Bismaleimide Triazine), glass, tantalum or ceramic, wherein the printed circuit board or the flexible printed circuit board has its own wires thereon. 如請求項第7項之晶片上鏤空基板之模組結構,其中該晶片透過一導電層或非導電黏著層附著於該第一基板之上。 The module structure of the substrate on the wafer of claim 7, wherein the wafer is attached to the first substrate through a conductive layer or a non-conductive adhesive layer. 如請求項第7項之晶片上鏤空基板之模組結構,其中該第二基板透過一黏著層而附著於該晶片之上。 The module structure of the substrate on the wafer of claim 7, wherein the second substrate is adhered to the wafer through an adhesive layer. 如請求項第7項之晶片上鏤空基板之模組結構,其中該透鏡架透過一黏著層而附著於該第二基板之上。The module structure of the substrate is hollowed out on the wafer of claim 7, wherein the lens holder is attached to the second substrate through an adhesive layer.
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Citations (4)

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Publication number Priority date Publication date Assignee Title
TWM244691U (en) * 2003-09-08 2004-09-21 Internat Semiconductor Technol Supper thin type camera module
TW200744374A (en) * 2006-05-24 2007-12-01 Advanced Semiconductor Eng Detachable image sensor module and portable electronic apparatus applying the same
US20110141346A1 (en) * 2009-12-14 2011-06-16 Lg Innotek Co., Ltd. Camera Module and Manufacturing Method Thereof
US20120105713A1 (en) * 2010-11-02 2012-05-03 Stmicroelectronics Asia Pacific Pte Ltd. Low profile chip scale module and method of producing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM244691U (en) * 2003-09-08 2004-09-21 Internat Semiconductor Technol Supper thin type camera module
TW200744374A (en) * 2006-05-24 2007-12-01 Advanced Semiconductor Eng Detachable image sensor module and portable electronic apparatus applying the same
US20110141346A1 (en) * 2009-12-14 2011-06-16 Lg Innotek Co., Ltd. Camera Module and Manufacturing Method Thereof
US20120105713A1 (en) * 2010-11-02 2012-05-03 Stmicroelectronics Asia Pacific Pte Ltd. Low profile chip scale module and method of producing the same

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