TWI453869B - Rom and manufacturing method of the same - Google Patents

Description

Read-only memory and its manufacturing method

The present invention relates to a read only memory, and more particularly to a method of manufacturing the memory bit effect about one second (2 ^nd bit effect) inhibition read only.

A read-only memory having a charge storage structure as a data storage type is a conventional non-volatile memory. A read-only memory structure contains a structural layer that stores and even captures charge characteristics, such as an ONO (oxide-nitride-oxide) layer. If a localized charge trapping structure is used to store charge, it can allow two separate charge cells in each memory cell to form a so-called single memory cell (2 bits/cell) memory.

In order to determine the actually separated charge on both sides of a two-dimensional memory, reverse reading is used. Reverse reading represents the completion of a read operation by applying a read bias to the source terminal to sense the charge on the drain side junction; and vice versa. If there is charge on the source side junction, the read bias needs to be high enough to block the effects of charge on the source side junction.

However, when operating a two-bit memory, the two bits of the same memory cell still interact with each other and cause problems. Therefore, if one side of the memory cell has stored a single element, when the other side of the memory cell is read, the current portion that should be a high current has a current drop, that is, the so-called second bit effect. . That is, when reading the memory cells When the operation is taken, the originally existing bit element will affect the memory cell, and the enablement barrier is increased, and the threshold voltage (Vt) of the reading is increased. In this case, it is easy to cause a reading error.

The second bit effect not only causes difficulty in the operation of the component, but may even cause a decrease in the reliability of the component. Moreover, since the second bit effect reduces the sense margin and the threshold voltage space (Vt window) for operating the left and right bits, the operation of the multi-level memory is more difficult.

The invention provides a read-only memory capable of reducing the second bit effect.

The present invention further provides a method of manufacturing a read-only memory capable of producing a memory that is less affected by the second bit effect.

The present invention provides a read-only memory comprising a substrate, a source region and a drain region, a charge storage structure, a gate and a local extreme doping region. The source region and the drain region are disposed in the substrate, the charge storage structure is on the substrate between the source region and the drain region, and the gate is disposed on the charge storage structure. The local extreme doping region is located within the substrate between the source region and the drain region, and the local extreme doping region includes a low doping concentration region and at least one high doping concentration region. The high doping concentration region is disposed between one of the source region and the drain region and the low doping region, wherein the doping concentration of the high doping region is three times higher than the doping concentration of the low doping region the above. The high doping concentration region and the low doping concentration region are in the same conductive state.

In an embodiment of the invention, the doping concentration of the high doping concentration region is 10 times or less higher than the doping concentration of the low doping concentration region.

In an embodiment of the invention, the doping concentration of the substrate is 3 to 10 times higher than the doping concentration of the low doping concentration region.

In an embodiment of the invention, the high doping concentration region comprises two doped regions between the source region and the low doping concentration region and between the drain region and the low doping concentration region.

In an embodiment of the invention, the thickness of the low doping concentration region is, for example, between 50 Å and 500 Å.

In one embodiment of the invention, the low doping concentration region is in direct contact with the charge storage structure.

In one embodiment of the invention, the distance between the edge of the low doping concentration region and the source region or the drain region is less than about 150 Å.

The invention further provides a method for manufacturing a read-only memory, comprising forming a well region at a distance from a surface thereof in a substrate, forming a charge storage structure on the substrate, and forming a gate on the charge storage structure. Then, a source region and a drain region are formed in the substrate on both sides of the charge storage structure. Forming a local extreme doping region in the substrate between the source region and the drain region, wherein the local extreme doping region includes at least a low doping concentration region and at least one high doping concentration region, and high doping The doping concentration of the concentration region is more than three times higher than the doping concentration of the low doping concentration region.

In another embodiment of the present invention, a method of forming the well region includes implanting a dopant into a substrate outside the distance; or forming a well region comprising doping the substrate, The substrate is then inversely doped to reduce the doping concentration within the substrate within the above distance.

In another embodiment of the invention, the local extreme doping region is formed The method comprises carbon ion co-implantation or low temperature ion implantation and a thermal reduction process on the edges of the source region and the drain region to form a high doping concentration region with a narrow upper and a lower width.

Based on the above, the read-only memory of the present invention adopts a structure of a locally extreme doped region in the channel region, so that the effect of the second bit effect on the operation of the device can be reduced by the channel having a large difference in doping concentration.

The above described features and advantages of the present invention will be more apparent from the following description.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic illustration of a read only memory in accordance with a first embodiment of the present invention.

In FIG. 1, the read-only memory includes a substrate 100, a source region 102a and a drain region 102b, a charge storage structure 104, a gate 106, and a local extreme doping region 108. Herein, the "local extreme doping region" means a region composed of a plurality of doping regions having a doping concentration difference of more than 3 times or more. The local extreme doping region 108 is located in the substrate 100 between the source region 102a and the drain region 102b, and the local extreme doping region 108 includes a low doping concentration region 110 and at least one highly doped concentration region. 112. The difference in doping concentration in the local extreme doping region 108 composed of the plurality of doped regions is more than 3 times, and the second bit effect can be reduced by about 0.66 times compared with the region only having the low doping concentration region 110. On the other hand, if the difference in doping concentration is not more than 3 times, the degree of the second bit effect is not significant. The source region 102a and the drain region 102b are disposed in the substrate 100 and have a charge The storage structure 104 is located on the substrate 100 between the source region 102a and the drain region 102b, and the gate 106 is disposed on the charge storage structure 104.

The high doping concentration region 112 may be disposed only between the source region 102a and the low doping concentration region 110, and only between the drain region 102b and the low doping concentration region 110; or as shown in FIG. It is disposed between the source region 102a and the drain region 102b and the low doping concentration region 110. The doping concentration of the high doping concentration region 112 is required to be more than three times higher than the doping concentration of the low doping concentration region 110; for example, 3 times to 20 times; preferably 3 times or more and 10 times or less. The charge storage structure 104 described above can be an ONO layer or other suitable charge storage layer.

In the present embodiment, the high doping concentration region 112 is a region that is narrower and narrower, and the high doping concentration region 112 and the low doping concentration region 110 are in the same conductive state, such as the high doping concentration region 112 and low doping. The concentration regions 110 are all p-type, and the source regions 102a and the drain regions 102b are all n-type. As for the well region 114 in the substrate 100, the doping concentration (i.e., the doping concentration of the substrate 100) is, for example, 3 to 10 times higher than the doping concentration of the low doping concentration region 110; in other words, the doping concentration of the substrate 100. The doping concentration of the high doping concentration region 112 may be equal to or close to.

Several simulation experiments are listed below.

Simulation experiment one

The simulated objects are a read-only memory with local extreme doping regions (Fig. 2) and a conventional read-only memory without a local extreme doping region (control), and the source regions, channels and The doping concentration of the drain region changes. In the read-only memory 200 of FIG. 2, a charge has been injected at a position 204 on the right side of the ONO layer 202, so the simulation experiment is for the ONO layer 202. When reading on the other side, the second bit effect change of the memory with or without the local extreme doping region is estimated, and the result is shown in Fig. 3B.

It can be seen from Fig. 3B that a read-only memory having a locally extreme doped region can substantially reduce the second bit effect.

Simulation experiment 2

The simulated object is a read-only memory 400 having a locally extreme doped region (Fig. 4), wherein the fixed parameters are: L _g = 0.08 μm; L _eff = 0.057 μm; doping concentration of the high doping concentration region 404 = The doping concentration of the substrate 406 = 2e18 cm ^-3 ; the doping concentration of the source region 408a and the drain region 408b = 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof and the left edge of the drain region 408b Cut together.

The variable is the doping concentration of the low doping concentration region 412 in the local extreme doping region, and the doping concentration change shown in FIG. 5A is 3.0e18 cm ^-3 to the ratio of the doping concentration of the high doping concentration region 404. The doping concentration of the highly doped concentration region 404 is as small as 1.0e16 cm ^-3 .

See Table 1 and Figure 5B for the simulation results.

It can be seen from Table 1 that when the concentration difference is more than 3 times, the second bit effect is only 0.66 times of the uniform concentration (ie, the concentration of the low doping concentration region 412 is 2.0e18). If the doping concentration of the high doping concentration region 404 is not higher than 3 times than the doping concentration of the low doping concentration region 412, although the second bit effect also tends to shrink, the effect is not so obvious.

The above results are also obtained from FIG. 5B, and when the doping concentration of the high doping concentration region 404 is more than 10 times higher than the doping concentration of the low doping concentration region 412, the change in the second bit effect is gradually reduced, so even The difference in doping concentration between the high doping concentration region 404 and the low doping concentration region 412 is greater, and the effect on the memory for reducing the second bit effect will tend to be uniform.

Simulation experiment three

The simulated object is basically the same as the read-only memory 400 of FIG. 4, wherein the fixed parameters are: L _g =0.08 μm; L _eff =0.057 μm; the doping concentration of the low doping concentration region is fixed at 1e17 cm ^-3 ; The doping concentration of the region and the drain region is 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof is aligned with the left edge of the drain region 408b.

Extreme local variable doping concentration of doped regions with high doping concentration of the substrate region, and simulate 1e18cm ^-3, 2e18cm ^-3, 3e18cm ^-3 result of FIG. 6, which shows a high doping concentration doped region The change in the impurity concentration has little effect on the memory for reducing the second bit effect, but the lower doping concentration affects the V _pt (punch-through voltage).

Simulation experiment four

The simulated object is basically the same as the read-only memory 400 of FIG. 4, wherein the fixed parameters are: L _g =0.08 μm; L _eff =0.057 μm; the doping concentration of the low doping concentration region is fixed at 1e17 cm ^-3 ; The doping concentration of the region and the drain region is 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof is aligned with the left edge of the drain region 408b.

The doping concentration of the high doping concentration region in the local extreme doping region is 10 times higher than the doping concentration in the low doping concentration region.

Variable high doping concentration doping concentration region and the low concentration region, and each simulated doping concentration of the high impurity concentration region 1e18cm ^-3, 2e18cm ^-3, 3e18cm ^-3 situation, shown in Figure 7. The results .

As can be seen from Fig. 7, similar results can be obtained as long as the doping concentration ratio of the high and low doping concentration regions is maintained.

Simulation experiment five

The simulated object is basically the same as the read-only memory 400 of FIG. 4, wherein the fixed parameters are: L _g =0.08 μm; L _eff =0.057 μm; the doping concentration of the low doping concentration region is 1e17 cm ^-3 ; The doping concentration of the concentration region and the substrate are both 2e18 cm ^-3 ; the doping concentration of the source region and the drain region is = 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof and the left side of the drain region 408b The edges are aligned.

The variable is the thickness of the low doping concentration region. See Figure 8A for the thickness variation from 9 Å to 345 Å. The simulation results are shown in Figure 8B. As can be seen from FIG. 8B, the thickness of the low doping concentration region is between 50 Å and 500 Å, which has the effect of reducing the second bit effect. Moreover, since the improvement of the thickness of the low doping concentration region greater than 150 Å is limited from the simulation results, the thickness of the low doping concentration region is preferably between 50 Å and 150 Å.

Simulation experiment six

The simulated object is the read-only memory of Figure 9, where the fixed parameters are: L _g = 0.08 μm; L _eff = 0.057 μm; the doping concentration of the low doping concentration region is 1e17 cm ^-3 ; the high doping concentration region and the substrate The doping concentration is 2e18 cm ^-3 ; the doping concentration of the source region and the drain region is 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof is aligned with the left edge of the drain region 408b.

The variable is that the distance d1 between the low doping concentration region and the ONO layer varies from 0 to 42 Å, and the simulation results are shown in FIG. As can be seen from Figure 10, low blending The direct contact between the impurity concentration region and the ONO layer (ie, the charge storage structure) is the best.

Simulation experiment seven

The simulated object is the read-only memory of Figure 11, where the fixed parameters are: L _g = 0.08 μm; L _eff = 0.057 μm; the doping concentration of the low doping concentration region is 1e17 cm ^-3 ; the high doping concentration region and the substrate The doping concentration is 2e18cm ^-3 ; the doping concentration of the source region and the drain region is = 1e20cm ^-3 .

The variable is the distance between the source region 408a or the drain region 408b and the edge of the low doping concentration region. See Figure 12A for the width W change from 110 Å to 550 Å. The simulation results are shown in Figure 12B.

Since the width W of the edge of the charge storage region 410 and the edge of the low doping concentration region is 0 when the L _g is 0.08 μm, the width W corresponding to 0 is 470 Å, so that the source region 408a or 汲 is known from FIG. 12B. The distance between the polar region 408b and the edge of the low doping concentration region of less than 150 Å is helpful in reducing the second bit effect, and the edge of the charge storage region is aligned with the edge of the low doping concentration region to obtain the best effect.

Simulation experiment eight

Analog simulation objects such as read only memory seven, which differ only in L _g is 0.07μm, L _eff = 0.043μm.

The variable is also the distance between the source region 408a or the drain region 408b and the edge of the low doping concentration region 412. See Figure 13A for the width variation from 110 Å to 390 Å. The simulation results are shown in Figure 13B.

Since the width of the edge of the charge storage region and the edge of the low doping concentration region is 0 when the L _g is 0.07 μm, the corresponding width is 350 Å, so that the source region 408a or the drain region is known from FIG. 13B. The distance between the 408b and the edge of the low doping concentration region of less than 150 Å is helpful in reducing the second bit effect, and the edge of the charge storage region is aligned with the edge of the low doping concentration region to obtain the best effect. This result is the same as the simulation experiment 7.

Simulation experiment nine

The simulated object is the read-only memory of FIG. 14A to FIG. 14C, wherein the fixed parameters are: L _g =0.08 μm; L _eff =0.057 μm; the doping concentration of the low doping concentration region is 1e17 cm ^-3 ; The doping concentration of the region and the substrate are both 2e18 cm ^-3 ; the doping concentration of the source region and the drain region is = 1e20 cm ^-3 ; the width of the charge storage region 410 is 50 Å, and the right edge thereof and the left edge of the drain region 408b Cut together.

The variable is the relationship between the high and low doping concentration regions in the local extreme doping region and the charge storage region. 14A is a symmetrical high doping concentration region on both sides of the low doping concentration region; FIG. 14B is a single high doping concentration region in which the low doping concentration region has an asymmetry only, and the high doping concentration region and the charge storage region are located at The same side; FIG. 14C is also a single high doping concentration region in which the low doping concentration region has an asymmetry on one side, but the high doping concentration region is on the different side from the charge storage region. The simulation results are shown in Figure 15.

As can be seen from Fig. 15, the structure of Fig. 14C has a better effect of suppressing the second bit effect.

The above diagram of the read-only memory of the simulation experiment 2~9, if no For the special indication, refer to the content of FIG.

16A to 16D are schematic cross-sectional views showing a manufacturing process of a read-only memory in accordance with a second embodiment of the present invention.

Referring to FIG. 16A, a well region 1602 is formed in a substrate 1600 at a distance d2 from its surface 1600a, wherein the doping concentration of the well region 1602 is more than 10 times higher than the intrinsic doping concentration of the substrate 1600.

The above process directly implants a dopant into the substrate 1600 so as to be located in the substrate 1600 outside the distance d2, and can also be combined with the heat treatment after the general ion implantation. In other embodiments, the well region 1602 may be formed by doping the substrate 1600 and then performing a reverse doping of the substrate 1600 to reduce the doping concentration in the substrate 1600 within a distance d2. That is, the substrate 1600 may be subjected to p-type ion implantation, and then n-type ion implantation may be performed in the substrate 1600 within a distance d2.

Referring next to FIG. 16B, a charge storage structure 1604 is formed over the substrate 1600, and a gate 1606 is formed over the charge storage structure 1604. The charge storage structure 1604 is, for example, an ONO layer, and the gate 1606 is, for example, a polysilicon layer.

Referring now to Figure 16C, a source/drain region 1608 is formed within the substrate 1600 between the charge storage structures 1604. Thereafter, a localized highly doped region 1610 is formed in the substrate 1600 between the source/drain regions 1608, wherein the localized highly doped region 1610 includes at least a low doping concentration region 1612 and at least one high doping region. The concentration region 1614, and the doping concentration of the high doping concentration region 1614 is more than three times higher than the doping concentration of the low doping concentration region 1612. The high doping concentration region 1614 is fabricated by performing a pocket implant process on the edge of the source/drain region 1608 to form a high doping with an upper narrow width. a concentration region 1614, wherein the pocket implant process, such as carbon co-implantation or low temperature ion implantation, is combined with a thermal reduction process to accurately obtain a desired high The doping profile of the doping concentration region 1614. At this time, the doping concentration of the well region 1602 is, for example, 3 to 10 times higher than the doping concentration of the low doping concentration region 1612.

Finally, the process of FIG. 16D can be selectively performed to form an insulating layer 1616 on the surface of the source/drain region 1608 and a word line 1618 connecting the gate 1606 over the entire substrate 1600.

Based on the above, the design concept of the present invention consists in forming a channel region of a read-only memory with a plurality of doping regions having a large difference in doping concentration to form a local extreme doping region, and thereby reducing the second bit effect on the device operation. Impact.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100, 1600, 406‧‧‧ base

102a, 408a, 1608‧‧‧ source area

102b, 408b, 1608‧‧‧ bungee area

104, 1604‧‧‧ Charge storage structure

106, 1606‧‧‧ gate

108, 1610‧‧‧Local extreme doping zone

110, 412, 1612‧‧‧ low doping concentration zone

112, 1614, 404‧‧‧High doping concentration zone

114, 1602‧‧ Well area

200, 400‧‧‧ read-only memory

202, 402‧‧‧ONO layer

204‧‧‧Location

410‧‧‧charge storage area

1600a‧‧‧ surface

1618‧‧‧ character line

1616‧‧‧Insulation

D1, d2‧‧‧ distance

W‧‧‧Width

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic illustration of a read only memory in accordance with a first embodiment of the present invention.

2 is a schematic diagram of a read-only memory of the simulation experiment 1.

Fig. 3A shows the change in doping concentration of the source region, the channel and the drain region of the read-only memory of the simulation experiment 1.

Fig. 3B shows a second bit effect change diagram of the simulation experiment 1.

4 is a schematic diagram of a read-only memory of the second experiment.

Figure 5A shows the change in doping concentration of the low doping concentration region in the local extreme doping region of the read-only memory of the second experiment.

Figure 5B shows a second bit effect change plot for Simulation Experiment 2.

Figure 6 shows the second bit effect change plot of the simulation experiment 3.

Figure 7 shows a second bit effect change plot for the simulation experiment 4.

Fig. 8A shows the thickness variation of the low doping concentration region in the local extreme doping region of the read-only memory of the simulation experiment 5.

Figure 8B shows a second bit effect change plot for Simulation Experiment 5.

Figure 9 is a schematic diagram of the read-only memory of the simulation experiment 6.

Figure 10 shows a second bit effect change plot for the simulation experiment 6.

Figure 11 is a schematic diagram of the read-only memory of the simulation experiment 7.

Fig. 12A shows the change in the distance between the edge of the charge storage region of the simulation experiment 7 and the edge of the low doping concentration region.

Fig. 12B shows a second bit effect change diagram of the simulation experiment 7.

Fig. 13A shows the change in the distance between the edge of the charge storage region of the simulation experiment 8 and the edge of the low doping concentration region.

Fig. 13B shows a second bit effect change diagram of the simulation experiment 8.

14A to 14C are schematic views of the read-only memory of the simulation experiment 9.

Figure 15 shows a second bit effect change plot for the simulation experiment 9.

16A to 16D are schematic cross-sectional views showing a manufacturing process of a read-only memory in accordance with a second embodiment of the present invention.

100‧‧‧Base

102a‧‧‧ source area

102b‧‧‧Bungee Area

104‧‧‧Charge storage structure

106‧‧‧ gate

108‧‧‧Local extreme doping zone

110‧‧‧Low doping concentration zone

112‧‧‧High doping concentration zone

Claims (9)

A read-only memory comprising: a substrate; a source region and a drain region disposed in the substrate; a charge storage structure on the substrate between the source region and the drain region; a gate disposed on the charge storage structure; and a locally extreme doped region located in the substrate between the source region and the drain region, and the local extreme doping region includes: a low doping concentration a region having a distance between the edge and the source region or the drain region of less than 150 Å; and at least one highly doped concentration region disposed between the source region and the drain region and the low doping concentration Between the regions, wherein the doping concentration of the at least one high doping concentration region is more than three times higher than the doping concentration of the low doping concentration region, and the at least one high doping concentration region and the low doping concentration region It is the same conductive state. The read-only memory of claim 1, wherein the doping concentration of the at least one highly doped concentration region is less than 10 times higher than the doping concentration of the low doping concentration region. The read-only memory of claim 1, wherein the doping concentration of the substrate is 3 to 10 times higher than the doping concentration of the low doping concentration region. The read-only memory according to claim 1, wherein the at least one highly doped concentration region comprises two doped regions respectively located in the source region. And the low doping concentration region and between the drain region and the low doping concentration region. The read-only memory according to claim 1, wherein the low doping concentration region has a thickness of between 50 Å and 500 Å. The read-only memory of claim 1, wherein the low doping concentration region is in direct contact with the charge storage structure. A method for manufacturing a read-only memory, comprising: forming a well region in a substrate, the well region being spaced apart from a surface of the substrate; forming a charge storage structure on the substrate; forming a charge storage structure on the substrate a gate electrode; a source region and a drain region are formed in the substrate on both sides of the charge storage structure; and a local extreme doping region is formed in the substrate between the source region and the drain region, Wherein the local extreme doping region comprises at least a low doping concentration region and at least one high doping concentration region, and the doping concentration of the at least one high doping concentration region is higher than the doping concentration of the low doping concentration region More than 3 times, wherein the distance between the edge of the low doping concentration region and the source region or the drain region is less than 150 Å. The method of manufacturing a read-only memory according to claim 7, wherein the method of forming the well region comprises: implanting a dopant into the substrate to be located in the substrate outside the distance, or forming the The method of the well region includes: doping the substrate; The substrate is inversely doped to reduce the doping concentration within the substrate within the distance. The method for manufacturing a read-only memory according to claim 7, wherein the method for forming the local extreme doping region comprises: carbon ion co-implantation or low temperature of the edge of the source region and the drain region; The ion implantation is combined with a thermal reduction process to form the high doping concentration region of the upper narrow and lower width.