TWI447842B - Apparatus, device and method for determining alignment errors - Google Patents

Apparatus, device and method for determining alignment errors Download PDF

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TWI447842B
TWI447842B TW100143195A TW100143195A TWI447842B TW I447842 B TWI447842 B TW I447842B TW 100143195 A TW100143195 A TW 100143195A TW 100143195 A TW100143195 A TW 100143195A TW I447842 B TWI447842 B TW I447842B
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map
alignment
stress
contact surface
strain
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TW201234516A (en
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Markus Wimplinger
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Ev Group E Thallner Gmbh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67259Position monitoring, e.g. misposition detection or presence detection

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Description

判定對準誤差的裝置、器件和方法Apparatus, device and method for determining alignment error

本發明係關於一種如請求項1所主張之用於判定局部對準誤差(歸因於在一第一基板接合至一第二基板時該第一基板相對於該第二基板之應變及/或畸變而引起)之裝置。此外,本發明係關於一種用於偵測及/或預測畸變、尤其用於對準影響基板之畸變及基板之器件,以及一種如請求項4所主張之用於對準一第一基板之第一接觸表面與一第二基板之一第二接觸表面及/或檢驗該對準之器件,及一種如請求項8所主張之方法。此外,本發明係關於如請求項9或10所主張之一用途。The present invention relates to a method for determining local alignment error as claimed in claim 1 (due to strain of the first substrate relative to the second substrate when a first substrate is bonded to a second substrate and/or A device caused by distortion. Furthermore, the present invention relates to a device for detecting and/or predicting distortion, particularly for aligning distortions and substrates affecting a substrate, and a method for aligning a first substrate as claimed in claim 4 A contact surface and a second contact surface of a second substrate and/or a device for verifying the alignment, and a method as claimed in claim 8. Furthermore, the invention relates to one of the uses as claimed in claim 9 or 10.

在早期歐洲專利申請案09012023.9中,對準期間存在之基本問題描述於1至3頁。In the earlier European patent application 09012023.9, the basic problems that existed during alignment are described on pages 1 to 3.

歸因於變得越來越重要之3D技術與發展小型化組合,在結合程序中實施一校正對準程序變得越來越重要,尤其與在實際結合程序前經由一可分離連接使晶圓互相連接之一所謂預結合步驟耦合。此主要在申請案中係重要的,其中對於晶圓上的所有位置需要優於2微米之對準精確度。對準技術及預結合程序之精確度之重要性及需求大幅增加以達到小於1微米(尤其小於0.5微米或小於0.25微米)之所需精確度。Due to the increasingly important 3D technology and the development of miniaturization, it is becoming more and more important to implement a calibration alignment procedure in the combined procedure, especially with a detachable connection prior to the actual bonding procedure. One of the interconnections is called a pre-bonding step coupling. This is primarily important in the application where alignment accuracy better than 2 microns is required for all locations on the wafer. The importance and need for precision in alignment techniques and pre-bonding procedures has increased dramatically to achieve the required accuracy of less than 1 micron (especially less than 0.5 microns or less than 0.25 microns).

基於結構變得越來越小,但同時晶圓變得越來越大之事實,在對準標記附近可有彼此對準良好之結構,而在晶圓之其他位置處,該等結構彼此無法正確地接合或彼此至少未最佳接合。為使該晶圓之兩側上的結構彼此最佳接合,正在開發耦合至經非常好監測及最佳化之結合技術(尤其預結合技術)之非常複雜對準技術。Based on the fact that the structure becomes smaller and smaller, but at the same time the wafer becomes larger and larger, there may be a structure that is well aligned with each other near the alignment mark, and at other positions of the wafer, the structures cannot be mutually Properly joined or at least not optimally joined to each other. In order to optimally bond the structures on both sides of the wafer to each other, very complex alignment techniques coupled to a very well monitored and optimized bonding technique, especially pre-bonding techniques, are being developed.

當前技術意欲每次將一些對準標記記錄於兩個晶圓之一側上及隨後使用此等對準標記來對準該兩個晶圓且結合該兩個晶圓。此時取決於用於對準之各自技術而可產生若干問題。The current technology intends to record some alignment marks on one side of two wafers and then use the alignment marks to align the two wafers and bond the two wafers. Several problems can arise at this time depending on the respective techniques for alignment.

歐洲申請案EP 09012023.9之申請者已申請一種方法,使用該方法可量測一晶圓之整個表面以獲得關於各晶圓之表面上的結構之位置之資訊。Applicants of European Application No. EP 0 901 202 3.9 have applied a method by which the entire surface of a wafer can be measured to obtain information about the location of the structures on the surface of each wafer.

本發明之目標在於開發一種通用器件或一種通用方法,使得尤其關於晶圓之整個表面之較高偵測達成更準確對準且最小化偵測位置或稍後對準時之誤差。此外,本發明之目標在於增加偵測位置及晶圓之對準時的處理量。It is an object of the present invention to develop a general purpose device or a general method that achieves more accurate alignment and minimizes errors in detection position or later alignment, especially with respect to higher detection of the entire surface of the wafer. Furthermore, the object of the present invention is to increase the amount of processing when detecting the position and alignment of the wafer.

此目標係藉由技術方案1、4及8之特徵而達成。於獨立技術方案中給定本發明之有利開發。說明書中所給定之該等特徵之至少兩者、技術方案及/或圖之所有組合亦落入本發明之框架中。在所給定之值之範圍中,所指示之限制內的值亦被揭示為邊界值且主張於任意組合中。This goal was achieved by the features of technical solutions 1, 4 and 8. Advantageous developments of the invention are given in the independent technical solution. All combinations of at least two of the features, technical solutions and/or figures presented in the specification are also included in the framework of the invention. In the range of values given, the values within the indicated limits are also disclosed as boundary values and are claimed in any combination.

本發明係基於在對準基板之前、對準基板期間及/或對準基板之後記錄該等基板(尤其晶圓)之位置圖、應變圖及/或應力圖之觀點,尤其透過該等基板之至少一者之至少一透明區域以觀察其等且視情況尤其現場校正該兩個基板對於彼此之相對位置而對準。The present invention is based on the viewpoint of recording a positional map, a strain map and/or a stress map of the substrates (especially wafers) prior to aligning the substrates, during alignment of the substrates, and/or after aligning the substrates, particularly through the substrates. At least one transparent region of at least one of the plurality of transparent regions to observe them and, as the case may be, in particular, to align the relative positions of the two substrates to each other.

圖被定義為沿著一表面之該等基板之某些X-Y位置處的性質,尤其值。The figure is defined as the property, especially the value, at certain X-Y positions of the substrates along a surface.

基本觀點在於:在接合該等基板之後判定沿著該等基板之至少一者之應變值之至少一應變圖,且以該等經判定之應變值可判定局部對準誤差。局部對準誤差較佳係關於局部結構或該等基板之局部結構群組。The basic idea is to determine at least one strain map along the strain value of at least one of the substrates after joining the substrates, and to determine the local alignment error with the determined strain values. The local alignment error is preferably related to the local structure or a local structural group of the substrates.

如本發明所主張,該基板或該兩個基板之一位移圖係為由接合該等基板所引起之位移作準備。該等位移尤其係由該等基板之畸變及/或應變而引起。As claimed in the present invention, the displacement pattern of the substrate or the two substrates is prepared by the displacement caused by the bonding of the substrates. Such displacements are caused in particular by distortion and/or strain of the substrates.

該基本觀點在於能估計尤其在各自基板上的複數個局部位置處(較佳在該各自基板之一位置圖所指定之位置處)之由預結合步驟或接合步驟所引入之畸變有多嚴重(→畸變向量)。可使用透明視窗量測在預結合之後實際所達成之對準精確度,但如下文所描述,歸因於此等畸變可降級結果,故此指示關於整個晶圓上的實際所達成之精確度之僅一小部分。由於該等晶圓對紅外線輻射不透明,故無法直接量測對準精確度。根據本發明,此經由偵測應力圖及/或應變圖而估計。The basic idea is to be able to estimate how severe the distortion introduced by the pre-bonding step or the bonding step is at a plurality of local locations on the respective substrate, preferably at the location specified by the position map of one of the respective substrates ( →distortion vector). The transparent window can be used to measure the alignment accuracy actually achieved after pre-bonding, but as described below, the distortion can be degraded due to such distortion, thus indicating the actual accuracy achieved over the entire wafer. Only a small part. Since the wafers are opaque to infrared radiation, alignment accuracy cannot be directly measured. According to the invention, this is estimated by detecting a stress map and/or a strain map.

一重要態樣在於:一較佳實施例中,如本發明所主張之裝置(或量測器件)經提供與對準器件分離作為一獨立模組。An important aspect is that in a preferred embodiment, the device (or measuring device) as claimed in the present invention is provided as a separate module from the alignment device.

在一較佳實施例中,該模組分割為如下:In a preferred embodiment, the module is divided as follows:

1)用於在接合(結合或預結合)前偵測一應力圖及/或應變圖之模組1) Module for detecting a stress map and/or strain map before joining (bonding or pre-bonding)

2)尤其根據歐洲專利申請案EP 09012023.9之對準模組。但晶圓對準亦可使用僅兩個對準標記而發生。在此情況中,位置圖將藉由真實量測而偵測,但亦可基於晶圓佈局而已知。2) Alignment modules, in particular according to European Patent Application EP 0 901 202 3.9. However, wafer alignment can also occur using only two alignment marks. In this case, the location map will be detected by real measurement, but can also be known based on the wafer layout.

3)用於在結合之後偵測應力圖之至少一量測模組。3) At least one measurement module for detecting a stress map after bonding.

除本申請案以外,如本發明所主張,在本發明之下文中同樣描述之另一實施例亦可想到,其中該兩個晶圓之一者未大規模結構化(亦即,具有最大對準標記)。在此情況中,能估計結構化之晶圓之畸變係一問題。在此實例中,沒有「經量測之」位置圖,但僅有關於曝露場之現有畸變之資訊或資料及關於此等曝露場位於該晶圓上之資訊。此等資料被「讀取」且一方面自晶圓佈局(位置)已知。用適於此目的之一量測器件量測該等已現有之畸變(出於此目的,通常使用微影系統)。In addition to the present application, as embodied in the present invention, another embodiment, also described hereinafter in the present invention, is also conceivable, wherein one of the two wafers is not heavily structured (ie, has the largest pair) Quasi-marking). In this case, it is possible to estimate the distortion of the structured wafer. In this example, there is no "measured" location map, but only information or information about the existing distortion of the exposure field and information about the exposure fields on the wafer. These materials are "read" and are known from the wafer layout (location) on the one hand. These existing distortions are measured with a measuring device suitable for this purpose (for this purpose, a lithography system is typically used).

在此實施例中,可能對對準(準確對準)(該等晶圓之一者未大規模結構化)關注較少,但僅結構化之晶圓之畸變係相關的。兩個晶圓之間的對準此處僅為不精確對準(機械的-邊緣至邊緣)或為光學對準(經由應用至未大規模結構化之晶圓之對準標記)。In this embodiment, there may be less focus on alignment (accurate alignment) (one of the wafers is not heavily structured), but only the distortion of the structured wafer is related. The alignment between the two wafers is here only for imprecise alignment (mechanical-edge to edge) or for optical alignment (via alignment marks applied to wafers that are not heavily structured).

然而,對光學對準之需求通常相當低。However, the need for optical alignment is typically quite low.

於有利版本中記錄/偵測該等位置圖,如本文再次描述之早期申請案EP 09012023.9中。The location maps are recorded/detected in an advantageous version, as described in the earlier application EP 09012023.9.

早期申請案EP 09012023.9描述一種方法,其中可在獨立於該等基板之移動之至少一X-Y座標系統中偵測或量測待對準之兩個基板之對準鍵之X-Y位置,使得可藉由一第二基板之相關對準鍵之相關性使一第一基板之對準鍵對準於對應對準位置。因此,準備待對準之各基板之一位置圖。The prior application EP 0 901 202 3.9 describes a method in which the XY position of the alignment keys of the two substrates to be aligned can be detected or measured in at least one XY coordinate system independent of the movement of the substrates, such that The correlation of the associated alignment keys of a second substrate aligns the alignment keys of a first substrate to corresponding alignment positions. Therefore, a position map of one of the substrates to be aligned is prepared.

換言之:尤其完全在一X方向及Y方向上,該器件使用用於偵測基板之移動之構件,該等構件指定至少一固定(尤其局部固定)參考點及因此至少在一X方向及Y方向上致使能夠準確對準該等對應對準鍵。In other words: in particular in the X and Y directions, the device uses a member for detecting the movement of the substrate, the members designating at least one fixed (especially partially fixed) reference point and thus at least in the X and Y directions The upper one enables accurate alignment of the corresponding alignment keys.

可依下列步驟記錄該位置圖:The location map can be recorded as follows:

- 配置一第一X-Y平面中的第一接觸表面及平行於該第一平面X-Y之一第二X-Y平面中的第二接觸表面,Configuring a first contact surface in a first X-Y plane and a second contact surface in a second X-Y plane parallel to one of the first planes X-Y,

- 藉由第一偵測構件偵測沿著獨立於該第一基板之移動之一第一X-Y座標系統中的第一接觸表面定位之第一對準鍵之X-Y位置及藉由第二偵測構件偵測沿著第二接觸表面定位且對應於獨立於該第二基板之移動之一第二X-Y座標系統中的該第一對準鍵之第二對準鍵之X-Y位置,- detecting, by the first detecting component, the XY position of the first alignment key positioned along the first contact surface in the first XY coordinate system independent of the movement of the first substrate and by the second detection The member detects an XY position of the second alignment key positioned along the second contact surface and corresponding to the first alignment key in the second XY coordinate system independent of movement of the second substrate,

- 對準基於該等第一X-Y位置判定之一第一對準位置中的第一接觸表面且對準相對於該第一接觸表面鋪置且基於該等第二X-Y位置判定之一第二對準位置中的第二接觸表面。Aligning a first contact surface in one of the first alignment positions based on the first XY position determinations and aligning with respect to the first contact surface and determining a second pair based on the second XY position determination a second contact surface in the quasi-position.

相反,若此處未描述任何事物,則此亦尤其應用於記錄及移動平台上的晶圓及座標系統及可用於記錄/偵測應變圖及/或應力圖之其等彼此之間的關係。Rather, if nothing is described herein, this is also particularly applicable to wafer and coordinate systems on recording and moving platforms and to the relationship between the strain patterns and/or stress maps that can be used to record/detect.

藉由組合位置圖、應變圖及/或應力圖(尤其結合透明區域),尤其在預結合步驟之後或在預結合步驟期間,可偵測在接觸晶圓之後或歸因於接觸晶圓而引起之有缺陷對準且可再次使該等晶圓彼此分離或可自生產程序分離其等。By combining a position map, a strain map and/or a stress map (especially in combination with a transparent region), especially after the pre-bonding step or during the pre-bonding step, it can be detected after contact with the wafer or due to contact with the wafer The defects are aligned and the wafers can be separated from each other again or can be separated from the production process.

一問題在於:藉由現有技術,按照慣例,僅偵測一非常有限之對準標記數。按照慣例,僅使用2個對準標記實施對準。接著此可導致上文所描述之反效應:該等對準標記之位置處及直接鄰近於該等對準標記之區域中的位置處的對準可為良好的,而該晶圓之剩餘區域中的對準可能為不適當的。One problem is that by the prior art, only a very limited number of alignment marks is detected by convention. Conventionally, alignment is performed using only two alignment marks. This may then result in the inverse effect described above: the alignment at the location of the alignment marks and the location in the region directly adjacent to the alignment marks may be good, while the remaining area of the wafer The alignment in may be inappropriate.

另一問題在於:取決於預結合該等晶圓時及最後結合該等晶圓時兩者中的經選擇之結合程序,機械畸變可發生於一或兩個晶圓上,其可局部或甚至全面導致對準精確度之降級。相對於該等晶圓之成功對準之此等畸變之重要性/效應隨著所需對準精度而增加,尤其可達到優於2微米之所需精確度。對於對準精確度大於2微米,此等畸變不足夠小以表示關於對準結果之一顯著效應。Another problem is that mechanical distortion can occur on one or two wafers depending on the selected bonding procedure of the pre-bonding of the wafers and the final combination of the wafers, which may be local or even Overall degraded alignment accuracy. The importance/effect of such distortion relative to the successful alignment of the wafers increases with the required alignment accuracy, particularly to achieve the desired accuracy better than 2 microns. For alignment accuracy greater than 2 microns, these distortions are not small enough to represent a significant effect on one of the alignment results.

此等畸變不僅在結合兩個結構化基板時產生一問題,亦可在將一結構化基板結合至一未大規模結構化之基板上時導致主要問題。在結合後,將實施需要至該結構化基板一非常精確對準之其他程序步驟之情況很特別。特定言之,結構之額外層對準於該結構上已現有之結構之微影技術此時應施加高需求。此等需求隨著減少所生產之結構之結構尺寸而提高。此應用產生於(例如)所謂的「背部照明CMOS影像感測器」之生產中。此時,具有已結構化之表面之一第一晶圓係結合於尤其未大規模結構化之一載體晶圓上。在形成一永久結合連接之後,移除該結構化晶圓之大部分晶圓材料使得該結構化表面(尤其光敏感位點)變得可自背部接達。隨後,此表面必須經受其他程序步驟(尤其微影)以(例如)應用操作影像感測器所需之彩色濾光器。Such distortions not only create a problem when combining two structured substrates, but can also cause major problems when bonding a structured substrate to a substrate that is not heavily structured. After bonding, it will be particularly advantageous to implement other program steps that require a very precise alignment of the structured substrate. In particular, the lithography technique in which the additional layers of the structure are aligned with the existing structures of the structure should now impose high demands. These needs increase with decreasing the structural size of the structure being produced. This application is produced, for example, in the production of so-called "back lighting CMOS image sensors." At this point, one of the first wafers having a structured surface is bonded to one of the carrier wafers, particularly not heavily structured. After forming a permanent bond connection, removing a majority of the wafer material of the structured wafer allows the structured surface (especially the light sensitive sites) to become accessible from the back. This surface must then be subjected to other program steps (especially lithography) to, for example, apply the color filters required to operate the image sensor.

此等結構之畸變對可在此微影步驟中達成之對準精確度造成不利影響。為當前產生具有(例如)1.75微米或1.1微米之一像素大小之影像感測器,一步驟之一曝露場(高達26×32 mm)及重複曝露系統容許之畸變為粗略為100 mm,更好為70 nm或50 nm。Distortion of such structures adversely affects the alignment accuracy that can be achieved in this lithography step. For the current generation of image sensors with a pixel size of, for example, 1.75 microns or 1.1 microns, one of the first exposure fields (up to 26 x 32 mm) and the repeated exposure system allow for a distortion of roughly 100 mm, better It is 70 nm or 50 nm.

此文件中的預結合指定結合連接,其在完整的預結合步驟之後在未對表面造成無法彌補之損害之情況下亦容許分離基板(尤其晶圓)。因此,此等結合連接亦可稱為可逆結合。基於該等表面之間的結合強度/黏著度仍相對較低之事實,此分離習知係可能的。此分離習知係可能的直至該結合為永久的(亦即,不再分離(非可逆))。此尤其係藉由歷時某一時間間隔及/或經由實體參數及/或能量自外部對晶圓之作用而達到。此時,尤其經由一壓縮力壓縮該等晶圓或加熱該等晶圓至某一溫度或使該等晶圓曝露於微波輻射係合適的。此預結合之一實例為具有熱產生氧化物之一晶圓表面與具有原生氧化物之一晶圓表面之間的一連接、此時在室溫下引起之該等表面之間的凡德瓦(van-der-Waals)連接。此等結合連接可藉由溫度處理轉換成永久結合連接。有利地是,此等預結合連接亦容許在形成該永久結合連接之前檢驗結合結果。在此檢驗中所確定之不足之情況中,該等基板可再次分離且重新接合。The pre-bonding in this document specifies a bond connection that also allows separation of the substrate (especially the wafer) after a complete pre-bonding step without causing irreparable damage to the surface. Therefore, such bonding connections may also be referred to as reversible bonding. This separation is possible based on the fact that the bond strength/adhesion between the surfaces is still relatively low. This separation is possible until the binding is permanent (i.e., no longer separated (non-reversible)). This is achieved in particular by the effect of externally on the wafer over a certain time interval and/or via physical parameters and/or energy. In this case, it is suitable to compress the wafers, for example, via a compressive force or to heat the wafers to a certain temperature or expose the wafers to microwave radiation. An example of such a pre-bond is a connection between a wafer surface having one of the thermally generated oxides and a surface of the wafer having one of the native oxides, and van der Waals between the surfaces caused at room temperature at this time. (van-der-Waals) connection. These bond connections can be converted to permanent bond connections by temperature processing. Advantageously, such pre-bonded connections also permit inspection of the binding results prior to forming the permanent bond connection. In the case of the deficiencies identified in this test, the substrates can be separated again and rejoined.

在最簡單的實施例中,本發明為一量測器件及致使能夠偵測一晶圓或一晶圓對中由預結合步驟所引入之應力之量測方法。此經由分析結合之前及結合之後之應力圖而發生。根據下列描述自其產生一應力差異圖。In the simplest embodiment, the present invention is a measurement device and a measurement method that enables detection of stress introduced by a pre-bonding step in a wafer or wafer pair. This occurs by analyzing the stress maps before and after the combination. A stress difference map is generated therefrom according to the following description.

該應力差異圖致使能夠尤其根據經驗估計由預結合步驟引入之畸變/應變。自其產生一畸變向量場或一畸變圖/應變圖。This stress difference map enables the estimation of the distortion/strain introduced by the pre-bonding step, especially empirically. From it produces a distorted vector field or a distortion map / strain map.

如本發明中所主張,此畸變向量場使晶圓對成為可能,其中除了在結合之前已存在之與理想形狀之偏差外,兩個晶圓之一者經結構化以判定某些位置處產生之畸變,尤其在曝露場之中央上,較佳在用於微影器件之對準標記之位置處。As claimed in the present invention, this distortion vector field enables wafer pairs in which one of the two wafers is structured to determine that certain locations are generated, in addition to the deviation from the ideal shape that existed prior to bonding. The distortion, especially at the center of the exposure field, is preferably at the location of the alignment marks for the lithographic device.

替代地,該畸變向量場使具有兩個經結構化之晶圓之晶圓對預測除了已在理論上所期望(基於該兩個晶圓之位置圖作為經選擇之理想對準位置之結果)之偏差向量外在該等位置圖中所偵測之點處所期望之額外對準偏差。此產生一偏差向量場或一位移圖。Alternatively, the distortion vector field causes wafer pair prediction with two structured wafers to be theoretically desired (based on the position map of the two wafers as a result of the selected ideal alignment position) The deviation vector is the extra alignment deviation expected at the point detected in the position maps. This produces a bias vector field or a displacement map.

在一較佳實施例中,此所期望之偏差向量場係疊加或添加至已基於透明窗口中的量測而判定之偏差。接著,此導致該位置圖之所有對應提供之位置最終期望之對準結果。藉由此結果,可作出是否再次分離接合晶圓之一決策。In a preferred embodiment, the desired deviation vector field is superimposed or added to the deviation that has been determined based on the measurements in the transparent window. This, in turn, results in a final desired alignment result for all of the corresponding locations provided by the location map. With this result, a decision can be made as to whether or not to separate the bonded wafers again.

此外,本發明係基於設計一器件及一方法之觀點,其中:Moreover, the present invention is based on the idea of designing a device and a method, wherein:

- 可判定兩個晶圓對於彼此之各對準位置,其中該等晶圓之接觸表面上的所有結構對於彼此之設定在經濟上或在技術上對於彼此為最適宜。此相對位置可(但非必然)與對準標記之一極佳對準彼此相關。當然,該等對準標記大部分亦總是在最適宜位置中(亦即,至少相對於緊鄰之微米範圍,但甚至非必然極佳)。- The alignment of the two wafers with respect to one another can be determined, wherein all of the structures on the contact surfaces of the wafers are economically or technically optimal for each other. This relative position may (but is not necessarily) correlated with one another with excellent alignment of one of the alignment marks. Of course, most of the alignment marks are also always in the most suitable position (i.e., at least relative to the immediate micrometer range, but not necessarily optimal).

- 對於已完成之「預結合」程序,因此,在亦可使該兩個晶圓彼此分離之一狀態中,可檢查預結合步驟中所產生之應力及可能起源於其之畸變(尤其機械畸變)是否處於一可接受量級。此尤其用於申請案中,其中該兩個晶圓之一者經結構化及第二個晶圓未大規模結構化。- For the completed "pre-bonding" procedure, therefore, in a state in which the two wafers can also be separated from each other, the stress generated in the pre-bonding step and the distortion that may originate therefrom (especially mechanical distortion) can be inspected Is it at an acceptable level? This is especially useful in applications where one of the two wafers is structured and the second wafer is not heavily structured.

- 對於已完成之「預結合」程序,因此,在亦可使該兩個晶圓彼此分離之一狀態中,可檢查定位該兩個晶圓之精確度或該等晶圓對於彼此之個別結構之精確度實際上是否亦對應於規範。以此方式,可判定該等晶圓以z軸之方向互相接近彼此時發生之位移或(甚至更糟)在接觸程序期間發生之對理想位置之偏差。特定言之,歸因於偵測預結合步驟中所引入的應力,亦可尤其根據經驗估計所期望之畸變之預測及與理想位置之所得偏差。- for a completed "pre-bonding" procedure, therefore, in a state in which the two wafers can also be separated from each other, the accuracy of positioning the two wafers or the individual structures of the wafers to each other can be checked Whether the accuracy actually corresponds to the specification. In this way, it is possible to determine the displacement of the wafers as they approach each other in the z-axis direction or (or even worse) the deviation from the ideal position that occurs during the contact procedure. In particular, due to the detection of the stress introduced in the pre-bonding step, the prediction of the desired distortion and the resulting deviation from the ideal position can also be estimated, inter alia, empirically.

運用此器件及此方法,藉由在產生最後結合連接之前可視情況控制及校正之上文所描述之畸變,可完成小於25微米(尤其小於0.15微米,較佳小於0.1微米)之對準精確度而具有良好的可靠性及良率。With this device and this method, alignment accuracy of less than 25 microns (especially less than 0.15 microns, preferably less than 0.1 microns) can be accomplished by controlling and correcting the distortion described above prior to the creation of the final bond connection. With good reliability and yield.

換言之,因此,該器件至少使用用於在預結合步驟之前及/或之後偵測晶圓之應力性質之構件。基於此等應力性質之知識及尤其在預結合步驟之前及之後之該等應力性質之一比較,可關於已在預結合期間引入至該晶圓中的應變/畸變做預測。In other words, therefore, the device uses at least components for detecting the stress properties of the wafer before and/or after the pre-bonding step. Based on the knowledge of these stress properties and one of these stress properties, especially before and after the pre-bonding step, predictions can be made regarding strain/distortion that has been introduced into the wafer during pre-bonding.

在另一實施例中,尤其對於兩個結構化晶圓之檢驗及/或對準,該器件使用用於偵測基板尤其單獨在一X及Y方向上的移動之構件,該等構件指定至少一固定(尤其局部固定)參考點且因此致使能夠準確對準至少一X及Y方向上的對應對準鍵,不僅參考該等各自基板之位置,亦參考該等應變及/或應力性質。In another embodiment, particularly for inspection and/or alignment of two structured wafers, the device uses components for detecting movement of the substrate, particularly in a single X and Y direction, the components specifying at least A fixed (especially locally fixed) reference point and thus enables accurate alignment of corresponding alignment keys in at least one of the X and Y directions, not only with reference to the position of the respective substrates, but also to the strain and/or stress properties.

此處提呈之本發明之特徵在一方面在於:可判定、量測及/或檢查兩個晶圓之所有結構對於彼此之在經濟上及/或在技術上最適宜之對準。此包括:尤其根據早期歐洲專利申請案09012023.9將晶圓會聚在一起之前記錄該兩個晶圓之結構之一位置圖;及經由對準標記對該兩個晶圓之位移之一連續尤其現場監測之程序。對於有缺陷預對準及預結合,一般非常貴之結構晶圓可再次彼此分離且重新對準。The features of the invention presented herein are in one aspect in that it is possible to determine, measure and/or inspect all of the structures of the two wafers for economical and/or technically optimal alignment with each other. This includes: recording a positional map of the structure of the two wafers prior to concentrating the wafers in accordance with earlier European Patent Application No. 09012023.9; and continuously monitoring, in particular, on-site monitoring of the displacement of the two wafers via alignment marks The program. For defective pre-alignment and pre-bonding, generally expensive structural wafers can be separated and realigned again from each other.

在本發明之一有利實施例中,其提供:該裝置經製造以尤其在判定時藉由評估構件來考慮第一對準鍵之第一位置圖及/或第二對準鍵之第二位置圖。對準鍵尤其為應用至該基板或該等基板之一者之對準標記及/或結構。In an advantageous embodiment of the invention, it is provided that the device is manufactured to take into account the first position map of the first alignment key and/or the second position of the second alignment key by means of the evaluation means, in particular at the time of determination Figure. The alignment keys are especially alignment marks and/or structures applied to the substrate or one of the substrates.

該等應力圖及/或應變圖藉由反射量測自各自檢驗側予以記錄,輻射被反射。特定言之,無法得到遍及層厚度之應力/應變之一平均值,但如本發明所主張,可得到關於接近表面之區域、紅外光或藉由透射量測而來自各自背部之資訊。在運用紅外光或x射線之量測中,判定遍及可偵測層厚度的應力或應變之一平均值。無需透過透明區域而記錄一應力-應變圖。尤其單獨地藉由反射量測、較佳藉由使用可見光判定位置圖。可尤其藉由相同偵測構件通過上述量測同時偵測該等第一對準鍵及該等第二對準鍵。The stress maps and/or strain maps are recorded from the respective inspection sides by reflection measurements, and the radiation is reflected. In particular, one of the stress/strain averages over the thickness of the layer is not available, but as suggested by the present invention, information about the area near the surface, infrared light, or from the respective back by transmission measurements can be obtained. In the measurement using infrared light or x-ray, an average value of stress or strain throughout the thickness of the detectable layer is determined. A stress-strain diagram is recorded without passing through the transparent area. In particular, the position map is determined solely by reflection measurement, preferably by using visible light. The first alignment keys and the second alignment keys can be simultaneously detected by the same detection component through the above measurement.

根據本發明之另一有利實施例,其提供:可尤其現場檢查在接觸及/或結合基板期間該等基板之對準。此現場檢查牽涉的優點在於:可排除在接觸或結合期間尤其藉由移動基板所引起之對準誤差。According to a further advantageous embodiment of the invention, it is provided that, in particular, the alignment of the substrates during contact and/or bonding of the substrates can be inspected in the field. The advantage of this on-site inspection is that the alignment errors caused by moving the substrate during contact or bonding can be ruled out.

在一定程度上,提供四個對應對準鍵用於檢查,尤其透過透明區域進行檢查,亦可進行現場同時監測基板對於彼此之相對位置。To a certain extent, four corresponding alignment keys are provided for inspection, especially through transparent areas, and the relative positions of the substrates to each other can be simultaneously monitored on site.

本發明之其他優點、特徵及細節將自較佳例示性實施例之下列描述且使用圖式而變得顯而易見。Other advantages, features, and details of the present invention will become apparent from the following description of the preferred embodiments.

在該等圖中,具有相同功能之相同組件及部件以相同參考符號識別。In the figures, the same components and components that have the same function are identified by the same reference numerals.

圖1a展示由具有一表面1o之一第一基板1(尤其一晶圓1)及具有一表面2o之一第二基板2(尤其一晶圓)組成之一典型晶圓系統。在該等表面1o、2o上的為結合至接觸表面1k、2k之不同結構50、50'。該等結構50、50'可為(例如)空穴,其中有MEMS器件。在3D積體晶片堆疊之情況下,該等結構亦可為用於產生電連接之金屬表面。為了簡單起見,該等結構50、50'展示為黑色矩形。圖1b及圖1c展示該兩個晶圓1、2之表面1o、2o。該晶圓2具有擁有第二對準鍵4.1至4.4之四個區域40。Figure 1a shows a typical wafer system consisting of a first substrate 1 (especially a wafer 1) having a surface 1o and a second substrate 2 (especially a wafer) having a surface 2o. On the surfaces 1o, 2o are different structures 50, 50' bonded to the contact surfaces 1k, 2k. The structures 50, 50' can be, for example, holes, among which are MEMS devices. In the case of a 3D integrated wafer stack, the structures may also be metal surfaces for making electrical connections. For the sake of simplicity, the structures 50, 50' are shown as black rectangles. Figures 1b and 1c show the surfaces 1o, 2o of the two wafers 1, 2. The wafer 2 has four regions 40 with second alignment keys 4.1 to 4.4.

該等區域40對某一波長或某一波長範圍之電磁輻射為透明的。一第一偵測構件7(尤其光學器件)可透過該等透明區域40使該第一基板1之第一對準鍵3.1至3.4與該等對應第二對準鍵4.1至4.4相關。有利地是,此等透明區域可藉由對此等區域避免摻雜矽或尤其摻雜之程度保持相對較低值及沒有金屬層應用於此等區域中或尤其產生相對較少之金屬結構而對矽晶圓有用。此可達成(例如)在於僅對準標記及可尤其由金屬組成之可能有關結構置於該等透明區域中。遵守此等先決條件,矽對具有大於1微米(尤其大於1050奈米)之一波長之紅外光為透明。These regions 40 are transparent to electromagnetic radiation of a certain wavelength or a certain wavelength range. A first detecting member 7 (particularly an optical device) can relate the first alignment keys 3.1 to 3.4 of the first substrate 1 to the corresponding second alignment keys 4.1 to 4.4 through the transparent regions 40. Advantageously, such transparent regions can be maintained at relatively low values by the extent to which doping or especially doping is avoided for such regions and that no metal layer is used in such regions or in particular produces relatively few metal structures. Useful for wafers. This can be achieved, for example, in that only the alignment marks and possibly related structures, which may be composed of metal, are placed in the transparent regions. Subject to these prerequisites, 矽 is transparent to infrared light having a wavelength greater than 1 micron (especially greater than 1050 nm).

該等結構50、50'可突出於該等表面1o、2o上或可相對於其等重新設定,出於此原因,該等接觸表面1k、2k無需與該等晶圓1、2之表面1o、2o重合。The structures 50, 50' may protrude from the surfaces 1o, 2o or may be reset relative to them, for which reason the contact surfaces 1k, 2k need not be 1o with the surfaces of the wafers 1, 2 2o coincide.

對準鍵3.1至3.n或4.1至4.n亦可為該等結構50、50'或該等結構50、50'之部分。The alignment keys 3.1 to 3.n or 4.1 to 4.n may also be part of the structures 50, 50' or the structures 50, 50'.

該方法以記錄位置圖開始。一位置圖被定義為(在空間上儘可能完全)儘可能多的結構元件之位置偵測,尤其對該等晶圓1、2之表面上的該等第一對準鍵3.1至3.n及/或該等第二對準鍵4.1至4.n及/或結構50、50'或該等結構50、50'之部分之位置偵測。The method begins by recording a location map. A position map is defined as (as spatially as complete as possible) position detection of as many structural elements as possible, in particular the first alignment keys 3.1 to 3.n on the surface of the wafers 1, 2 And/or position detection of the second alignment keys 4.1 to 4.n and/or the structures 50, 50' or portions of the structures 50, 50'.

圖2a展示藉由光學器件7對第一晶圓1之表面1o進行位置偵測,因此記錄一第一位置圖。藉由使該晶圓1相對於該光學器件7移動或使該光學器件7相對於該晶圓1移動,在該晶圓1之頂部1o上量測第一對準鍵3.1至3.4之位置。在一較佳實施例中,使該光學器件7固定於記錄構件12上,而使該晶圓1相對於該光學器件7移動。Figure 2a shows the position detection of the surface 1o of the first wafer 1 by the optical device 7, thus recording a first position map. The position of the first alignment keys 3.1 to 3.4 is measured on the top 1o of the wafer 1 by moving the wafer 1 relative to the optical device 7 or moving the optical device 7 relative to the wafer 1. In a preferred embodiment, the optical device 7 is attached to the recording member 12 to move the wafer 1 relative to the optical device 7.

在尤其繼第一步驟後或與第一步驟同時進行之一第二步驟中,根據圖2b,經由一第二偵測構件(尤其為光學器件8)對該第二晶圓2之頂部2o實施相同程序。In a second step, in particular after the first step or simultaneously with the first step, according to FIG. 2b, the top 2o of the second wafer 2 is implemented via a second detecting member, in particular optics 8. The same procedure.

由於在此量測程序中,記錄位置圖係重要的,故亦可想到僅使用光學器件7作為偵測構件,因此省略光學器件8且在該光學器件7之方向上對其等結構化頂部1o、2o量測該兩個晶圓1、2。對於稍後對準及結合步驟,接著翻轉該兩個晶圓1、2之一者且將其固定於記錄構件12或22上。Since the recording position map is important in this measurement procedure, it is also conceivable to use only the optical device 7 as the detecting member, so that the optical device 8 is omitted and the top portion is structured in the direction of the optical device 7 The two wafers 1, 2 are measured by 2o. For a later alignment and bonding step, one of the two wafers 1, 2 is then flipped and secured to the recording member 12 or 22.

根據上文所描述之步驟,該器件現已知該等晶圓1、2之頂部1o、2o上的所有經記錄之結構50、50'或經記錄之第一對準鍵3.1至3.n及第二對準鍵4.1至4.n之X-Y位置,尤其亦已知該等結構50、50'相對於該等第一對準鍵3.1至3.n及該等第二對準鍵4.1至4.n之位置。其等以該第一基板1之一第一位置圖之形式及該第二基板2之一第二位置圖之形式予以儲存。According to the steps described above, the device now knows all recorded structures 50, 50' on the tops 1o, 2o of the wafers 1, 2 or the recorded first alignment keys 3.1 to 3.n. And the XY positions of the second alignment keys 4.1 to 4.n, and it is also known that the structures 50, 50' are relative to the first alignment keys 3.1 to 3.n and the second alignment keys 4.1 to 4.n location. It is stored in the form of a first position map of the first substrate 1 and a second position map of the second substrate 2.

如本發明所主張,在量測步驟期間,不僅將記錄第一位置圖及第二位置圖,亦記錄尤其在不同模組中或同時在一模組中的第一及第二初始應變圖及/或第一及第二應力圖,且其等表示基板1、2之基本應力或初始應力。此時,記錄應變值及/或應力值作為根據位置圖之X-Y位置之一函數。可使用能判定經局部解析之應力及/或應變之各量測器件,尤其紅外線量測器件。尤其有利地使用基於Raman光譜之量測器件。替代地,如本發明所主張,可使用紅外線方法「Grey-Field Polariscope」《Review of Scientific Instruments 76,045108(2005)》「Infrared grey-field polariscope: A tool for rapid stress analysis in microelectronic materials and devices」。藉由該等光學器件7、8對該等晶圓1、2之相對運動繼而記錄應力圖及/或應變圖。在一有利實施例中,有分離光學器件或額外整合於該等光學器件7、8中的光學器件。As claimed in the present invention, during the measurement step, not only the first position map and the second position map but also the first and second initial strain maps in a different module or simultaneously in a module are recorded. / or first and second stress maps, and they represent the basic stress or initial stress of the substrates 1, 2. At this time, the strain value and/or the stress value are recorded as a function of the X-Y position according to the position map. Various measuring devices, in particular infrared measuring devices, capable of determining locally resolved stresses and/or strains can be used. It is especially advantageous to use a measurement device based on Raman spectroscopy. Alternatively, as claimed in the present invention, an infrared method "Grey-Field Polariscope" "Review of Scientific Instruments 76, 045108 (2005)" "Infrared grey-field polariscope: A tool for rapid stress analysis in microelectronic materials and devices" can be used. . The stresses and/or strain maps are then recorded by the relative motion of the wafers 1, 2 by the optical devices 7, 8. In an advantageous embodiment, there are separate optics or optics additionally integrated into the optics 7, 8.

在一定程度上,為偵測時間之最佳化而備製僅應變圖或僅應力圖應力圖可經由彈性原理之基本等式轉換成對應應變圖,且反之亦然。如本發明所主張,可想到較佳具有根據有限元素之方法之起始點之一數學(尤其數值)轉換。To a certain extent, the preparation of only the strain map or the stress map stress map for the optimization of the detection time can be converted into the corresponding strain map via the basic equation of the elastic principle, and vice versa. As claimed in the present invention, it is conceivable to have a mathematical (especially numerical) conversion of one of the starting points of the method according to the finite element.

對於已針對尤其準確偵測位置圖及/或應變圖而最佳化之器件,兩個不同偵測構件係用於偵測位置圖及/或應變圖。For devices that have been optimized for particularly accurate detection of position maps and/or strain maps, two different detection components are used to detect position maps and/or strain maps.

根據本發明且為排除其他有缺陷源,其提供:根據基板1、2之對準而偵測應力圖及/或應變圖。In accordance with the present invention and to exclude other sources of defects, it is provided that the stress map and/or the strain map are detected based on the alignment of the substrates 1, 2.

用於同時在一有利組態中記錄位置圖之各自偵測構件包括用於偵測應力圖及/或應變圖之偵測構件,使得具有相同驅動之各自偵測構件發生移動。The respective detecting means for simultaneously recording the position map in an advantageous configuration includes detecting means for detecting the stress map and/or the strain map such that the respective detecting members having the same drive move.

替代地,為加速且就此而言更多成本有利實施例,可想到提供一或多個分離模組中的應力圖及/或應變圖之偵測,尤其藉由各自分離晶圓處置構件(較佳為機械臂)而提供。Alternatively, in order to speed up and in this regard more cost-effective embodiments, it is conceivable to provide detection of stress maps and/or strain maps in one or more separate modules, in particular by separate wafer handling components (compare Good for the robotic arm).

圖3展示經極佳對準之第一及第二對準鍵3.1至4.1,以及經極佳對準之結構50、50',該結構50'歸因於極佳重疊而被該結構50覆蓋。不切實際的情況係,來自圖3之狀態導致已在一極佳結合程序中參考該等對準鍵3.1至3.n及4.1至4.n如此極佳地產生兩個晶圓1、2上的所有結構50、50'。實際上,無法如此準確地產生該等結構50、50'。即使該等結構50、50'被如此極佳地產生,在接近程序期間或當開始接觸時晶圓1、2亦可相對於彼此移動。在預結合步驟中,額外應變亦可引入至晶圓中,其導致應變/畸變且作為對理想對準偏差之一進一步結果。如本發明所主張,個別位置處的極佳對準因此非必然為目標。確切言之,如本發明所主張,應謹慎,晶圓1、2上的所有對應結構50、50'完全關於經濟及/或技術態樣對準,使得對於待結合及對準之各晶圓對,晶粒廢料為儘可能小。Figure 3 shows the first and second alignment keys 3.1 to 4.1, which are excellently aligned, and the highly aligned structures 50, 50' which are covered by the structure 50 due to excellent overlap. . Unrealistically, the state from Figure 3 results in the excellent production of two wafers 1, 2 with reference to the alignment keys 3.1 to 3.n and 4.1 to 4.n in an excellent combination procedure. All structures 50, 50' above. In fact, the structures 50, 50' cannot be produced with such accuracy. Even if the structures 50, 50' are so excellently produced, the wafers 1, 2 can move relative to each other during the proximity procedure or when the contact is initiated. In the pre-bonding step, additional strain can also be introduced into the wafer, which causes strain/distortion and is a further consequence of one of the ideal alignment deviations. As claimed in the present invention, excellent alignment at individual locations is therefore not necessarily an end goal. Specifically, as claimed in the present invention, care should be taken that all corresponding structures 50, 50' on wafers 1, 2 are fully aligned with respect to economic and/or technical aspects such that for each wafer to be bonded and aligned Yes, the grain waste is as small as possible.

由於已知該等晶圓1、2之所有經偵測之結構50、50'及/或該等第一對準鍵3.1至3.4及該等第二對準鍵4.1至4.4之位置,故可藉由計算構件判定該等晶圓1、2彼此之最適宜相對位置或所有結構50、50'彼此之最適宜相對位置。此藉由基於第一位置圖之值且基於第二位置圖之值判定第一接觸表面1k之一第一對準位置及第二接觸表面2k之一第二對準位置而發生。在接觸期間及亦在接觸之後及在結合程序期間以及該結合程序之後,藉由光學器件7且透過透明區域40出於正確性可現場連續檢查該等晶圓1、2彼此之此相對位置及/或該第一對準位置及該第二對準位置。以此方式,可現場檢查對準。Since the locations of all of the detected structures 50, 50' and/or the first alignment keys 3.1 to 3.4 and the second alignment keys 4.1 to 4.4 of the wafers 1, 2 are known, The optimum relative position of the wafers 1, 2 to each other or the optimum relative position of all of the structures 50, 50' to each other is determined by the computing means. This occurs by determining a first alignment position of the first contact surface 1k and a second alignment position of the second contact surface 2k based on the value of the first position map and based on the value of the second position map. During the contact and also after the contact and during the bonding process and after the bonding process, the relative position of the wafers 1, 2 and each other can be continuously inspected in the field by the optical device 7 and through the transparent region 40 for correctness. / or the first alignment position and the second alignment position. In this way, alignment can be checked on site.

例如,藉由計算各自對應結構50、50'彼此之尤其二次偏差(quadratic deviation)之一最小總和而產生該兩個晶圓1、2彼此之最適宜相對位置或該等結構50、50'彼此之最適宜相對位置。For example, the optimum relative position of the two wafers 1, 2 to each other or the structures 50, 50' is generated by calculating a minimum sum of one of the respective quadratic deviations of the respective corresponding structures 50, 50' The most suitable relative position for each other.

如本發明所主張,同樣可想到:容許經濟態樣亦被包含於理想對準位置之此計算中。因此,在半導體產業之許多領域中,尤其在記憶體產業(例如,RAM、NAND快閃記憶體)中,習知晶圓內的某些區域上(尤其在晶圓中央之區域中)的晶片具有較小的品質相關參數之變異數。因此,源於此區域之晶片能達到較高的銷售價格使得考慮分類程序(此程序稱為「分級」),其中此等晶片被有意地分成不同品質籃。有利地是,因此,如本發明所主張,該等晶圓之理想對準位置不僅基於該兩個晶圓之位置圖而計算,一經濟計算/配置亦包含於此,其中應尤其謹慎:尤其以較低值晶片之區域中的一較低良率之成本來達成較高品質晶片之區域中的一較高良率。As claimed in the present invention, it is also conceivable that the economical aspect is also included in this calculation of the ideal alignment position. Therefore, in many areas of the semiconductor industry, especially in the memory industry (eg, RAM, NAND flash memory), wafers on certain areas within the wafer (especially in the center of the wafer) have The number of variations in small quality related parameters. Therefore, wafers originating in this area can achieve higher selling prices such that the classification procedure (this procedure is referred to as "grading") is considered, wherein such wafers are intentionally divided into different quality baskets. Advantageously, therefore, as claimed in the present invention, the ideal alignment position of the wafers is not only calculated based on the position maps of the two wafers, but also an economic calculation/configuration, which should be particularly cautious: A higher yield in the region of the higher quality wafer is achieved at a lower yield in the region of the lower value wafer.

圖4及圖6展示組成一上部結構50之邊角之X-Y位置與一對應下部結構50'之該等之差異之一差異向量u。例如,自位置圖之最小化計算而產生該差異向量u。當然,在透明區域40之各者中,可辨識其自身差異向量u。在此點處,若兩個晶圓彼此接近,則連續檢查差異向量u。若在接近期間或在接觸或結合期間,差異向量u改變,則對該兩個晶圓1、2彼此之經判定相對位置之偏差發生。即使該兩個晶圓1、2接觸,光學器件7仍可透過該等透明區域40檢查至少四個差異向量u。若在接觸之後,應實現太大之一偏差,則立即分離該晶圓1、2以再次實施對準及預結合程序。為實施同時檢查若干透明區域40,對於各透明區域40而言,有其自身之光學器件7使得在結合期間之處理量未藉由對準之現場偵測而減少。4 and 6 show a difference vector u that differs between the X-Y positions of the corners of an upper structure 50 and the corresponding lower structures 50'. For example, the difference vector u is generated from the minimization calculation of the position map. Of course, in each of the transparent regions 40, its own difference vector u can be identified. At this point, if the two wafers are close to each other, the difference vector u is continuously checked. If the difference vector u changes during the approach or during the contact or bonding, the deviation of the determined relative positions of the two wafers 1, 2 from each other occurs. Even if the two wafers 1, 2 are in contact, the optical device 7 can inspect at least four difference vectors u through the transparent regions 40. If one of the deviations is too large after the contact, the wafers 1, 2 are immediately separated to perform the alignment and pre-bonding procedure again. To perform simultaneous inspection of the plurality of transparent regions 40, for each of the transparent regions 40, there is its own optics 7 such that the amount of processing during bonding is not reduced by on-site detection of alignment.

替代地,如本發明所主張亦可想到:在一分離模組之預結合之後實施檢查步驟,使得未減少對準構件之處理量及預結合模組之處理量。檢查步驟之後的晶圓之可能分離可發生於意欲檢查之模組中,然而亦可同樣發生於一分離模組中。亦可想到:並非所有模組係連接於一單一器件中,但尤其藉由此時分離之晶圓處理構件形成分離器件。Alternatively, it is also conceivable as claimed in the present invention that the inspection step is performed after pre-bonding of the separation modules such that the throughput of the alignment members and the throughput of the pre-bonded modules are not reduced. The possible separation of the wafer after the inspection step can occur in the module to be inspected, but can also occur in a separate module. It is also conceivable that not all of the modules are connected in a single device, but in particular the separation means is formed by the wafer processing members thus separated.

圖3展示對準標記3.1及4.1之接近區域之一放大圖。為能夠在疊置期間偵測結構50及50',僅展示邊緣。若在此點處,該等結構50及50'彼此且對該等對準標記3.1及4.1極佳定向,則於一結合程序中將建立該兩個結構50及50'之一極佳覆蓋。Figure 3 shows an enlarged view of one of the close regions of alignment marks 3.1 and 4.1. To be able to detect structures 50 and 50' during stacking, only the edges are shown. If at this point the structures 50 and 50' are perfectly oriented with respect to each other and the alignment marks 3.1 and 4.1, an excellent coverage of one of the two structures 50 and 50' will be established in a bonding procedure.

圖4展示相同情況,其中結構50及50'不具有覆蓋,然對準標記3.1及4.1彼此已進行極佳對準。在該結構50及該對應結構50'之放大圖中,可認知:差異向量u具有可用於向量計算之一X分量及一Y分量。Figure 4 shows the same situation in which the structures 50 and 50' do not have coverage, but the alignment marks 3.1 and 4.1 have been perfectly aligned with each other. In the enlarged view of the structure 50 and the corresponding structure 50', it is recognized that the difference vector u has one X component and one Y component usable for vector calculation.

本發明之一重要構成要素在於:上文所提及之量測儀器或一分離模組中所提供之量測儀器可在預結合或結合之後用於應力量測及/或應變量測,以判定該經結合之晶圓堆疊之應力及/或應變。藉由量測將兩個晶圓1、2結合至晶圓堆疊前之該等晶圓1、2之初始應力圖及/或初始應變圖且量測該晶圓堆疊之應力圖及/或應變圖,可關於瞬間接觸時的變形得出結論或不久之後得出結論。換言之,因此可量測由預結合程序所引入之應力及可尤其基於根據經驗判定之關係來判定/估計/預測或有利計算所得應力/畸變。An important component of the present invention is that the measuring instrument provided in the above-mentioned measuring instrument or a separating module can be used for stress measurement and/or strain measurement after pre-bonding or combining, The stress and/or strain of the bonded wafer stack is determined. Measuring the initial stress pattern and/or initial strain map of the wafers 1, 2 before the wafer stack by measuring the two wafers 1, 2 and measuring the stress map and/or strain of the wafer stack The graph can be concluded with respect to the deformation at the moment of contact or a conclusion can be drawn shortly. In other words, the stress introduced by the pre-bonding procedure can therefore be measured and the stress/distortion can be determined/estimated/predicted or advantageously calculated, inter alia, based on empirically determined relationships.

儘管不再以光學器件7、8觀看該等晶圓1、2之內部區域,然由於在此區域中不具有透明區域,故亦可藉由應變圖及/或應力圖得出關於此區域中的狀態、位置或變形之結論。若(例如)在一區域中,一應力盛行超過一臨界值(例如,一比較應力之值),則可藉由軟體自動標記此區域為一問題區。因此,晶粒可被分成品質類別。具有低內在應力之晶粒具有一良好品質類別以及長時間的服務壽命,而具有高應力集中之晶粒可被分類成一低品質類別。Although the inner regions of the wafers 1, 2 are no longer viewed by the optical devices 7, 8, but since there is no transparent region in this region, it can also be obtained from the region by strain patterns and/or stress maps. The conclusion of the state, position or deformation. If, for example, a stress prevails over a critical value (e.g., a value of a comparative stress) in a region, the region can be automatically marked by the software as a problem region. Therefore, the crystal grains can be classified into quality categories. Grains with low intrinsic stress have a good quality class and long service life, while grains with high stress concentrations can be classified into a low quality category.

基於此等應力圖/應變圖,對於整個晶圓表面及存在於其上之所有結構,估計且根據經驗判定已達成之對準精確度。此可按如下在實踐中完成。Based on these stress maps/strain diagrams, the alignment accuracy that has been achieved is estimated and empirically determined for the entire wafer surface and all structures present thereon. This can be done in practice as follows.

1)偵測對應於如上文所描述之第一晶圓及第二晶圓之第一位置圖及第二位置圖。1) Detecting a first position map and a second position map corresponding to the first wafer and the second wafer as described above.

2)根據技術及/或經濟準則基於此第一位置圖及第二位置圖計算理想對準位置。此計算同樣產生理想對準位置及用於透明區域40中的對準標記之對應偏差向量。即,非必然極佳對準該等透明區域40中的對準標記來達成對於整個晶圓所觀看到之最適宜結果。此外,基於此經計算之所需對準位置,計算出於此原因(見圖6)所期望之至少主要數量(較佳為包含於位置圖中的所有位置)之個別差異向量之二維差異向量場v'。此處,較佳地,沒有結構50、50'之位點被省略以不攙雜量測結果。例如,由於有對準標記(而非結構50、50'),故對準位置為對準鍵3.1至3.4及4.1至4.4之位置。2) Calculate the ideal alignment position based on the first position map and the second position map according to technical and/or economic criteria. This calculation also produces a desired alignment position and a corresponding deviation vector for the alignment marks in the transparent region 40. That is, it is not necessarily optimal to align the alignment marks in the transparent regions 40 to achieve the most appropriate result for the entire wafer. Furthermore, based on this calculated desired alignment position, a two-dimensional difference of the individual difference vectors of at least the main number (preferably all positions included in the position map) expected for this reason (see Fig. 6) is calculated. Vector field v'. Here, preferably, the sites without the structures 50, 50' are omitted to not confuse the measurement results. For example, due to the alignment marks (rather than the structures 50, 50'), the alignment positions are the positions of the alignment keys 3.1 to 3.4 and 4.1 to 4.4.

3)在預結合步驟之前偵測對應於該第一晶圓及該第二晶圓之第一初始應力圖及第二初始應力圖,尤其平行偵測第一位置圖及第二位置圖。3) Detecting a first initial stress map and a second initial stress map corresponding to the first wafer and the second wafer before the pre-bonding step, and particularly detecting the first position map and the second position map in parallel.

4)以一合適方法預結合晶圓。對於大多數變化結合連接,此等方法以基本形式為熟習此項技術者所知。4) Pre-bond the wafer in a suitable manner. For most variations of bonding, these methods are known in the basic form to those skilled in the art.

5)偵測透明區域40中的實際對準精確度及判定透明區域40中的實際偏差向量u。5) Detecting the actual alignment accuracy in the transparent region 40 and determining the actual deviation vector u in the transparent region 40.

6)判定來自用於透明區域之實際偏差向量u與經計算之偏差向量之間的差異。6) Determine the difference between the actual deviation vector u for the transparent region and the calculated deviation vector.

7)考慮該經判定之差異,可計算所得差異向量圖v",其中對於至少主要數量,尤其對於包含於第一位置圖及第二位置圖中的各位置,有一偏差向量。對應於個別位置之此等偏差向量u現係藉由基於在步驟6下所判定之偏差向量及各自點之座標位置及透明場之座標位置而對各自個別位置計算之一校正向量而調適。7) Considering the determined difference, the resulting difference vector map v" can be calculated, wherein for at least the main number, especially for each position included in the first position map and the second position map, there is a deviation vector corresponding to the individual position. The deviation vectors u are now adapted by calculating one of the correction vectors for the respective individual positions based on the deviation vectors determined at step 6 and the coordinate positions of the respective points and the coordinate positions of the transparent fields.

8)在預結合之後偵測該第一應力圖及該第二應力圖。8) Detecting the first stress map and the second stress map after pre-bonding.

9)比較在預結合之前及之後之該第一應力圖與在預結合之前及之後之第二應力圖。9) Compare the first stress map before and after pre-bonding with the second stress map before and after pre-bonding.

10)基於在預結合之前及之後之應力差異預測個別點所期望之額外對準誤差/偏差向量。10) Predict the additional alignment error/deviation vector desired for individual points based on stress differences before and after pre-binding.

11)將由在預結合中所引入之應力引起之額外偏差向量加至理論上期望且於步驟7中計算之偏差向量。11) Add the additional deviation vector caused by the stress introduced in the pre-bonding to the deviation vector theoretically expected and calculated in step 7.

12)判定該對準精確度是否為所期望(此處,基於步驟11中的計算對於個別點中的偏差向量如前述對應於技術及經濟成功準則),或判定是否實施該等晶圓之重新處理/分離。12) determining whether the alignment accuracy is desired (here, based on the calculation in step 11 for the deviation vector in the individual points as described above corresponding to the technical and economic success criteria), or determining whether to implement the wafer re Processing / separation.

對於晶圓堆疊,其中預結合之前之一或兩個晶圓僅具有低初始應力或尤其不具有初始應力或已知結合之前之初始應力,此係因為其(例如)在大規模生產中僅經受非常低的變化,在步驟3時,出於最佳化處理量及成本之目的,可省略結合之前之應力圖之偵測。如本發明所主張,應力僅經受一低的變化以在結合之前僅晶圓之一部分經受應力圖之偵測之情況亦尤其可能。在此連接中,低應力被定義為與在預結合步驟中所產生之應力相比較而可忽略之應力值。此尤其係當該等應力差異為3倍、較佳差異為5倍、甚至更好地差異為10倍之情況。相對於該晶圓堆疊之僅部分量測,(例如)使一批量之第一晶圓堆疊及最後晶圓堆疊經受檢驗且對剩餘晶圓堆疊採用該第一晶圓堆疊所判定之應力圖以用於計算尤其可行。亦可想到:即時實施計算偏移以接著基於該計算(例如)對該第一晶圓堆疊及該最後晶圓堆疊計算平均應力圖。在此情況中,亦可有利地額外檢驗其他晶圓堆疊以達成計算平均值時的較高可靠性。根據所描述之程序,亦可使形成晶圓堆疊之兩個晶圓之僅一者經受應力圖之偵測。此在該兩個晶圓之僅一者不滿足上文所描述之準則時尤其有利,其證明省略應力圖偵測合理。For wafer stacking, where one or both wafers prior to pre-bonding have only low initial stress or especially no initial stress or initial stress prior to known bonding, because it is only experienced, for example, in mass production Very low variation, in step 3, the detection of the stress map prior to bonding can be omitted for the purpose of optimizing throughput and cost. As claimed in the present invention, it is also particularly possible that the stress undergoes only a low change to only partially detect the stress pattern before the bonding. In this connection, low stress is defined as a stress value that is negligible compared to the stress generated in the pre-bonding step. This is especially the case when the stress difference is 3 times, the preferred difference is 5 times, or even better, the difference is 10 times. Relative to the partial measurement of the wafer stack, for example, subjecting a batch of the first wafer stack and the last wafer stack to inspection and using the stress map determined by the first wafer stack for the remaining wafer stack It is especially feasible for calculations. It is also conceivable to calculate the offset in real time to then calculate an average stress map for the first wafer stack and the last wafer stack based on the calculation, for example. In this case, it may also be advantageous to additionally inspect other wafer stacks to achieve higher reliability in calculating the average. According to the described procedure, only one of the two wafers forming the wafer stack can be subjected to stress pattern detection. This is particularly advantageous when only one of the two wafers does not meet the criteria described above, which proves that omitting the stress map detection is reasonable.

對於結構化該兩個晶圓之僅一者之應用,該方法可類似於結合兩個結構化晶圓進行。具體言之,在此實施例中該程序為如下:For applications that structure only one of the two wafers, the method can be performed similar to combining two structured wafers. Specifically, the program in this embodiment is as follows:

1)藉由合適偵測構件來偵測對理想形狀之位於結構化晶圓上的個別曝露場之已現有之畸變/偏差向量。特定言之,亦意欲稍後處理經結合之晶圓之步驟及重複曝露系統以合適器件(諸如,一測試標記)之輔助而致使能夠進行此量測。對理想形狀之此偏差係以一向量場之形式予以表示且經儲存用於進一步計算。特定言之,此向量場包含一主要部分之向量,尤其包含習知位於該等曝露場之隅角之對準標記之所有位置。1) Detecting existing distortion/deviation vectors for individual exposure fields of the ideal shape on the structured wafer by means of suitable detection means. In particular, it is also intended that the subsequent processing of the bonded wafer and the repeated exposure system with the aid of a suitable device, such as a test mark, enables such measurement. This deviation from the ideal shape is represented in the form of a vector field and stored for further calculation. In particular, the vector field contains a vector of major portions, including in particular all locations of the alignment marks that are conventionally located at the corners of the exposed fields.

2)藉由來自與接觸表面1k(若晶圓1為結構化晶圓)或接觸表面2k(若晶圓2為結構化晶圓)相對之側之合適偵測構件來偵測預結合程序之前之結構化晶圓之初始應力圖。2) Before detecting the pre-binding procedure by a suitable detection component from the side opposite the contact surface 1k (if the wafer 1 is a structured wafer) or the contact surface 2k (if the wafer 2 is a structured wafer) The initial stress map of the structured wafer.

3)以用於晶圓位置之合適偵測構件及對準構件之輔助使該兩個晶圓彼此對準。3) Aligning the two wafers with each other with the aid of suitable sensing members for the wafer position and alignment members.

4)預結合該兩個晶圓。4) Pre-bond the two wafers.

5)經由來自與該接觸表面1k/2k相對之側之合適偵測構件來偵測預結合步驟之後之結構化晶圓之應力圖。5) Detecting the stress map of the structured wafer after the pre-bonding step via a suitable detection member from the side opposite the contact surface 1k/2k.

6)判定預結合步驟之前之應力圖與預結合步驟之後之應力圖之間的差異。6) Determine the difference between the stress map before the pre-bonding step and the stress map after the pre-bonding step.

7)基於步驟6中所判定之應力差異而導出所期望之畸變向量/所期望之畸變向量場。有利地是,針對與來自已在步驟1中判定之向量場之向量之位置相關之位置來判定此向量場中的向量,尤其至少大規模相符。有利地是,此配置優於500微米,但更理想地優於200微米或700微米。7) Deriving the desired distortion vector/desired distortion vector field based on the difference in stress determined in step 6. Advantageously, the vectors in this vector field are determined for the position associated with the position of the vector from the vector field that has been determined in step 1, in particular at least in large scale. Advantageously, this configuration is better than 500 microns, but more desirably better than 200 microns or 700 microns.

8)相加該畸變向量場與步驟1中判定之向量場。8) Add the distortion vector field and the vector field determined in step 1.

9)檢查自步驟8中計算所得之向量場是否如前述對應於技術及經濟成功準則或是否發生該等晶圓之分離及重新處理。9) Check if the vector field calculated from step 8 corresponds to the technical and economic success criteria as described above or whether the separation and reprocessing of the wafers occurs.

相對於在結合之前省略應力圖之偵測之前文陳述或用於經選擇之晶圓及/或晶圓堆疊之應力圖之僅部分偵測在此時進行近似應用。The partial detection of the stress maps previously described or omitted for the selected wafer and/or wafer stack prior to the combination of the stress maps prior to bonding is approximated at this time.

如本發明所主張,基於複數個合適方法,可自應力圖導出畸變向量場且可尤其發生預結合之前與預結合之後之間的應力差異圖。自應力圖之偵測及尤其是否在該晶圓之某些區域中之前/之後之應力差異係顯而易見的,已在結合期間額外產生一壓力或拉伸應力。在此基礎上,可得出關於在該晶圓之任何點處的個別向量之方向之結論。同樣自量測及/或計算已知之個別區域中的應力差異之位準容許得出關於向量之量之結論。然而,由於該晶圓之個別組件區域習知地被額外影響該晶圓之應變/畸變之其他區域環繞,故此等關係非必然為線性。因此,必須使用適於實踐之完整計算模組以能夠估計該等向量之實際量及方向。某些輪廓條件(某些應力值等)之另一可能性亦使用根據經驗之方法,其中利用來自過去已完成之測試之發現。As claimed in the present invention, a distortion vector field can be derived from a stress map based on a plurality of suitable methods and a stress difference map between pre-bonding and post-bonding can occur in particular. The detection of the self-stress map and, in particular, the difference in stress before/after some areas of the wafer are apparent, and an additional stress or tensile stress has been generated during the bonding. On this basis, conclusions can be drawn about the direction of the individual vectors at any point of the wafer. The same level of self-measurement and/or calculation of the stress difference in the known individual regions allows conclusions to be drawn about the amount of vector. However, since the individual component regions of the wafer are conventionally surrounded by other regions that additionally affect the strain/distortion of the wafer, such relationships are not necessarily linear. Therefore, a complete computing module suitable for practice must be used to be able to estimate the actual amount and direction of the vectors. Another possibility for certain profile conditions (some stress values, etc.) also uses empirical methods, which utilize findings from tests that have been completed in the past.

如圖5a至圖5c中所展示,在沒有透明區域40之情況下,接觸及/或結合期間之對準之現場量測限於應變場及/或應力場之量測。圖5a至圖5c之實例展示一方法及一器件,其中一結構晶圓2'相對於一載體晶圓1'對準,而非兩者皆完全結構化之兩個晶圓1、2。As shown in Figures 5a through 5c, in the absence of the transparent region 40, the on-site measurement of the alignment during contact and/or bonding is limited to the measurement of the strain field and/or the stress field. The example of Figures 5a through 5c shows a method and a device in which a structured wafer 2' is aligned with respect to a carrier wafer 1', rather than two wafers 1, 2 that are both fully structured.

藉由使用已知光學系統使對準標記3.1至3.n與對準標記4.1至4.n相關。若光學器件7及/或8具有上文所提及之對應感測器構件,則其等可用於量測應變場及/或應力場。若所使用之電磁輻射可穿透該結構晶圓2',而該載體晶圓1'已自視覺區域移除(圖5b),則可藉由該光學器件8或該光學器件7量測該晶圓2'之頂部2o上的應力場及/或應變場。藉由計算構件必須考慮:若在藉由該光學器件7之透射量測中,該應力沿著層厚度改變(所謂層厚度中的應力梯度),則可獲得一平均應變及/或應力值。參考圖5c,為量測該載體晶圓1'之表面1o上的應變場及/或應力場,已對上文所描述之應用作了必要的改變。The alignment marks 3.1 to 3.n are associated with the alignment marks 4.1 to 4.n by using a known optical system. If the optical devices 7 and/or 8 have the corresponding sensor members mentioned above, they can be used to measure the strain field and/or the stress field. If the electromagnetic radiation used can penetrate the structural wafer 2' and the carrier wafer 1' has been removed from the visual area (Fig. 5b), the optical device 8 or the optical device 7 can measure the Stress field and/or strain field at the top 2o of wafer 2'. By calculating the component it must be considered that if the stress is varied along the layer thickness (so-called stress gradient in the layer thickness) by the transmission measurement of the optical device 7, an average strain and/or stress value can be obtained. Referring to Figure 5c, the necessary changes to the application described above have been made to measure the strain field and/or stress field on the surface 1o of the carrier wafer 1'.

在量測各自初始應變場及/或應力場之後,可對準且結合該兩個晶圓1'、2'。在完成結合之後,經由該光學器件7及/或8判定該等應變場及/或應力場。在結合之後,由於電磁輻射必須穿透該兩個晶圓1'、2',故該等表面1o、2o之應變場及/或應力場之僅一個透射量測係可能的。因此,透射量測與反射量測之間的前述區別為較佳。如本發明所主張,為更好地比較,透射量測為較佳。若透射量測及反射量測應產生類似應變圖及/或應力圖,則可推斷:該等應變場及/或應力場僅在該等表面1o、2o上且遍及厚度沒有應力梯度。接著,之前/之後的比較繼而容許得出關於該等應變場及/或應力場之改變之一結論及關於系統之可能存在之缺點之一結論。若發現極限應變區域及/或應力區域或其等超過一比較值,則晶圓系統在其等彼此被永久結合之前可再次分解成之個別晶圓。After measuring the respective initial strain fields and/or stress fields, the two wafers 1', 2' can be aligned and bonded. The strain fields and/or stress fields are determined via the optics 7 and/or 8 after the bonding is completed. After bonding, since electromagnetic radiation must penetrate the two wafers 1', 2', only one transmission measurement of the strain fields and/or stress fields of the surfaces 1o, 2o is possible. Therefore, the aforementioned difference between the transmission measurement and the reflection measurement is preferable. As suggested by the present invention, for better comparison, transmission measurements are preferred. If the transmission measurement and the reflection measurement should produce similar strain maps and/or stress maps, it can be inferred that the strain fields and/or stress fields are only on the surfaces 1o, 2o and have no stress gradient throughout the thickness. The previous/after comparison then allows conclusions to be drawn about one of the changes in the strain fields and/or stress fields and one of the possible shortcomings of the system. If the ultimate strain region and/or stress region or the like is found to exceed a comparison value, the wafer system can be decomposed into individual wafers again before they are permanently bonded to each other.

對於對用於偵測應力圖之電磁波不透明之結構化晶圓,一反射量測可為較佳,因為該晶圓之結構化表面(尤其該接觸表面1k或2k)之透明度不發揮作用。對於具有透明度之此等晶圓,亦可在與該等表面1o及2o相對之表面上有利地量測應力。為達成量測結果之更好比較,預結合及/或結合步驟之前及之後兩者量測此等表面係一良好構想。由於相較於晶圓厚度,在橫向方向上觀看之晶圓中的應力場具有一更大擴展,該量測之此版本亦產生非常好的結果。特定言之,需要具有某一最小擴展之橫向應力來引起明顯畸變之環境有利於精確度。可期望相對於該晶圓厚度擴展,橫向方向(X/Y)上的應力場必須具有至少3至5倍,甚至可能10、15或20倍,以導致相關應變/畸變。For structured wafers that are opaque to the electromagnetic waves used to detect the stress map, a reflectance measurement may be preferred because the transparency of the structured surface of the wafer (especially the contact surface 1k or 2k) does not function. For such wafers having transparency, stress can also be advantageously measured on the surface opposite the surfaces 1o and 2o. To achieve a better comparison of the measurements, it is a good idea to measure these surfaces before and after the pre-bonding and/or combining steps. Since the stress field in the wafer viewed in the lateral direction has a larger spread than the wafer thickness, this version of the measurement also produces very good results. In particular, an environment with a certain minimum extended lateral stress to cause significant distortion is desirable for accuracy. It may be desirable to have a stress field in the lateral direction (X/Y) that is at least 3 to 5 times, and possibly even 10, 15 or 20 times, relative to the wafer thickness extension, to cause associated strain/distortion.

如本發明所主張,可使用之最重要之晶圓材料組合為:Cu-Cu、Au-Au、混合結合、Si、Ge、InP、InAs、GaAs;及容許此之其等材料之組合及材料之各自可分配氧化物。As claimed in the present invention, the most important combination of wafer materials that can be used is: Cu-Cu, Au-Au, hybrid bonding, Si, Ge, InP, InAs, GaAs; and combinations and materials that allow such materials Each of them can be assigned an oxide.

有利地是,位置圖、應變圖及應力圖皆關於相同X-Y座標系統。因此,尤其在根據圖6判定第一對準位置及第二對準位置且判定位移圖時,簡化向量計算。Advantageously, the position map, strain map and stress map are all about the same X-Y coordinate system. Therefore, the vector calculation is simplified, especially when the first alignment position and the second alignment position are determined according to FIG. 6 and the displacement map is determined.

1...第一基板1. . . First substrate

1'...載體晶圓1'. . . Carrier wafer

1k...第一接觸表面1k. . . First contact surface

1o...表面/頂部1o. . . Surface/top

2...第二基板2. . . Second substrate

2'...結構晶圓2'. . . Structured wafer

2k...第二接觸表面2k. . . Second contact surface

2o...表面/頂部2o. . . Surface/top

3.1至3.n...第一對準鍵3.1 to 3.n. . . First alignment key

4.1至4.n...第二對準鍵4.1 to 4.n. . . Second alignment key

7...第一偵測構件7. . . First detecting member

8...第二偵測構件8. . . Second detecting member

40...透明區域40. . . Transparent area

50、50'...結構50, 50'. . . structure

u...差異向量u. . . Difference vector

v'、v"...偏差向量v', v"... deviation vector

圖1a展示如本發明所主張之已對準之一晶圓對之一橫截面示意圖;Figure 1a shows a cross-sectional view of one of the aligned wafer pairs as claimed in the present invention;

圖1b展示根據圖1a之晶圓對之一上部晶圓之一示意態樣;Figure 1b shows a schematic representation of one of the upper wafers according to the wafer pair of Figure 1a;

圖1c展示根據圖1a之晶圓對之一下部晶圓之一示意態樣;Figure 1c shows a schematic representation of one of the lower wafers of the wafer pair according to Figure 1a;

圖2a展示如本發明所主張之偵測一第一晶圓之程序步驟之一示意圖;2a is a schematic diagram showing a procedure of detecting a first wafer as claimed in the present invention;

圖2b展示如本發明所主張之偵測一第二晶圓之程序步驟之一示意圖;2b is a schematic diagram showing the steps of detecting a second wafer as claimed in the present invention;

圖2c展示晶圓接觸時如本發明所主張現場偵測晶圓之對準之一示意圖;2c is a schematic view showing the alignment of the wafer in the field as claimed in the present invention when the wafer is in contact;

圖3展示用於一經極佳對準及接觸之晶圓對之一對準標記之一放大圖;Figure 3 shows an enlarged view of one of the alignment marks for a wafer pair that is excellently aligned and in contact;

圖4展示用於一經有瑕疵對準及接觸之晶圓對之一對準標記之一放大圖與彼此對準之晶圓對之兩個結構之中央之一放大圖;4 shows an enlarged view of one of the centers of two structures of an alignment of one of the aligned pairs of wafer pairs aligned and in contact with each other;

圖5a至圖5c展示用於偵測一晶圓對之對準之一替代方法;及5a-5c illustrate an alternative method for detecting alignment of a wafer pair; and

圖6展示如本發明所主張之一位移圖之判定之一示意圖。Figure 6 shows a schematic diagram of one of the determinations of a displacement map as claimed in the present invention.

1...第一基板/晶圓1. . . First substrate/wafer

1k...接觸表面1k. . . Contact surface

1o...表面1o. . . surface

2...第二基板/晶圓2. . . Second substrate/wafer

2k...接觸表面2k. . . Contact surface

2o...表面2o. . . surface

3.1...第一對準鍵3.1. . . First alignment key

3.3...第一對準鍵3.3. . . First alignment key

4.1...第二對準鍵4.1. . . Second alignment key

4.3...第二對準鍵4.3. . . Second alignment key

7...第一偵測構件7. . . First detecting member

40...透明區域40. . . Transparent area

50...結構50. . . structure

50'...結構50'. . . structure

Claims (14)

一種用於判定局部對準誤差之裝置,該等局部對準誤差歸因於在一第一基板(1)接合至一第二基板(2)時該第一基板(1)相對於該第二基板(2)之應變及/或畸變而引起,其具有下列特徵:藉由初始偵測構件偵測沿著該第一基板(1)之一第一接觸表面(1k)之應變值之一第一應變圖及/或沿著該第一接觸表面(1k)之應力值之一第一應力圖;及/或藉由該偵測構件偵測沿著一第二接觸表面(2k)之應變值之一第二應變圖及/或沿著該第二接觸表面(2k)之應力值之一第二應力圖;及可藉由用於評估該第一應變圖及/或該第二應變圖及/或該第一應力圖及/或該第二應力圖之評估構件判定該等局部對準誤差。A device for determining a local alignment error due to the first substrate (1) being opposite to the second when a first substrate (1) is bonded to a second substrate (2) Caused by strain and/or distortion of the substrate (2), which has the following feature: detecting the strain value along the first contact surface (1k) of one of the first substrates (1) by the initial detecting member a strain map and/or a first stress map along a stress value of the first contact surface (1k); and/or detecting a strain value along a second contact surface (2k) by the detecting member a second strain map and/or a second stress map along one of the stress values of the second contact surface (2k); and may be used to evaluate the first strain map and/or the second strain map and And/or the first stress map and/or the evaluation component of the second stress map determine the local alignment errors. 如請求項1之裝置,其經製造以尤其在判定時藉由該評估構件考慮第一對準鍵(3.1至3.n)之第一位置圖及/或第二對準鍵(4.1至4.n)之第二位置圖。A device as claimed in claim 1, which is manufactured to take into account a first position map and/or a second alignment key (4.1 to 4) of the first alignment key (3.1 to 3.n) by means of the evaluation member, in particular at the time of determination .n) The second position map. 一種用於判定局部對準誤差之器件,該等局部對準誤差歸因於在一第一基板(1)接合至一第二基板(2)時該第一基板(1)相對於該第二基板(2)之應變及/或畸變而引起,其具有以下特徵:可藉由初始偵測構件偵測沿著該第一基板(1)之一第一接觸表面(1k)之應變值之一第一初始應變圖及/或沿著該第一接觸表面(1k)之應力值之一第一初始應力圖;及/或可藉由初始偵測構件偵測沿著一第二接觸表面(2k)之應變值之一第二初始應變圖及/或沿著該第二接觸表面(2k)之應力值之一第二初始應力圖;及如請求項1之裝置,在判定該等局部對準誤差時可藉由該評估構件考慮該第一初始應變圖及/或該第二初始應變圖及/或該第一初始應力圖及/或該第二初始應力圖。A device for determining a local alignment error due to the first substrate (1) being opposite to the second when a first substrate (1) is bonded to a second substrate (2) Caused by strain and/or distortion of the substrate (2), which has the following feature: one of the strain values along the first contact surface (1k) of the first substrate (1) can be detected by the initial detecting member a first initial strain map and/or a first initial stress map along one of the stress values of the first contact surface (1k); and/or detectable along a second contact surface by the initial detecting member (2k a second initial strain map and/or a second initial stress map along one of the stress values of the second contact surface (2k); and a device according to claim 1 for determining the local alignment The first initial strain map and/or the second initial strain map and/or the first initial stress map and/or the second initial stress map may be considered by the evaluation component during the error. 一種用於接合可容納於一第一平台(10)上之一第一基板(1)之一第一接觸表面(1k)與可容納於一第二平台(20)上之一第二基板(2)之一第二接觸表面(2k)之器件,其具有以下特徵:可藉由位置偵測構件(7、8)偵測沿著該第一接觸表面(1k)定位之第一對準鍵(3.1至3.n、50')之一第一位置圖,可藉由位置偵測構件(7、8)偵測沿著該第二接觸表面(2k)定位之第二對準鍵(4.1至4.n、50)之一第二位置圖,如請求項1或2之裝置或如請求項3之器件,用於基於該第一位置圖之值及該第二位置圖之值判定該第一接觸表面(1k)之一第一對準位置及該第二接觸表面(2k)之一第二對準位置之計算構件,用於將該第一接觸表面(1k)對準於該第一對準位置及將該第二接觸表面(2k)對準於該第二對準位置之對準構件,用於連接該第一基板(1)及該第二基板(2)之構件,及如請求項1或2之裝置或如請求項3之器件。A first contact surface (1k) for bonding one of the first substrate (1) and a second substrate (20) receivable on a first platform (10) 2) a device of a second contact surface (2k) having the feature that the first alignment key positioned along the first contact surface (1k) can be detected by the position detecting member (7, 8) a first position map of (3.1 to 3.n, 50'), wherein the second alignment key positioned along the second contact surface (2k) can be detected by the position detecting member (7, 8) (4.1 a second location map to 4.n, 50), such as the device of claim 1 or 2 or the device of claim 3, for determining the value based on the value of the first location map and the value of the second location map a first alignment position of the first contact surface (1k) and a second alignment position of the second contact surface (2k) for aligning the first contact surface (1k) to the first An alignment member and an alignment member for aligning the second contact surface (2k) to the second alignment position for connecting the first substrate (1) and the second substrate (2), and A device as claimed in claim 1 or 2 or a device as claimed in claim 3. 如請求項4之器件,其中有用於在尤其現場接合該等基板(1、2)期間檢查該第一對準位置及/或該第二對準位置之偵測構件。A device according to claim 4, wherein there is a detecting member for inspecting the first alignment position and/or the second alignment position during the in-situ bonding of the substrates (1, 2). 如請求項5之器件,其中透過該第一基板(1)之透明區域及/或該第二基板(2)之透明區域(40)進行檢查。The device of claim 5, wherein the inspection is performed through the transparent region of the first substrate (1) and/or the transparent region (40) of the second substrate (2). 如請求項5或6之器件,其中在檢查時有至少兩個、較佳為四個對應對準鍵(3.1至3.4、4.1至4.4)。The device of claim 5 or 6, wherein there are at least two, preferably four, corresponding alignment keys (3.1 to 3.4, 4.1 to 4.4) at the time of inspection. 一種用於判定局部對準誤差之方法,該等局部誤差歸因於在一第一基板(1)接合至一第二基板(2)時該第一基板(1)相對於該第二基板(2)之應變及/或畸變而引起,該方法具有以下步驟,尤其具有以下序列:藉由偵測構件偵測沿著該第一基板(1)之一第一接觸表面(1k)之應變值之一第一應變圖及/或沿著該第一接觸表面(1k)之應力值之一第一應力圖;及/或藉由偵測構件偵測沿著一第二接觸表面(2k)之應變值之一第二應變圖及/或沿著該第二接觸表面(2k)之應力值之一第二應力圖;及藉由評估構件評估該第一應變圖及/或該第二應變圖及/或該第一應力圖及/或該第二應力圖及判定局部對準誤差。A method for determining a local alignment error due to the first substrate (1) being opposed to the second substrate when a first substrate (1) is bonded to a second substrate (2) 2) caused by strain and/or distortion, the method has the following steps, in particular having the following sequence: detecting the strain value along the first contact surface (1k) of one of the first substrates (1) by the detecting member a first strain map and/or a first stress map along a stress value of the first contact surface (1k); and/or detecting along a second contact surface (2k) by the detecting member a second strain map of one of the strain values and/or a second stress map along one of the stress values of the second contact surface (2k); and evaluating the first strain map and/or the second strain map by the evaluation member And/or the first stress map and/or the second stress map and determining a local alignment error. 如請求項8之方法,其中在評估時,尤其在判定時考量第一對準鍵(3.1至3.n、50')之第一位置圖及/或第二對準鍵(4.1至4.n、50)之第二位置圖。The method of claim 8, wherein the first position map and/or the second alignment key (4.1 to 4.) of the first alignment key (3.1 to 3.n, 50') are considered at the time of evaluation, especially at the time of the determination. n, 50) second position map. 如請求項8或9之方法,其中有下列額外步驟:在接合之前藉由初始偵測構件偵測沿著一第一接觸表面(1k)之應變值之一第一初始應變圖及/或沿著該第一接觸表面(1k)之應力值之一第一初始應力圖;及/或在接合之前藉由該初始偵測構件偵測沿著該第二接觸表面(2k)之應變值之一第二初始應變圖及/或沿著該第二接觸表面(2k)之應力值之一第二初始應力圖;及在判定局部對準誤差時藉由評估構件考慮該第一初始應變圖及/或該第二初始應變圖及/或該第一初始應力圖及/或該第二初始應力圖。The method of claim 8 or 9, wherein the additional step of: detecting the first initial strain pattern and/or along a strain value along a first contact surface (1k) by the initial detecting member prior to bonding One of the first initial stress patterns of the stress value of the first contact surface (1k); and/or one of the strain values along the second contact surface (2k) detected by the initial detecting member before bonding a second initial strain map and/or a second initial stress map along one of the stress values of the second contact surface (2k); and considering the first initial strain map by the evaluation member when determining the local alignment error Or the second initial strain map and/or the first initial stress map and/or the second initial stress map. 如請求項8或9之方法,其中有下列進一步步驟:在接合之前藉由位置偵測構件(7、8)偵測沿著該第一接觸表面(1k)定位之第一對準鍵(3.1至3.n、50')之一第一位置圖,在接合之前藉由位置偵測構件(7、8)偵測沿著該第二接觸表面(2k)定位之第二對準鍵(4.1至4.n、50)之一第二位置圖,基於該第一位置圖之值及該第二位置圖之值藉由計算構件判定該第一接觸表面(1k)之一第一對準位置及該第二接觸表面(2k)之一第二對準位置,藉由對準構件將該第一接觸表面(1k)對準於該第一對準位置及將該第二接觸表面(2k)對準於該第二對準位置;及接合該第一基板(1)及該第二基板(2)。The method of claim 8 or 9, wherein the following further step is: detecting the first alignment key positioned along the first contact surface (1k) by the position detecting member (7, 8) before the bonding (3.1) a first position map to one of 3.n, 50'), detecting a second alignment key positioned along the second contact surface (2k) by the position detecting member (7, 8) before bonding (4.1 a second position map to one of 4.n, 50), determining, by the computing member, a first alignment position of the first contact surface (1k) based on the value of the first position map and the value of the second position map And a second alignment position of the second contact surface (2k), the first contact surface (1k) being aligned with the first alignment position and the second contact surface (2k) by an alignment member Aligning with the second alignment position; and bonding the first substrate (1) and the second substrate (2). 如請求項8或9之方法,其中有下列進一步步驟:藉由偵測構件,尤其透過該第一基板(1)及/或該第二基板(2)之透明區域(40),在尤其現場接合該等基板(1、2)期間檢查該第一對準位置及/或該第二對準位置。The method of claim 8 or 9, wherein the following further steps are performed by detecting the component, in particular through the first substrate (1) and/or the transparent region (40) of the second substrate (2), in particular The first alignment position and/or the second alignment position are inspected during bonding of the substrates (1, 2). 一種如請求項1之裝置或如請求項4之器件對於可再加工或不可再加工之結合晶圓(1、2)之用途。A use of a device as claimed in claim 1 or a device as claimed in claim 4 for a reworkable or non-reworkable bonded wafer (1, 2). 一種如請求項8之方法對於可再加工或不可再加工之結合晶圓(1、2)之用途。A use of the method of claim 8 for a reworkable or non-reworkable bonded wafer (1, 2).
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