JP6111943B2 - Semiconductor device inspection apparatus and semiconductor device manufacturing method - Google Patents

Description

  The present invention relates to a semiconductor device inspection apparatus and a semiconductor device manufacturing method.

  2. Description of the Related Art Conventionally, in order to improve functions such as high speed and low power consumption of an electronic device, a three-dimensional mounting technique in which a plurality of substrates are stacked has been proposed, and a semiconductor device formed by stacking a plurality of substrates. Has been developed.

  In the three-dimensional mounting technology, two electrodes to be stacked are electrically connected by matching the positions of electrodes arranged on the surfaces of opposing substrates and electrically connecting the electrodes.

  As a method for adjusting the positions of the two substrates to be stacked, for example, the notches of the two substrates and the contours of the substrates are matched.

  In addition, an alignment mark for alignment is formed on the two substrates to be stacked, a reference mark is formed on a holder that holds one substrate, and an alignment mark on one substrate held on the holder Check the positional relationship with the reference mark. When two substrates are stacked, it has been proposed to align the alignment mark of the other substrate with the reference mark of the holder as an intermediate.

JP 2005-251972 A JP 2011-021916 A JP 2011-049318 A JP 2011-1000096 A JP 2011-049318 A JP 2011-0666283 A JP 2011-222809 A

  The miniaturization of circuit elements is progressing, and the size of the electrodes arranged on the surface of the substrate and the interval between the electrodes are reduced. Therefore, there is a possibility that the alignment accuracy of the two substrates to be stacked is not sufficient with respect to the size of the electrode or the interval between the electrodes.

  In addition, when the number of stacked substrates is small, it is possible to inspect the degree of coincidence of the opposing electrodes on the stacked substrates using infrared rays or the like, but the number of stacked substrates increases. If this happens, it may be difficult to perform such an inspection.

  In view of this, an object of the present specification is to provide a semiconductor device inspection apparatus capable of obtaining a positional shift of stacked substrates.

  Further, it is an object of the present specification to provide a method for manufacturing a semiconductor device that can correct a positional deviation of stacked substrates.

  According to one embodiment of the semiconductor device inspection apparatus disclosed in this specification, the positional relationship between the first surface and the second surface, the first electrode disposed on the first surface, and the first electrode is associated. And a first mark disposed on the first surface and a second mark disposed on the second surface and associated with the positional relationship with the first mark. A positional relationship between the first electrode and the first mark, a positional relationship between the first mark and the second mark, a third surface and a fourth surface, and a second electrode disposed on the third surface; A positional relationship with the second electrode is associated; a third mark disposed on the third surface; a fourth mark disposed on the fourth surface and associated with the positional relationship with the third mark; The second electrode and the third mark for a second semiconductor substrate having And a storage unit for storing the positional relationship between the third mark and the fourth mark, the first semiconductor substrate and the second semiconductor substrate, and the first surface and the third surface. In a state of being opposed to each other, the measurement unit that measures the positions of the second mark and the fourth mark, the measured positions of the second mark and the fourth mark, and the second unit stored in the storage unit The positional relationship between one electrode and the first mark, the positional relationship between the first mark and the second mark, the positional relationship between the second electrode and the third mark, and the third mark and the fourth mark And a calculation unit that obtains the positional relationship between the first electrode and the second electrode based on the positional relationship.

  Further, according to one embodiment of the method for manufacturing a semiconductor device disclosed in the present specification, the positional relationship between the first surface and the second surface, the first electrode disposed on the first surface, and the first electrode. Are associated with each other, and the first mark disposed on the first surface and the second mark disposed on the second surface and associated with the positional relationship with the first mark, Based on the positional relationship between the first mark and the second mark, the first semiconductor substrate, the third surface and the fourth surface, the positional relationship between the second mark and the first electrode, and the first surface are related. The positional relationship between the second electrode disposed on the third surface and the second electrode is associated, and the third mark disposed on the third surface, the second mark disposed on the second surface, and the third mark A fourth mark associated with a positional relationship between the third mark and the third mark On the basis of the positional relationship with the 4 mark, the second semiconductor substrate in which the positional relationship between the fourth mark and the second electrode is associated with the first surface and the third surface facing each other. Measuring the positions of the second mark and the fourth mark, the positional relationship between the first mark and the second mark, the positional relationship between the first mark and the first electrode, and the first mark Based on the positional relationship between the third mark and the fourth mark, and the positional relationship between the third mark and the second electrode, a displacement amount that is a difference in position between the first electrode and the second electrode is determined. When the displacement amount is within the first range, the first semiconductor substrate and the second semiconductor substrate are stacked with the first surfaces facing each other, while the displacement amount is the first range. When out of the range, the positional relationship between the first semiconductor substrate and the second semiconductor substrate. And the displacement amount after the correction to be within the first range, and the first semiconductor substrate and the second semiconductor substrate are laminated so as to face the first surface between each other.

  According to one embodiment of the inspection apparatus for a semiconductor device disclosed in this specification, it is possible to obtain a shift in the position of a substrate to be stacked.

  According to one embodiment of the method for manufacturing a semiconductor device disclosed in this specification, the positional deviation of the stacked substrates can be obtained and corrected.

  The objects and advantages of the invention will be realized and obtained by means of the elements and combinations particularly pointed out in the appended claims.

  Both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention as claimed.

(A) is a 1st surface figure which shows one Embodiment of the semiconductor substrate disclosed to this specification, (B) is a figure of a 2nd surface. (A) is the XX sectional drawing of FIG. 1 (A), (B) is an enlarged view of the edge part of FIG. 2 (A). It is a figure explaining an edge inspection apparatus. It is a figure which shows the positional relationship of a front mark and a back mark. It is a figure which shows the positional relationship of a table mark and an electrode. 2 is a flowchart (part 1) illustrating an embodiment of a method for manufacturing a semiconductor device disclosed in the specification. It is a flowchart (the 2) explaining one Embodiment of the manufacturing method of the semiconductor device disclosed to this specification. It is a figure explaining the process (the 1) of one Embodiment of the manufacturing method of the semiconductor device disclosed to this specification. It is a figure explaining the process (the 2) of one Embodiment of the manufacturing method of the semiconductor device disclosed to this specification. It is a figure explaining the process (the 3) of one Embodiment of the manufacturing method of the semiconductor device disclosed to this specification. It is a figure explaining a bonding apparatus. It is a figure explaining calculating | requiring the position of each table | surface mark based on the position of the back mark of two semiconductor substrates. It is a figure explaining calculating | requiring the position of each electrode based on the position of the front mark of two semiconductor substrates. FIG. 6 is a diagram (part 1) illustrating a process of correcting the position of a semiconductor substrate so that the positions of the electrodes of two semiconductor substrates match. FIG. 10 is a diagram (part 2) for explaining the process of correcting the position of the semiconductor substrate so that the positions of the electrodes of the two semiconductor substrates match.

  Hereinafter, a preferred embodiment of a semiconductor substrate disclosed in the present specification will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the invention described in the claims and equivalents thereof.

  FIG. 1A is a front view illustrating one embodiment of a semiconductor substrate disclosed in this specification, and FIG. 1B is a rear view. 2A is a cross-sectional view taken along line XX of FIG. 1A, and FIG. 2B is an enlarged view of an end portion of FIG. 2A.

  The semiconductor substrate 10a of the present embodiment has a first surface 10f as a front surface and a second surface 10r as a back surface, and another semiconductor substrate can be stacked on the first surface 10f.

  On the first surface 10f, a plurality of semiconductor units U whose boundaries are defined by scribe lines L are arranged. Each semiconductor unit U is provided with a plurality of electrodes P. These electrodes P can be electrically connected to electrodes of other semiconductor substrates stacked on the first surface 10f. On the electrode P, bumps 13 are arranged. The electrode P is electrically connected to an electrode of another semiconductor substrate with the bump 13 interposed. The semiconductor substrate 10a is cut along the scribe line L after another semiconductor substrate is stacked on the first surface 10f, thereby forming individual semiconductor devices.

  As shown in FIG. 2A, the semiconductor substrate 10a has an element layer 12 in which circuit elements are arranged. Each electrode P disposed on the first surface 10f is electrically connected to the element layer 12 using a wiring layer or a contact (not shown).

  On the first surface 10f, table marks S1 to S3, which are formed at the same time as the electrode P using a lithography method and are associated with the positional relationship with the electrode P, are arranged.

  Three table marks S1 to S3 are formed on the first surface 10f of the semiconductor substrate 10a. With the notch 11 as the 12 o'clock direction, the front mark S1 is placed at the 3 o'clock position, the front mark S2 is placed at the 7 o'clock position, and the front mark S3 is placed at the 11 o'clock position.

  Further, back marks B1 to B3 associated with the positional relationship with the front marks S1 to S3 are arranged on the second surface 10r of the semiconductor substrate 10a. The back mark B1 is disposed at a position corresponding to the front mark S1, the back mark B2 is disposed at a position corresponding to the front mark S2, and the back mark B3 is disposed at a position corresponding to the front mark S3.

  The front marks S1 to S3 and the back marks B1 to B3 are used to determine the displacement of the position of the stacked semiconductor substrates when the semiconductor substrate 10a is stacked with the first surface 10f facing the other semiconductor substrate. It is used to correct the positions so as to match each other.

  In the state where the semiconductor substrate 10a has the first surface 10f opposed to another semiconductor substrate, the front marks S1 to S3 and the electrode P are not visible from the outside. Therefore, the back marks B1 to B3 are arranged on the second surface 10r, and the front marks S1 to S3 corresponding to the back marks B1 to B3 are arranged on the first surface 10f. Since the positions of the front marks S1 to S3 are associated with the positions of the electrodes P, the positions of the front marks S1 to S3 are interposed on the first surface 10f by measuring the positions of the back marks B1 to B3. The position of the electrode P can be obtained. That is, based on the measured positions of the back marks B1 to B3, the position of the electrode P that cannot be visually recognized from the outside can be obtained. Since the back mark and the corresponding front mark are also formed on the other semiconductor substrate facing the semiconductor substrate 10a, the position of the electrode on the other semiconductor substrate can be obtained. Then, it is possible to obtain a displacement of the positions of the electrodes facing each other and correct the positions of the electrodes to be matched.

  At least one front mark and a corresponding back mark are formed on the first surface 10f and the second surface 10r of the semiconductor substrate 10a. From the viewpoint of more accurately obtaining the positional deviation of the stacked semiconductor substrates, particularly the circumferential positional deviation, at least three front marks and corresponding back marks are formed on the first surface 10f of the semiconductor substrate 10a and It is preferably formed on the second surface 10r.

  In the case where a plurality of front marks and back marks are arranged, it is preferable that the marks are not arranged unevenly from the viewpoint of accurately obtaining the positional deviation of the stacked semiconductor substrates. In the semiconductor substrate 10a, the three front marks S1 to S3 and the corresponding back marks B1 to B3 are arranged with a central angle between the marks of 120 °.

  The back marks B1 to B3 are arranged in a predetermined range with respect to the corresponding front marks S1 to S3. For example, the positional relationship between the front mark and the corresponding back mark can be determined within a predetermined range of the radius vector and the declination angle using polar coordinates with the center of the semiconductor substrate 10a as the origin.

  The front marks S1 to S3 and the electrode P are formed using a patterned mask on the semiconductor substrate 10a. The mask is patterned using a lithography method based on the designed pattern data of the semiconductor substrate 10a. Therefore, the position of the table marks S1 to S3 and the position of the electrode P are associated based on the pattern data.

  The front marks S1 to S3 may be formed as marks having an arbitrary shape such as a circle. Further, as the table marks S1 to S3, patterns already existing on the pattern data such as scribe lines may be used.

  The positions where the table marks S1 to S3 are arranged are not particularly limited as long as they are on the first surface 10f. As shown in FIG. 2B, the front marks S1 to S3 may be arranged on the flat portion of the first surface 10f of the semiconductor substrate 10a, or may be arranged on the bevel portion 14. When the front mark is disposed on the bevel portion 14, the front mark is disposed on the front side of the apex 14 a of the bevel portion 14.

  Since the semiconductor unit U is formed on the flat portion on the first surface 10f, from the viewpoint of effectively using the flat portion, the table marks S1 to S3 are arranged on the outer peripheral portion near the edge of the semiconductor substrate 10a. Is preferred. Further, by arranging the table marks S1 to S3 in the vicinity of the edge, the position of the table marks S1 to S3 can be measured using an edge inspection apparatus. When the positions of the front marks S1 to S3 are measured using an edge inspection apparatus, the positions of the front marks S1 to S3 are preferably arranged within 5 mm from the edge of the semiconductor substrate 10a, for example. The positions of the back marks B1 to B3 can also be measured using an apparatus in the same manner as the front marks S1 to S3.

  Further, the positions where the table marks S1 to S3 are arranged are regions where no other pattern is arranged or few other patterns are arranged from the viewpoint of measuring the table marks S1 to S3 separately from other patterns. It is preferable to make it an area. The front marks S1 to S3 may have a horizontally long or vertically long shape so that they can be measured separately from other patterns.

  The front marks S1 to S3 may be any pattern as long as they are formed simultaneously with the electrodes based on the pattern data. As specific examples of the table marks S1 to S3, a pattern after the semiconductor substrate 10a is etched, a pattern after the semiconductor substrate 10a is mechanically and chemically polished, or a film is laminated on the semiconductor substrate 10a. Examples include later patterns.

  The dimensions of the table marks S1 to S3 can be appropriately set according to the resolution of the apparatus for measuring the positions of the table marks S1 to S3. For example, when the positions of the front marks S1 to S3 are measured using an edge inspection apparatus, the dimensions of the front marks S1 to S3 can be about 0.1 mm.

  The back marks B1 to B3 are formed before the semiconductor substrate 10a is stacked with another semiconductor substrate. For example, the back marks B1 to B3 may be formed on the second surface 10r before the electrodes P and the front marks S1 to S3 are formed on the first surface 10f.

  The position where the back marks B1 to B3 are arranged is not particularly limited as long as it is on the second surface 10r. As shown in FIG. 2B, the back marks B1 to B3 may be arranged on a flat portion on the second surface 10r of the semiconductor substrate 10a, or may be arranged on the bevel portion 14. When the back mark is disposed on the bevel portion 14, the back mark is disposed on the back side of the apex 14 a of the bevel portion 14.

  From the viewpoint of simultaneously measuring the positions of the front mark and the back mark using an edge inspection apparatus, it is preferable to place the back marks B1 to B3 on the outer peripheral portion in the vicinity of the edge of the semiconductor substrate 10a.

  The method for forming the back marks B1 to B3 is not particularly limited, but for example, a laser processing apparatus can be used.

  The dimensions of the back marks B1 to B3 can be set according to the resolution of the apparatus for measuring the position of the back marks. When an edge inspection apparatus is used, the size of the dots forming the back mark can be about 100 μm to 300 μm.

  The depths of the back marks B1 to B3 are preferably set so that the back marks remain even after the second surface 10r of the semiconductor substrate 10a is polished. Usually, since the thickness of 40 μm to 150 μm is reduced by mechanical chemical polishing, the depth of the back marks B1 to B3 is preferably formed to about 50 μm to 200 μm.

  FIG. 3 is a diagram illustrating an edge inspection apparatus that measures the positions of the front marks S1 to S3 and the back marks B1 to B3 of the semiconductor substrate 10a.

  The edge inspection apparatus 20 includes a sensor unit 21 that acquires an image of an edge of the semiconductor substrate 10a, a stage 22 on which the semiconductor substrate 10a is placed, and a device control unit 23 that controls the sensor unit 21 and the stage 22.

  The stage 22 includes a stage unit 22c that sucks and places the circular semiconductor substrate 10a, a rotation drive unit 22b that rotates the stage unit 22c, and a drive control unit 22a that controls the rotation drive unit 22b. The drive control unit 22 a is controlled by the device control unit 23.

  The sensor unit 21 acquires an image of an edge along the circumference of the semiconductor substrate 10 a rotated by the stage 22, and outputs the acquired image to the device control unit 23.

  The device control unit 23 includes a storage unit 23b, an input / output unit 23c, a display unit 23d, a communication unit 23e, and a control unit 23a that controls each unit. Each function of the apparatus control unit 23 is realized by the control unit 23a executing the inspection program stored in the storage unit 23b. The device control unit 23 may be formed using hard air.

  The storage unit 23b stores an inspection program executed by the control unit 23a. Further, the storage unit 23b stores pattern data such as scribe lines L, electrodes P, and table marks S1 to S3 formed on the first surface 10f of the semiconductor substrate 10a. The storage unit 23b stores the image output from the sensor unit 21. Further, the storage unit 23b stores information such as the lot number, wafer number, or product type of the semiconductor substrate 10a together with the pattern data.

  The input / output unit 23c includes an input / output device such as a keyboard, a mouse, or a printer.

  The display unit 23d includes a display device such as a liquid crystal display.

  The communication unit 23 e performs communication between the sensor unit 21 and the stage 22.

  Next, the operation of the edge inspection apparatus 20 will be described below.

  First, with respect to the edge of the semiconductor substrate 10a rotating on the stage unit 22c, the sensor unit 21 scans an arc from the second surface 10r side to the first surface 10f side on a circular arc using laser light. Are detected, and a band-like image of the edge along the circumference of the semiconductor substrate 10a is acquired.

  The control unit 23a executes the inspection program stored in the storage unit 23b, and determines an area having a predetermined size or a predetermined shape in the acquired image as a front mark and a back mark.

  Since the positions of the front mark and the back mark are known, a window may be provided in the acquired image to recognize the front mark and the back mark from within the window.

  The obtained positions of the front mark and the back mark are represented by a moving radius r and a declination angle θ in the polar coordinate system Z1 having the center of the circular semiconductor substrate 10a as the origin O1, and are associated with the semiconductor substrate 10a to store the memory portion. 23b.

  FIG. 4 is a diagram showing the positional relationship between the front mark and the back mark.

  In the polar coordinate system Z1, the moving radius r is a distance from the origin O1, and the declination angle θ is an angle from the reference line M connecting the origin O1 and the notch 11.

  The front mark S1 is disposed on the first surface 10f, and the back mark B1 is disposed on the second surface 10r. However, the polar coordinate system Z1 is a coordinate system on a plane in plan view of the semiconductor substrate 10a. Both marks are represented on the coordinate plane obtained by projecting B1 onto the first surface 10f. Alternatively, it may be considered that both marks are represented on the coordinate plane obtained by projecting the table mark S1 on the second surface 10r.

  In the polar coordinate system Z1, the front mark S1 is represented by coordinates S1 (rs1, θs1), and the corresponding back mark B1 is represented by coordinates B1 (rb1, θb1). The positional deviation between the front mark S1 and the back mark B1 is represented by a displacement amount ΔA. ΔA is a vector quantity having a magnitude and a direction.

  Next, the control unit 23a represents the position of the table mark S1 using a Cartesian coordinate system Z2 having an origin O2 set to the scribe line L formed on the first surface 10f. Here, the origin O2 set to the scribe line L formed on the first surface 10f is selected from the region included in the image acquired by the sensor unit 21. The origin O2 may be an intersection of the scribe lines L.

  When the table mark S1 is arranged on the flat portion of the first surface 10f, the control unit 23a determines the position of the table mark S1 based on the pattern data of the semiconductor substrate 10a stored in the storage unit 23b. It can be expressed using a Cartesian coordinate system Z2.

  On the other hand, when the table mark S1 is arranged on the bevel portion 14 of the first surface 10f, the control unit 23a performs coordinate conversion of the position of the table mark S1 represented by the polar coordinate system Z1 into the Cartesian coordinate system Z2. Then, the position of the table mark S1 is expressed using the Cartesian coordinate system Z2. As this coordinate transformation, for example, a method disclosed in JP 2012-134310 A can be used.

  In this way, the control unit 23a can represent the positional relationship between the predetermined electrode P on the first surface 10f and the table mark S1 using the Cartesian coordinate system Z2.

  FIG. 5 is a diagram showing the positional relationship between the table mark and the electrode.

  In the Cartesian coordinate system Z2, the table mark S1 is represented by coordinates S1 (xs1, ys1), and the electrode P is represented by coordinates P (xp, yp). The positional deviation between the table mark S1 and the electrode P is represented by a displacement amount ΔB. ΔB is a vector quantity having a magnitude and direction.

  In the semiconductor substrate 10a, the positional relationship between the back mark B1 and the electrode P is associated based on the positional relationship between the front mark S1 and the back mark B1.

  Similarly, the front mark S2 and the back mark B2 are associated with each other using the polar coordinate system Z1, and the front mark S3 and the back mark B3 are associated with each other using the polar coordinate system Z1. Yes.

  The position of the table mark S2 is expressed using a Cartesian coordinate system Z2 'having an origin O2' set to the scribe line L formed on the first surface 10f. Then, the position of the table mark S2 expressed using the Cartesian coordinate system Z2 'is coordinate-converted and expressed using the Cartesian coordinate system Z2 having the origin O2. Furthermore, the positional relationship between the back mark B2 and the electrode P is related based on the positional relationship between the front mark S2 and the back mark B2.

  Similarly, the position of the table mark S3 is expressed using a Cartesian coordinate system Z2 ″ having an origin O2 ″ set to the scribe line L formed on the first surface 10f. Then, the position of the table mark S3 expressed using the Cartesian coordinate system Z2 "is coordinate-converted and expressed using the Cartesian coordinate system Z2 having the origin O2. Further, the positional relationship between the back mark B3 and the electrode P is related based on the positional relationship between the front mark S3 and the back mark B3. Here, the electrodes P whose positional relationship is associated with the back marks B1 to B3 are the same electrodes.

  Next, a preferred embodiment for manufacturing a semiconductor device by stacking the above-described semiconductor substrates 10a will be described below with reference to the drawings.

  6 and 7 are flowcharts illustrating one embodiment of a method for manufacturing a semiconductor device disclosed in this specification. 8 to 10 are diagrams for explaining the steps of an embodiment of the method for manufacturing a semiconductor device disclosed in this specification.

  Steps S1 to S26 of the flowchart and FIGS. 8A to 8C describe a process of stacking the first semiconductor substrate 10a and the second semiconductor substrate 10b. The first semiconductor substrate 10a is the semiconductor substrate described above, and includes a plurality of first electrodes P arranged on the first surface 10f, front marks S1 to S3, and back marks B1 to B3. The second semiconductor substrate 10b has a configuration similar to that of the first semiconductor substrate 10a, but may include an element layer (not shown) having a circuit different from that of the first semiconductor substrate 10a. The second semiconductor substrate 10b includes a plurality of second electrodes Q disposed on the first surface 10f, front marks T1 to T3, and back marks C1 to C3. The first semiconductor substrate 10a and the second semiconductor substrate 10b are arranged such that each second electrode Q faces the corresponding first electrode P in a state where the first surfaces 10f face each other. For example, when forming a semiconductor device which is a storage device such as a DRAM, the first semiconductor substrate 10a having an interface chip as a semiconductor unit can be used. In addition, as the second semiconductor substrate 10b, a substrate on which a plurality of memory cells and a semiconductor unit having a back end portion that accesses the memory cells is formed can be used.

  In addition, steps S28 to S36 and FIGS. 9A to 10C in the flowchart describe a process of stacking other semiconductor substrates 10c to 10e and then cutting into individual semiconductor devices.

  First, in step S10, as shown in FIG. 3, the positions of the front marks S1 to S3 and the back marks B1 to B3 of the first semiconductor substrate 10a are measured using the edge inspection apparatus 20.

  Next, in step S12, the edge inspection apparatus 20 determines the positional relationship between the front marks S1 to S3 and the back marks B1 to B3 of the first semiconductor substrate 10a and the first electrode P and the front marks S1 to S1 based on the measurement result. The positional relationship with S3 is associated and stored.

  Next, in step S14, using the edge inspection apparatus 20, the positions of the front marks T1 to T3 and the back marks C1 to C3 of the second semiconductor substrate 10b are measured.

  Next, in step S16, the edge inspection apparatus 20 determines the positional relationship between the front marks T1 to T3 and the back surface marks C1 to C3 of the second semiconductor substrate 10b and the second electrode Q and the front marks T1 to T1 based on the measurement result. The positional relationship with T3 is stored in association with each other.

  Next, in step S18, as shown in FIG. 8 (A), the first semiconductor substrate 10a and the second semiconductor substrate 10b are aligned with the contours, and the first surfaces 10f face each other. The positions of the back marks B1 to B3 and the back marks C1 to C3 arranged on the second surface 10r are measured. This measurement is performed using the bonding apparatus 30 shown in FIG.

  The bonding apparatus 30 includes each unit included in the edge inspection apparatus illustrated in FIG. 3 and a second stage 31. The configurations of the sensor unit 21, the first stage 22 (corresponding to the stage unit in FIG. 3), and the apparatus control unit 23 are the same as those in the edge inspection apparatus shown in FIG. The first stage 22 sucks and places the second surface 10r of the first semiconductor substrate 10a.

  The second stage 31 includes a stage portion 31e that sucks and places the second surface 10r of the circular second semiconductor substrate 10b, a horizontal drive portion 31b that drives the stage portion 31e in the horizontal direction, and a vertical stage portion 31e. A vertical drive unit 31c that drives in the direction, a rotation drive unit 31d that rotates the stage unit 31e, and a drive control unit 31a that controls each drive unit. The drive control unit 31 a is controlled by the device control unit 23. The first semiconductor substrate 10a and the second semiconductor substrate 10b are transferred to each stage unit by a transfer unit (not shown).

  The bonding apparatus 30 also functions as an edge inspection apparatus shown in FIG. The positions of the front mark and the back mark of each of the first semiconductor substrate 10 a and the second semiconductor substrate 10 b may be measured using the bonding apparatus 30. The storage unit 23b also stores pattern data of the first semiconductor substrate 10a, and stores the position of the front mark and the position of the predetermined first electrode P in association with each other. Similarly, pattern data of the second semiconductor substrate 10b is also stored in the storage unit 23b, and the position of the front mark and the position of the predetermined second electrode Q are stored in association with each other. Further, in the processing of steps S <b> 10 to S <b> 16 described above, data obtained by the edge inspection apparatus 20 is also stored in the storage unit 23 b of the apparatus control unit 23 of the bonding apparatus 30. Or you may perform the process of step S10-S16 using the bonding apparatus 30. FIG.

  The control unit 23a executes the pasting program stored in the storage unit 23b, thereby realizing each function of the device control unit 23.

  The bonding apparatus 30 measures the positions of the back marks B1 to B3 and the back marks C1 to C3 arranged at the edges of the second surface 10r of the first semiconductor substrate 10a and the second semiconductor substrate 10b that face each other with matching contours. The above description is applied to the operation to be performed.

  Specifically, when the positions of the back marks B1 to B3 and the back marks C1 to C3 of the opposing first semiconductor substrate 10a and the second semiconductor substrate 10b are measured using the bonding apparatus 30, first, the first semiconductor The second surface 10r of the substrate 10a is sucked and placed on the stage portion 22c. Next, the second surface 10r of the second semiconductor substrate 10b is sucked and placed on the stage portion 31e. Next, the drive control unit 31a controls the horizontal drive unit 31b, the vertical drive unit 31c, and the rotation drive unit 31d so that the first semiconductor substrate 10a and the second semiconductor substrate 10b have the same notch position and contour. Then, the stage portion 31e is driven so as to face each other with a gap.

  The first stage 22 and the second stage 31 rotate the first semiconductor substrate 10a and the second semiconductor substrate 10b facing each other in synchronization.

  Next, the sensor unit 21 acquires a band-shaped image of the edges along the circumferences of the first semiconductor substrate 10a and the second semiconductor substrate 10b facing each other. Next, the control unit 23a executes an inspection program stored in the storage unit 23b, and an area having a predetermined size or a predetermined shape is obtained as a back mark from the acquired image.

  Next, in step S <b> 20, the bonding apparatus 30 obtains a displacement amount that is a difference in position between the first electrode Q and the second electrode P. In order to obtain the displacement amount, which is the difference in position between the first electrode Q and the second electrode P, the bonding apparatus 30 first obtains the positional relationship between the front mark and the back mark for each semiconductor substrate.

  Hereinafter, in order to simplify the description, the first semiconductor substrate 10a has one front mark S1 and a corresponding back mark B1, and the second semiconductor substrate 10b has one front mark T1 and a corresponding back mark. Description will be made assuming that C1 is included.

  FIG. 12 is a diagram for explaining the determination of the position of each front mark based on the positions of the back marks of the two semiconductor substrates.

  The bonding apparatus 30 uses the polar coordinate system Z1 with the center of the first semiconductor substrate 10a as the origin O1, and the front marks S1 to S3 and the back marks B1 to B3 of the first semiconductor substrate 10a and the second semiconductor substrate 10b. Table mark T1-T3 and back mark C1-C3 are represented. Since the polar coordinate system Z1 is a coordinate system on a plane in plan view of the first semiconductor substrate 10a, the front marks T1 to T3 and the back marks C1 to C3 of the second semiconductor substrate 10b are placed on the first surface 10f of the first semiconductor substrate 10a. Each mark is represented on the coordinate plane projected onto the.

  In the polar coordinate system Z1, the front mark S1 of the first semiconductor substrate 10a is represented by coordinates S1 (rs1, θs1), and the corresponding back mark B1 is represented by coordinates B1 (rb1, θb1). The positional deviation between the front mark S1 and the back mark B1 is represented by a displacement amount ΔA1. ΔA1 is a vector quantity having a magnitude and a direction. In the polar coordinate system Z1, the front mark T1 of the second semiconductor substrate 10b is represented by coordinates T1 (rt1, θt1), and the corresponding back mark C1 is represented by coordinates B1 (rc1, θc1). The positional deviation between the front mark T1 and the back mark C1 is represented by a displacement amount ΔA2. ΔA2 is a vector quantity having a magnitude and a direction. Further, the positional deviation between the back mark B1 and the back mark C1 is represented by a displacement amount ΔG. ΔG is a vector quantity having a magnitude and a direction.

  Next, the bonding apparatus 30 forms a positional relationship between the predetermined first electrode P on the first surface 10f of the first semiconductor substrate 10a and the table mark S1 on the first surface 10f of the first semiconductor substrate 10a. This is expressed using a Cartesian coordinate system Z2 having an origin O2 set to the scribe line L. In addition, the bonding apparatus 30 represents the positional relationship between the predetermined second electrode Q on the first surface 10f of the second semiconductor substrate 10b and the table mark T1, using a Cartesian coordinate system Z2. Here, the predetermined second electrode Q of the second semiconductor substrate 10b is an electrode disposed at a corresponding position where it is joined to the predetermined first electrode P of the first semiconductor substrate 10a.

  FIG. 13 is a diagram for explaining the determination of the positions of the respective electrodes based on the positions of the front marks on the two semiconductor substrates.

  In the Cartesian coordinate system Z2, the table mark S1 of the first semiconductor substrate 10a is represented by coordinates S1 (xs1, ys1), and the first electrode P of the first semiconductor substrate 10a is represented by coordinates P (xp, yp). The The positional deviation between the table mark S1 and the first electrode P is represented by a displacement amount ΔB1. ΔB1 is a vector quantity having a magnitude and a direction.

  In the Cartesian coordinate system Z2, the table mark T1 of the second semiconductor substrate 10b is represented by coordinates T1 (xt1, yt1), and the second electrode Q of the second semiconductor substrate 10b is represented by coordinates Q (xq, yq). expressed. The positional deviation between the table mark T1 and the second electrode Q is represented by a displacement amount ΔB2. ΔB2 is a vector quantity having a magnitude and a direction.

  In the Cartesian coordinate system Z2, the positional deviation between the first electrode P of the first semiconductor substrate 10a and the second electrode Q of the second semiconductor substrate 10b is represented by a displacement amount ΔH. ΔH is a vector quantity having a magnitude and a direction.

  Next, in step S22, the bonding apparatus 30 determines whether or not the displacement amount ΔH is within a predetermined range. If the displacement amount ΔH is within the predetermined range, the process proceeds to step S24. On the other hand, when the displacement amount ΔH is outside the predetermined range, the process proceeds to step S26. Here, the displacement amount ΔH being within a predetermined range means that the predetermined first electrode P and the predetermined second electrode Q facing each other are in a positional relationship in which they are electrically connected via bumps. Means.

  When the process proceeds to step S24, the bonding apparatus 30 causes the first semiconductor substrate 10a and the second semiconductor substrate 10b to face each other with the first surfaces 10f facing each other, as shown in FIG. 8B. Laminate. Each electrode P on the first surface 10f of the first semiconductor substrate 10a is electrically connected to the corresponding electrode Q on the first surface 10f of the second semiconductor substrate 10b via the bumps 13a and 13b. Connected. The electrical connection between the bump 13a and the bump 13b can be performed by heating or pressing. Then, as shown in FIG. 8C, a filler 15 is filled between the first semiconductor substrate 10a and the second semiconductor substrate 10b. As the filler 15, for example, a thermosetting resin can be used.

  On the other hand, when the process proceeds to step S26, the displacement amount ΔH is corrected so as to be within a predetermined range with respect to the positional relationship between the first semiconductor substrate 10a and the second semiconductor substrate 10b. Then, the first semiconductor substrate 10a and the second semiconductor substrate 10b are stacked with the first surfaces 10f facing each other. Next, processing for correcting the displacement amount ΔH to be within a predetermined range will be described below.

  As shown in FIG. 14, in the Cartesian coordinate system Z2, in order to make the position of the second electrode Q of the second semiconductor substrate 10b coincide with the position of the first electrode P of the first semiconductor substrate 10a (at least within a predetermined range). For example, the second electrode Q may be moved by a displacement amount ΔH. At this time, in the Cartesian coordinate system Z2, the table mark T1 of the second semiconductor substrate 10b is also moved by the displacement amount ΔH.

  When the second semiconductor substrate 10b is moved by the displacement amount ΔH relative to the first semiconductor substrate 10a in this way, as shown in FIG. 15, the back mark C1 of the second semiconductor substrate 10b is also displaced by the displacement amount ΔH in the polar coordinate system Z1. Will only move. The positional deviation between the back mark C1 and the back mark B1 after the movement is represented by a displacement amount ΔI. ΔI is a vector quantity having a magnitude and direction.

  Therefore, the bonding apparatus 30 moves the back mark C1 of the second semiconductor substrate 10b by the displacement amount ΔH so that the second electrode Q coincides with the first electrode P (at least within a predetermined range). The second semiconductor substrate 10 b is moved using the second stage 31. Alternatively, the bonding apparatus 30 moves the second semiconductor substrate 10b to the second semiconductor substrate 10b so that the displacement between the back mark C1 of the second semiconductor substrate 10b and the back mark B1 of the first semiconductor substrate 10a becomes the displacement amount ΔI. You may move using the stage 31. FIG.

  Then, as illustrated in FIG. 8B, the bonding apparatus 30 stacks the first semiconductor substrate 10a and the second semiconductor substrate 10b with the first surfaces 10f facing each other. Each electrode P on the first surface 10f of the first semiconductor substrate 10a is connected to the corresponding electrode Q on the first surface 10f of the second semiconductor substrate 10b via the respective bumps 13a and 13b. . The electrical connection between the bump 13a and the bump 13b can be performed by heating or pressing. Then, as shown in FIG. 8C, a filler 15 is filled between the first semiconductor substrate 10a and the second semiconductor substrate 10b.

  When the first semiconductor substrate 10a has three front marks and corresponding back marks, and the second semiconductor substrate 10b has three front marks and corresponding back marks, the first electrode P, the second electrode P, Three displacement amounts [Delta] H1 to [Delta] H3 representing the displacement of the position are obtained. Therefore, the amount of movement of the second semiconductor substrate 10a can be determined based on the three displacement amounts ΔH1 to ΔH3. As a determination method, for example, an average displacement amount of the three displacement amounts ΔH1 to ΔH3 can be used. Further, from the viewpoint of accurately correcting the positional deviation based on the three displacement amounts ΔH1 to ΔH3, the amount of movement of the second semiconductor substrate 10a may be determined using a three-point method (Japanese Patent No. 4667186). See the description etc.). The above is the description of step S26.

  Next, in step S28, as shown in FIG. 9A, the second surface 10r, which is the back surface of the second semiconductor substrate 10b, is scraped to reduce the thickness of the second semiconductor substrate 10b.

  Next, in step S30, as shown in FIG. 9B, a through electrode V that penetrates the substrate and is electrically connected to the second electrode Q is formed from the second surface 10r side of the second semiconductor substrate 10b. Is done. The through electrode V is exposed on the second surface 10r of the second semiconductor substrate 10b.

  Next, in step S32, as shown in FIG. 9C, bumps 13c are formed on the through electrodes V exposed on the second surface 10r, which is the back surface of the second semiconductor substrate 10b, and the first semiconductor is formed. A substrate laminate 10ab in which the substrates 10a and 10b are laminated is obtained.

  Next, in step S34, the substrate stack 10ab and the other third to fifth semiconductor substrates 10c to 10e are stacked. The third to fifth semiconductor substrates 10c to 10e have the same configuration as that of the second semiconductor substrate 10b, and the pattern data is stored in the storage units of the edge inspection apparatus and the bonding apparatus. The third to fifth semiconductor substrates 10c to 10e have element layers (not shown). The number of semiconductor substrates stacked on the first semiconductor substrate 10a is not particularly limited.

  First, using the substrate stacked body 10ab and the third semiconductor substrate 10c, the above-described steps S14 to S34 are repeated, so that the substrate stacked body 10ab and the third semiconductor substrate 10c are formed as shown in FIG. A laminated substrate laminate 10abc is obtained. Here, in steps S14 and S16, the measurement of the front mark U1 and the back mark D1 of the third semiconductor substrate 10c and the correlation of the positional relationship with the electrodes are performed.

  Further, the fourth semiconductor substrate 10d and the fifth semiconductor substrate 10e are stacked on the substrate stacked body 10abc, and the substrate stacked body 10abcde shown in FIG. 10B is obtained. Note that the through electrode is not formed on the fifth semiconductor substrate 10e.

  Next, in step S36, the substrate stacked body 10abcde is cut along the scribe line L, and the individual semiconductor devices 1 are obtained.

  According to the manufacturing method of the semiconductor device of the present embodiment described above, the positional deviation of the laminated substrate that cannot be visually recognized from the outside is obtained, and the positional deviation of the laminated semiconductor substrate is performed so that the positions of the opposing electrodes coincide. The semiconductor substrate can be stacked by correcting the above.

  In the bonding apparatus, even if the positions of the two semiconductor substrates are matched within the contour and notch positions, they are matched within the accuracy of the apparatus, and therefore there is a possibility that the positions of the electrodes facing each other will be displaced. . In addition, the position of the patterned electrode may deviate from the designed position with respect to the center of the substrate.

  In this embodiment, it is possible to manufacture a semiconductor device by obtaining a positional shift caused by the process capability of such a manufacturing process and correcting the positional shift.

  In the present invention, the semiconductor device inspection apparatus and the semiconductor device manufacturing method according to the above-described embodiments can be appropriately changed without departing from the gist of the present invention.

  For example, in step S18 described above, a filling material is filled between the first semiconductor substrate 10a and the second semiconductor substrate 10b, and after both substrates are temporarily bonded together, the position of the back mark is measured and the position is corrected. May be. In this case, when the position is corrected, the filler is not cured and the both substrates are temporarily bonded together, so that the positions can be corrected by separating the two substrates.

  Further, in step S18 described above, the position of the back mark may be measured by driving the sensor unit to rotate along the periphery of the substrate instead of rotating the substrate.

  In the above description, a polar coordinate system having the center of the semiconductor substrate as the origin is used, but a Cartesian coordinate system having the center of the semiconductor substrate as the origin may be used.

  Furthermore, in the above description, a Cartesian coordinate system having an origin on a scribe line is used, but a polar coordinate system having an origin on a scribe line may be used.

  All examples and conditional words mentioned herein are intended for educational purposes to help the reader deepen and understand the inventions and concepts contributed by the inventor. All examples and conditional words mentioned herein are to be construed without limitation to such specifically stated examples and conditions. Also, such exemplary mechanisms in the specification are not related to showing the superiority and inferiority of the present invention. While embodiments of the present invention have been described in detail, it should be understood that various changes, substitutions or modifications can be made without departing from the spirit and scope of the invention.

10a to 10e Semiconductor substrate 10f First surface 10r Second surface 11 Notch 12 Element layer 13 Bump 14 Bevel portion 14a Vertex 15 Filler S1, S2, S3 Table mark (first mark)
B1, B2, B3 Back mark (second mark)
T1 front mark C1 back mark U1 front mark D1 back mark L scribe line P, Q electrode U semiconductor unit 20 edge inspection device 21 sensor unit 22 stage, first stage 22 stage drive unit 22a drive control unit 22b rotation drive unit 22c stage unit 23 device control unit 23a control unit 23b storage unit 23c input / output unit 23d display unit 23e communication unit 30 bonding device 31 second stage 31a drive control unit 31b horizontal drive unit 31c vertical drive unit 31d rotation drive unit 31e stage unit Z1 first Coordinate system O1 Origin of first coordinate M Reference line Z2 Second coordinate system O2 Origin of second coordinate

Claims (4)

A first surface and a second surface;
A first electrode disposed on the first surface;
A positional relationship with the first electrode is associated, and a first mark disposed on the first surface;
A second mark disposed on the second surface and associated with a positional relationship with the first mark;
With
A first semiconductor substrate associated with a positional relationship between the second mark and the first electrode based on a positional relationship between the first mark and the second mark;
A third surface and a fourth surface;
A second electrode disposed on the third surface;
A positional relationship with the second electrode is associated, and a third mark disposed on the third surface;
A fourth mark disposed on the second surface and associated with a positional relationship with the third mark;
With
A second semiconductor substrate in which a positional relationship between the fourth mark and the second electrode is associated based on a positional relationship between the third mark and the fourth mark;
With the first surface and the third surface facing each other, the positions of the second mark and the fourth mark are measured,
A positional relationship between the first mark and the second mark; a positional relationship between the first mark and the first electrode; a positional relationship between the third mark and the fourth mark; Based on the positional relationship between the 3 mark and the second electrode, a displacement amount that is a difference in position between the first electrode and the second electrode is obtained.
When the amount of displacement is within the first range, the first semiconductor substrate and the second semiconductor substrate are stacked with their first surfaces facing each other,
On the other hand, when the displacement amount is out of the first range, the positional relationship between the first semiconductor substrate and the second semiconductor substrate is corrected so that the displacement amount is within the first range, and then the first A method of manufacturing a semiconductor device, comprising: laminating one semiconductor substrate and the second semiconductor substrate with their first surfaces facing each other. A positional relationship between the first mark and the second mark is related using a first coordinate system with the respective centers of the first semiconductor substrate and the second semiconductor substrate as origins, and the third mark and the second mark are related to each other. And the first semiconductor substrate and the second semiconductor substrate have origins set on the scribe lines formed on the first surface and the third surface, respectively. Using a second coordinate system having a positional relationship between the first mark and the first electrode, and a positional relationship between the third mark and the second electrode,
The first semiconductor substrate and the second semiconductor substrate have the same outer shape, and are opposed to each other with the same contour.
Based on the positional relationship between the third mark and the fourth mark and the positional relationship between the third mark and the second electrode, the position of the second electrode is determined on the first surface of the first semiconductor substrate. In the second coordinate system having an origin set to the scribe line formed in the second coordinate system, the displacement amount which is a difference in position between the first electrode and the second electrode expressed in the second coordinate system is represented. The method of manufacturing a semiconductor device according to claim 1 to be obtained. When the displacement is outside the first range,
The positional relationship between the first semiconductor substrate and the second semiconductor substrate is determined by moving the position of the fourth mark represented by a first coordinate system with the center of the first semiconductor substrate as the origin by the amount of displacement. The method of manufacturing a semiconductor device according to claim 2, wherein the correction is performed. A positional relationship between the first surface and the second surface, the first electrode disposed on the first surface, and the first electrode is associated, and the first mark disposed on the first surface; A positional relationship between the first electrode and the first mark and the first mark with respect to a first semiconductor substrate having a second mark disposed on the second surface and associated with the positional relationship with the first mark; A positional relationship with the second mark;
The positional relationship between the third surface and the fourth surface, the second electrode disposed on the third surface, and the second electrode is associated, the third mark disposed on the third surface, A positional relationship between the second electrode and the third mark with respect to a second semiconductor substrate having a fourth mark disposed on the fourth surface and associated with the positional relationship with the third mark; and the third mark A positional relationship with the fourth mark;
A storage unit for storing
A measurement unit for measuring the positions of the second mark and the fourth mark in a state where the first surface and the third surface are opposed to each other, the first semiconductor substrate and the second semiconductor substrate;
The measured positions of the second mark and the fourth mark;
The positional relationship between the first electrode and the first mark, the positional relationship between the first mark and the second mark, and the positional relationship between the second electrode and the third mark stored in the storage unit. And the positional relationship between the third mark and the fourth mark;
Based on the calculation unit for obtaining a positional relationship between the first electrode and the second electrode,
A semiconductor device inspection apparatus comprising:

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