TWI441128B - Apparatus and method for driving display - Google Patents
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本發明是有關於一種顯示器的驅動裝置及方法。The present invention relates to a driving device and method for a display.
請參照第1圖，其繪示傳統雙穩態顯示器的驅動裝置之示意圖。驅動裝置10包括一移位暫存器12、一第一閂鎖單元14、一第二閂鎖單元16、一準位選擇單元18以及一緩衝單元19。移位暫存器12將所接收的一同步信號XDIO逐級移位，以輸出不同相位之多個閂鎖訊號給第一閂鎖單元14。第一閂鎖單元14依據移位暫存器12所輸出之閂鎖訊號而將資料訊號DATA閂鎖於對應的通道中。Please refer to FIG. 1 , which is a schematic diagram of a driving device of a conventional bi-stable display. The driving device 10 includes a shift register 12, a first latch unit 14, a second latch unit 16, a level selecting unit 18, and a buffer unit 19. The shift register 12 shifts the received sync signal XDIO step by step to output a plurality of latch signals of different phases to the first latch unit 14. The first latch unit 14 latches the data signal DATA in the corresponding channel according to the latch signal output by the shift register 12.
在第一閂鎖單元14的全部通道均完成資料閂鎖後，第二閂鎖單元16於一閂鎖資料信號LD的負緣開始儲存第一閂鎖單元14所輸出之閂鎖資料。準位選擇器18依據所接收的第二閂鎖單元16的資料而輸出對應的電壓準位至緩衝單元19。然而，當資料訊號DATA改變頻繁時，則緩衝單元19的電壓準位可能會在峰值電壓與谷底電壓之間快速切換，如此一來會導致突波電流的產生，且使得平均電流過大，進而造成系統當機。After the data latching is completed in all the channels of the first latch unit 14, the second latch unit 16 starts to store the latch data output by the first latch unit 14 at the negative edge of a latch data signal LD. The level selector 18 outputs a corresponding voltage level to the buffer unit 19 according to the received data of the second latch unit 16. However, when the data signal DATA changes frequently, the voltage level of the buffer unit 19 may be quickly switched between the peak voltage and the valley voltage, which may cause a surge current to be generated, and the average current is too large, thereby causing The system is down.
本揭露是有關於一種顯示器的驅動裝置及方法，藉由比較對應於相同通道的資料使得緩衝單元的電壓準位不會急遽變化，避免產生突波電流及過大的平均電流。The disclosure relates to a driving device and a method for a display. By comparing data corresponding to the same channel, the voltage level of the buffer unit is not changed sharply, and a surge current and an excessive average current are avoided.
根據本揭露之第一方面，提出一種顯示器的驅動裝置，包括一移位暫存器、一第一閂鎖單元、一第二閂鎖單元、一資料比較單元以及一準位選擇單元。移位暫存器用以依據一同步訊號產生多個閂鎖訊號。第一閂鎖單元用以依據此些閂鎖訊號閂鎖一資料訊號以得到對應多個通道之多個第一資料。第二閂鎖單元耦接至第一閂鎖單元，用以回應一閂鎖資料訊號以閂鎖此些通道之此些第一資料為多個第二資料。資料比較單元用以回應閂鎖資料訊號以分別比較對應相同通道之此些第一資料與此些第二資料以輸出對應此些通道之多個第三資料。準位選擇單元用以依據此些第三資料選擇對應此些通道之多個電壓準位。According to a first aspect of the present disclosure, a driving device for a display includes a shift register, a first latch unit, a second latch unit, a data comparison unit, and a level selection unit. The shift register is configured to generate a plurality of latch signals according to a synchronization signal. The first latch unit is configured to latch a data signal according to the latch signals to obtain a plurality of first data corresponding to the plurality of channels. The second latch unit is coupled to the first latch unit for responding to a latch data signal to latch the first data of the channels into a plurality of second data. The data comparison unit is configured to respond to the latch data signals to respectively compare the first data corresponding to the same channel with the second data to output a plurality of third data corresponding to the channels. The level selection unit is configured to select a plurality of voltage levels corresponding to the channels according to the third data.
根據本揭露之第二方面，提出一種顯示器的驅動方法，包括下列步驟。依據一同步訊號產生多個閂鎖訊號。依據此些閂鎖訊號閂鎖一資料訊號以得到對應多個通道之多個第一資料。回應一閂鎖資料訊號以閂鎖此些通道之此些第一資料為多個第二資料。回應閂鎖資料訊號以分別比較對應相同通道之此些第一資料與此些第二資料以輸出對應此些通道之多個第三資料。依據此些第三資料選擇對應此些通道之多個電壓準位。According to a second aspect of the present disclosure, a driving method of a display is provided, comprising the following steps. A plurality of latch signals are generated according to a synchronization signal. A data signal is latched according to the latch signals to obtain a plurality of first data corresponding to the plurality of channels. Responding to a latched data signal to latch the first data of the channels into a plurality of second data. Responding to the latch data signal to respectively compare the first data corresponding to the same channel with the second data to output a plurality of third data corresponding to the channels. According to the third data, a plurality of voltage levels corresponding to the channels are selected.
根據本揭露之第三方面，提出一種顯示器的驅動裝置，包括一移位暫存器、一第一閂鎖單元、一第二閂鎖單元以及一緩衝輸出單元。移位暫存器用以依據一同步訊號產生多個閂鎖訊號。第一閂鎖單元用以依據此些閂鎖訊號閂鎖一資料訊號以得到對應多個通道之多個第一資料。第二閂鎖單元耦接至第一閂鎖單元，用以回應一閂鎖資料訊號以閂鎖此些通道之此些第一資料為多個第二資料。緩衝輸出單元用以回應閂鎖資料訊號以分別依據對應相同通道之此些第一資料與此些第二資料以產生對應此些通道之多個第三資料。其中，若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差超過一預設值，則第三資料之一第三電壓準位介於第一電壓準位與第二電壓準位之間。其中，若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差不超過預設值，則第三資料之一第三電壓準位係等於第一電壓準位。According to a third aspect of the present disclosure, a driving device for a display includes a shift register, a first latch unit, a second latch unit, and a buffer output unit. The shift register is configured to generate a plurality of latch signals according to a synchronization signal. The first latch unit is configured to latch a data signal according to the latch signals to obtain a plurality of first data corresponding to the plurality of channels. The second latch unit is coupled to the first latch unit for responding to a latch data signal to latch the first data of the channels into a plurality of second data. The buffer output unit is configured to respond to the latch data signals to respectively generate the third data corresponding to the channels according to the first data and the second data corresponding to the same channel. Wherein, if one of the first voltage levels of the first data differs from the second voltage level of the second data by more than a predetermined value, the third voltage level of the third data is between the first voltage level and Between the second voltage levels. Wherein, if one of the first voltage levels of the first data and the second voltage level of the second data does not exceed a preset value, one of the third data levels is equal to the first voltage level.
根據本揭露之第四方面，提出一種顯示器的驅動方法，包括下列步驟。依據一同步訊號產生多個閂鎖訊號。依據此些閂鎖訊號閂鎖一資料訊號以得到對應多個通道之多個第一資料。回應一閂鎖資料訊號以閂鎖此些通道之此些第一資料為多個第二資料。回應閂鎖資料訊號以分別依據對應相同通道之此些第一資料與此些第二資料以產生對應此些通道之多個第三資料。其中，若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差超過一預設值，則第三資料之一第三電壓準位介於第一電壓準位與第二電壓準位之間。其中，若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差不超過一預設值，則第三資料之一第三電壓準位係等於第一電壓準位。According to a fourth aspect of the present disclosure, a driving method of a display is provided, comprising the following steps. A plurality of latch signals are generated according to a synchronization signal. A data signal is latched according to the latch signals to obtain a plurality of first data corresponding to the plurality of channels. Responding to a latched data signal to latch the first data of the channels into a plurality of second data. Responding to the latch data signal to respectively generate the third data corresponding to the channels according to the first data corresponding to the same channel and the second data. Wherein, if one of the first voltage levels of the first data differs from the second voltage level of the second data by more than a predetermined value, the third voltage level of the third data is between the first voltage level and Between the second voltage levels. Wherein, if one of the first voltage levels of the first data and the second voltage level of the second data does not exceed a preset value, one of the third data levels is equal to the first voltage level .
為了對本揭露之上述及其他方面有更佳的瞭解，下文特舉一實施例，並配合所附圖式，作詳細說明如下：In order to better understand the above and other aspects of the present disclosure, an embodiment will be described hereinafter with reference to the accompanying drawings.
本揭露所提出之顯示器的驅動裝置及方法，藉由比較對應於相同通道的資料以在此通道的資料改變頻繁時提供一過渡電壓，使得緩衝單元的電壓準位不會急遽變化，避免產生突波電流及過大的平均電流。The driving device and the method of the display device of the present disclosure provide a transition voltage by comparing data corresponding to the same channel to change the data of the channel frequently, so that the voltage level of the buffer unit does not change sharply, thereby avoiding a sudden change. Wave current and excessive average current.
接下來茲舉顯示器為一雙穩態顯示器(Bi-stable Display)為例進行說明，然並不限於此，亦可為其他類型的顯示器。請參照第2圖，其繪示依照一實施例之顯示器的驅動裝置之示意圖。顯示器200包括一移位暫存器210、一第一閂鎖單元220、一第二閂鎖單元230、一緩衝輸出單元240以及一緩衝單元250。緩衝輸出單元240包括一資料比較單元242以及一準位選擇單元244。對應於n個通道，第一閂鎖單元220實質上具有n個閂鎖器A1~An，且第二閂鎖單元230實質上具有n個閂鎖器B1~Bn，閂鎖器例如為線閂鎖器；資料比較單元242實質上包括n個資料比較器C1~Cn；準位選擇單元244實質上包括n個準位選擇器D1~Dn；緩衝單元250實質上包括n個緩衝器S1~Sn，n為正整數。Next, the display is described as an example of a bi-stable display. However, it is not limited thereto, and may be other types of displays. Please refer to FIG. 2 , which is a schematic diagram of a driving device of a display according to an embodiment. The display 200 includes a shift register 210, a first latch unit 220, a second latch unit 230, a buffer output unit 240, and a buffer unit 250. The buffer output unit 240 includes a data comparison unit 242 and a level selection unit 244. Corresponding to n channels, the first latch unit 220 has substantially n latches A1~An, and the second latch unit 230 has n latches B1~Bn, such as a wire latch The data comparing unit 242 substantially includes n data comparators C1 C Cn; the level selecting unit 244 substantially includes n level selectors D1 D Dn; the buffer unit 250 substantially includes n buffers S1 to Sn , n is a positive integer.
請配合參照第3圖，其繪示依照一實施例之顯示器的驅動裝置之時序圖。首先，移位暫存器210逐級移位所接收的一同步訊號XDIO以輸出對應於n個通道之不同相位的n個閂鎖訊號，同步訊號XDIO例如為一水平同步訊號。閂鎖器A1~An分別依據對應的閂鎖訊號閂鎖一資料訊號DATA以得到對應n個通道之n個第一資料。第二閂鎖單元230耦接至第一閂鎖單元220。在閂鎖器A1~An均完成資料閂鎖後，B1~Bn回應一閂鎖資料訊號LD而譬如在其負緣開始閂鎖對應於n個通道之n個第一資料為n個第二資料。在此階段，閂鎖器Bx實質上接收對應於相同通道的閂鎖器Ax的第一資料為第二資料，x為1~n之正整數。Referring to FIG. 3, a timing diagram of a driving device of a display according to an embodiment is shown. First, the shift register 210 shifts the received sync signal XDIO step by step to output n latch signals corresponding to different phases of the n channels, and the sync signal XDIO is, for example, a horizontal sync signal. The latches A1~An respectively latch a data signal DATA according to the corresponding latch signal to obtain n first data corresponding to n channels. The second latch unit 230 is coupled to the first latch unit 220. After the latches A1~An have completed the data latching, B1~Bn respond to a latching data signal LD, for example, at the negative edge thereof, latching n first data corresponding to n channels is n second data. . At this stage, the latch Bx substantially receives the first data of the latch Ax corresponding to the same channel as the second data, and x is a positive integer from 1 to n.
於第2圖中，資料比較器Cx於一資料比較時段T1中分別比較對應於相同通道之閂鎖器Ax儲存的第一資料(如第2圖中的A’，對應於一當前閂鎖資料訊號)與閂鎖器Bx儲存的第二資料(如第2圖中的B’，對應於一先前閂鎖資料訊號)，以輸出對應相同通道之第三資料(如第2圖中的C’)。於資料比較時段T1中，資料比較器Cx在比較對應相同通道之第一資料與第二資料時，可依據一查找表以得到第三資料。請參照表1，其為依照一實施例之查找表之一例，然並不限於此，端視實際的設計需求而定。In FIG. 2, the data comparator Cx compares the first data stored in the latch Ax corresponding to the same channel in a data comparison period T1 (such as A' in FIG. 2, corresponding to a current latch data). The second data stored by the latch Bx (such as B' in FIG. 2 corresponds to a previous latch data signal) to output a third data corresponding to the same channel (such as C' in FIG. 2) ). In the data comparison period T1, the data comparator Cx can obtain the third data according to a lookup table when comparing the first data and the second data corresponding to the same channel. Please refer to Table 1, which is an example of a lookup table according to an embodiment, but is not limited thereto, depending on actual design requirements.
之後，資料比較器Cx更在一非資料比較時段T2中提供對應的閂鎖器Bx之第二資料為第三資料。Then, the data comparator Cx further provides the second data of the corresponding latch Bx as the third data in a non-data comparison period T2.
較佳地，資料比較時段T1起始於閂鎖資料訊號LD之一正緣，位在閂鎖資料訊號LD之一第一準位之期間內，其時間長度可以由閂鎖資料訊號LD的寬度或由一內部電路來決定。此外，較佳地，非資料比較時段T2起始於閂鎖資料訊號LD之一負緣，位在閂鎖資料訊號LD之一第二準位之期間內。非資料比較時段T2可能安排為直接緊鄰或間隔一段時間而接續於資料比較時段T1之後。Preferably, the data comparison period T1 starts from a positive edge of the latch data signal LD, and is within a period of a first level of the latch data signal LD, and the length of time may be the width of the latch data signal LD. Or by an internal circuit. In addition, preferably, the non-data comparison period T2 starts from a negative edge of the latch data signal LD and is located during a second level of the latch data signal LD. The non-data comparison period T2 may be arranged immediately after or immediately after the data comparison period T1.
準位選擇器Dx依據對應相同通道的資料比較器Cx輸出的第三資料選擇對應的電壓準位。緩衝器Sx接收對應的準位選擇器Dx輸出的電壓準位並據以輸出此通道對應的資料電壓。請參照表2，其為依照一實施例之資料比較器Cx的資料與緩衝器Sx的電壓準位之對應表。The level selector Dx selects a corresponding voltage level according to the third data outputted by the data comparator Cx corresponding to the same channel. The buffer Sx receives the voltage level output by the corresponding level selector Dx and outputs a data voltage corresponding to the channel accordingly. Please refer to Table 2, which is a correspondence table between the data of the data comparator Cx and the voltage level of the buffer Sx according to an embodiment.
由表2可以得知，若資料比較器Cx的資料在01與10之間變化，則對應的緩衝器Sx的電壓準位會在+V伏特與-V伏特急遽改變。因此，配合表1所設計，當對應先前閂鎖資料訊號的第二資料與對應當前閂鎖資料訊號的第一資料在01與10之間變化(由01變為10或由10變為01)時，資料比較器Cx的資料會在資料比較時段T1內先被改變為對應一中間電壓準位(例如為0伏特)的第三資料。然後在非資料比較時段T2內，對應相同通道及當前資料閂鎖訊號的第一資料才會被輸出為第三資料。如此一來，即可以避免緩衝器Sx的電壓準位在峰值電壓(+V伏特)與谷底電壓(-V伏特)之間快速變化。請參照第4圖，其繪示依照一實施例之緩衝器Sx的電壓準位對應資料比較器Cx的資料之波形圖。It can be known from Table 2 that if the data of the data comparator Cx changes between 01 and 10, the voltage level of the corresponding buffer Sx will change sharply at +V volts and -V volts. Therefore, in accordance with the design of Table 1, when the second data corresponding to the previous latch data signal and the first data corresponding to the current latch data signal change between 01 and 10 (from 01 to 10 or from 10 to 01) At this time, the data of the data comparator Cx is first changed to the third data corresponding to an intermediate voltage level (for example, 0 volt) in the data comparison period T1. Then, in the non-data comparison period T2, the first data corresponding to the same channel and the current data latching signal is output as the third data. In this way, the voltage level of the buffer Sx can be prevented from rapidly changing between the peak voltage (+V volts) and the valley voltage (-V volts). Please refer to FIG. 4, which is a waveform diagram of the data of the voltage level corresponding data comparator Cx of the buffer Sx according to an embodiment.
在本實施例中，主要藉由比較對應於相同通道的資料以在此通道的資料改變頻繁時提供一過渡電壓，使得緩衝單元的電壓準位不會急遽變化，避免產生突波電流及過大的平均電流。如前所述，當對應先前閂鎖資料訊號的第二資料與對應當前閂鎖資料訊號的第一資料在01與10之間變化時，則會特別將第三資料設定至一中間電壓準位(例如為0伏特)。換言之，若第一資料對應至一第一電壓準位，第二資料對應至一第二電壓準位，當第一電壓準位與第二電壓準位相差超過一預設值時，則第三資料對應之一第三電壓準位介於第一電壓準位與第二電壓準位之間，做為過渡電壓以減緩電壓變化。當第一電壓準位與第二電壓準位相差不超過預設值時，則第三電壓準位等於第一電壓準位。In this embodiment, the voltage corresponding to the same channel is compared to provide a transition voltage when the data of the channel changes frequently, so that the voltage level of the buffer unit does not change sharply, and the surge current is prevented from being excessively generated. Average current. As described above, when the second data corresponding to the previous latch data signal and the first data corresponding to the current latch data signal change between 01 and 10, the third data is specifically set to an intermediate voltage level. (for example, 0 volts). In other words, if the first data corresponds to a first voltage level, the second data corresponds to a second voltage level, and when the first voltage level and the second voltage level differ by more than a predetermined value, the third The data corresponds to a third voltage level between the first voltage level and the second voltage level as a transition voltage to slow the voltage change. When the first voltage level and the second voltage level do not exceed a preset value, the third voltage level is equal to the first voltage level.
本揭露更提出一種顯示器的驅動方法，請參照第5圖，其繪示依照一實施例之顯示器的驅動方法之流程圖。於步驟S500中，依據一同步訊號產生多個閂鎖訊號。於步驟S510中，依據此些閂鎖訊號閂鎖一資料訊號以得到對應多個通道之多個第一資料。於步驟S520中，回應一閂鎖資料訊號以閂鎖此些通道之此些第一資料為多個第二資料。於步驟S530中，回應閂鎖資料訊號以分別比較對應相同通道之此些第一資料與此些第二資料以輸出對應此些通道之多個第三資料。於步驟S540中，依據此些第三資料選擇對應此些通道之多個電壓準位。若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差超過一預設值，則第三資料之一第三電壓準位介於第一電壓準位與第二電壓準位之間。若第一資料之一第一電壓準位與第二資料之一第二電壓準位相差不超過一預設值，則第三資料之一第三電壓準位係等於第一電壓準位。The disclosure further provides a driving method of the display. Referring to FIG. 5, a flowchart of a driving method of the display according to an embodiment is shown. In step S500, a plurality of latch signals are generated according to a synchronization signal. In step S510, a data signal is latched according to the latch signals to obtain a plurality of first data corresponding to the plurality of channels. In step S520, a latch data signal is responded to latch the first data of the channels into a plurality of second data. In step S530, the latched data signals are compared to respectively compare the first data corresponding to the same channel with the second data to output a plurality of third data corresponding to the channels. In step S540, a plurality of voltage levels corresponding to the channels are selected according to the third data. If the first voltage level of one of the first data differs from the second voltage level of the second data by more than a predetermined value, the third voltage level of the third data is between the first voltage level and the second Between voltage levels. If the first voltage level of one of the first data does not exceed a second voltage level of the second data, the third voltage level of the third data is equal to the first voltage level.
上述顯示器的驅動方法之原理係已詳述於第2圖~第4圖及其相關內容中，故於此不再重述。The principle of the above-described display driving method has been described in detail in FIGS. 2 to 4 and related contents, and thus will not be repeated here.
本揭露上述實施例所揭露之顯示器的驅動裝置及方法，藉由在資料比較時段中先比較對應於相同通道的資料，故可以在對應此通道的資料改變頻繁時提供一過渡電壓，如此一來即可使得緩衝單元的電壓準位不會急遽變化，進而避免產生突波電流及過大的平均電流。The driving device and method for the display disclosed in the above embodiments can compare the data corresponding to the same channel in the data comparison period, so that a transition voltage can be provided when the data corresponding to the channel changes frequently. Therefore, the voltage level of the buffer unit is not changed sharply, thereby avoiding a surge current and an excessive average current.
綜上所述，雖然本發明已以多個實施例揭露如上，然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾。因此，本發明之保護範圍當視後附之申請專利範圍所界定者為準。In the above, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.
10、200．．．驅動裝置10,200. . . Drive unit
12、210．．．移位暫存器12, 210. . . Shift register
14、220．．．第一閂鎖單元14,220. . . First latch unit
16、230．．．第二閂鎖單元16,230. . . Second latch unit
18、244．．．準位選擇單元18,244. . . Level selection unit
19、250．．．緩衝單元19, 250. . . Buffer unit
240．．．緩衝輸出單元240. . . Buffer output unit
242．．．資料比較單元242. . . Data comparison unit
第1圖繪示傳統雙穩態顯示器的驅動裝置之示意圖。FIG. 1 is a schematic view showing a driving device of a conventional bi-stable display.
第2圖繪示依照一實施例之顯示器的驅動裝置之示意圖。FIG. 2 is a schematic diagram of a driving device of a display according to an embodiment.
第3圖繪示依照一實施例之顯示器的驅動裝置之時序圖。FIG. 3 is a timing diagram of a driving device of a display according to an embodiment.
第4圖繪示依照一實施例之緩衝器Sx的電壓準位對應資料比較器Cx的資料之波形圖。FIG. 4 is a waveform diagram showing the data of the voltage level corresponding to the data comparator Cx of the buffer Sx according to an embodiment.
第5圖繪示依照一實施例之顯示器的驅動方法之流程圖。FIG. 5 is a flow chart showing a driving method of a display according to an embodiment.
200．．．驅動裝置200. . . Drive unit
210．．．移位暫存器210. . . Shift register
220．．．第一閂鎖單元220. . . First latch unit
230．．．第二閂鎖單元230. . . Second latch unit
240．．．緩衝輸出單元240. . . Buffer output unit
242．．．資料比較單元242. . . Data comparison unit
244．．．準位選擇單元244. . . Level selection unit
250．．．緩衝單元250. . . Buffer unit
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| TWI539435B (en) | 2014-08-29 | 2016-06-21 | 友達光電股份有限公司 | Driving circuit |
| CN112687224B (en) * | 2020-12-28 | 2022-06-03 | 北京奕斯伟计算技术有限公司 | Source electrode driving circuit, source electrode driving method and display device |
| CN112687223B (en) * | 2020-12-28 | 2022-06-03 | 北京奕斯伟计算技术有限公司 | Source electrode driving circuit, source electrode driving method and display device |
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| KR101337104B1 (en) * | 2006-12-13 | 2013-12-05 | 엘지디스플레이 주식회사 | Electrophoresis display and driving method thereof |
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