TWI437730B - Light emitting diode - Google Patents

Light emitting diode Download PDF

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TWI437730B
TWI437730B TW99111358A TW99111358A TWI437730B TW I437730 B TWI437730 B TW I437730B TW 99111358 A TW99111358 A TW 99111358A TW 99111358 A TW99111358 A TW 99111358A TW I437730 B TWI437730 B TW I437730B
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emitting diode
light
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TW201135972A (en
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Wen Chau Liu
Yi Jung Liu
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Univ Nat Cheng Kung
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發光二極體Light-emitting diode

本發明係關於一種發光二極體,特別是與一種氮化鎵系發光二極體有關,以導入一埋入式能障,來提升電流於其中之擴散效應。The present invention relates to a light-emitting diode, particularly to a gallium nitride-based light-emitting diode, for introducing a buried energy barrier to enhance the diffusion effect of current therein.

相較於一般燈泡,發光二極體(Light Emitting Diode,LED)具有更加輕量化、壽命長、省電、切換速度快、單色性及可靠度高等優點,所以發光二極體早已成為日常生活中不可或缺的光電元件。近年來由於材料科技的突飛猛進,使得發光二極體的亮度不斷升高、多彩化及價格降低,故使得其應用領域也愈來愈廣。其中,以氮化鎵(GaN)為主要製造材料的藍光二極體不過問世幾年,現在已成為固態照明(Solid-state lighting,SSL)建造中的重要元件,更是下世代照明的主要元件。Compared with general light bulbs, Light Emitting Diode (LED) has the advantages of lighter weight, long life, power saving, fast switching speed, monochromaticity and high reliability. Therefore, the light-emitting diode has already become a daily life. An indispensable optoelectronic component. In recent years, due to the rapid advancement of materials technology, the brightness of the LEDs has been continuously increased, colorful and reduced in price, which has made their application fields more and more extensive. Among them, the blue light diode with GaN as the main material has been published for several years, and now it has become an important component in the construction of solid-state lighting (SSL), and it is the main component of next generation lighting. .

發光二極體之發光的基本原理,說明如下:在半導體材料中,電流順向流入半導體材料中p-n接面時,電子與電洞於一適當條件下結合會產生光子。依材料的不同,電子和電洞所具有的能階也不同,其相對能階高度差即是決定電子與電洞結合所發出能量的高低,因而產生具有不同能量之光子,藉此可以控制發光二極體所發出光的波長,也就是光譜或顏色。The basic principle of the illumination of a light-emitting diode is as follows: In a semiconductor material, when a current flows inwardly into the p-n junction of the semiconductor material, electrons and holes are combined under a suitable condition to generate photons. Depending on the material, the energy levels of electrons and holes are different. The relative height difference of the energy level determines the level of energy emitted by the combination of electrons and holes, thus producing photons with different energies, thereby controlling the light emission. The wavelength of light emitted by a diode, that is, the spectrum or color.

發光二極體另可區分兩類:水平式發光二極體及垂直式發光二極體。其中,水平式發光二極體由於其結構特性,相較於垂直式發光二極體,使得電流於其中無法有效擴散,導致其亮度受到限制,並且其操作壽命以及其飽和電流降低。此外,習知之水平式發光二極體在大電流操作下,其電流散佈不均勻,並且低濕度環境下易產生靜電聚焦,其抗靜電能力不足。The light-emitting diode can be distinguished into two types: a horizontal light-emitting diode and a vertical light-emitting diode. Among them, the horizontal light-emitting diode has a structure in which the current cannot be effectively diffused due to its structural characteristics, so that the current is limited, and its operating life and its saturation current are lowered. In addition, the conventional horizontal light-emitting diode has uneven current distribution under high current operation, and is easy to generate electrostatic focusing in a low humidity environment, and its antistatic capability is insufficient.

因此,如何改善發光二極體之電流擴散能力,並且提升其靜電防護能力,是本技術領域亟欲解決之問題。Therefore, how to improve the current spreading capability of the light-emitting diode and improve its electrostatic protection capability is a problem to be solved in the technical field.

本發明之一目的係在於提供一n型摻雜層在介面處形成一埋入式p-n接面,以生成一內建電場,藉此提升電流在此介面之分散效應。It is an object of the present invention to provide an n-type doped layer to form a buried p-n junction at the interface to generate a built-in electric field, thereby enhancing the dispersion effect of current flow in the interface.

本發明的其他目的和優點可以從本發明所揭露的技術特徵中得到進一步的了解。Other objects and advantages of the present invention will become apparent from the technical features disclosed herein.

為達上述之一或部份或全部目的或是其他目的,本發明之一實施例的一種發光二極體,由下而上依序成長:一基板、一緩衝層、一n型層、一多重量子井層、一n型摻雜層、一p型層、一透明導電層及一電極,其中電極成長於透明導電層及n型層之上。In order to achieve one or a part or all of the above or other purposes, a light-emitting diode according to an embodiment of the present invention grows sequentially from bottom to top: a substrate, a buffer layer, an n-type layer, and a a multiple quantum well layer, an n-type doped layer, a p-type layer, a transparent conductive layer and an electrode, wherein the electrode grows on the transparent conductive layer and the n-type layer.

相較於習知,本發明實施例藉由於多重量子井層與p型層中加入一n型摻雜層,因此生成一埋入式p-n接面,以誘發內建電場,並可克服電流易阻塞在最短導通路徑之問題,並可提升發光二極體之光電效能。此埋入式p-n接面所誘發的內建電場可以有效分散過於集中的電流路徑,降低電流擁擠(crowding)效應,以及降低發光二極體之寄生電阻值,使得電流擴散效能上升、導通偏壓下降,並且抗靜電放電能力優化。此外,當本發明操作在正向偏壓時,具有較為均勻的電流擴散(spreading)效應。Compared with the prior art, the embodiment of the present invention generates a buried pn junction by adding an n-type doped layer in the multiple quantum well layer and the p-type layer to induce a built-in electric field and overcome current. Blocking the problem of the shortest conduction path and improving the photoelectric performance of the LED. The built-in electric field induced by the buried pn junction can effectively disperse the over-concentrated current path, reduce the current crowding effect, and reduce the parasitic resistance value of the light-emitting diode, so that the current diffusion efficiency is increased and the conduction bias is increased. Decreased and optimized for antistatic discharge capability. Moreover, when the present invention operates in forward bias, it has a relatively uniform current spreading effect.

有關本發明之前述及其他技術內容、特點與功效,在以下配合參考圖式之一較佳實施例的詳細說明中,將可清楚的呈現。以下實施例中所提到的方向用語,例如:上、下、左、右、前或後等,僅是參考附加圖式的方向。因此,使用的方向用語是用來說明並非用來限制本發明。The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments. The directional terms mentioned in the following embodiments, such as up, down, left, right, front or back, etc., are only directions referring to the additional drawings. Therefore, the directional terminology used is for the purpose of illustration and not limitation.

請參照第一圖,其係為本發明實施例之一種發光二極體100之結構圖。發光二極體100之半導體層成長於一基板101上,其半導體層由下而上依序包括:一緩衝層102、一n型層103、一多重量子井層104、一n型掺雜層105、一p型層106、一透明導電層107及一電極108。其中,基板101之材料為半絕緣型氧化鋁(Al2 O3 )。Please refer to the first figure, which is a structural diagram of a light-emitting diode 100 according to an embodiment of the present invention. The semiconductor layer of the light-emitting diode 100 is grown on a substrate 101, and the semiconductor layer includes, in order from bottom to top, a buffer layer 102, an n-type layer 103, a multiple quantum well layer 104, and an n-type doping. The layer 105, a p-type layer 106, a transparent conductive layer 107 and an electrode 108. The material of the substrate 101 is semi-insulating alumina (Al 2 O 3 ).

緩衝層102利用金屬有機氣相化學沈積法(Metal Organic Chemical Vapor Deposition,MOCVD)或分子束磊晶法(Molecular Beam Epitaxy)成長於基板101上,其中,緩衝層102之材料為未摻雜型氮化鎵(GaN),並且其膜層之厚度範圍為0.1μm至10μm。在一較佳實施例中,緩衝層102之膜層厚度為500nm。The buffer layer 102 is grown on the substrate 101 by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (Molecular Beam Epitaxy), wherein the buffer layer 102 is made of undoped nitrogen. Gallium nitride (GaN), and the thickness of its film layer ranges from 0.1 μm to 10 μm. In a preferred embodiment, the buffer layer 102 has a film thickness of 500 nm.

n型層103利用金屬有機氣相化學沈積法或分子束磊晶法成長於緩衝層102上,其中,n型層103係為一n型氮化鎵層並且摻雜矽元素於其中,其電子載子濃度約為1×1016 cm-3 至3×1019 cm-3 ,且其厚度範圍約為0.5μm至5μm。在一較佳實施例中,n型層103之膜層厚度為4μm。The n-type layer 103 is grown on the buffer layer 102 by metal organic vapor phase chemical deposition or molecular beam epitaxy, wherein the n-type layer 103 is an n-type gallium nitride layer and is doped with germanium elements, and the electrons thereof The carrier concentration is about 1 × 10 16 cm -3 to 3 × 10 19 cm -3 , and the thickness thereof ranges from about 0.5 μm to 5 μm. In a preferred embodiment, the n-type layer 103 has a film thickness of 4 μm.

多重量子井層104利用金屬有機氣相化學沈積法或分子束磊晶法成長於n型層103上,其中,多重量子井層104由複數量子井結構所堆疊而成,每一量子井結構包括一氮化鎵(GaN)層及一氮化銦鎵(InX Ga1-X N)層,這些量子井結構之數量約為2至50,並且其x值範圍約為0.01至0.25。此外,多重量子井層104中每一氮化鎵層之厚度範圍約為10nm至20nm,並且每一氮化鎵層之摻雜元素為矽,且其摻雜濃度範圍約為1×1016 cm-3 至1×1019 cm-3 ,以及每一氮化銦鎵層之厚度範圍約為1nm至5nm。在一較佳實施例中,多重量子井層104包括15個重複堆疊之矽摻雜氮化鎵/氮化銦鎵(In0.2 Ga0.8 N)之量子井結構,其摻雜濃度為1×1018 cm-3 ,並且每一氮化鎵層之厚度為12nm,以及每一氮化銦鎵層之厚度為3nm。The multiple quantum well layers 104 are grown on the n-type layer 103 by metal organic vapor phase chemical deposition or molecular beam epitaxy, wherein the multiple quantum well layers 104 are stacked by a plurality of quantum well structures, each of which includes A gallium nitride (GaN) layer and an indium gallium nitride (In X Ga 1-X N) layer have a number of quantum well structures of about 2 to 50 and an x value in the range of about 0.01 to 0.25. In addition, each of the plurality of quantum well layers 104 has a thickness ranging from about 10 nm to 20 nm, and each of the gallium nitride layers has a doping element of germanium and a doping concentration range of about 1×10 16 cm. -3 to 1 x 10 19 cm -3 , and each of the indium gallium nitride layers has a thickness ranging from about 1 nm to 5 nm. In a preferred embodiment, the multiple quantum well layer 104 includes 15 repetitively stacked germanium-doped gallium nitride/indium gallium nitride (In 0.2 Ga 0.8 N) quantum well structures having a doping concentration of 1×10. 18 cm -3 , and each gallium nitride layer has a thickness of 12 nm, and each indium gallium nitride layer has a thickness of 3 nm.

n型摻雜層105利用金屬有機氣相化學沈積法,原子層沉積技術(Atomic Layer Deposition,ALD),或分子束磊晶法成長於多重量子井層104之上,其中,n型摻雜層105之材料為氮化銦鎵(Inx Ga1-x N)或氮化鎵,並且氮化銦鎵之x值範圍約為0.01至0.3。此外,n型摻雜層105之電子載子濃度約為1×1017 cm-3 至1×1019 cm-3 ,以及其厚度範圍約為1nm至100nm。在一較佳實施例中,n型摻雜層105之電子載子濃度為1×1019 cm-3 ,以及其厚度為5nm。The n-type doped layer 105 is grown on the multiple quantum well layer 104 by metal organic vapor phase chemical deposition, Atomic Layer Deposition (ALD), or molecular beam epitaxy, wherein the n-type doped layer The material of 105 is indium gallium nitride (In x Ga 1-x N) or gallium nitride, and the indium gallium nitride has an x value ranging from about 0.01 to 0.3. Further, the n-type doped layer 105 has an electron carrier concentration of about 1 × 10 17 cm -3 to 1 × 10 19 cm -3 , and a thickness ranging from about 1 nm to 100 nm. In a preferred embodiment, the n-type doped layer 105 has an electron carrier concentration of 1 × 10 19 cm -3 and a thickness of 5 nm.

p型層106利用金屬有機氣相化學沈積法或分子束磊晶法成長於n型摻雜層105上,並且於磊晶成長過程中,其載子之活化溫度約為300℃至1000℃。其中,p型層之材料係為一摻雜型氮化鎵,其電洞載子濃度之範圍約為1×1016 cm-3 至1×1018 cm-3 ,以及其厚度範圍約為0.1微米至1微米,並且其摻雜元素為鎂(Mg)或鋅(Zn)。在一較佳實施例中,p型層106之電洞載子濃度為4×1017 cm-3 ,並且其厚度為0.3μm。The p-type layer 106 is grown on the n-type doped layer 105 by metal organic vapor phase chemical deposition or molecular beam epitaxy, and the activation temperature of the carrier is about 300 ° C to 1000 ° C during epitaxial growth. Wherein, the material of the p-type layer is a doped type gallium nitride, and the concentration of the hole carrier is in the range of about 1×10 16 cm -3 to 1×10 18 cm -3 , and the thickness thereof is about 0.1. Micron to 1 micron and its doping element is magnesium (Mg) or zinc (Zn). In a preferred embodiment, the p-type layer 106 has a hole carrier concentration of 4 x 10 17 cm -3 and a thickness of 0.3 μm.

透明導電層107利用熱蒸鍍法(thermal evaporating)、濺鍍法(sputtering)或電子束蒸鍍法(E-beam evaporating)成長於p型層106上,並且於成長過程中包含一合金化過程,其合金溫度約為50℃至500℃。其中,透明導電層107之材料係為金屬薄膜或其氧化物,並且其電阻率範圍係為10-8 Ω-cm至10-1 Ω-cm。在一較佳實施例中,透明導電層107之電子載子濃度為4×1020 cm-3 ,並且其厚度為250nm。The transparent conductive layer 107 is grown on the p-type layer 106 by thermal evaporating, sputtering, or E-beam evaporating, and includes an alloying process during growth. The alloy temperature is about 50 ° C to 500 ° C. The material of the transparent conductive layer 107 is a metal thin film or an oxide thereof, and its resistivity ranges from 10 -8 Ω-cm to 10 -1 Ω-cm. In a preferred embodiment, the transparent conductive layer 107 has an electron carrier concentration of 4 × 10 20 cm -3 and a thickness of 250 nm.

在一較佳實施例中,更包括一覆蓋鈍化層(未圖示)。透明絕緣型覆蓋鈍化層利用電漿輔助化學氣相沉積(Plasma-Enhanced Chemical Vapor Deposition,PECVD)、低壓化學氣相沉積(Low-Pressure Chemical Vapor Deposition,LPCVD)、電子束蒸鍍法或濺鍍法成長於透明導電層,以避免長時間之氧化效應。其中,覆蓋鈍化層之材料係為氧化鋅(ZnO)、二氧化矽(SiO2 )或氮化矽(Si3 N4 ),並且其厚度範圍介於10nm至500nm之間。In a preferred embodiment, a cover passivation layer (not shown) is further included. The transparent insulating type covering passivation layer utilizes Plasma-Enhanced Chemical Vapor Deposition (PECVD), Low-Pressure Chemical Vapor Deposition (LPCVD), electron beam evaporation or sputtering It grows on a transparent conductive layer to avoid long-term oxidation effects. The material covering the passivation layer is zinc oxide (ZnO), germanium dioxide (SiO 2 ) or tantalum nitride (Si 3 N 4 ), and the thickness thereof ranges from 10 nm to 500 nm.

電極108利用熱蒸鍍法、濺鍍法或電子束蒸鍍法披覆於n型層103與透明導電層107之上,並且於成長過程中包含一高溫退火過程,其退火溫度範圍介於50℃至600℃之間。其中,電極108係為一歐姆接觸電極,電極108包括一p型電極及一n型電極,p型電極成長於透明導電層107,以及n型電極成長於n型層103之上。p型電極由鉻、鉑與金所組成,並且鉻之厚度範圍約為1nm至100nm,鉑之厚度範圍約為10nm至300nm,以及金之厚度範圍約為100nm至3000nm。n型電極由鉻、鉑與金所組成,或是由鈦與金所組成,其中,若n型電極由鉻、鉑與金所組成,鉻之厚度範圍約為1nm至100nm,鉑之厚度範圍約為10nm至300nm,以及金之厚度範圍約為100nm至3000nm;若n型電極由鈦與金所組成,鈦之厚度範圍約為1nm至100nm,以及金之厚度範圍約為100nm至3000nm。The electrode 108 is coated on the n-type layer 103 and the transparent conductive layer 107 by thermal evaporation, sputtering or electron beam evaporation, and includes a high-temperature annealing process during the growth process, and the annealing temperature ranges from 50 to 50. Between °C and 600 °C. The electrode 108 is an ohmic contact electrode, the electrode 108 includes a p-type electrode and an n-type electrode, the p-type electrode is grown on the transparent conductive layer 107, and the n-type electrode is grown on the n-type layer 103. The p-type electrode is composed of chromium, platinum and gold, and the thickness of chromium ranges from about 1 nm to 100 nm, the thickness of platinum ranges from about 10 nm to 300 nm, and the thickness of gold ranges from about 100 nm to 3000 nm. The n-type electrode is composed of chromium, platinum and gold, or is composed of titanium and gold. If the n-type electrode is composed of chromium, platinum and gold, the thickness of the chromium ranges from about 1 nm to 100 nm, and the thickness range of platinum It is about 10 nm to 300 nm, and the thickness of gold is about 100 nm to 3000 nm; if the n-type electrode is composed of titanium and gold, the thickness of titanium ranges from about 1 nm to 100 nm, and the thickness of gold ranges from about 100 nm to 3000 nm.

請參照第二圖,係為本發明實施例之一種發光二極體100之部份放大的內建電場E之示意圖。由於多重量子井層104與p型層106中具有n型摻雜層105,於是發光二極體100中生成一埋入式p-n接面。將發光二極體100操作於正向導通電壓下,其p-n接面之間會誘發內建電場E,能夠有效分散過於集中的電流I之路徑,使得發光二極體100具有較大面積的電流擴散範圍,來降低電流擁擠效應。Please refer to the second figure, which is a schematic diagram of a partially enlarged built-in electric field E of a light-emitting diode 100 according to an embodiment of the present invention. Since the multiple quantum well layer 104 and the p-type layer 106 have the n-type doped layer 105, a buried p-n junction is formed in the light-emitting diode 100. When the light-emitting diode 100 is operated under the forward conduction voltage, the built-in electric field E is induced between the pn junctions, and the path of the current I that is too concentrated can be effectively dispersed, so that the light-emitting diode 100 has a large area of current. Diffusion range to reduce current crowding effects.

如第三圖所示,係為本發明實施例之一種發光二極體100與習知比較之正向電流-電壓曲線圖。其中,曲線A代表發光二極體100中n型摻雜層105為氮化鎵之正向電流-電壓量測結果,曲線B代表發光二極體100中n型摻雜層105為氮化銦鎵(Inx Ga1-x N)之正向電流-電壓量測結果,以及曲線C代表習知之發光二極體之正向電流-電壓量測結果。若定義正向導通偏壓Vf 為電流於20mA時之電壓值,則曲線A所對應之正向導通偏壓VfA 為3.17V,曲線B所對應之正向導通偏壓VfB 為3.35V,以及曲線C所對應之正向導通偏壓VfC 為3.48V,則可知VfA <VfB <VfC 。此外,由第二圖中可知本發明實施例之發光二極體100之擴散電流在發光面上分佈十分均勻,因此,具有較小的寄生電阻效應,使得其串聯寄生電阻降低,以得到較小的正向導通偏壓VfA 及VfBAs shown in the third figure, it is a forward current-voltage graph of a light-emitting diode 100 according to an embodiment of the present invention. Wherein, the curve A represents the forward current-voltage measurement result of the n-type doped layer 105 in the light-emitting diode 100, and the curve B represents the n-type doped layer 105 in the light-emitting diode 100 as the indium nitride. The forward current-voltage measurement result of gallium (In x Ga 1-x N), and the curve C represent the forward current-voltage measurement result of the conventional light-emitting diode. If the forward conduction bias voltage V f is defined as the current value at 20 mA, the forward conduction bias voltage V fA corresponding to the curve A is 3.17 V, and the forward conduction bias voltage V fB corresponding to the curve B is 3.35 V. And the forward conduction bias voltage V fC corresponding to the curve C is 3.48 V, and it is understood that V fA <V fB <V fC . In addition, it can be seen from the second figure that the diffusion current of the light-emitting diode 100 of the embodiment of the present invention is uniformly distributed on the light-emitting surface, and therefore, has a small parasitic resistance effect, so that the series parasitic resistance is reduced to obtain a smaller The forward conduction bias voltages V fA and V fB .

經由計算,可由第三圖得到第四圖,係為本發明實施例之一種發光二極體100與習知比較之電壓-電流線性圖。其中,藉由計算三條線性趨近線之斜率,可得到不同的發光二極體之串聯寄生電阻計算值:曲線A代表發光二極體100中n型摻雜層105為氮化鎵之電壓-電流線性結果,其寄生電阻計算為15.2Ω;曲線B代表發光二極體100中n型摻雜層105為氮化銦鎵(Inx Ga1-x N)之電壓-電流線性結果,其寄生電阻計算為18.9Ω;以及,曲線C代表習知之發光二極體之電壓-電流線性結果,其寄生電阻計算為31.5Ω。由第三圖及第四圖可證實本發明實施例之一種發光二極體100中具有反向之內建電場E,能有效降低發光二極體100中串聯寄生電阻效應,使得發光二極體100具有寬廣且均勻的發光面積。Through calculation, the fourth figure can be obtained from the third figure, which is a voltage-current linear diagram of a light-emitting diode 100 according to an embodiment of the present invention. Wherein, by calculating the slopes of the three linear approximation lines, the calculated values of the series parasitic resistance of the different light emitting diodes can be obtained: the curve A represents the voltage of the gallium nitride in the n-type doping layer 105 of the light emitting diode 100 - The linear current result, the parasitic resistance is calculated to be 15.2 Ω; the curve B represents the voltage-current linear result of the n-type doped layer 105 in the light-emitting diode 100 being indium gallium nitride (In x Ga 1-x N), which is parasitic The resistance was calculated to be 18.9 Ω; and, curve C represents a voltage-current linear result of a conventional light-emitting diode, and its parasitic resistance was calculated to be 31.5 Ω. It can be confirmed from the third and fourth figures that a light-emitting diode 100 having a reverse built-in electric field E in the embodiment of the present invention can effectively reduce the series parasitic resistance effect in the light-emitting diode 100, so that the light-emitting diode is made. 100 has a broad and uniform light-emitting area.

參照第五圖,係為本發明實施例之一種發光二極體100之局部能帶圖。其中,多重量子井層104之能帶係由一重複性之氮化鎵層之大能隙104a及氮化銦鎵層之小能隙104b所堆疊組成,並且CB代表傳導帶,VB代表價電帶。由於多重量子井層104與p型層106中具有n型摻雜層105,於是發光二極體100中所生成p-n接面,將誘發內建電場E,此內建電場E所導入之能障會侷限電子e與電洞h之移動。對於傳輸之自由載子:電子e與電洞h,埋入式p-n接面所誘發之內建電場E在局部所造成的能障會阻擋住電流之最短導通路徑。例如,當電洞h注入此埋入式p-n接面時,電洞h必須先跨越內建電場E所造成之能障,使能進入埋入式p-n接面,進而與電子e結合放出光子。因此,電洞h在埋入式p-n接面會傾向水平式擴散而注入到多重量子井層104,而非直接跨越p-n接面,因此將提升氮化鎵發光二極體100之電流擴散能力。Referring to FIG. 5, it is a partial energy band diagram of a light-emitting diode 100 according to an embodiment of the present invention. The energy band of the multiple quantum well layer 104 is composed of a large energy gap 104a of a repetitive gallium nitride layer and a small energy gap 104b of an indium gallium nitride layer, and CB represents a conduction band, and VB represents a price. band. Since the multiple quantum well layer 104 and the p-type layer 106 have the n-type doping layer 105, the pn junction formed in the light-emitting diode 100 will induce the built-in electric field E, and the built-in electric field E can be introduced into the energy barrier. It will limit the movement of electrons e and holes h. For the free carrier of the transmission: the electron e and the hole h, the built-in electric field E induced by the buried p-n junction locally blocks the shortest conduction path of the current. For example, when the hole h is injected into the buried p-n junction, the hole h must first cross the energy barrier caused by the built-in electric field E, enabling access to the buried p-n junction, and then combining with the electron e to emit photons. Therefore, the hole h will be horizontally diffused in the buried p-n junction and injected into the multiple quantum well layer 104 instead of directly crossing the p-n junction, thereby increasing the current spreading capability of the gallium nitride light emitting diode 100.

如第六圖所示,係為本發明實施例之一種發光二極體100與習知比較之機器模式(Machine model)下元件存活率(pass yield)-輸入電壓之對照關係曲線圖,也是靜電放電(Electrostatic discharge)測試結果之示意圖。其中,曲線A代表發光二極體100中n型摻雜層105為氮化鎵之測試結果,曲線B代表發光二極體100中n型摻雜層105為氮化銦鎵(Inx Ga1-x N)之測試結果,以及曲線C代表習知之發光二極體之測試結果。測試時,加入一正向電流衝擊於發光二極體之陽極,並將陰極接地。As shown in the sixth figure, it is a comparison chart of the component yield and input voltage of a light-emitting diode 100 according to an embodiment of the present invention and a machine model (passive model). Schematic diagram of the results of the discharge (Electrostatic discharge) test. The curve A represents the test result of the n-type doped layer 105 in the light-emitting diode 100 as gallium nitride, and the curve B represents the n-type doped layer 105 in the light-emitting diode 100 as indium gallium nitride (In x Ga 1 ). -x N) test results, and curve C represents the test results of conventional light-emitting diodes. During the test, a forward current is applied to the anode of the light-emitting diode, and the cathode is grounded.

由第六圖可知,當施予一正向偏壓500V時,可分別得到發光二極體100中n型摻雜層105為氮化鎵之元件存活率為100%,發光二極體100中n型摻雜層105為氮化銦鎵(Inx Ga1-x N)之元件存活率為54.2%,以及習知之發光二極體之元件存活率為0%。由測試結果圖可知,由於發光二極體100之電流分散效應的提升,使得本發明在經過靜電放電後之元件存活率大幅上升。因此,埋入式p-n接面所誘發之內建電場可以分散施加電流,以降低於靜電放電期間發光二極體100所受到的熱載子(hot carrier)破壞性。As can be seen from the sixth figure, when a forward bias voltage of 500 V is applied, the component survival ratio of the n-type doped layer 105 in the light-emitting diode 100 to gallium nitride is 100%, and the light-emitting diode 100 is The element survival rate of the n-type doped layer 105 is indium gallium nitride (In x Ga 1-x N) is 54.2%, and the element survival rate of the conventional light-emitting diode is 0%. It can be seen from the test result graph that the component survival rate of the present invention after electrostatic discharge is greatly increased due to the increase in the current dispersion effect of the light-emitting diode 100. Therefore, the built-in electric field induced by the buried pn junction can disperse the applied current to reduce the hot carrier destructiveness of the light-emitting diode 100 during the electrostatic discharge.

綜上所述,藉由於多重量子井層104與p型層106中加入一n型摻雜層105,使得一埋入式p-n接面生成,以誘發內建電場,因此,上述實施例具有下列優點:In summary, since a plurality of quantum well layers 104 and p-type layers 106 are added with an n-type doped layer 105, a buried pn junction is formed to induce a built-in electric field. Therefore, the above embodiment has the following advantage:

一、有效分散發光二極體100中電流路徑,來降低電流擁擠效應。1. Effectively dispersing the current path in the light-emitting diode 100 to reduce the current crowding effect.

二、降低發光二極體100之寄生電阻值,使得電流擴散效能上升。2. Decreasing the parasitic resistance value of the light-emitting diode 100, so that the current diffusion efficiency is increased.

三、由於發光二極體100之寄生電阻值下降,使得導通偏壓減少。Third, since the parasitic resistance value of the light-emitting diode 100 is lowered, the conduction bias voltage is reduced.

四、由於發光二極體100之施加電流被有效分散,使得其抗靜電放電能力優化。4. Since the applied current of the light-emitting diode 100 is effectively dispersed, the antistatic discharge capability is optimized.

此外,當本發明操作在正向偏壓時,更具有較均勻的電流擴散效應。Moreover, when the present invention operates in forward bias, it has a more uniform current spreading effect.

惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。另外本發明的任一實施例或申請專利範圍不須達成本發明所揭露之全部目的或優點或特點。此外,摘要部分和標題僅是用來輔助專利文件搜尋之用,並非用來限制本發明之權利範圍。The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

100...發光二極體100. . . Light-emitting diode

101...基板101. . . Substrate

102...緩衝層102. . . The buffer layer

103...n型層103. . . N-type layer

104...多重量子井層104. . . Multiple quantum well layers

104a...氮化鎵層104a. . . Gallium nitride layer

104b...氮化銦鎵層104b. . . Indium gallium nitride layer

105...n型掺雜層105. . . N-type doped layer

106...p型層106. . . P-type layer

107...透明導電層107. . . Transparent conductive layer

108...電極108. . . electrode

A,B,C...曲線A, B, C. . . curve

E...內建電場E. . . Built-in electric field

e...電子e. . . electronic

h...電洞h. . . Hole

I...電流I. . . Current

VfA ,VfB ,VfC ...導通偏壓V fA , V fB , V fC . . . Conduction bias

CB...傳導帶CB. . . Conduction zone

VB...價電帶VB. . . Price band

p-n...接面P-n. . . Junction

第一圖,係為本發明實施例之一種發光二極體之結構圖。The first figure is a structural diagram of a light-emitting diode according to an embodiment of the present invention.

第二圖,係為本發明實施例之一種發光二極體之部份放大的內建電場之示意圖。The second figure is a schematic diagram of a partially enlarged built-in electric field of a light-emitting diode according to an embodiment of the present invention.

第三圖,係為本發明實施例之一種發光二極體與習知比較之正向電流-電壓曲線圖。The third figure is a forward current-voltage graph of a light-emitting diode according to an embodiment of the present invention and a conventional comparison.

第四圖,係為本發明實施例之一種發光二極體與習知比較之電壓-電流線性圖。The fourth figure is a voltage-current linear diagram of a light-emitting diode according to an embodiment of the present invention and a conventional comparison.

第五圖,係為本發明實施例之一種發光二極體之局部能帶圖。The fifth figure is a partial energy band diagram of a light-emitting diode according to an embodiment of the present invention.

第六圖所示,係為本發明實施例之一種發光二極體與習知比較之機器模式下元件存活率-輸入電壓之對照關係曲線圖。FIG. 6 is a graph showing the relationship between the component survival rate and the input voltage in a machine mode in which a light-emitting diode according to an embodiment of the present invention is compared with a conventional one.

100...發光二極體100. . . Light-emitting diode

101...基板101. . . Substrate

102...緩衝層102. . . The buffer layer

103...n型層103. . . N-type layer

104...多重量子井層104. . . Multiple quantum well layers

105...n型掺雜層105. . . N-type doped layer

106...p型層106. . . P-type layer

107...透明導電層107. . . Transparent conductive layer

108...電極108. . . electrode

Claims (15)

一種發光二極體,包括:一基板;一緩衝層,成長於該基板之上;一n型層,成長於該緩衝層之上;一多重量子井層,成長於該n型層之上;一n型摻雜層,成長於該多重量子井層之上;一p型層,成長於該n型摻雜層之上,並與該n型摻雜層直接接觸,且該n型摻雜層與該p型層形成一埋入式p-n接面;一透明導電層,成長於該p型層之上;以及一電極,成長於該透明導電層及該n型層之上。 A light emitting diode comprising: a substrate; a buffer layer grown on the substrate; an n-type layer grown on the buffer layer; and a multi-quantum well layer grown on the n-type layer An n-type doped layer is grown on the multiple quantum well layer; a p-type layer is grown on the n-type doped layer and is in direct contact with the n-type doped layer, and the n-type doping The impurity layer forms a buried pn junction with the p-type layer; a transparent conductive layer grown on the p-type layer; and an electrode grown on the transparent conductive layer and the n-type layer. 如申請專利範圍第1項所述之發光二極體,其中該基板之材料係為半絕緣型氧化鋁。 The light-emitting diode according to claim 1, wherein the material of the substrate is semi-insulating alumina. 如申請專利範圍第1項所述之發光二極體,其中該緩衝層之材料係為未摻雜型氮化鎵,其厚度範圍約為0.1微米至10微米。 The light-emitting diode according to claim 1, wherein the material of the buffer layer is undoped gallium nitride, and the thickness thereof ranges from about 0.1 micrometer to 10 micrometers. 如申請專利範圍第1項所述之發光二極體,其中該n型層係為一n型氮化鎵層,其電子載子濃度約為1×1016 cm-3 至3×1019 cm-3 ,以及其厚度範圍約為0.5微米至5微米,並且該n型層之摻雜元素係為矽。The light-emitting diode according to claim 1, wherein the n-type layer is an n-type gallium nitride layer having an electron carrier concentration of about 1×10 16 cm −3 to 3×10 19 cm. -3 , and its thickness ranges from about 0.5 micrometers to 5 micrometers, and the doping element of the n-type layer is germanium. 如申請專利範圍第1項所述之發光二極體,其中該多重量子井層係由複數量子井結構所堆疊而成,每一量子井結構包括一氮化鎵層及一氮化銦鎵層,該些量子井結構之數量約為2至50,並且該氮化銦鎵之化學式為InX Ga1-X N,其x值範圍約為0.01至0.25。The light-emitting diode according to claim 1, wherein the multiple quantum well layer is formed by stacking a plurality of quantum well structures, each quantum well structure comprising a gallium nitride layer and an indium gallium nitride layer. The number of quantum well structures is about 2 to 50, and the indium gallium nitride has a chemical formula of In X Ga 1-X N having an x value ranging from about 0.01 to 0.25. 如申請專利範圍第5項所述之發光二極體,其中該多重量子井層中氮化鎵層之摻雜元素係為矽,其摻雜濃度範圍約為1×1016 cm-3 至1×1019 cm-3 ,以及其厚度範圍約為10奈米至20奈米,並且該氮化銦鎵層之厚度範圍約為1奈米至5奈米。The light-emitting diode according to claim 5, wherein the doping element of the gallium nitride layer in the multiple quantum well layer is germanium, and the doping concentration ranges from about 1×10 16 cm −3 to 1 ×10 19 cm -3 , and a thickness ranging from about 10 nm to 20 nm, and the indium gallium nitride layer has a thickness ranging from about 1 nm to 5 nm. 如申請專利範圍第1項所述之發光二極體,其中該n型摻雜層之材料係為氮化銦鎵及氮化鎵之其一,並且該氮化銦鎵之化學式為Inx Ga1-x N,x值範圍約為0.01至0.3。The light-emitting diode according to claim 1, wherein the material of the n-type doped layer is one of indium gallium nitride and gallium nitride, and the chemical formula of the indium gallium nitride is In x Ga 1-x N, x values range from about 0.01 to 0.3. 如申請專利範圍第7項所述之發光二極體,其中該n型摻雜層之電子載子濃度約為1×1017 cm-3 至1×1019 cm-3 ,以及其厚度範圍約為1奈米至100奈米。The light-emitting diode according to claim 7, wherein the n-type doping layer has an electron carrier concentration of about 1×10 17 cm -3 to 1×10 19 cm -3 , and a thickness range thereof. It is from 1 nm to 100 nm. 如申請專利範圍第1項所述之發光二極體,其中該p型層之材料係為摻雜型氮化鎵,其電洞載子濃度約為1×1016 cm-3 至1×1018 cm-3 ,以及其厚度範圍約為0.1微米至1微米,並且該p型層之摻雜元素係為鎂及鋅之其一。The light-emitting diode according to claim 1, wherein the material of the p-type layer is doped GaN, and the hole carrier concentration is about 1×10 16 cm -3 to 1×10. 18 cm -3 , and a thickness ranging from about 0.1 μm to 1 μm, and the doping element of the p-type layer is one of magnesium and zinc. 如申請專利範圍第1項所述之發光二極體,其中該透明導電層係為一金屬薄膜或一金屬氧化物層,並且其電阻率範圍係為10-8 歐姆-公分至10-1 歐姆-公分。The light-emitting diode according to claim 1, wherein the transparent conductive layer is a metal film or a metal oxide layer, and the resistivity ranges from 10 -8 ohm-cm to 10 -1 ohm. - cm. 如申請專利範圍第10項所述之發光二極體,更包括一覆蓋鈍化層成長於該透明導電層之上,該覆蓋鈍化層之材料係為氧化鋅、二氧化矽或氮化矽,並且其厚度範圍約為10奈米至500奈米。The light-emitting diode according to claim 10, further comprising a cover passivation layer grown on the transparent conductive layer, the material covering the passivation layer being zinc oxide, germanium dioxide or tantalum nitride, and Its thickness ranges from about 10 nm to 500 nm. 如申請專利範圍第1項所述之發光二極體,其中該電極包括一p型電極及一n型電極,該p型電極成長於該透明導電層,以及該n型電極成長於該n型層之上。The light-emitting diode according to claim 1, wherein the electrode comprises a p-type electrode and an n-type electrode, the p-type electrode is grown on the transparent conductive layer, and the n-type electrode is grown in the n-type Above the layer. 如申請專利範圍第12項所述之發光二極體,其中該p型電極係由鉻、鉑與金所組成,並且該鉻之厚度範圍約為1奈米至100奈米,該鉑之厚度範圍約為10奈米至300奈米,以及該金之厚度範圍約為100奈米至3000奈米。The light-emitting diode according to claim 12, wherein the p-type electrode is composed of chromium, platinum and gold, and the thickness of the chromium ranges from about 1 nm to 100 nm, and the thickness of the platinum The range is from about 10 nanometers to 300 nanometers, and the thickness of the gold ranges from about 100 nanometers to about 3,000 nanometers. 如申請專利範圍第12項所述之發光二極體,其中該n型電極係由鉻、鉑與金所組成發光二極體,該鉻之厚度範圍約為1奈米至100奈米,該鉑之厚度範圍約為10奈米至300奈米,以及該金之厚度範圍約為100奈米至3000奈米。The light-emitting diode according to claim 12, wherein the n-type electrode is composed of a light-emitting diode composed of chromium, platinum and gold, and the thickness of the chromium ranges from about 1 nm to 100 nm. The thickness of the platinum ranges from about 10 nanometers to 300 nanometers, and the thickness of the gold ranges from about 100 nanometers to about 3,000 nanometers. 如申請專利範圍第12項所述之發光二極體,其中該n型電極係由鈦與金所組成,該鈦之厚度範圍約為1奈米至100奈米,以及該金之厚度範圍約為100奈米至3000奈米。The light-emitting diode according to claim 12, wherein the n-type electrode is composed of titanium and gold, and the thickness of the titanium ranges from about 1 nm to 100 nm, and the thickness range of the gold is about It is from 100 nm to 3000 nm.
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