TWI437405B - Adaptive two-stage voltage regulator and method for controlling same - Google Patents

Adaptive two-stage voltage regulator and method for controlling same Download PDF

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TWI437405B
TWI437405B TW099110548A TW99110548A TWI437405B TW I437405 B TWI437405 B TW I437405B TW 099110548 A TW099110548 A TW 099110548A TW 99110548 A TW99110548 A TW 99110548A TW I437405 B TWI437405 B TW I437405B
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voltage
circuit
signal
output
reference signal
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TW099110548A
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TW201135389A (en
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Tsung Wei Huang
Shui Mu Lin
Chueh Kuei Jan
Huan Chien Yang
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Richtek Technology Corp
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0045Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0067Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007Plural converter units in cascade

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Dc-Dc Converters (AREA)

Description

適應性兩階段穩壓電路及其控制方法Adaptive two-stage voltage regulator circuit and control method thereof

本發明係有關一種適應性兩階段穩壓電路(Voltage Regulator)及其控制方法,特別是指一種根據輸入電壓與輸出電壓間的關係而適應性地調整中間電壓,以求節約能耗的適應性兩階段穩壓電路與控制方法。The invention relates to an adaptive two-stage voltage regulator circuit (Voltage Regulator) and a control method thereof, in particular to an adaptive adjustment of an intermediate voltage according to a relationship between an input voltage and an output voltage, so as to save energy and adaptability. Two-stage voltage regulator circuit and control method.

請參閱第1圖,因應某些應用的需求,在電源供應裝置中需要進行兩階段的電壓調節,先將輸入電壓Vin轉換成中間電壓Vm,再轉換成輸出電壓Vout。目的是透過第一級電壓調節電路10,以求高效率地轉換電壓,再透過第二級線性穩壓電路20,以求過濾中間電壓Vm中的漣波雜訊。例如,當負載電路為主動矩陣式有機發光二極體(AMOLED)時,即有可能需要使用此種兩階段的穩壓電路。Referring to Figure 1, in order to meet the needs of some applications, a two-stage voltage regulation is required in the power supply device, and the input voltage Vin is first converted into an intermediate voltage Vm and then converted into an output voltage Vout. The purpose is to pass the first-stage voltage regulating circuit 10 to efficiently convert the voltage and then pass through the second-stage linear regulator circuit 20 to filter the chopping noise in the intermediate voltage Vm. For example, when the load circuit is an active matrix organic light emitting diode (AMOLED), it may be necessary to use such a two-stage voltage stabilizing circuit.

以負載電路為AMOLED為例,在其中一種應用場合中,所需的輸出電壓Vout為4.6V,輸入電壓Vin為電池電壓,可能在2.5~4.8V間變化,而電壓調節電路10為升壓轉換電路。請參閱第2圖,因輸入電壓Vin有可能為4.8V,為確保升壓轉換電路能正常工作,因此將電壓調節電路10的輸出電壓Vm設定為4.9V(升壓轉換電路的輸出電壓必須大於輸入電壓;若將電壓Vm設定為4.8V或以下,則當輸入電壓Vin為4.8V時,升壓轉換電路無法工作),再由線性穩壓電路20將4.9V的中間電壓Vm轉換為4.6V的輸出電壓Vout。Taking the load circuit as an AMOLED as an example, in one application, the required output voltage Vout is 4.6V, the input voltage Vin is the battery voltage, and may vary between 2.5 and 4.8V, and the voltage regulating circuit 10 is boost converter. Circuit. Referring to FIG. 2, since the input voltage Vin may be 4.8V, in order to ensure that the boost converter circuit can work normally, the output voltage Vm of the voltage regulating circuit 10 is set to 4.9V (the output voltage of the boost converter circuit must be greater than Input voltage; if the voltage Vm is set to 4.8V or less, the boost converter circuit cannot operate when the input voltage Vin is 4.8V, and the intermediate voltage Vm of 4.9V is converted to 4.6V by the linear regulator circuit 20. The output voltage Vout.

以上安排中,由圖中可見,當輸入電壓Vin之電壓值為2.5~4.6V時,將造成4.9V-4.6V=0.3V的電壓差值ΔV,增加電路的能耗。In the above arrangement, it can be seen from the figure that when the voltage value of the input voltage Vin is 2.5~4.6V, the voltage difference ΔV of 4.9V-4.6V=0.3V will be caused, which increases the energy consumption of the circuit.

有鑑於此,本發明即針對上述先前技術之不足,提出一種適應性兩階段穩壓電路與控制方法,以節約能耗。In view of this, the present invention is directed to the above-mentioned deficiencies of the prior art, and proposes an adaptive two-stage voltage regulator circuit and control method to save energy.

本發明目的之一在提供一種適應性兩階段穩壓電路。One of the objects of the present invention is to provide an adaptive two-stage voltage regulator circuit.

本發明的另一目的在提供一種控制兩階段穩壓電路的方法。Another object of the present invention is to provide a method of controlling a two-stage voltage regulator circuit.

為達上述之目的,就其中一個觀點言,本發明提供了一種適應性兩階段穩壓電路,包含:一電壓調節電路,根據一輸入電壓(Vin)而產生一中間電壓(Vm),其中該輸入電壓小於或等於一最大值(Vin_max);一線性穩壓電路,根據該中間電壓而產生一輸出電壓(Vout);以及一中間電壓控制電路,其接收(1)有關輸入電壓的指標訊號,和以下兩者之一:(2a)有關輸出電壓的指標訊號,或(2b)預設的參考訊號,並根據所接收訊號來調整中間電壓,以使得當輸入電壓小於或等於輸出電壓時:Vm=Vout+ΔV,且(Vout+ΔV)<Vin_max。In order to achieve the above object, in one aspect, the present invention provides an adaptive two-stage voltage regulator circuit comprising: a voltage regulating circuit for generating an intermediate voltage (Vm) according to an input voltage (Vin), wherein The input voltage is less than or equal to a maximum value (Vin_max); a linear regulator circuit generates an output voltage (Vout) according to the intermediate voltage; and an intermediate voltage control circuit that receives (1) an indicator signal related to the input voltage, And one of the following: (2a) the indicator signal of the output voltage, or (2b) the preset reference signal, and adjust the intermediate voltage according to the received signal, so that when the input voltage is less than or equal to the output voltage: Vm =Vout+ΔV, and (Vout+ΔV)<Vin_max.

就另一個觀點言,本發明提供了一種兩階段穩壓電路之控制方法,包含:根據一輸入電壓(Vin)而產生一中間電壓(Vm),其中該輸入電壓小於或等於一最大值(Vin_max);根據該中間電壓而產生一輸出電壓(Vout);接收(1)有關輸入電壓的指標訊號,和以下兩者之一:(2a)有關輸出電壓的指標訊號,或(2b)預設的參考訊號;以及根據接收的訊號來調整中間電壓,以使得當輸入電壓小於或等於輸出電壓時:Vm=Vout+ΔV,且(Vout+ΔV)<Vin_max。In another aspect, the present invention provides a method for controlling a two-stage voltage stabilization circuit, comprising: generating an intermediate voltage (Vm) according to an input voltage (Vin), wherein the input voltage is less than or equal to a maximum value (Vin_max) An output voltage (Vout) is generated according to the intermediate voltage; (1) an indicator signal related to the input voltage, and one of: (2a) an indicator signal related to the output voltage, or (2b) a preset The reference signal; and adjusting the intermediate voltage according to the received signal such that when the input voltage is less than or equal to the output voltage: Vm=Vout+ΔV, and (Vout+ΔV)<Vin_max.

上述之適應性兩階段穩壓電路或其控制方法中,當輸入電壓大於輸出電壓時,可令該中間電壓為單階或多階步進形狀、或不規則形狀、或令Vm=Vin+ΔV。In the above adaptive two-stage voltage regulator circuit or the control method thereof, when the input voltage is greater than the output voltage, the intermediate voltage may be a single-order or multi-step step shape, or an irregular shape, or Vm=Vin+ΔV .

當中間電壓為單階或多階步進形狀時,可將有關輸入電壓的指標訊號(1)和有關輸出電壓的指標訊號(2a)或預設的參考訊號(2b)相比較,並根據比較結果選擇一參考電壓,供應給電壓調節電路。When the intermediate voltage is a single-order or multi-step step shape, the index signal (1) related to the input voltage can be compared with the indicator signal (2a) or the preset reference signal (2b) regarding the output voltage, and compared according to As a result, a reference voltage is selected and supplied to the voltage regulating circuit.

當Vm=Vin+ΔV時,在其中一種實施型態中,可將Vin指標與Vout指標轉換為電流訊號,再以Vin指標減去Vout指標。所得正差值再轉換為電壓訊號後,疊加於一參考電壓上,供應給電壓調節電路。When Vm=Vin+ΔV, in one embodiment, the Vin index and the Vout index can be converted into a current signal, and the Vout index is subtracted from the Vin index. After the obtained positive difference value is converted into a voltage signal, it is superimposed on a reference voltage and supplied to the voltage regulating circuit.

底下藉由具體實施例詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

請參閱第3圖之第一實施例,為便於與第2圖對照,在此假設輸入電壓Vin在2.5~4.8V間變化,而所需要的輸出電壓Vout為4.6V,事實上同樣概念可適用於所有電壓範圍,亦即輸出電壓Vout不必須為4.6V,而輸入電壓的最大值Vin_max不必須為4.8V。Referring to the first embodiment of FIG. 3, in order to facilitate comparison with FIG. 2, it is assumed here that the input voltage Vin varies between 2.5 and 4.8 V, and the required output voltage Vout is 4.6 V. In fact, the same concept is applicable. The output voltage Vout does not have to be 4.6V in all voltage ranges, and the maximum value Vin_max of the input voltage does not have to be 4.8V.

如第3圖所示,本實施例的重點在於,使中間電壓Vm根據輸入電壓Vin與輸出電壓Vout而適應性地變化,當輸入電壓Vin小於或等於輸出電壓Vout時,中間電壓Vm等於輸出電壓Vout加上一個儘可能小的電壓差ΔV,所謂儘可能小的電壓差ΔV意指:(Vout+ΔV)<Vin_max,例如ΔV=0.1V;而當輸入電壓Vin大於或等於輸出電壓Vout時,中間電壓Vm等於輸入電壓Vin加上該電壓差ΔV,以上所述可表示如下:Vm=Vout+ΔV且(Vout+ΔV)<Vin_max,若Vm=Vin+ΔV,若Vin>VoutAs shown in FIG. 3, the focus of this embodiment is that the intermediate voltage Vm is adaptively changed according to the input voltage Vin and the output voltage Vout. When the input voltage Vin is less than or equal to the output voltage Vout, the intermediate voltage Vm is equal to the output voltage. Vout plus a voltage difference ΔV as small as possible, the so-called voltage difference ΔV as small as possible means: (Vout + ΔV) < Vin_max, for example ΔV = 0.1V; and when the input voltage Vin is greater than or equal to the output voltage Vout, The intermediate voltage Vm is equal to the input voltage Vin plus the voltage difference ΔV, which can be expressed as follows: Vm=Vout+ΔV and (Vout+ΔV)<Vin_max, if Vm=Vin+ΔV, if Vin>Vout

第3圖所示為最節省能耗的方式,但本發明並不侷限於此,當輸入電壓Vin大於輸出電壓Vout時,中間電壓Vm不一定必須等於輸入電壓Vin加上電壓差ΔV,而例如可為第4圖或第5圖所示的單階或多階步進形狀;將第4圖或第5圖與第2圖比較,仍然較為節省能耗。甚至,在輸入電壓Vin大於輸出電壓Vout的區段中,中間電壓Vm可以為其他任意不規則的圖形,例如第6圖所示。Figure 3 shows the most energy-saving way, but the invention is not limited thereto. When the input voltage Vin is greater than the output voltage Vout, the intermediate voltage Vm does not have to be equal to the input voltage Vin plus the voltage difference ΔV, for example It can be a single- or multi-step step shape as shown in Figure 4 or Figure 5; comparing Figure 4 or Figure 5 with Figure 2 still saves energy. Even in the section where the input voltage Vin is larger than the output voltage Vout, the intermediate voltage Vm may be any other irregular pattern, as shown in FIG.

以上各實施例的硬體實施方式如第7圖,除了電壓調節電路10與線性穩壓電路20外,另設置一個中間電壓(Vm)控制電路30,此Vm控制電路30接收有關輸入電壓Vin的指標訊號(Vin indicator,以下簡稱Vin指標)和有關輸出電壓Vout的指標訊號(Vout indicator,以下簡稱Vout指標),或是預設的參考訊號,並根據上述訊號來調整中間電壓Vm。所述Vin指標例如可以是輸入電壓Vin的分壓,或是輸入電壓Vin轉成電流後的電流訊號,亦可以為上述分壓或電流訊號的倍數或分數值,當然也可以為電壓Vin的本身;Vout指標亦然。預設的參考訊號則可以為常數,其設定方式容後說明。The hardware embodiment of the above embodiments is as shown in FIG. 7. In addition to the voltage regulating circuit 10 and the linear voltage stabilizing circuit 20, an intermediate voltage (Vm) control circuit 30 is provided. The Vm control circuit 30 receives the input voltage Vin. The indicator signal (Vin indicator, hereinafter referred to as the Vin indicator) and the Vout indicator (hereinafter referred to as the Vout indicator), or the preset reference signal, and the intermediate voltage Vm are adjusted according to the above signal. The Vin indicator may be, for example, a divided voltage of the input voltage Vin, or a current signal after the input voltage Vin is converted into a current, or may be a multiple or a fractional value of the voltage dividing or current signal, or may be the voltage Vin itself. The Vout indicator is also true. The preset reference signal can be a constant, and the setting method is described later.

因應所欲達成之Vm圖形,第7圖電路在硬體上有多種達成方式,舉例而言,第4圖之Vm圖形例如可以第8圖的硬體電路來實現,其中假設電壓調節電路10為升壓轉換電路(Boost Converter),由升壓控制電路11根據反饋訊號FB1與參考電壓Boost_REF的比較來控制功率開關的操作,以決定中間電壓Vm,而線性穩壓電路20為低壓降穩壓電路(LDO,Low Drop-Out),由LDO控制電路21根據反饋訊號FB2與參考電壓LDO_REF的比較來控制功率開關的操作,以決定輸出電壓Vout。Vm控制電路30包含一個比較器31與一個選擇電路35,比較器31將Vin指標與Vout指標比較,或將Vin指標與預設的參考訊號比較。根據比較器31的輸出,選擇電路35選擇兩參考電壓REF1,REF2之一,作為升壓控制電路11的參考電壓Boost_REF。對照第8圖與第4圖,假設輸入電壓Vin在2.5~4.8V間變化,而所需要的輸出電壓Vout為4.6V,則當選擇電路35選擇兩參考電壓REF1,REF2之一時,中間電壓Vm等於4.6V加上一個儘可能小的電壓差ΔV(例如0.1V),當選擇電路35選擇兩參考電壓REF1,REF2之另一者時,中間電壓Vm等於4.8V加上該電壓差ΔV。In view of the desired Vm pattern, the circuit of FIG. 7 has various implementations on the hardware. For example, the Vm pattern of FIG. 4 can be implemented, for example, by the hardware circuit of FIG. 8, wherein the voltage adjustment circuit 10 is assumed to be The boost converter circuit (Boost Converter) controls the operation of the power switch by the boost control circuit 11 according to the comparison of the feedback signal FB1 and the reference voltage Boost_REF to determine the intermediate voltage Vm, and the linear regulator circuit 20 is a low-dropout regulator circuit. (LDO, Low Drop-Out), the LDO control circuit 21 controls the operation of the power switch based on the comparison of the feedback signal FB2 with the reference voltage LDO_REF to determine the output voltage Vout. The Vm control circuit 30 includes a comparator 31 and a selection circuit 35. The comparator 31 compares the Vin index with the Vout indicator or compares the Vin index with a preset reference signal. Based on the output of the comparator 31, the selection circuit 35 selects one of the two reference voltages REF1, REF2 as the reference voltage Boost_REF of the boost control circuit 11. Referring to FIG. 8 and FIG. 4, it is assumed that the input voltage Vin varies between 2.5 and 4.8 V, and the required output voltage Vout is 4.6 V. When the selection circuit 35 selects one of the two reference voltages REF1, REF2, the intermediate voltage Vm Equal to 4.6V plus a voltage difference ΔV (eg, 0.1V) as small as possible. When the selection circuit 35 selects the other of the two reference voltages REF1, REF2, the intermediate voltage Vm is equal to 4.8V plus the voltage difference ΔV.

由上可知,第8圖中,比較器31的作用是決定中間電壓Vm何時跳至下一階,若比較器31的正輸入端為「預設的常數參考訊號」,則此預設參考訊號應該對應於第4圖中電壓Vm跳階時的Vin電壓,在本實施例中,若Vin指標/Vin=α,則預設參考訊號=α‧(4.6V)。As can be seen from the above, in the eighth figure, the function of the comparator 31 is to determine when the intermediate voltage Vm jumps to the next stage. If the positive input terminal of the comparator 31 is "preset constant reference signal", the preset reference signal It should correspond to the Vin voltage when the voltage Vm is skipped in Fig. 4. In the present embodiment, if the Vin index /Vin = α, the preset reference signal = α‧ (4.6V).

第9圖顯示本發明的另一硬體實施例,其中省略繪示電壓調節電路10與線性穩壓電路20,但同樣假設電壓調節電路10為升壓轉換電路而線性穩壓電路20為低壓降穩壓電路。本實施例對應於第5圖的Vm圖形,Vm控制電路30中包含多個比較器31~33、邏輯電路34、與選擇電路35,其中比較器31~33分別將Vin指標與常數預設參考訊號1~預設參考訊號3比較,其比較結果經邏輯電路34整合後,決定選擇電路35應選擇REF1~REF4中的哪一個,作為參考電壓Boost_REF。本實施例中的比較器與參考電壓的數目僅是舉例,可以根據所欲的Vm圖形步階數目來決定;預設參考訊號1~預設參考訊號3之設定方式與前一實施例相同,應分別對應於第5圖中電壓Vm跳階時的Vin電壓。FIG. 9 shows another hardware embodiment of the present invention, in which the voltage regulating circuit 10 and the linear voltage stabilizing circuit 20 are omitted, but it is also assumed that the voltage regulating circuit 10 is a boost converting circuit and the linear voltage stabilizing circuit 20 is a low voltage drop. Regulator circuit. This embodiment corresponds to the Vm pattern of FIG. 5, and the Vm control circuit 30 includes a plurality of comparators 31-33, a logic circuit 34, and a selection circuit 35, wherein the comparators 31-33 respectively reference the Vin index and the constant preset reference. After the signal 1 is compared with the preset reference signal 3, the comparison result is integrated by the logic circuit 34, and it is determined which one of REF1~REF4 should be selected by the selection circuit 35 as the reference voltage Boost_REF. The number of the comparator and the reference voltage in this embodiment is only an example, and may be determined according to the desired number of Vm pattern steps; the preset reference signal 1 to the preset reference signal 3 are set in the same manner as the previous embodiment. It should correspond to the Vin voltage at the time of the voltage Vm stepping in Fig. 5, respectively.

第10圖顯示本發明的另一實施例,本實施例對應於第3圖的Vm圖形。Vm控制電路30中包含第一電壓轉電流電路301、第二電壓轉電流電路302、減法電路303、電流轉電壓電路304、加法電路305。當Vin<Vout時,電壓調節電路10中以VREF為參考電壓,此參考電壓恰使電壓調節電路10輸出的中間電壓Vm等於4.6V加上電壓差ΔV。如圖所示,第一電壓轉電流電路301和第二電壓轉電流電路302分別將Vin指標與Vout指標轉換為電流訊號;當然,如果Vin指標與Vout指標不是電壓訊號而本已經是電流訊號,則可不需要第一電壓轉電流電路301和第二電壓轉電流電路302。減法電路303將Vin指標轉換所得之電流訊號減去Vout轉換所得之電流訊號,但如差值為負則輸出零。電流轉電壓電路304將此差值轉換為電壓,與參考電壓VREF相加,即可得出所欲的參考電壓Boost_REF,此參考電壓Boost_REF可產生第3圖的Vm圖形,當時,Vm=4.6V+ΔV;當Vin>Vout時,Vm=Vin+ΔV。Fig. 10 shows another embodiment of the present invention, and this embodiment corresponds to the Vm pattern of Fig. 3. The Vm control circuit 30 includes a first voltage-to-current circuit 301, a second voltage-to-current circuit 302, a subtraction circuit 303, a current-to-voltage circuit 304, and an addition circuit 305. When Vin < Vout, VREF is used as a reference voltage in the voltage regulating circuit 10, and this reference voltage is such that the intermediate voltage Vm output from the voltage regulating circuit 10 is equal to 4.6 V plus the voltage difference ΔV. As shown, the first voltage-to-current circuit 301 and the second voltage-to-current circuit 302 convert the Vin indicator and the Vout indicator into current signals, respectively; of course, if the Vin indicator and the Vout indicator are not voltage signals, the current signal is already present. The first voltage to current circuit 301 and the second voltage to current circuit 302 may not be needed. The subtraction circuit 303 subtracts the current signal obtained by the conversion of the Vin index from the current signal obtained by the Vout conversion, but outputs zero if the difference is negative. The current-to-voltage circuit 304 converts the difference into a voltage and adds it to the reference voltage VREF to obtain a desired reference voltage Boost_REF. The reference voltage Boost_REF can generate the Vm pattern of FIG. When Vm=4.6V+ΔV; when Vin>Vout, Vm=Vin+ΔV.

第10圖的更具體電路有多種達成方式,舉一例如第11圖,本實施例中更多設置了一個致能開關SW1,可根據訊號EN來彈性決定是否容許Vm控制電路30工作。訊號EN可以為外部控制訊號、或來自任何來源。當致能開關SW1導通時,若Vin>Vout,開關SW2導通,電阻RS1上流過IR1的電流,而電阻RS3上流過IR3的電流,其中IR3=(Vin-Vout)/RS1。電阻RS3上產生IR3×RS3的跨壓,疊加在參考電壓VREF上,亦即Boost_REF=VREF+IR3×RS3。當Vin<Vout時,開關SW2 不導通,IR3為0,Boost_REF=VREF。More specific circuits of FIG. 10 can be implemented in various ways. For example, in FIG. 11, in this embodiment, an enable switch SW1 is further provided, and the Vm control circuit 30 can be flexibly determined according to the signal EN. The signal EN can be an external control signal or from any source. When the enable switch SW1 is turned on, if Vin>Vout, the switch SW2 is turned on, the current of the IR1 flows through the resistor RS1, and the current of the IR3 flows through the resistor RS3, where IR3=(Vin−Vout)/RS1. The voltage across IR3×RS3 is generated on the resistor RS3 and superimposed on the reference voltage VREF, that is, Boost_REF=VREF+IR3×RS3. When Vin < Vout, the switch SW2 is not turned on, IR3 is 0, and Boost_REF = VREF.

第11圖實施例中,可以任意設定ΔV之值;說明如下。In the embodiment of Fig. 11, the value of ΔV can be arbitrarily set; the description is as follows.

Vm=FB1×(RB1+RB2)/RB1Vm=FB1×(RB1+RB2)/RB1

=(Boost_REF)×(RB1+RB2)/RB1=(Boost_REF)×(RB1+RB2)/RB1

=(VREF+IR3×RS3)×(RB1+RB2)/RB1=(VREF+IR3×RS3)×(RB1+RB2)/RB1

=[VREF+(Vin-Vout)×RS3/RS1]×(RB1+RB2)/RB1=[VREF+(Vin-Vout)×RS3/RS1]×(RB1+RB2)/RB1

Vout=FB2×(RB1+RB2/K)/RB1Vout=FB2×(RB1+RB2/K)/RB1

=(VREF)×(RB1+RB2/K)/RB1=(VREF)×(RB1+RB2/K)/RB1

因此,如欲將ΔV設定為0.1V,可藉由適當安排各電阻的阻值來達成,例如將K設定為RB2/(RB2-0.1×RB1),並適切安排電阻RS1~RS3的阻值。Therefore, if ΔV is to be set to 0.1V, it can be achieved by appropriately arranging the resistance values of the respective resistors, for example, setting K to RB2/(RB2-0.1×RB1), and arranging the resistance values of the resistors RS1 to RS3.

以上已針對較佳實施例來說明本發明,唯以上所述者,僅係為使熟悉本技術者易於了解本發明的內容而已,並非用來限定本發明之權利範圍。在本發明之相同精神下,熟悉本技術者可以思及各種等效變化。例如,各實施例中,可插置不影響主要功能的其他電路或元件,例如第10圖中可插置比例電路、類比數位轉換器與數位類比轉換器等;又如,第一級電壓調節電路不限於為升壓轉換電路,而可為其他切換式電壓轉換電路。因此,本發明的範圍應涵蓋上述及其他所有等效變化。The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. In the same spirit of the invention, various equivalent changes can be conceived by those skilled in the art. For example, in various embodiments, other circuits or components that do not affect the main function may be interposed, such as an interpolable proportional circuit, an analog-to-digital converter, and a digital analog converter in FIG. 10; for example, a first-stage voltage regulation The circuit is not limited to a boost converter circuit, but may be other switched voltage conversion circuits. Therefore, the scope of the invention should be construed as covering the above and all other equivalents.

10...電壓調節電路10. . . Voltage regulation circuit

11...升壓控制電路11. . . Boost control circuit

20...線性穩壓電路20. . . Linear regulator circuit

21...LDO控制電路twenty one. . . LDO control circuit

30...中間電壓控制電路30. . . Intermediate voltage control circuit

31,32,33...比較器31,32,33. . . Comparators

34...邏輯電路34. . . Logic circuit

35...選擇電路35. . . Selection circuit

301...第一電壓轉電流電路301. . . First voltage to current circuit

302...第二電壓轉電流電路302. . . Second voltage to current circuit

303...減法電路303. . . Subtraction circuit

304...電流轉電壓電路304. . . Current to voltage circuit

305...加法電路305. . . Addition circuit

RB1,RB2,RB2/K,RS1,RS2,RS3...電阻RB1, RB2, RB2/K, RS1, RS2, RS3. . . resistance

SW1,SW2...開關SW1, SW2. . . switch

第1圖示出先前技術之兩階段穩壓電路的示意電路圖。Figure 1 shows a schematic circuit diagram of a prior art two-stage voltage regulator circuit.

第2圖示出先前技術中,輸入電壓Vin、中間電壓Vm、輸出電壓Vout之間的關係。Fig. 2 shows the relationship between the input voltage Vin, the intermediate voltage Vm, and the output voltage Vout in the prior art.

第3~6圖示出本發明的幾個實施例,其中顯示輸入電壓Vin、中間電壓Vm、輸出電壓Vout之間的關係。Figures 3 to 6 show several embodiments of the present invention in which the relationship between the input voltage Vin, the intermediate voltage Vm, and the output voltage Vout is displayed.

第7圖以示意電路圖顯示本發明之適應性兩階段穩壓電路。Figure 7 shows an adaptive two-stage voltage regulator circuit of the present invention in a schematic circuit diagram.

第8圖舉例示出對應於第4圖的硬體實現方式。Fig. 8 exemplifies a hardware implementation corresponding to Fig. 4.

第9圖舉例示出對應於第5圖的硬體實現方式。Fig. 9 exemplifies a hardware implementation corresponding to Fig. 5.

第10圖舉例示出對應於第3圖的硬體實現方式。Fig. 10 exemplifies a hardware implementation corresponding to Fig. 3.

第11圖舉例示出第10圖電路的更具體實現方式。Figure 11 illustrates a more specific implementation of the circuit of Figure 10 by way of example.

10...電壓調節電路10. . . Voltage regulation circuit

20...線性穩壓電路20. . . Linear regulator circuit

30...中間電壓控制電路30. . . Intermediate voltage control circuit

Claims (13)

一種適應性兩階段穩壓電路,包含:一電壓調節電路,根據一輸入電壓(Vin)而產生一中間電壓(Vm),其中該輸入電壓小於或等於一最大值(Vin_max);一線性穩壓電路,根據該中間電壓而產生一輸出電壓(Vout);以及一中間電壓控制電路,其接收(1)有關輸入電壓的指標訊號,和以下兩者之一:(2a)有關輸出電壓的指標訊號,或(2b)預設的第一參考訊號,並根據所接收訊號來調整中間電壓,其中「有關輸入電壓的指標訊號」和「有關輸出電壓的指標訊號或預設的第一參考訊號」決定一第二參考訊號,且該第二參考訊號係供應給該電壓調節電路,以使得當輸入電壓小於或等於輸出電壓時:Vm=Vout+ΔV,且(Vout+ΔV)<Vin_max,其中ΔV為一電壓差。 An adaptive two-stage voltage regulator circuit includes: a voltage regulating circuit that generates an intermediate voltage (Vm) according to an input voltage (Vin), wherein the input voltage is less than or equal to a maximum value (Vin_max); a linear regulator a circuit that generates an output voltage (Vout) according to the intermediate voltage; and an intermediate voltage control circuit that receives (1) an indicator signal related to the input voltage, and one of: (2a) an indicator signal related to the output voltage , or (2b) the preset first reference signal, and adjust the intermediate voltage according to the received signal, wherein "the indicator signal about the input voltage" and "the indicator signal about the output voltage or the preset first reference signal" are determined. a second reference signal, and the second reference signal is supplied to the voltage regulating circuit such that when the input voltage is less than or equal to the output voltage: Vm=Vout+ΔV, and (Vout+ΔV)<Vin_max, where ΔV is A voltage difference. 如申請專利範圍第1項所述之適應性兩階段穩壓電路,其中當輸入電壓大於輸出電壓時,該中間電壓為單階或多階步進形狀。 The adaptive two-stage voltage regulator circuit of claim 1, wherein the intermediate voltage is a single-order or multi-step step shape when the input voltage is greater than the output voltage. 如申請專利範圍第1項所述之適應性兩階段穩壓電路,其中當輸入電壓大於輸出電壓時,Vm=Vin+ΔV,其中ΔV為該電壓差。 The adaptive two-stage voltage regulator circuit of claim 1, wherein when the input voltage is greater than the output voltage, Vm = Vin + ΔV, wherein ΔV is the voltage difference. 如申請專利範圍第1項所述之適應性兩階段穩壓電路,其中該中間電壓控制電路包含:比較器,將「有關輸入電壓的指標訊號」和「有關輸出電壓的指標訊號或預設的第一參考訊號」相比較;以及 選擇電路,根據比較器的比較結果,決定一第二參考訊號,且該第二參考訊號係供應給電壓調節電路。 The adaptive two-stage voltage regulator circuit of claim 1, wherein the intermediate voltage control circuit comprises: a comparator, the "indicator signal about the input voltage" and the "indicator signal about the output voltage or the preset Comparison of the first reference signal"; The selection circuit determines a second reference signal according to the comparison result of the comparator, and the second reference signal is supplied to the voltage adjustment circuit. 如申請專利範圍第1項所述之適應性兩階段穩壓電路,其中該中間電壓控制電路包含:多個比較器,將有關輸入電壓的指標訊號和多個預設的參考訊號相比較;邏輯電路,整合比較器的輸出;以及選擇電路,根據邏輯電路的輸出,決定一第二參考訊號,且該第二參考訊號係供應給電壓調節電路。 The adaptive two-stage voltage regulator circuit of claim 1, wherein the intermediate voltage control circuit comprises: a plurality of comparators for comparing the indicator signal of the input voltage with a plurality of preset reference signals; logic a circuit that integrates the output of the comparator; and a selection circuit that determines a second reference signal based on the output of the logic circuit, and the second reference signal is supplied to the voltage regulation circuit. 如申請專利範圍第1項所述之適應性兩階段穩壓電路,其中該中間電壓控制電路包含:減法電路,將有關輸入電壓的指標訊號減去有關輸出電壓的指標訊號,當其差值為正時輸出差值,差值為負時則不輸出或輸出零;轉換電路,將正差值轉換為電壓訊號;加法電路,將正差值所轉換之電壓訊號與一第三參考訊號相加,以決定該第二參考訊號,並將該第二參考訊號供應給電壓調節電路,藉以調整中間電壓。 The adaptive two-stage voltage regulator circuit of claim 1, wherein the intermediate voltage control circuit comprises: a subtraction circuit, wherein the indicator signal related to the input voltage is subtracted from the indicator signal related to the output voltage, and the difference is Timing output difference, when the difference is negative, it does not output or output zero; the conversion circuit converts the positive difference value into a voltage signal; the adding circuit adds the voltage signal converted by the positive difference value to a third reference signal The second reference signal is determined, and the second reference signal is supplied to the voltage regulating circuit to adjust the intermediate voltage. 如申請專利範圍第6項所述之適應性兩階段穩壓電路,其中該中間電壓控制電路更包含:第一電壓轉電流電路與第二電壓轉電流電路,分別將有關輸入電壓的指標訊號和有關輸出電壓的指標訊號轉換為電流訊號,輸入該減法電路。 The adaptive two-stage voltage regulator circuit of claim 6, wherein the intermediate voltage control circuit further comprises: a first voltage-to-current circuit and a second voltage-to-current circuit, respectively, respectively, the indicator signals related to the input voltage and The index signal about the output voltage is converted into a current signal, and the subtraction circuit is input. 一種兩階段穩壓電路之控制方法,包含:根據一輸入電壓(Vin)而產生一中間電壓(Vm),其中該輸入電壓小於或等於一最大值(Vin_max); 根據該中間電壓而產生一輸出電壓(Vout);接收(1)有關輸入電壓的指標訊號,和以下兩者之一:(2a)有關輸出電壓的指標訊號,或(2b)預設的第一參考訊號;以及根據接收的訊號來調整中間電壓,其中「有關輸入電壓的指標訊號」和「有關輸出電壓的指標訊號或預設的第一參考訊號」決定一第二參考訊號,且該第二參考訊號係供應給該電壓調節電路,以使得當輸入電壓小於或等於輸出電壓時:Vm=Vout+ΔV,且(Vout+ΔV)<Vin_max,其中ΔV為一電壓差。 A method for controlling a two-stage voltage stabilizing circuit, comprising: generating an intermediate voltage (Vm) according to an input voltage (Vin), wherein the input voltage is less than or equal to a maximum value (Vin_max); Generating an output voltage (Vout) according to the intermediate voltage; receiving (1) an indicator signal related to the input voltage, and one of: (2a) an indicator signal related to the output voltage, or (2b) a preset first a reference signal; and adjusting the intermediate voltage according to the received signal, wherein the "indicator signal related to the input voltage" and the "indicator signal related to the output voltage or the preset first reference signal" determine a second reference signal, and the second The reference signal is supplied to the voltage regulating circuit such that when the input voltage is less than or equal to the output voltage: Vm = Vout + ΔV, and (Vout + ΔV) < Vin_max, where ΔV is a voltage difference. 如申請專利範圍第8項所述之兩階段穩壓電路之控制方法,其中當輸入電壓大於輸出電壓時,該中間電壓為單階或多階步進形狀。 The control method of the two-stage voltage stabilizing circuit as described in claim 8, wherein the intermediate voltage is a single-order or multi-step step shape when the input voltage is greater than the output voltage. 如申請專利範圍第8項所述之兩階段穩壓電路之控制方法,其中當輸入電壓大於輸出電壓時,Vm=Vin+ΔV,其中ΔV為該電壓差。 The control method of the two-stage voltage stabilizing circuit according to claim 8, wherein when the input voltage is greater than the output voltage, Vm=Vin+ΔV, wherein ΔV is the voltage difference. 如申請專利範圍第8項所述之兩階段穩壓電路之控制方法,其中該調整中間電壓的步驟包含:將「有關輸入電壓的指標訊號」和「有關輸出電壓的指標訊號或預設的第一參考訊號」相比較;以及根據比較器的比較結果,決定一第二參考訊號,且該第二參考訊號係供應給電壓調節電路。 The method for controlling a two-stage voltage stabilizing circuit as described in claim 8 wherein the step of adjusting the intermediate voltage comprises: "indicating the signal signal about the input voltage" and "the indicator signal of the output voltage or the preset number" A reference signal is compared; and a second reference signal is determined based on the comparison result of the comparator, and the second reference signal is supplied to the voltage regulating circuit. 如申請專利範圍第9項所述之兩階段穩壓電路之控制方法,其中該調整中間電壓的步驟包含:將有關輸入電壓的指標訊號減去有關輸出電壓的指標訊號,當其差值為正時輸出差值,差值為負時則不輸出或輸出零; 將正差值轉換為電壓訊號;以及將正差值所轉換之電壓訊號與一第三參考訊號相加,以決定該第二參考訊號,並將該第二參考訊號供應給電壓調節電路,藉以調整中間電壓。 The method for controlling a two-stage voltage stabilizing circuit as described in claim 9, wherein the step of adjusting the intermediate voltage comprises: subtracting an index signal related to the output voltage from an index signal related to the input voltage, when the difference is positive The output difference is not output or output zero when the difference is negative; Converting the positive difference value into a voltage signal; and adding the voltage signal converted by the positive difference value to a third reference signal to determine the second reference signal, and supplying the second reference signal to the voltage regulating circuit, thereby Adjust the intermediate voltage. 如申請專利範圍第9項所述之兩階段穩壓電路之控制方法,其中該調整中間電壓的步驟包含:在減去步驟前,將有關輸入電壓的指標訊號和有關輸出電壓的指標訊號轉換為電流訊號。 The method for controlling a two-stage voltage stabilizing circuit according to claim 9, wherein the step of adjusting the intermediate voltage comprises: converting the index signal about the input voltage and the index signal related to the output voltage to Current signal.
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