201135389 六、發明說明： 【發明所屬之技術領域】 ‘本發明翁有關一種適應性兩階段穩壓電路（％如& Regulator)及其控制方法，特別是指一種根據輪入電壓與輸出 電壓間的_而聽性地調整巾間電壓，以求節約能耗的^應 性兩階段穩壓電路與控制方法。 … 【先前技術】 請參閱第1圖’因應某些應用的需求，在電源供應裝置 中需要進行兩階段的電壓調節’先將輸入電屋Vin轉換成中間 ，壓Vm，再轉換成輸出電壓v〇ut。目的是透過第一級電壓調 郎電路10 ’以求高效率轉換電壓，再透過第二級線性麵 電路2〇 ’以求過遽中間電壓Vm中的漣波雜訊。例如 3路為主動矩陣式有機發光二極體(AM0LED)時，即^可 能需要使用此種兩階段的穩壓電路。 以負載電路為AM0LED為例，在其中—種應用場合中， :需的輸出電壓Vout為4.6V，輸入電壓Vin為電池電壓，可 =2.5〜4.8V間變化，而電壓調節電路1〇為升麗轉換電路。 ==第2圖’因輸入電壓vin有可能為48v，為確保升壓 外路能正常工作，因此將電壓調節電路的輸出電壓Vm 3^e49V (升壓轉換電路的輸出電壓必須大於輸入電壓； =，Vm设定為4 8ν或以下，則當輸入電壓為谢 沾_壓轉換電路無法工作），再由線性穩麗電路20將4.9V 曰電壓Vm轉換為4.6V的輸出電壓v〇ut。 以上安排中’由圖中可見，當輸入電壓Vin之電壓值為 201135389 增加電 時’將造成4·9ν·4.6ν=〇·3ν的電壓差值Λν， 路的能耗。 H於此，本發日脚崎上魏赌術Μ足， 適應性兩階段穩壓電路與㈣方法，以_能耗。 【發明内容】 本發明目的之—在提供—種適雜兩階段穩壓電路。 本發明的另-目的在提供—種控制兩階段穩壓電路的方 為達上述之目的，就其中一個觀點言，本發明提供了一 種適應性兩階段_電路，包含：一電壓調節電路，根據一輸 入電麗(Vin)i?0產生_巾間電壓(ym)，其巾該輸人電壓小於或 等於一最大值(Vin—max); —線性穩壓電路，根據該中間電壓 而產生-輸出電壓(Vout);以及-巾間電壓控制電路，其接收 ⑴有關輸人電壓的指標訊號，和以下兩者之—：（2a)有關輸出 電壓的指標峨，或(2聰設的參考訊號，並根據所接收訊號 來調整中間f壓’以使得當輸人電壓小於或等於輸出電壓時： 乂111=¥〇以+么乂，且(乂〇也+^¥)<乂11111^\。 就另一個觀點言，本發明提供了一種兩階段穩壓電路之 控制方法，包含：根據一輸入電壓(Vin)而產生一中間電壓 (Vm) ’其中該輸入電壓小於或等於一最大值(vin—max);根據 該中間電壓而產生一輸出電壓(Vout);接收(1)有關輸入電壓的 指標訊號，和以下兩者之一 ：（2a)有關輸出電壓的指標訊號， 或(2b)預設的參考訊號；以及根據接收的訊號來調整中間電 壓，以使得當輸入電壓小於或等於輸出電壓時：Vm=v〇ut + △\^，且(\^01^ + ^\^<\^11_11^\。 201135389 上述之適應性兩階段穩壓電路或其控制方法中，者 電壓大於輸出賴時，可令該中間電壓為單階❹^進形 狀、或不規則形狀、或令Vm=vin+Av。 心賴為單階或多階步進形狀時，可將有關輸入電壓 的沾錢⑴和有關輸出電壓的指標訊號㈣或預設的參考 訊號(2b)相比較’並根據比較結果選擇-參考電壓，供應給電 壓調節電路。 〜€ 當Vm=Vin+AV時’在其中一種實施型態中，可將％ 指標與y〇ut指標轉換為電流訊號，再以vin指標減去伽指 標。所得正差值再轉換為電壓訊號後，疊加於一參考電壓上， 供應給電壓調節電路。 底下藉由具體實施例詳加#更容易瞭解本發明之 目的、技術内容、特點及其所達成之功效。 【實施方式】 請參閱第3圖之第-實施例’為便於與第2圖對照，在 此假設輸入電壓Vin在2.5〜4.8V間變化，而所需要的^出電 壓Vout為4.6V ’事實上同樣概念可適用於所有電壓範圍，亦 即輸出電壓Vout不必須為4.6V，而輸入電壓的最大值⑺狀 不必須為4.8V。 如第3圖所示’本實施例的重點在於，使中間電壓* 根據輸入電壓Vin與輸出電壓Vout而適應忮地變化，當輸入 電壓Vin小於或等於輸出電壓vout時，中間電壓Vm 輸 .出電壓Vout加上一個儘可能小的電壓差△▽，所謂儘可能小= 電壓差 ΔΥ 意指：（Vout+Δν) < Vin max，例如△▽= 〇 iv . 而當輸=電壓Vin大於或等於輸出電壓Vout時，中間電壓Vm 201135389 等於輸入縣Vin加上該電壓差Δν，以上所述可表示如下. Vm=V〇Ut+AV且⑽叫㈣^^職，若201135389 VI. Description of the invention: [Technical field to which the invention pertains] 'The invention relates to an adaptive two-stage voltage regulator circuit (% such as & Regulator) and its control method, in particular, a method according to a wheel-in voltage and an output voltage _ and listen to adjust the voltage between the towels, in order to save energy consumption of the two-stage voltage regulator circuit and control method. ... [Prior Art] Please refer to Figure 1 'In response to the needs of some applications, two-stage voltage regulation is required in the power supply unit.' First, convert the input electric house Vin into the middle, press Vm, and convert to the output voltage v. 〇ut. The purpose is to pass the first-stage voltage modulating circuit 10' for high-efficiency switching voltage, and then pass through the second-stage linear surface circuit 2'' to obtain chopping noise in the intermediate voltage Vm. For example, when the three-way is an active matrix organic light-emitting diode (AM0LED), it may be necessary to use such a two-stage voltage stabilizing circuit. Taking the load circuit as the AM0LED as an example, in one of the applications, the required output voltage Vout is 4.6V, the input voltage Vin is the battery voltage, and the voltage can be changed between 2.5 and 4.8V, and the voltage regulating circuit is 1 liter. Li conversion circuit. ==Fig. 2 'Because the input voltage vin may be 48v, in order to ensure that the boost external circuit can work normally, the output voltage of the voltage regulating circuit is Vm 3^e49V (the output voltage of the boost converter circuit must be greater than the input voltage; =, Vm is set to 4 8 ν or below, then when the input voltage is Xie _ _ voltage conversion circuit can not work), then the linear stability circuit 20 converts 4.9V 曰 voltage Vm to 4.6V output voltage v 〇ut. In the above arrangement, it can be seen from the figure that when the voltage value of the input voltage Vin is increased by 201135389, the voltage difference Λν of 4·9ν·4.6ν=〇·3ν will be caused. In this case, this is the day of the footsteps of the Wei gambling, the adaptive two-stage voltage regulator circuit and (four) method to _ energy consumption. SUMMARY OF THE INVENTION The object of the present invention is to provide a suitable two-stage voltage regulator circuit. Another object of the present invention is to provide a two-stage voltage regulator circuit for the above purposes. In one aspect, the present invention provides an adaptive two-stage _circuit comprising: a voltage regulating circuit, An input voltage (Vin) i?0 generates a gap voltage (ym), the input voltage of the towel is less than or equal to a maximum value (Vin-max); - a linear voltage regulator circuit, according to the intermediate voltage - Output voltage (Vout); and - the voltage control circuit between the towels, which receives (1) the indicator signal of the input voltage, and the following two: - (2a) an indicator of the output voltage 峨, or (2 a confiscated reference signal And adjust the intermediate f voltage ' according to the received signal so that when the input voltage is less than or equal to the output voltage: 乂111=¥〇++乂, and (乂〇+^¥)<乂11111^\ In another aspect, the present invention provides a method for controlling a two-stage voltage regulator circuit, comprising: generating an intermediate voltage (Vm) according to an input voltage (Vin), wherein the input voltage is less than or equal to a maximum value ( Vin-max); generate an output according to the intermediate voltage Voltage (Vout); receiving (1) an indicator signal related to the input voltage, and one of the following: (2a) an indicator signal related to the output voltage, or (2b) a preset reference signal; and adjusting according to the received signal The intermediate voltage is such that when the input voltage is less than or equal to the output voltage: Vm=v〇ut + Δ\^, and (\^01^ + ^\^<\^11_11^\. 201135389 The above adaptive two-stage In the voltage stabilizing circuit or the control method thereof, when the voltage is greater than the output, the intermediate voltage may be a single-order shape, or an irregular shape, or Vm=vin+Av. The focus is on single-order or multi-step. When stepping the shape, the input voltage can be compared with the indicator signal (4) of the output voltage or the preset reference signal (2b) and the voltage can be supplied to the voltage regulation circuit according to the comparison result. € When Vm=Vin+AV' In one of the implementations, the % indicator and the y〇ut indicator can be converted into a current signal, and the gamma indicator is subtracted from the vin indicator. The resulting positive difference is converted to a voltage signal. , superimposed on a reference voltage, supplied to the voltage regulation circuit. The purpose, technical content, features, and effects achieved by the present invention are more readily understood by the detailed description of the specific embodiments. [Embodiment] Please refer to the third embodiment of the third embodiment for comparison with the second figure. Here, it is assumed that the input voltage Vin varies between 2.5 and 4.8V, and the required voltage Vout is 4.6V. In fact, the same concept can be applied to all voltage ranges, that is, the output voltage Vout does not have to be 4.6V. The maximum value (7) of the input voltage does not have to be 4.8 V. As shown in Fig. 3, the focus of this embodiment is to make the intermediate voltage* adapt to the change in the input voltage Vin and the output voltage Vout, when the input voltage Vin is smaller than Or equal to the output voltage vout, the intermediate voltage Vm is output voltage Vout plus a voltage difference Δ▽ as small as possible, so-called as small as possible = voltage difference ΔΥ means: (Vout + Δν) < Vin max, for example △ ▽ = 〇iv . When the input voltage=Vin is greater than or equal to the output voltage Vout, the intermediate voltage Vm 201135389 is equal to the input county Vin plus the voltage difference Δν, which can be expressed as follows. Vm=V〇Ut+AV and (10) Called (four) ^^ job, if
Vm=Vin+AV，若 Vin>Vout 第3圖所7F為最節省能耗的方式，但本發明並不侷限於 此’當輸入電M Vin大於輸出電壓v〇ut時，中間電壓Vm不' -定必須等於輸人電壓Vin加上電壓差Δν，而例如可為第4 圖或第5圖所示的單階或多階步進形狀；將第4圖或第5圖與 第2圖比較，仍然較為節省能耗。甚至，在輸人電壓％大於 輸出電壓Vbut的區射.，巾間賴Vm可以為其他任意不規 則的圖形，例如第6圖所示。 以上各實施例的硬體實施方式如第7圖，除了電壓調節電 路ίο與線性穩壓電路20外，另設置一個中間電壓(Vm)控制 電路30 ’此Vm控制電路3〇接收有關輸入電壓vin的指標訊 ” indicator ’以下簡稱Vin指標)和有關輸出電壓v〇m的 指標訊號(V〇Ut indicator，以下簡稱編指標），或是預設的參 考訊號，並根據上述訊號來調整中間電壓Vm。所述vin指標 例如可以是輸人龍vin的分壓，或是輸人電壓vin轉成電流 後的電流訊號’亦可以為上述分壓或電航賴倍數或分數 值’當然也可以為電壓Vin的本身；v〇ut指標亦然。預設的參 考訊號則可以為常數，其設定方式容後說明。 因應所欲達成iVm圖形，第7圖電路在硬體上有多種達 成方式，舉例而言，第4圖之Vm圖形例如可以第8圖的硬體 電路來實現’其中假設電壓調節電路1〇為升壓轉換電路(B〇〇st C〇nVerter)’由升壓控制電路11根據反饋訊號FBI與參考電壓 B〇〇st_REF的比較來控制功率開關的操作，以決定中間電壓 Vm，而線性穩壓電路2〇為低壓降穩壓電路(LD〇, L〇w 201135389Vm=Vin+AV, if Vin>Vout is the most energy-saving way in Figure 3, the present invention is not limited to this. When the input power M Vin is greater than the output voltage v〇ut, the intermediate voltage Vm is not ' - must be equal to the input voltage Vin plus the voltage difference Δν, and for example can be the single- or multi-step step shape shown in Figure 4 or Figure 5; compare Figure 4 or Figure 5 with Figure 2 , still save energy. Even in the case where the input voltage % is larger than the output voltage Vbut, the Vm can be any other irregular pattern, as shown in Fig. 6. The hardware embodiment of the above embodiments is as shown in FIG. 7. In addition to the voltage regulating circuit ίο and the linear voltage stabilizing circuit 20, an intermediate voltage (Vm) control circuit 30 is provided. The Vm control circuit 3 receives the relevant input voltage vin. The indicator signal "indicator" is referred to as the Vin indicator) and the index signal (V〇Ut indicator, hereinafter referred to as the index) of the output voltage v〇m, or the preset reference signal, and the intermediate voltage Vm is adjusted according to the above signal. The vin indicator may be, for example, a partial pressure of the input dragon vin, or a current signal after the input voltage vin is converted into a current, or may be the above-mentioned partial pressure or electric yaw multiple or fractional value, of course, may also be a voltage. Vin itself; v〇ut indicator is also the same. The preset reference signal can be a constant, and its setting method is explained later. In order to achieve the iVm graphics, the circuit of Figure 7 can be implemented in multiple ways on the hardware, for example In other words, the Vm pattern of FIG. 4 can be implemented, for example, by the hardware circuit of FIG. 8 , wherein the voltage regulation circuit 1 is assumed to be a boost conversion circuit (B〇〇st C〇nVerter), which is controlled by the boost control circuit 11 B〇〇st_REF comparison voltage is fed with a reference signal FBI to control operation of the power switch to the intermediate voltage Vm of the decision, the linear regulator is a low dropout voltage regulator circuit 2〇 circuit (LD〇, L〇w 201135389
Dr〇P_0ut)，由LDO控制電路21根據反饋訊號FB2與參考電 壓LDO_REF _較來控制功率開關的操作，以決定輸出電壓 伽。細控制電路3〇包含一個比較器31與一傾擇電路办 比較器31將Vin指標與Vout指標比較，或將指標與預設 的參考訊號比較。根據比較器31的輸出，選擇電路35選擇兩 參考電壓REFUREF2之-，作為升壓控制電路„的參考電壓 Boost一REF。對照第8圖與第4圖，假設輸入電壓％在 2.5〜4.8V間變化’而所需要的輸出電壓V()ut為4 6V，則當選 擇電路35選擇兩參考電壓之一時，中間電麗I 等於4.6V加上一個儘可能小的電壓差Δν (例如〇 lv)，當選 擇電路35選擇兩參考電壓REFi，之另一者時，中間電 壓Vm等於4.8V加上該電壓差Δγ。 由上可知’第8圖巾，比較n 31的作用是決定中間電壓 Vm何時跳至下一階，若比較器31的正輸入端為「預設的常 數參考訊號」，則此預設參考訊號應該對應於第4圖中電壓Vm 跳階時的Vin電壓，在本實施例中，若Vin指標/Vin=a， 則預設參考訊號=α · (4.6V)。 第9圖顯示本發明的另一硬體實施例，其中省略繪示電壓 調節電路1G與線性穩壓電路2G，但同樣假魏壓調節電路 10為升壓轉換電路而線性穩壓電路20為低壓降穩壓電路。本 實施例對應於第5圖的Vm圖形，Vm控制電路30中包含多 個比較器31〜33、邏輯電路34、與選擇電路35，其中比較器 31〜33分別將Vin指標與常數預設參考訊號】〜預設參考訊號 3比較’其比較結果經邏輯電路34整合後，決定選擇電路35 應選擇REF1〜REF4中的哪一個，作為參考電壓Β_—腳。 本實施例中的比較潘與參考電壓的數目僅是舉例，可以根據所 201135389 欲的Vm圖形步階數目來蚊；預設參考訊號丨 號3之設定方式與前-實施例相同，應分別對應於;t 壓Vm跳階時的Vin電壓。 5圖中電 第1〇圖顯示本發明的另—實施例’本實施例對庫於第3 圖的細圖形。Vm控制電路％中包含第一電壓轉電流電路 3〇卜第二電壓轉電流電路302、減法電路3〇3 路304、加法電路305。當Vin<v〇ut時，電壓調節電轉路電= 以VREF為參考電壓’此參考電壓恰使電壓調節電路^ 的中間電壓Vm等於4.6V加上電壓差△▽。如圖所示，第』一 電壓轉電流電路301和第二電壓轉電流電路3〇2分別將w指 標與Vout指標轉換為電流訊號；#然，如果Μη指標與^ 指標不是龍峨而本已經是電流職，則可不需要第丄電壓 轉電流電路301和第二電壓轉電流電路3〇2。減法電路3〇3將 %指標㈣所得之電流職減去Vout轉換所得之電流訊 號’但如差值為負則輸出零。電流轉電壓電路3〇4將此差值轉 換為電壓，與參考電壓VREF相加，即可得出所欲的參考電塵 B〇ost_REF ’此參考電壓Βο〇51;_Μι?可產生第3圖的Vm圖形， 當 VinSVout 時，Vm=4.6V+AV;當 Vin>V()ut 時，Vm=Vin+AV。 第10圖的更具體電路有多種達成方式，舉一例如第U 圖，本實施例中更多設置了一個致能開關SW1，可根據訊號 EN來彈性決定是否容許Vm控制電路3〇工作。訊號EN可以 為外部控制訊號、或來自任何來源❶當致能開關SW1導通時， 若Vin>Vout，開關SW2導通，電阻RS1上流過IR1的電流， 而電阻RS3上流過IR3的電流，其中ΙΚ3=(νίη-ν〇ιι_8卜電 阻RS3上產生IR3XRS3的跨壓，疊加在參考電壓vref上， 亦 _Boost一REF=VREF+IR3 xRS3。當 Vin<Vout 時，開關 SW2 201135389 不導通，IR3 為 0，B〇〇st_REF = VREF。 --........ 第11圖實施例中，可以任意設定AV之值；說明如下。 Vm=FB 1 x(RB 1 +RB2)/RB 1 =(Boost_REF)x(RB 1 +RB2)/RB 1 =(VREF+IR3xRS3) x(RB1+RB2)/RB1 =[VREF+(Vin-Vout)xRS3/RS 1 ] x(RB 1 +RB2)/RB 1Dr〇P_0ut), the LDO control circuit 21 controls the operation of the power switch based on the feedback signal FB2 and the reference voltage LDO_REF_ to determine the output voltage gamma. The fine control circuit 3A includes a comparator 31 and a switching circuit comparator 31 for comparing the Vin index with the Vout indicator or comparing the index with a preset reference signal. According to the output of the comparator 31, the selection circuit 35 selects the two reference voltages REFUREF2 as the reference voltage Boost_REF of the boost control circuit „. In comparison with Figs. 8 and 4, the input voltage % is assumed to be between 2.5 and 4.8V. The change 'and the required output voltage V() ut is 4 6V, then when the selection circuit 35 selects one of the two reference voltages, the intermediate voltage I is equal to 4.6V plus a voltage difference Δν as small as possible (eg 〇 lv) When the selection circuit 35 selects the other two reference voltages REFi, the intermediate voltage Vm is equal to 4.8 V plus the voltage difference Δγ. From the above, the figure 8 is used to compare the role of n 31 to determine the intermediate voltage Vm. Jumping to the next stage, if the positive input terminal of the comparator 31 is "preset constant reference signal", the preset reference signal should correspond to the Vin voltage when the voltage Vm is skipped in FIG. 4, in this embodiment. If the Vin indicator /Vin=a, the preset reference signal = α · (4.6V). Figure 9 shows another hardware embodiment of the present invention, in which the voltage regulating circuit 1G and the linear voltage stabilizing circuit 2G are omitted, but the pseudo-ween voltage adjusting circuit 10 is a boost converting circuit and the linear voltage stabilizing circuit 20 is a low voltage. Drop the voltage regulator circuit. This embodiment corresponds to the Vm pattern of FIG. 5, and the Vm control circuit 30 includes a plurality of comparators 31 to 33, a logic circuit 34, and a selection circuit 35, wherein the comparators 31 to 33 respectively refer to the Vin index and the constant preset reference. The signal]~preset reference signal 3 compares 'the comparison result is integrated by the logic circuit 34, and it is determined which one of REF1~REF4 should be selected by the selection circuit 35 as the reference voltage Β_- foot. The number of comparison pans and reference voltages in this embodiment is only an example, and the number of Vm pattern steps according to the 201135389 may be used for mosquitoes; the preset reference signal nickname 3 is set in the same manner as the previous embodiment, and should be respectively corresponding to The voltage of Vin at the voltage step of Vm. Figure 5 is a diagram showing a further embodiment of the present invention. The present embodiment is a detailed diagram of the third embodiment. The Vm control circuit % includes a first voltage-to-current circuit 3, a second voltage-to-current circuit 302, a subtraction circuit 3〇3 path 304, and an adder circuit 305. When Vin < v 〇 ut, the voltage regulating electric circuit power = VREF as the reference voltage 'this reference voltage is such that the intermediate voltage Vm of the voltage regulating circuit ^ is equal to 4.6V plus the voltage difference Δ▽. As shown in the figure, the first voltage-to-current circuit 301 and the second voltage-to-current circuit 3〇2 respectively convert the w index and the Vout index into a current signal; #然, if the Μη indicator and the ^ indicator are not dragons, In the case of current, the second voltage to current circuit 301 and the second voltage to current circuit 3〇2 are not required. The subtraction circuit 3〇3 subtracts the current signal obtained by the % indicator (4) from the current signal obtained by the Vout conversion, but outputs zero if the difference is negative. The current-to-voltage circuit 3〇4 converts the difference into a voltage and adds it to the reference voltage VREF to obtain the desired reference dust B〇ost_REF 'this reference voltage Βο〇51;_Μι? can generate the third figure Vm graph, when VinSVout, Vm=4.6V+AV; when Vin>V()ut, Vm=Vin+AV. More specific circuits of Fig. 10 can be implemented in various ways. For example, in the U-th diagram, in this embodiment, an enable switch SW1 is further provided, and the Vm control circuit 3 can be flexibly determined according to the signal EN. The signal EN can be an external control signal, or from any source. When the enable switch SW1 is turned on, if Vin > Vout, the switch SW2 is turned on, the current flowing through the IR1 on the resistor RS1, and the current flowing through the IR3 on the resistor RS3, where ΙΚ3= (νίη-ν〇ιι_8 卜 resistor RS3 generates IR3XRS3 cross-voltage, superimposed on the reference voltage vref, also _Boost_REF=VREF+IR3 xRS3. When Vin <Vout, the switch SW2 201135389 is not conducting, IR3 is 0, B〇〇st_REF = VREF. --........ In the embodiment of Fig. 11, the value of AV can be arbitrarily set; the description is as follows: Vm = FB 1 x (RB 1 + RB2) / RB 1 = ( Boost_REF)x(RB 1 +RB2)/RB 1 =(VREF+IR3xRS3) x(RB1+RB2)/RB1 =[VREF+(Vin-Vout)xRS3/RS 1 ] x(RB 1 +RB2)/RB 1
Vout=FB2 x(RB 1 +RB2/K)/RB 1 =(VREF)x(RB 1 +RB2/K)/RB 1 因此，如欲將AV設定為0.1 V ,可藉由適當安排各電阻的 阻值來達成，例如將Κ設定為ΚΒ2/(ΚΒ2-〇.1χΚΒΐ)，並適切安 排電阻RS1〜RS3的阻值。 以上已針對較佳實施例來說明本發明，唯以上所述者， 僅係為使熟悉本技術者易於了解本發明的内容而已，並非用 來限定本發明之權利範圍。在本發明之相同精神下，熟悉本 技術者可以思及各種等效變化。例如，各實施例中，可插置 不衫響主要功能的其他電路或元件，例如第圖中可插置比 例電路、類比數位轉換器與數位類比轉換器等；又如，第一 級電壓調節·稀於為聽轉觀路喝可域他切換式電 壓轉換電路。因此，本發明的範圍應涵蓋上述及其他所 效變化。 【圖式簡單說明】 電路的示意電路圖。 Vin、中間電壓vm、輪出 第1圖示出先前技術之兩階段穩壓 第2圖示出先前技術中，輸入電壓 電壓Vout之間的關係。 第.3,圖示出本發_幾個實施例，其中顯示輸入電壓％、 201135389 中間電壓Vm、輸出電壓Vout之間的關係。 … 第7圖以示意電路圖顯示本發明之適應性兩階段穩壓電路。 第8圖舉例示出對應於第4圖的硬體實現方式。 第9圖舉例示出對應於第5圖的硬體實現方式。 第10圖舉例示出對應於第3圖的硬體實現方式。 第11圖舉例示出第10圖電路的更具體實現方式。 【主要元件符號說明】 10電壓調節電路· 11升壓控制電路 20線性穩壓電路 21 LDO控制電路 30中間電壓控制電路 31,32,33比較器 34邏輯電路 35選擇電路 301第一電壓轉電流電路 302第二電壓轉電流電路 303減法電路 304電流轉電壓電路 305加法電路 RB1，RB2, RB2/K，RS1, RS2, RS3 電阻 SW1，SW2 開關Vout=FB2 x(RB 1 +RB2/K)/RB 1 =(VREF)x(RB 1 +RB2/K)/RB 1 Therefore, if AV is to be set to 0.1 V, the resistors can be appropriately arranged. The resistance is achieved, for example, Κ is set to ΚΒ2/(ΚΒ2-〇.1χΚΒΐ), and the resistance values of the resistors RS1 to RS3 are appropriately arranged. The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. In the same spirit of the invention, various equivalent changes can be conceived by those skilled in the art. For example, in various embodiments, other circuits or components that do not play the main function may be inserted, such as an interpolable proportional circuit, an analog-to-digital converter, and a digital analog converter in the figure; for example, a first-stage voltage regulation · Rare to listen to the road to drink the domain switchable voltage conversion circuit. Therefore, the scope of the invention should be construed as covering the above and other modifications. [Simple diagram of the diagram] Schematic diagram of the circuit. Vin, intermediate voltage vm, wheeling Fig. 1 shows a two-stage voltage regulation of the prior art. Fig. 2 shows the relationship between the input voltage voltages Vout in the prior art. The third embodiment shows a relationship between the input voltage %, the 201135389 intermediate voltage Vm, and the output voltage Vout. ... Figure 7 shows an adaptive two-stage voltage regulator circuit of the present invention in a schematic circuit diagram. Fig. 8 exemplifies a hardware implementation corresponding to Fig. 4. Fig. 9 exemplifies a hardware implementation corresponding to Fig. 5. Fig. 10 exemplifies a hardware implementation corresponding to Fig. 3. Figure 11 illustrates a more specific implementation of the circuit of Figure 10 by way of example. [Main component symbol description] 10 voltage regulating circuit · 11 boosting control circuit 20 linear voltage stabilizing circuit 21 LDO control circuit 30 intermediate voltage control circuit 31, 32, 33 comparator 34 logic circuit 35 selection circuit 301 first voltage to current circuit 302 second voltage to current circuit 303 subtraction circuit 304 current to voltage circuit 305 addition circuit RB1, RB2, RB2 / K, RS1, RS2, RS3 resistance SW1, SW2 switch