TWI433449B - Method and apparatus for estimating the step-size of an adaptive equalizer - Google Patents

Description

Adaptive equalizer step estimation method and device

The present invention relates to an adaptive equalizer that is incorporated into a transceiver such as a wireless transmit/receive unit (WTRU). More particularly, the present invention relates to updating the adaptive equalizer based on the channel apparent speed (i.e., the observed and/or measured rate of channel impulse response changes) established between the transceiver and another transceiver. At least one filter tap coefficient is used.

For example, a normalized least mean square (NLMS)-based receiver adaptive equalizer-based receiver provides cross-frequency duplex (FDD) high-speed downlink packet access on a Rake receiver. The superior performance of high data rate services (HSDPA) or code division multiple access (CDMA) 2000 Evolutionary Data Voice (EV-DV). A typical normalized minimum mean square receiver includes an adaptive equalizer having an equalizer filter and a tap coefficient generator for generating filter coefficients used to update the equalizer filter Tap coefficient. The equalizer filter is typically a finite impulse response (FIR) filter.

The adaptive step size parameter μ ("mu") in the adaptive equalization algorithm controls the equalizer filter convergence rate. The adaptive step size parameter μ is a threshold parameter that affects the performance of the adaptive equalizer. The adaptive step size parameter μ is typically defined or changed in a decisive manner prior to the equalizer filter operation. The step size is an iterative (loop) algorithm that attempts to converge to certain points, such as Least Mean Square (LMS), which normalizes the size of each step in the least mean square. Large step sizes help the short-term adaptive equalizer converge (in the most accurate way possible), but if the step size is small, the adaptive equalizer will converge more accurately. Therefore, there is a permutation relationship between fast and precise convergence. The ideal balance between convergence speed and precision depends on how fast the visual algorithm tries to converge to that point. The convergence time is inversely related to the adaptive step size parameter μ. Therefore, with larger steps, convergence can be obtained quickly.

However, large step sizes may result in false adjustment errors that affect the original bit error rate (BER) performance of the adaptive equalizer. Since the step size used is approximately the closest, the points on the vector may reach the expected point, so the error adjustment error will never be fully achieved due to the minimum mean square convergence.

The present invention is a step size estimator that controls the adaptive equalizer step size incorporated into a transceiver, such as a wireless transmit/receive unit. The step size estimator can update at least one adaptive equalizer tap point used by the adaptive equalizer based on the apparent speed of the channel established between the transceiver and the other transceiver. The step size estimator can include a speed estimator, a signal to noise ratio (SNR) averager, and a one step length mapping unit. The velocity estimator is used to estimate the apparent velocity of the channel (i.e., the observed and/or measured rate of channel impulse response changes). The signal noise ratio averager can generate a common pilot channel (CPICH) signal noise ratio estimate. The step size mapping unit can use the speed estimation and the common pilot channel signal noise ratio estimation to generate a step parameter μ and a filter tap point leakage factor parameter α used by the adaptive equalizer to update the filtered tap point coefficients.

Hereinafter, the term "wireless transmitting/receiving unit" is used to include, but is not limited to, user equipment (UE), mobile stations, fixed or mobile subscriber units, pagers, or any other type of components operable in a wireless environment. .

Hereinafter, the term "transceiver" is used to include, but is not limited to, a base station, a WTRU, a Node B, an access point (AP), or any other that receives a signal from or transmits a signal to another transceiver. Wireless communication device.

Hereinafter, when referred to as "apparent channel speed" and "channel apparent speed" nouns include, but are not limited to, being established in a first transceiver (such as a wireless transmission/reception unit, a base station, or the like) and at least The observed and/or measured rate of channel impulse response changes between other transceivers. Channel impulse response changes may result from movement of one or more transceivers, oscillator errors occurring in at least one transceiver, and movement of objects in an environment in at least one transceiver operation.

The features of the invention may be incorporated into an integrated circuit (IC) or in a circuit comprising a plurality of interconnected components.

The invention controls the step adaptation of the adaptive equalizer. The adaptation step size μ is the video channel change rate (such as Doppler spread spectrum related to the WTRU speed) and the channel signal noise ratio. For fast channels, it is better to use larger steps to encourage the adaptive equalizer to quickly track channel variations. Conversely, for slower channels, lower step sizes are expected to reduce false adjustment errors and improve adaptive equalizer performance.

The adaptive step size parameter μ-view signal noise ratio is determined by the signal-to-noise ratio, and the adaptive step size parameter μ value tends to be higher. At the low signal-to-noise ratio, the adaptive step size parameter μ is usually small. Additional inputs can also be used as appropriate (eg delay spread spectrum and active tap points in adaptive filters). The present invention is used to maintain an ideal balance between convergence speed and accuracy via apparent channel speed.

1A is a block diagram of an example of a step size estimator 100 comprising an apparent channel velocity estimator 101 configured in accordance with an embodiment of the present invention.

Referring to FIG. 1B, the step size estimator 100 can control the step size of the adaptive equalizer 50 that is incorporated into the first transceiver 150. The at least one filter tap coefficient 102 used by the adaptive equalizer 50 is updated based on the apparent speed of the channel 155 established between the first transceiver 150 and the second transceiver 160. The adaptive filter 50 includes an equalizer tap point update unit 10, a finite impulse response filter 12 and an update vector generator 16. The step size estimator 100 provides a one step length μ ("mu") parameter 142 and a filter tap point leakage factor a to the equalizer tap point update unit 10. Conversely, the equalizer tap update unit 10 generates an equalizer filter tap coefficient 102 that is fed to the step size estimator 100 and the finite impulse response filter 12.

When the second transceiver 160 transmits a signal to the first transceiver 150 on the channel 155, the transmitted signal is routed to the finite impulse response filter 12 in the adaptive equalizer 50 of the first transceiver 150. 155 use (or modify). The finite impulse response filter 12 may filter the signal and define a filtered impulse response that is after the equalized output 14 of the finite impulse response filter 12 is fed to the update vector generator 16 by the equalizer tap point update unit The resulting equalizer filter tap coefficient 102 is defined. The update vector generator 16 may generate a vector containing the equalizer filter tap point coefficient 102 that is fed to the equalizer tap point update unit 10 to update the equalizer filter tap point coefficient 102. Error signal 18.

As shown in FIG. 1A, the step size estimator 100 includes an apparent channel speed estimator 101, a one-step mapping unit 140, and a signal noise ratio averager 145. As shown in FIG. 1B, the apparent channel speed estimator 101 can estimate the channel 155 speed established between the first transceiver 150 and the second transceiver 160 including the step size estimator 100. The equalizer filter tap coefficient 102 is input to the apparent channel speed estimator 101 by the equalizer tap point updating unit 10. The equalizer filter tap coefficient 102 is a complex value that is multiplied by the input sample sequence in the adaptive filter 50. The output of the equalizer tap point update unit 10 is generated by finding the product within the two vectors. One vector is the tapped delay line (TDL) state (output) in the equalizer tap point update unit 10, and the other vector is the equalizer filter used by the equalizer tap point update unit 10. A vector of tap coefficients 102 (or their conjugates).

Referring to FIG. 1A, the apparent channel velocity estimator 101 includes a tap coefficient extractor 104, an angle calculator 108, a tapped delay line 116, a phase difference function generator 120, and an averaging filter. 124, a normalization unit 128, a delay calculator 132 and a speed mapping unit 136.

According to the present invention, the speed information is retrieved from the filter coefficient history data used by the equalizer tap point updating unit 10. This procedure is feasible because the equalizer tap point update unit 10 adaptively estimates the minimum mean square error (MMSE) solution to detect a reference signal such as a pilot signal. In doing so, the final equalizer tap update unit 10 will approach the channel reversal. The speed estimate is performed by tracking one or more filtered tap value change rates used by the equalizer tap update unit 10 that reflects the channel change rate (i.e., its apparent speed).

The tap coefficient extractor 104 can extract at least one tap coefficient from the equalizer filter tap coefficient 102 received from the equalizer tap point update unit 10, and transmit the extracted tap point Coefficient 106 to angle calculator 108.

A typical channel impulse response can typically be characterized by a (separated) delay and a finite set of metric pulses. Each location of these pulses is referred to as a path (ie, a "multipath" channel). The position and average power of each of the paths relative to the first effective tap point (FSP) determine the position and size of the equalizer tap point weight.

The extracted tap coefficient 106 may be a coefficient corresponding to the first valid tap point, the most efficient path (MSP), the number of tap points, or any other path. The extracted tap coefficient 106 includes a complex number and has an amplitude and a phase (or the same angular value). The angle calculator 108 outputs only the phase 110 of the tap point coefficient 106 that is captured to the tapped delay line 116 and the phase difference function generator 120.

The length of the tapped delay line 116 can be greater than N (i.e., not all delays must have tap points). The length of the tapped delay line 116 must be at least D(N), which corresponds to the tap point having the longest delay from the input of the tapped delay line 116. The delay from input to tapped delay line 116 to output n (0 < n < N + 1) will be D(n). The tapped delay line 116 is comprised of the input transition data consisting of a delay below the first clock cycle and a delay below the successive clock cycle. The tapped delay line 116 operates in a similar shift register mode.

The delay 114 vector D(k) including the N delay values D(1)...D(N) is input to the tapped delay line 116. The tapped delay line 116 generates an N-delayed sample 118, X(i-D(k)), k=1...N, based on the vector of the delay 114 and the phase 110 of the tapped point coefficient 106. The indicator variable "i" is taken as a time indicator and then compressed.

The phase difference function generator 120 can be tapped by the N-delay samples 118 output by the delay line 116 and the phase 110 output by the angle calculator 108 to generate N samples of the self-correlation phase difference function. More specifically, the N phase difference function value 122 is generated, one for delaying the respective components of the 114 vector. The preferred function is | pi -| phase (1) - phase ( n )||, where |x| = the absolute value of x, but other functions can be used.

The averaging filter 124 may average the N phase difference function value 122 to produce an average phase difference function vector 126 having a complex composition, avg_phase_dif(k), k=1...N. The averaging filter 124 is essentially a fixed low pass filter, such as a moving average filter or a simple wireless pulse (IIR) filter bank.

The normalization unit 128 may normalize the average phase difference function vector 126 composition to produce a normalized phase difference function vector 130 having a complex composition. The measurement system is normalized to a measurement function value at a small delay. The first component of the average phase difference function vector 126 is used to divide all of the components in the average phase difference function vector 126 to complete the normalization process. The first component of the average phase difference function vector 126 corresponds to the minimum delay in the tapped delay line 116, which is preferably selected such that any phase difference between the first component of the phase 110 and the N delay sample 118 is due only to noise. The random phase change due to noise is not compensated for by channel changes.

For example, the normalization is composed of the first component divided by the average phase difference function vector 126 as follows: norm_phase_dif(k)=avg_phase_dif(k)/avg_phase_dif(1), k=1...N, where avg_phase_dif is The vector of the average phase difference function value.

The components of the normalized phase difference function vector 130 then generate a delay by the delay calculator 132 compared to the threshold. The normalized phase difference function vector 130 is a decrementing number vector (at least the first two) starting with 1.0 for a correspondingly decreasing curve sample (at least close to the origin).

The purpose of the delay calculator 132 is to estimate the distance (time/delay representation) across the value of the threshold. If the threshold is greater than the minimum of the normalized phase difference function vector 130, then the estimate is performed using linear interpolation. If the threshold is less than the minimum of the normalized phase difference function vector 130, then the estimate is performed using linear extrapolation. Output 134 is the position (delay) of the curve across the threshold. The threshold is determined empirically based on a curve similar to that shown in Figure 4.

Threshold delay 134 is mapped to speed estimate 138 by velocity mapping unit 136 in accordance with a predetermined mapping function. The signal noise ratio averager 145 in the step size estimator 100 can collectively direct the channel signal noise ratio input 147 to generate a common pilot channel signal noise ratio estimate 146, and the common pilot channel signal noise ratio The estimate 146 is passed to the step size mapping unit 140. The speed estimate 138 and the common pilot channel signal noise ratio estimate 146 are then mapped by the step size mapping unit 140 to the step size μ parameter 142 and the filter tap point leakage factor a parameter 144 to the equalizer tap point update unit 10. .

The mapping from speed and signal to noise ratio is determined empirically. The receiver performance is simulated by various speed and signal noise ratio step ("mu") parameters 142 and filter tap leakage factor alpha parameters 144 various values. For each speed and signal-to-noise ratio, the μ and alpha values are determined by selecting the optimal performance (such as the lowest block error rate (BER) or the highest output). Once the relationship between {speed, signal noise ratio} and {μ,α} is determined for the analog point, the more general function can be found by the traditional two-factor (2-D) curve adaptation technique. Referring to the lookup table (LUT) or both, once the equation is established, the mapping procedure can be implemented directly by executing the equation (or its approximation).

The filter tap point leakage factor α is defined as follows:

Where α indicates no tap point leakage. When the filter tap point leakage factor α is not expected to be calculated (that is, it is "selective"), α is set to exactly one. Based on the speed estimate 138 and the common pilot channel signal noise ratio estimate 146, the μ parameter 142 and the alpha parameter 144 are selected.

The filter coefficient adaptation in the same mean mean square algorithm can be written:

Where vector Representing the current value of the filter coefficient used by the equalizer tap point update unit 10, Representing the new value of the filter coefficient used by the equalizer tap point update unit 10, and the vector The error signal is generated as part of the minimum mean square algorithm of the equalizer tap update unit 10. The equalizer tap point update unit 10 can generate a filter tap point coefficient 102 having a vector signal of L composition, where L is equal to the number of tap points.

Figure 2 is a block diagram of an example of a step size estimator 200 in accordance with another embodiment of the present invention. The step size estimation is performed using a common pilot channel signal noise ratio estimate and an apparent channel speed estimate, which is mapped to the step size μ and the filter tap point leakage factor a based on the current channel conditions. The common pilot channel signal noise ratio estimation and apparent channel speed estimation can be obtained via a single path or path combination (ie, the first effective tap point, the most efficient path, or the like).

Referring to FIG. 2, the step size estimator 200 includes a common pilot channel signal noise ratio estimator 202, an apparent channel speed estimator 204, a one-step mapping unit 140, a delay buffer 214, and an adder. 215, an interpolator 216 and a code tracking loop (CTL) 222.

The common pilot channel signal noise ratio estimator 202 can be generated based on the on-time sample sequence 218 of the currently tracked path to generate a common pilot channel signal noise ratio estimate 203. The step size estimator 200 can receive samples 210 that are typically sampled at twice the (2 x) primary sampling rate (i.e., wafer rate). The step size estimator 200 can extract the on-time sample sequence 218 and the earlier and subsequent sample sequences 217 from the received sample 210. Each of the extracted flow lines has a wafer rate sample.

The estimated common pilot channel signal noise ratio estimate 203 is mapped by the mapping unit 140 to the step size parameter 142 in accordance with a predetermined mapping function. The apparent channel velocity estimator 204 can generate a velocity estimate 205 based on the on-time sample sequence 218. The speed estimate 205 is also used by the mapping unit 140 to map to the filter tap point leakage factor a parameter 144. One configuration example of the apparent channel speed estimator 204 is explained below in conjunction with FIG.

The received sample 210 is generated by pulse shaping (receiver root raised cosine (RRC)) filter at twice the wafer rate output. The received sample 210 is important to provide amplitude and phase variation information due to apparent channel velocity to the step size estimator 200. The step size estimator 200 can also receive the first valid tap location information 212, which can be supplied by a modem that already has a channel impulse response. The step size estimator 200 locks the path position to estimate the corresponding apparent channel speed.

Delay buffer 214, adder 215, interpolator 216 and code tracking loop 222 form a delay locked loop (DLL) in step size estimator 200, whereby code tracking loop 222 can internally create the received sample 210 earlier. An error signal between the subsequent sample sequence 217. The error signal in the code tracking loop 222 can drive the fractional delay via the interpolator 216 to force it to average zero. The fractional delay includes the delay in the multiple of the sampling rate (ie, the integer delay with respect to the sampling rate). For example, if the code tracking loop 222 creates a cumulative delay of two samples, the input data stream is delayed by 2 samples. The fractional delay can provide an amount of error to interpolator 216 that enables the on-time sample sequence 218 to be set at zero time offset to a reference signal, such as a common pilot channel in a Global Mobile Telecommunications System (UTMS). The fractional delay may be +/- a sampling rate, such as any value between -0.1, 0.2, 0.4 Tc, where Tc is the wafer rate.

The earlier and subsequent sample sequences 217 are associated with the garbled sequence at the code tracking loop 222. The code tracking loop 222 can generate the interpolator indicator signal 220 and the buffer address signal 224 (i.e., integer multiple sample delay) from the correlation result. The indicator signal 226 is generated by summing the given first active tap position signal 212 and the buffer address signal 224 by adder 215. The delay buffer 214 calibrates the received samples 210 within a particular solution (eg, a wafer solution) for the tracked path (eg, the first valid tap point) based on the indicator signal 226. The delay buffer 214 must be large enough to track the path of movement.

Interpolator 216 can receive delayed samples 219 from delay buffer 214 and transfer delayed samples 219 within +/- 0.5 Tc in +/- 0.125 Tc or less. If the accumulated transition of the delayed sample 219 exceeds 0.5 Tc (e.g., 0.625 Tc), the interpolator 216 will perform a fractional shift of 0.125 Tc via the interpolator indicator signal 220, and the buffer address signal 224 is incremented by one (ie, 0.5Tc).

Interpolator 216 and code tracking loop 222 are used to track the first valid tap point, the most efficient path, or any other path. The on-time sample sequence 218 is generated by tracking the movement of the tracked path. The first valid tap location information 212 is encoded by delaying the received samples 210 (i.e., integer adjustments) via the delay buffer 214 and/or by advancing the received samples 210 (i.e., fractional adjustments) via the interpolator 216. Tracking loop 222 to track. Interpolator 216 can receive interpolator indicator signal 220 from code tracking loop 222 and generate on-time sample sequence 218 and previous and subsequent sample sequences 217. The code tracking loop 222 creates a fractional error that is mapped into an indicator that points to a predetermined interpolator weight (coefficient) that controls the fractional delay for the fractional sample delay and/or leads the received sample 210 from the encoded tracking loop 222.

The delay buffer 214 size is a function of the time drift and the first effective tap update rate. The time drift is the movement caused by the frequency offset between the base station and the WTRU. The apparent channel speed also produces a frequency offset. Therefore, the path seems to be moving. For example, the data machine has base station synchronization information and channel impulse response knowledge (path location) and sets the code tracking loop 222 with the path location (i.e., begins sampling for a given first active tap location signal 212). If the given path moves, the code tracking loop 222 follows it until a multi-sample delay or leading buffer limit is exceeded. However, if the first valid tap location information is updated as appropriate before the code tracking loop 222 hits the buffer boundary, the code tracking loop 222 can follow the path without difficulty.

Figure 3 is a block diagram of an example of an apparent channel speed estimator 204 used in the step size estimator 200 of Figure 2. The apparent channel speed estimator 204 includes a control loop 301, a garbled generator 304, complex conjugate units 308, 326, multipliers 312, 331, 333, a despreader 316, and a variable delay unit 322. A fixed delay unit 330 and a speed mapping unit 374.

According to this embodiment, the amount of delay required to achieve the target phase in the delay buffer 214 of the second step estimator 200 between the current symbol and the delay symbol is estimated via the control loop 301. Control loop 301 can generate delay value 320 as a function of speed. The delay value 320 is then mapped to a speed by the velocity mapping unit 374.

The on-time sample sequence 218 from the step size estimator 200 of FIG. 2 is fed to the first input of the multiplier 312. The garbled generator 304 can generate garbled 306 that is fed to the complex conjugate unit 308. The complex conjugate unit 308 then produces a garbled conjugate 310 that is fed to the second input of the multiplier 312. The on-time sample sequence 218 is multiplied by the garbled conjugate 310 to produce a sequence of desampled samples 314. The demodulated sample sequence 314 is despread by the despreader 316, and the symbol sequence 318 is thereafter generated.

The symbol sequence 318 is input to the variable delay unit 322, the complex conjugate unit 326, and the fixed delay unit 330. Complex conjugate unit 326 can generate a complex conjugate 328 of the current symbol. Variable delay unit 322 may delay symbol sequence 318 based on delay value 320 and generate first delayed symbol sequence 324. Fixed delay unit 330 may delay the sequence of symbols for a symbol duration and generate a second sequence of delay symbols 332.

The complex conjugate 328 of the current symbol is multiplied by the first delay symbol sequence 324 by a multiplier 331 to produce a first delayed conjugate signal 334. The complex conjugate 328 of the current symbol is also multiplied by the second delayed symbol sequence 332 by the multiplier 333 to produce a second delayed conjugate signal 336.

Control loop 301 includes optional mapping units 338, 340, control loops 344, 348, 368, adders 355, 364, a divider 356, and a limiter 372. The control loop 301 can output the delay value 320 based on the first and second delayed conjugate signals 334, 336, and the portion is selectively mapped by the optional mapping unit 338, 340 to the mapped value 342, 346 (+1 or - 1). The delayed conjugate signal 334 is a self-correlation output based on a variable delay value 324. The delayed conjugate signal 336 is an autocorrelation value associated with a symbol delay 332. Signals 334 and 336 are selectively mapped by optional mapping units 338, 340 and then smoothed by loop filters 344, 348 before normalization occurs.

Normalization is required to ensure speed repeatability in different signal-to-noise ratios in any case. If normalization is not performed, the filtered conjugate signal 350 in FIG. 3 may not provide a value between 0 and 1. If the mapping units 338, 340 are not used, the delayed conjugate signals 334, 336 are directly filtered by the loop filters 344, 348.

The final normalized value range is from 0 to 1. The minimum delay that can be applied to the variable delay unit 322 of FIG. 3 is always greater than one symbol delay, which is the precise delay of the fixed delay unit 330. Therefore, normalization produces values in the range between 0 and 1. The reference level value can be determined based on the quotient result signal 360 value. As illustrated in Figures 4 and 5, the basic process will create a quotient result signal 360 response in Figure 3. The filtered conjugate signal 350 generated by loop filter 344 is fed to a first input of divider 356. The filtered conjugate signal 352 generated by the loop filter 348 is fed to the second input of the divider 356 via a adder 355 that can sum the small fixed values 354 to avoid division by zero to produce a sum result signal 358. Divider 356 can sum the resulting signal 358 in addition to the filtered conjugate signal 350 to produce a quotient result signal 360. This is a normalization process that is used to avoid variations due to signal noise ratio settings.

Since the phase relationship is performed by using a known sequence (ie, a common pilot channel signal), the signal to noise ratio level of the associated signal will directly affect the calculated correlation. The reference/correlation value signal 362 is subtracted from the quotient result signal 360 by the adder 364.

Normalization forces the quotient result signal 360 to be between 0 and 1 when the mapping unit 338, 340 creates portions of 0 or 1 and 5 as illustrated in FIG. If the 0 and 1 mappings consider that the minimum hardware is implemented, then since the curve creation is always less than 0.7, the 0.7 reference level will be the best value according to Figure 4. When the mapping produces +1 and -1, then a smaller reference value can be used instead of 0.7. However, for example, using 0.4 mappings +1 and -1 requires more hardware 322 of Figure 3, and speed mapping unit 374 must be updated with different reference levels. Thus, a value of 0.7 is a preferred value for mapping to produce a difference result signal 366 that is fed via loop filter 368 and limiter 372 to produce a delay value 320.

Loop filter 368 is used to reduce the effects of noise in control loop 301. The limiter of the limiter 372 is very reasonable because it is not necessary to estimate the speed above 250 kmh and below 3 kmh. At the same time, the clipping can reduce the hardware size of the speed mapping unit 374. The reference/correlation value 362 is the target value at which the control loop 301 attempts to converge.

Fig. 4 shows an example of the relationship of the symbol delays for the different speeds for the apparent channel velocity estimator 204 of Fig. 3. The correlation value in Fig. 4 corresponds to the quotient result signal 360 of the no-noise simulation in Fig. 3. As shown in Figure 4, the autocorrelation curve crosses the reference level of 0.7 with a small delay and a higher speed, and passes the reference level with a larger delay and a longer speed. When a suitable delay is created at delay 320, the goal is to obtain a zero average of the difference result signal 366 in FIG. To ensure a zero mean and cause the control loop 301 to converge, reference 415 (ie, 0.7 correlation) must be retrieved.

Therefore, the speed system is inversely proportional to the amount of delay to set the normalized self-correlation to the reference level 415. The symbol delay required to achieve 0.7 normalized autocorrelation values is first reversed and then multiplied by a factor to produce a velocity estimate 205.

The control loop 301 of the apparent channel speed estimator 204 of Fig. 3 must not be adjusted to be locally maximal. For example, the 250 kmh curve shown in Fig. 4 has a minimum value of 405 with a minimum symbol delay of 405. At the same time, the same curve periodically has local maximum and minimum values (eg, the value of 0.6 is the local maximum 410 under the 35-symbol delay value). As shown in Fig. 4, due to the very high noise and/or interference level, if the first estimated delay 320 shown in Fig. 3 has a symbol delay of 35, which is close to 250 kmh, the loop is adjusted to a symbol delay value of 35. It is estimated that the speed is 60kmh slower than 250kmh. The reference/correlation value 362 is selected such that the velocity-dependent autocorrelation value of Figure 4 does not pass the 0.7 reference level of the multi-delay point. The delay value 320 is mapped to the speed estimate 205 by the velocity mapping unit 374 in accordance with a predetermined mapping function.

The invention is based on the fact that the self-correlation function of the Doppler spectrum is the 0th order Bessel function. The Bessel behavior allows the associated value to be set to estimate the amount of delay to achieve the expected correlation between the current symbol and the delay symbol. As shown in Fig. 4, as the delay value increases and the WTRU speed increases, the correlation between symbols generally decreases. By forcing the correlation between the symbols of the delay lock separation to converge to the target value, the amount of delay can be mapped to a velocity by a predetermined mapping function. The target value is set to be 0.7 higher than the local peak on the graph. As shown in FIG. 4, after the control loop 301 reaches convergence, the mapping function can be defined, and the delay value at the convergence can be mapped to the corresponding speed.

The optional mapping units 338, 340 of Figure 3 may use 0 and 1 or +1/-1 mapping. Figure 4 depicts the 0 and 1 mappings.

Figure 5 shows an example of the graphical relationship for the symbol delay of the apparent channel velocity estimator 204 of Figure 3 for different signal to noise ratios. The correlation values in Figure 5 correspond to the difference between the quotient result signal 360, the reference/correlation value 362, and the local peak of the self-correlation value being processed. For example, a 0 or 1 mapped delta has 0.7-0.6 = 0.1 at a 35-symbol delay; and for a +1/-1 mapping, a delta becomes 0.7-0.2 = 0.5, which has a large immunity against noise fluctuations.

While the invention has been described in terms of the preferred embodiments, those skilled in the <RTIgt;

18. . . Error signal

106. . . Pick-up point coefficient

110. . . Phase

118. . . Delayed sample

122. . . Phase difference function value

126. . . Average phase difference function vector

215, 355, 364. . . Adder

130. . . Normalized phase difference function vector

219. . . Delayed sample

306. . . Garbled

310. . . Garbled conjugate

312, 331, 333. . . Multiplier

314. . . Wave sample sequence

318. . . Symbol sequence

324, 332. . . First delay symbol sequence

328. . . Complex conjugate

334, 336. . . Delayed conjugate signal

342, 346. . . Map value

354. . . Can add a small fixed value

358. . . Sum result signal

360. . . Quotient result signal

362. . . Reference/correlation value

366. . . Differential result signal

CH. . . Common channel

L. . . Number of taps

SNR. . . Signal noise ratio

μ. . . Step parameter

α. . . Filter tap point leakage factor parameter

1A is a block diagram of an example of a step size estimator including an apparent channel velocity estimator configured in accordance with an embodiment of the present invention;

Figure 1B is a diagram of a transceiver system that performs an apparent channel speed estimation on another channel communication with another channel on the apparent channel speed estimator, including the step size estimator of Figure 1A.

Figure 2 is a block diagram showing an example of a step size estimator according to another embodiment of the present invention;

Figure 3 is a block diagram showing an example of an apparent channel velocity estimator used in the step size estimator of Figure 2;

Figure 4 shows an example of the graphical relationship of the symbol delays for the apparent velocity estimators of Fig. 3 for different speeds.

Figure 5 shows an example of the graphical relationship for the symbol delay of the apparent channel velocity estimator in Fig. 3 for different signal to noise ratios.

106. . . Pick-up point coefficient

110. . . Phase

118. . . Delayed sample

122. . . Phase difference function value

126. . . Average phase difference function vector

130. . . Normalized phase difference function vector

CPICH. . . Common channel

L. . . Number of taps

SNR. . . Signal noise ratio

μ. . . Step parameter

α. . . Filter tap point leakage factor parameter

Claims (11)

A step size estimator for controlling the step size of an adaptive equalizer, comprising: a delay locked loop (DLL) for generating a uniform based on a received sample and location information of at least one path a sequence; a common pilot channel (CPICH) signal to noise ratio (SNR) estimator for generating a CPICH SNR estimate based on the sample sequence; and a one-step mapping unit for estimating the CPICH SNR Mapping to at least one parameter, the at least one parameter is for updating at least one filter tap coefficient used by the adaptive equalizer. The step size estimator of claim 1, further comprising: a channel speed estimator for estimating an apparent speed of a channel based on the sample sequence, wherein the step size mapping unit is used The apparent speed of the channel is estimated with the CPICH SNR to produce the at least one parameter. The step size estimator of claim 1, wherein the at least one parameter comprises a one-step length parameter. The step size estimator of claim 1, wherein the at least one parameter comprises a filter tap point leakage factor parameter. The step size estimator of claim 1, wherein the DLL comprises: a delay buffer for generating a delayed sample based on the received sample; and an interpolator for transferring the delayed sample, Generating an earlier and subsequent time series, and generating a quasi-sample sequence; a code tracking loop for generating an interpolated indicator signal and a buffer address signal; and an adder for summing a given number a valid path (FSP) position signal and the buffer address signal to generate an indicator signal, wherein the delay buffer is The indicator signal is used to calibrate the received samples for tracking FSP within a particular solution. A method for controlling a step size of an adaptive equalizer, comprising: generating an identical sequence based on a received sample and location information of at least one path; generating a common pilot channel based on the sample sequence (CPICH) signal to noise ratio (SNR) estimation; and mapping the CPICH SNR estimate to at least one parameter for updating at least one filter tap coefficient used by the adaptive equalizer . The method of claim 6, further comprising: estimating an apparent speed of a channel based on the sample sequence; and using the apparent speed of the channel and the CPICH SNR estimate to generate the at least one parameter. The method of claim 6, wherein the at least one parameter comprises a one-step length parameter. The method of claim 6, wherein the at least one parameter further comprises a filter tap point leakage factor parameter. The method of claim 6, wherein generating the sample sequence comprises: generating a delayed sample based on the received sample; transferring the delayed sample, generating an early and subsequent time series, and generating a punctual sample sequence; generating An interpolating indicator signal and a buffer address signal; and generating an indicator signal by summing a given first valid path (FSP) position signal and the buffer address signal, wherein the indicator signal is based The received samples are calibrated for tracking FSPs within a particular solution. An integrated circuit for controlling the step size of an adaptive equalizer includes: a delay locked loop (DLL) for generating the same sequence based on a received sample and position information of at least one path; a common pilot channel (CPICH) signal to noise ratio (SNR) estimator for generating a CPICH SNR estimate based on the sample sequence; and a one-step mapping unit for mapping the CPICH SNR estimate to At least one parameter is used to update at least one filter tap coefficient used by the adaptive equalizer.