JPH04208707A - Adaptive equalizer - Google Patents

Adaptive equalizer

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Publication number
JPH04208707A
JPH04208707A JP31669490A JP31669490A JPH04208707A JP H04208707 A JPH04208707 A JP H04208707A JP 31669490 A JP31669490 A JP 31669490A JP 31669490 A JP31669490 A JP 31669490A JP H04208707 A JPH04208707 A JP H04208707A
Authority
JP
Japan
Prior art keywords
circuit
coefficient
transmission path
value
fluctuation speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31669490A
Other languages
Japanese (ja)
Inventor
Koji Ueda
幸治 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP31669490A priority Critical patent/JPH04208707A/en
Publication of JPH04208707A publication Critical patent/JPH04208707A/en
Pending legal-status Critical Current

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  • Filters That Use Time-Delay Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To improve the equalization characteristic by estimating a ratio Eb/No of the signal energy to the noise power density per bit of a reception signal and the fluctuating speed of a transmission line to set the oblivion coefficient of an adaptive equalizer. CONSTITUTION:A power ratio estimating circuit 21 estimates a ratio of the signal energy to the noise power density per bit of the reception signal in accordance with an error signal and sends this ratio to an oblivion coefficient setting circuit 23. A transmission line fluctuating speed designating circuit 22 obtains an average value and the variance of the tap coefficient value of an FF part 1 in the tracking mode to estimate the fluctuating speed of the transmission line and sends it to the oblivion coefficient setting circuit 23. This circuit 23 determines the oblivion coefficient, with which the equalization characteristic of the adaptive equalizer is best in the current state of the transmission line, in accordance with an oblivion coefficient set table and sends its value to a tap coefficient updating circuit 20.

Description

【発明の詳細な説明】 〔産業上の利用分野] この発明は、高速ディジタル移動体通信において、周波
数選択性フェージングによる波形歪によってもたらす伝
送特性の劣化を抑える目的で使用する適応等化器に関す
るものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an adaptive equalizer used in high-speed digital mobile communication for the purpose of suppressing deterioration of transmission characteristics caused by waveform distortion due to frequency selective fading. It is.

(従来の技術〕 移動体通信のような伝送路の速い変動に追従し、等化器
の初期設定が短時間のトレーニングプロセスで行えるベ
ースバンド波形適応等化器の種類の一つとして「判定帰
還形通応等化器による陸上6動通信の周波数選択性フェ
ージング補償特性」 (電子情報通信学会論文誌B−1
1、Vol。
(Prior art) One of the types of baseband waveform adaptive equalizers that can follow fast fluctuations in transmission paths such as mobile communications and can initialize the equalizer in a short training process is the "decision feedback" method. "Frequency selective fading compensation characteristics of 6-wave terrestrial communications using a form-adaptive equalizer" (IEICE Journal B-1)
1, Vol.

J72−B−11、No、10  pp、513−52
31989年10月)に記載されている判定帰還形適応
等化器が知られている。
J72-B-11, No, 10 pp, 513-52
A decision-feedback adaptive equalizer is known, as described in No. 3 (October 1989).

′tS7図は上記の如く判定帰還形通応等化器を示す構
成図である。図において、(1)はタップ間隔が一定遅
延時間丁p秒でタップがL個であるフィードフォワード
部のトランスバーサルフィルタ(以下FF部と称す)、
(2)はタップ間隔が一定遅延時間T秒でタップ数が(
M−L)個であるフィードバック部のトランスバーサル
フィルタ(以下FB部と称す)、(3)はFF部(1)
の出力データとFB部(2)の出力データを加算する加
算器、(4)は加算器(3)の出力信号系列を1秒毎に
識別する判定器、(5)はFF部(1)とFB部(2)
のタップ係数を1秒毎に定めるタップ係数更新回路、(
6)はFB部(2)の入力信号系列を判定器(4)の出
力信号系列と既知信号系列とに切り替えるスイッチ回路
、(7)はFF部(1)の入力信号系列入力端子、(8
)は既知信号系列入力端子、(9)は判定帰還形適応等
化器の出力信号端子である。
Figure 'tS7 is a block diagram showing the decision feedback type adaptive equalizer as described above. In the figure, (1) is a transversal filter (hereinafter referred to as FF section) of a feedforward section whose tap interval is a constant delay time of p seconds and has L taps;
In (2), the tap interval is a constant delay time T seconds, and the number of taps is (
M−L) transversal filters of the feedback section (hereinafter referred to as FB section), (3) is the FF section (1)
An adder that adds the output data of the FB section (2) to the output data of the FB section (2), (4) a judger that identifies the output signal sequence of the adder (3) every second, and (5) an FF section (1) and FB section (2)
A tap coefficient update circuit that determines the tap coefficient of (
6) is a switch circuit that switches the input signal series of the FB section (2) to the output signal series of the determiner (4) and the known signal series; (7) is the input signal series input terminal of the FF section (1);
) is a known signal sequence input terminal, and (9) is an output signal terminal of the decision feedback adaptive equalizer.

また、第8図は上記構成の判定帰還形適応等化器を用い
た受信系の構成を示すもので、図において、(10)は
受信アンテナ、(11)は検波部、(12)はA/D変
換器、(13)はフレーム同期回路、(14)はクロッ
ク再生回路、(15)はバッファメモリ回路、(16)
は第1図に示す判定帰還形適応等化器を含む等化部、(
17)は出力端子である。
FIG. 8 shows the configuration of a receiving system using the decision feedback adaptive equalizer configured as described above. In the figure, (10) is the receiving antenna, (11) is the detection section, and (12) is the A /D converter, (13) is a frame synchronization circuit, (14) is a clock recovery circuit, (15) is a buffer memory circuit, (16)
is an equalization section including a decision feedback adaptive equalizer shown in FIG.
17) is an output terminal.

さらに、第9図は移動体通信等に用いられる信号のバー
ストフォーマットの例で、(18)は判定帰還形通応等
化器のトレーニングやフレーム同期をとるために用いる
既知信号系列、(19)はランダムデータ部である。
Furthermore, FIG. 9 shows an example of a signal burst format used in mobile communications, etc., where (18) is a known signal sequence used for training and frame synchronization of a decision feedback type equalizer, and (19) is the random data part.

次に動作について説明する。第8図において、受信波は
受信アンテナ(lO)によって取り込まれ検波部(11
)でベースバント信号に変換された後、A/D変換器(
12)によってディジタル信号に変換される。そして、
この信号はバッファメモリ回路(15)に取り込まれ、
フレーム同期回路(13)でフレーム同期を行った後に
等化部(16)に送られる。
Next, the operation will be explained. In FIG. 8, the received wave is taken in by the receiving antenna (lO) and the detection unit (11
) is converted to a baseband signal by an A/D converter (
12) into a digital signal. and,
This signal is taken into the buffer memory circuit (15),
After frame synchronization is performed in the frame synchronization circuit (13), the signal is sent to the equalization section (16).

このとき、クロック再生回路(14)で再生したクロッ
クは、バッファメモリ回路(15)、等化部(16)に
供給されている。
At this time, the clock recovered by the clock recovery circuit (14) is supplied to the buffer memory circuit (15) and the equalization section (16).

等化部(16)内の第7図に示す判定帰還形適応等化器
では、バースト先頭の既知信号系列(18)を用いて伝
送路の特性を推定しくトレーニングモート)、その後に
ランダムデータ部(19)の等化を行う(トラッキング
モード)。このとき、FB部(2)の入力信号系列はス
イッチ回路(6)にて、トレーニングモード時では既知
信号系列入力端子より人力される既知信号系列、トラッ
キングモード時には判定器(4)の出力信号系列とに切
り換えられる。
The decision feedback adaptive equalizer shown in FIG. 7 in the equalization section (16) uses a known signal sequence (18) at the beginning of the burst to estimate the characteristics of the transmission path (training mode), and then uses a random data section (training mode) to estimate the characteristics of the transmission path. (19) is equalized (tracking mode). At this time, the input signal sequence of the FB section (2) is inputted by the switch circuit (6) through the known signal sequence input terminal in the training mode, and the output signal sequence of the determiner (4) in the tracking mode. It can be switched to

タップ係数更新回路(5)では、判定帰還形適応等化器
の入力信号系列、既知信号系列または判定器(4)の出
力信号系列、加算器(3)の出力信号系列を用い、カル
マンフィルタアルゴリズム(RLSアルゴリズム)に従
い、1シンボル毎にFF部(1)とFB部(2)のタッ
プ係数を更新する。
The tap coefficient updating circuit (5) uses the input signal sequence of the decision feedback adaptive equalizer, the known signal sequence, the output signal sequence of the decider (4), and the output signal sequence of the adder (3), and uses the Kalman filter algorithm ( RLS algorithm), the tap coefficients of the FF section (1) and the FB section (2) are updated for each symbol.

次に、このタップ係数更新アルゴリズムについて説明す
る。時刻t=nTにおける等化量への入力信号ベクトル
をX、(n) 、タップ係数をCM(n) 、等止器出
力をI (n)、希望出力をd (n)、誤差信号をe
 (n)とする。ここで、XM (n) 、CM (n
) 、 I (n)、d (n)は、同相、直交チャネ
ルを示す複素数となる。また、判定帰還形適応等化器の
FF部(1)のタップ数をし、総タップ数をMとすると
xM(n) = [y+” (n) 、y2” (n)
 、 −、yL” (n) 。
Next, this tap coefficient updating algorithm will be explained. The input signal vector to the equalization amount at time t=nT is X, (n), the tap coefficient is CM (n), the equalizer output is I (n), the desired output is d (n), and the error signal is e
(n). Here, XM (n), CM (n
), I (n), and d (n) are complex numbers indicating in-phase and orthogonal channels. Also, if the number of taps in the FF section (1) of the decision feedback adaptive equalizer is M, and the total number of taps is M, then xM(n) = [y+” (n), y2” (n)
, −,yL” (n).

d、責n) 、d2” (n) 、 −、dM−シ責n
)]” (1)cii(n)  = [C+”(n)、
C2’(n)、 ・、CM″(r+)]   (2)1
(n)  =CM″(n−1) XM (n)    
     (3)e(n/n−1) = d(n) −
1(n) = d(n) −Cii’(n−1) Xm
(n)となる。ここで(”)は、複素共役転置行列(又
はベクトル)を表す。また、d (n)は、トレーニン
グモートでは既知信号系列となり、トラッキングモード
では判定器(4) の出力信号系列となる。そして、次
式で表される評価間数εを最小にするタップ係数CM 
(n)が求める値となる。
d, responsibility n), d2'' (n), -, dM-shi responsibility n
)]” (1)cii(n) = [C+”(n),
C2'(n), ・, CM''(r+)] (2)1
(n) =CM″(n-1) XM (n)
(3) e(n/n-1) = d(n) −
1(n) = d(n) -Cii'(n-1) Xm
(n). Here, ('') represents a complex conjugate transposed matrix (or vector). Also, d(n) is a known signal sequence in the training mode, and is an output signal sequence of the determiner (4) in the tracking mode. , tap coefficient CM that minimizes the evaluation interval number ε expressed by the following formula
(n) becomes the value to be sought.

ε=Σ λ0すe″(i/n)  e (i/n)  
    (5)+111 ここで、人は忘却係数(0<λ≦1)を表す。
ε=Σ λ0se″(i/n) e (i/n)
(5)+111 Here, person represents the forgetting coefficient (0<λ≦1).

(5)式を最小にするCM (n)は、CM (n) 
= R−’ (n) D (n)          
 (6)p−’ (n) = R(n) =Σ λ’−
’ XM (i) XM’ (i)+δλ’I  (δ
:正定数)(7) D(n)−Σ  λ’−’ XM (i) d’ (i
)       (8)1=1 となり、さらに時刻t = (n−1) Tの時のCM
(n−1)、P (n−1)から時刻t=nTの時のC
M (n)を漸化的に求めるアルゴリズムは、以下のよ
うになる。
CM (n) that minimizes equation (5) is CM (n)
= R-' (n) D (n)
(6) p-' (n) = R(n) = Σ λ'-
'XM (i) XM'(i)+δλ'I (δ
: positive constant) (7) D(n)−Σ λ'−' XM (i) d' (i
) (8) 1=1, and furthermore, the commercial at time t = (n-1) T
(n-1), P C at time t=nT from (n-1)
The algorithm for recursively finding M (n) is as follows.

K (n) = P (n−1) XM (n) / 
[λ+XM”(n) P(n−1) XM(n)]p 
(n) = [P (n−1) −K (n) XM″
(n) P (n−1)]    (101CM(n)
 = Cii (n−1)十K(n) e責n/n−1
)     (11)P(0)−δ−’I、 (:M(
0)= O(12)ここて、K (n)はカルマンケイ
ン、P (n)はタップ係数の推定誤差共分散行列とな
る。
K (n) = P (n-1) XM (n) /
[λ+XM”(n) P(n-1) XM(n)]p
(n) = [P (n-1) −K (n) XM''
(n) P (n-1)] (101CM(n)
= Cii (n-1) 10K(n) e-responsibility n/n-1
) (11)P(0)−δ−′I, (:M(
0)=O(12) Here, K (n) is Kalman Keyne, and P (n) is the estimation error covariance matrix of the tap coefficients.

上記アルゴリズム中の忘却係数えは、伝送路変動へのア
ルゴリズムの追従性を決定するパラメータであり、λく
1とすることによって、過去のデータの影響は指数関数
的に減少してゆき、λを小さくすることによって伝送路
の速い変動に追従可能となる。しかし、λが小さくなる
につれて今度は、CM (n)の推定に用いるデータ量
が少なくなることにより、等化誤差が増えて行く。
The forgetting coefficient in the above algorithm is a parameter that determines the followability of the algorithm to transmission path fluctuations. By setting λ to 1, the influence of past data will decrease exponentially, and λ By making it small, it becomes possible to follow fast fluctuations in the transmission path. However, as λ decreases, the amount of data used to estimate CM (n) decreases, and the equalization error increases.

その結果、伝送路の変動の速度及び受信信号の1ビット
当りの信号エネルギーと雑音電力密度の比Eb/Noの
違いによって、それぞれ等化特性が最適になる忘却係数
λが存在する。第1θ図は受信信号の1ビット当りの信
号エネルギーと雑音電力密度の比Eb/No、第11図
は伝送路の変動速度を表すドツプラー周波数f、iをパ
ラメータとしたときの忘却係数λに対する誤り率特性の
変化の一例を示す。第1O図に示すように、受信信号の
1ビット当りの信号エネルギーと雑音電力密度の比Eb
/Noが低い程、最適な忘却係数λは大きくなり、また
、第11図に示すように、ドツプラー周波数f、が大き
い程最適な忘却係数えは小さくなることがわかる。
As a result, depending on the speed of fluctuation in the transmission path and the ratio Eb/No between the signal energy per bit of the received signal and the noise power density, there is a forgetting coefficient λ that optimizes the equalization characteristics. Figure 1θ shows the ratio of the signal energy per bit of the received signal to the noise power density Eb/No, and Figure 11 shows the error in the forgetting coefficient λ when the Doppler frequency f, which represents the fluctuation speed of the transmission path, and i are used as parameters. An example of changes in rate characteristics is shown. As shown in Figure 1O, the ratio of the signal energy per bit of the received signal to the noise power density Eb
It can be seen that the lower the /No, the larger the optimal forgetting coefficient λ becomes, and as shown in FIG. 11, the larger the Doppler frequency f, the smaller the optimal forgetting coefficient λ becomes.

(発明が解決しようとする課題) しかしながら、従来の適応等止器においては、上記忘却
係数λの値を一定値としていたので、移動体通信のよう
に、受信信号の1ビット当りのイエ号エネルギーと雑音
電力密度の比Eb/No、ドツプラー周波数fdが使用
状況によって大きく変化する場合は最適な等化特性が得
られないという問題点があった。
(Problem to be Solved by the Invention) However, in the conventional adaptive isolator, the value of the above-mentioned forgetting coefficient λ is set to a constant value. When the ratio Eb/No of noise power density and the Doppler frequency fd vary greatly depending on usage conditions, there is a problem that optimum equalization characteristics cannot be obtained.

この発明は、上記のような問題点を解消するためになさ
れたもので、伝送路の状態が使用状況によりて大きく変
化する場合でも、伝送路の状態を表す受信信号の1ビッ
ト当りの信号エネルギーと雑音電力密度の比Eb/No
、ドツプラー周波数f、を推定し、その状態に応じてタ
ップ係数更新アルゴリズム中の忘却係数λを選択し、等
化特性がその伝送路に対して最も良くなる適応等化器を
得ることを目的としている。
This invention was made to solve the above-mentioned problems, and even when the state of the transmission path changes greatly depending on the usage situation, the signal energy per bit of the received signal representing the state of the transmission path can be reduced. and noise power density ratio Eb/No
, the Doppler frequency f, and select the forgetting coefficient λ in the tap coefficient updating algorithm according to its state, with the aim of obtaining an adaptive equalizer with the best equalization characteristics for the transmission path. There is.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る適応等化器は、タップ付き遅延回路を有
し、該タップ付き遅延回路の各タップ出力にタップ係数
を乗じて加算し該加算結果に基づいて受信波の等化を行
うように構成された適応等化器において、フィルタのカ
ップ係数値から伝送路の変動速度を推定する伝送路変動
速度推定回路と、受信信号の所定情報の値とタップ係数
値と入力信号の積和との差である誤差から受信信号と雑
音の電力比を推定する電力比推定回路と、上記伝送路変
動速度推定回路による伝送路変動速度推定値と上記電力
比推定回路による電力比推定値とからデータの時間に対
する重み付け係数を求める忘却係数設定回路と、受信信
号の所定情報の値とタップ係数価と入力信号の積和との
差と忘却係数とに基づいてフィルタのタップ係数の更新
を行うタップ係数更新回路とを備えたものである。
The adaptive equalizer according to the present invention has a tapped delay circuit, and is configured to multiply each tap output of the tapped delay circuit by a tap coefficient and add the result, and to equalize a received wave based on the addition result. The configured adaptive equalizer includes a transmission path fluctuation speed estimation circuit that estimates the fluctuation speed of the transmission path from the cup coefficient value of the filter, and a transmission path fluctuation speed estimation circuit that estimates the fluctuation speed of the transmission path from the cup coefficient value of the filter, and the sum of products of the predetermined information value of the received signal, the tap coefficient value, and the input signal. A power ratio estimating circuit that estimates the power ratio of the received signal and noise from the error that is the difference, and a transmission path fluctuation speed estimation value by the transmission path fluctuation speed estimation circuit and a power ratio estimation value by the power ratio estimation circuit. A forgetting coefficient setting circuit that calculates a weighting coefficient with respect to time, and a tap coefficient update that updates the tap coefficient of a filter based on the forgetting coefficient and the difference between the value of predetermined information of the received signal, the tap coefficient value, and the sum of products of the input signal. It is equipped with a circuit.

また、この発明に係る適応等化器は、受信信号の電界強
度を計測する電解強度計測回路と、その計測値に基づい
て伝送路の変動速度を推定する伝送路変動速度推定回路
と、上記電界強度計測回路の計測値と上記伝送路変動速
度推定値とを用いてデータの時間に対する重み付け係数
を求める忘却係数設定回路と、上記忘却係数設定回路で
設定した忘却係数を用いて受信信号の等化を行う等化部
とを備えたものである。
Further, the adaptive equalizer according to the present invention includes a field strength measuring circuit that measures the electric field strength of a received signal, a transmission path fluctuation speed estimation circuit that estimates the fluctuation speed of the transmission path based on the measured value, and a field strength measuring circuit that measures the electric field strength of the received signal. A forgetting coefficient setting circuit that calculates a weighting coefficient for data over time using the measurement value of the intensity measurement circuit and the estimated transmission path fluctuation speed, and equalization of the received signal using the forgetting coefficient set by the forgetting coefficient setting circuit. It is equipped with an equalization section that performs the following.

〔作用〕[Effect]

この発明における適応等止器は、適応等化器での演算結
果であるタップ係数CMと誤差信号eを用い、伝送路の
変動の速さをタップ係数Cイの変動により推定し、また
受信信号の1ビット当りの信号エネルギーと雑音電力密
度の比Eb/Noを誤差信号eの値によって推定するこ
とによって、伝送路の状態を把握し、その状態に応じて
適応等化器の等化特性が最も良くなると思われる忘却係
数を選択することによって等化特性を改善する。
The adaptive equalizer in this invention uses the tap coefficient CM and the error signal e, which are the calculation results of the adaptive equalizer, to estimate the speed of fluctuation of the transmission path from the fluctuation of the tap coefficient Ci, and also By estimating the ratio of signal energy per bit to noise power density Eb/No from the value of the error signal e, the state of the transmission path can be grasped, and the equalization characteristics of the adaptive equalizer can be adjusted according to the state. The equalization properties are improved by selecting the forgetting coefficient that seems to be the best.

また、この発明に係る適応等化器は、電界強度計測回路
による計測値に基づき伝送路変動速度推定により伝送路
の変動の速さを推定することによって、適応等化器の等
化特性が最も良くなると思われる忘却係数を選択するこ
とによって等化特性を改善する。
Further, the adaptive equalizer according to the present invention estimates the speed of transmission path fluctuation by estimating the transmission path fluctuation speed based on the measurement value by the electric field strength measurement circuit, so that the equalization characteristics of the adaptive equalizer are maximized. The equalization properties are improved by selecting a forgetting factor that is likely to improve.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図は本実施例に係る適応等化器の構成図を示し、第7図
と同一部分は同一符号を付してその説明を省略する。第
1図において、新たな構成として、(20)はタップ係
数更新回路、(21)はこのタップ係数更新回路(20
)の演算結果の一つである誤差信号を入力信号とする電
力比推定回路、(22)はタップ係数更新回路(20)
の演算結果の−っであるタップ係数値を入力信号とする
伝送路変動速度推定回路、(23)は電力比推定回路(
21)および伝送路変動速度推定回路(22)の演算結
果を人力する忘却係数設定回路を示し、上記伝送路変動
速度推定回路(22)には第2図に示す如く分散値61
〜δ6に対するドツプラー周波数fdの対応テーブルが
、また、上記忘却係数設定回路(23)には受信信号の
1ビット当りの信号エネルギーと雑音電力密度の比Eb
/Noとドツプラー周波数fdに対応する忘却係数え1
〜λ13の対応テーブルがそれぞれ備えられる。
An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a configuration diagram of the adaptive equalizer according to the present embodiment, and the same parts as in FIG. 7 are given the same reference numerals and the explanation thereof will be omitted. In FIG. 1, as a new configuration, (20) is a tap coefficient updating circuit, and (21) is this tap coefficient updating circuit (20).
) is a power ratio estimation circuit whose input signal is an error signal which is one of the calculation results, and (22) is a tap coefficient update circuit (20).
(23) is the power ratio estimation circuit (23) which uses the tap coefficient value which is the calculation result of
21) and a forgetting coefficient setting circuit that manually calculates the calculation results of the transmission path fluctuation speed estimation circuit (22), and the transmission path fluctuation speed estimation circuit (22) has a variance value 61 as shown in FIG.
The correspondence table of the Doppler frequency fd to ~δ6 is also stored in the forgetting coefficient setting circuit (23), and the ratio Eb of the signal energy per bit of the received signal to the noise power density is stored in the forgetting coefficient setting circuit (23).
/No and the forgetting coefficient E1 corresponding to the Doppler frequency fd
-λ13 correspondence tables are provided, respectively.

次に動作について第4図に示すフローチャートを参照し
て説明する。タップ係数更新回路(2o)では、従来の
技術の項で説明したように、式(4)において誤差信号
e (n/n−1)、式(11)においてタップ係数C
M (n)が計算される(Sl)。タップ係数更新回路
(20)では、受信信号の1シンボル時間毎に求めた誤
差信号e (n/n−1)、タップ係数CM (n)を
電力比推定回路(21)、伝送路変動速度推定回路(2
2)にそれぞれ送出する。電力比推定回路(21)にお
いては、上記誤差信号から受信信号の1ビツトあたりの
信号エネルギーと雑音電力密度の比Eb/Noを推定す
る。
Next, the operation will be explained with reference to the flowchart shown in FIG. As explained in the conventional technology section, the tap coefficient updating circuit (2o) uses the error signal e (n/n-1) in equation (4) and the tap coefficient C in equation (11).
M (n) is calculated (Sl). The tap coefficient update circuit (20) uses the error signal e (n/n-1) obtained for each symbol time of the received signal and the tap coefficient CM (n) to the power ratio estimation circuit (21) to estimate the transmission path fluctuation speed. Circuit (2
2) respectively. The power ratio estimating circuit (21) estimates the ratio Eb/No of the signal energy per bit of the received signal to the noise power density from the error signal.

カルマンフィルタアルゴリズム(RLSアルゴリズム)
を用いたタップ係数値の推定においては、トレーニング
モードで伝送路の推定が終了し、タップ係数値がある程
度の収束した時点での誤差値が受信信号の1ビット当り
の信号エネルギーと雑音電力密度の比Eb/No値とな
るので、この電力比推定回路(21)では、トレーニン
グモード時の最後の5シンボル程度の誤差の平均値を求
めその値をEb/No推定値とし忘却係数設定回路(2
3)に送出する(52〜54)。
Kalman filter algorithm (RLS algorithm)
When estimating tap coefficient values using Since the ratio Eb/No value is obtained, this power ratio estimating circuit (21) calculates the average value of the errors of the last five symbols in the training mode and uses that value as the Eb/No estimated value.
3) (52-54).

伝送路変動速度推定回路(22)においては、トラッキ
ングモード時のFF部(1)のタップ係数値の平均値を
求め、次に、その平均値の絶対値が一番犬きいタップ係
数値に対して分散を求め、そのバーストにおける伝送路
の変化量を定量的に求める。そして、第2図に示すよう
な計算機シミュレーション等で定めておいたその分散値
とドツプラー周波数fdの対応表により伝送路の変動速
度を推定し、忘却係数設定回路(23)に送出する(5
5〜S9)。
In the transmission path fluctuation speed estimating circuit (22), the average value of the tap coefficient values of the FF section (1) in the tracking mode is calculated, and then the absolute value of the average value is calculated with respect to the closest tap coefficient value. The dispersion is determined, and the amount of change in the transmission path during the burst is determined quantitatively. Then, the fluctuation speed of the transmission path is estimated based on the correspondence table between the dispersion value and the Doppler frequency fd determined by computer simulation as shown in Fig. 2, and is sent to the forgetting coefficient setting circuit (23) (5
5-S9).

忘却係数設定回路(23)では、第3図に示すような計
算機シミュレーション等で定めておいた忘却係数設定表
に従い、その伝送路の状態で適応等化器の等化特性が最
良になる忘却係数を決定し、その値をタップ係数更新回
路(2o)に送出する(S 10 。
The forgetting coefficient setting circuit (23) determines the forgetting coefficient that gives the best equalization characteristic of the adaptive equalizer under the transmission path condition, according to the forgetting coefficient setting table determined by computer simulation as shown in Fig. 3. is determined and the value is sent to the tap coefficient update circuit (2o) (S 10 ).

511)。511).

タップ係数更新回路(20)では、次のバーストによる
受信信号系列に対してはこの忘却係数の値を用いてタッ
プ係数更新アルゴリズムを計算する(Sll−5ll)
。なお、通常の高速ディジタル自動車mlシステムでは
このバースト間隔は20m5ec程度なので、その間の
受信信号の1ビット当りの信号エネルギーと雑音電力密
度の比Eb/Noの変動、伝送路変動速度の変化による
最適忘却係数の変化は、忘却係数の設定精度に比べて十
分小さいと考えられるので一回前のバースト受信時の伝
送路の特性から求めた忘却係数を次バーストに使用する
ことに問題はない。
The tap coefficient update circuit (20) uses this forgetting coefficient value to calculate the tap coefficient update algorithm for the next burst received signal sequence (Sll-5ll).
. In addition, in a normal high-speed digital automobile ML system, this burst interval is about 20 m5ec, so optimal forgetting is achieved due to fluctuations in the ratio Eb/No of the signal energy per bit of the received signal and noise power density and changes in the transmission path fluctuation speed during that time. Since the change in the coefficient is considered to be sufficiently small compared to the setting accuracy of the forgetting coefficient, there is no problem in using the forgetting coefficient determined from the characteristics of the transmission path at the time of reception of the previous burst for the next burst.

上記実施例では、受信信号の1ビット当りの信号エネル
ギーと雑音電力密度の比Eb/No、及び伝送路変動速
度の推定をタップ係数更新回路(20)の演算結果より
行っていたが、この推定を他の回路の出力結果を用いて
行ってもよい。以下、そのような実施例を第5図につい
て示す。第5図は第8図と同様な受信機の構成を示し、
同一部分は同一符号を付してその説明を省略する。第5
図において、(24)は電界強度計測回路、(25)は
電界強度計測回路(24)を含む検波部、(26)は電
界強度計測回路(24)の出力信号を人力とする伝送路
変動速度推定回路、(27)は電界強度計測回路(24
)の出力信号と伝送路変動速度推定回路(26)の出力
信号を入力信号とし、伝送路の状態に通した忘却係数を
選択する忘却係数設定回路、(28)は忘却係数設定回
路(27)で設定した忘却係数を用いて受信入力信号の
等化を従来例で示したカルマンフィルタアルゴリズムに
従って行う等化部である。
In the above embodiment, the ratio Eb/No of the signal energy per bit of the received signal to the noise power density and the transmission path fluctuation speed are estimated from the calculation results of the tap coefficient updating circuit (20). may be performed using the output results of other circuits. Such an embodiment is shown below with reference to FIG. FIG. 5 shows the configuration of a receiver similar to FIG. 8,
Identical parts are given the same reference numerals and their explanations will be omitted. Fifth
In the figure, (24) is an electric field strength measurement circuit, (25) is a detection unit including the electric field strength measurement circuit (24), and (26) is a transmission path fluctuation speed using the output signal of the electric field strength measurement circuit (24) as human power. The estimation circuit (27) is the electric field strength measurement circuit (24
) and the output signal of the transmission line fluctuation speed estimation circuit (26) as input signals, and a forgetting coefficient setting circuit that selects a forgetting coefficient based on the state of the transmission line, (28) is a forgetting coefficient setting circuit (27). This is an equalization unit that equalizes the received input signal using the forgetting coefficient set in , according to the Kalman filter algorithm shown in the conventional example.

次に、上記実施例における動作を第6図に示すフローチ
ャートを参照して説明する。電界強度計測回路(24)
等の受信信号レヘ、ル検出器は、自動車電話システムに
おけるゾーン切り替え時の指標として不可欠なものであ
り、忘却係数設定回路(27)では受信信号の1ビット
当りの信号エネルギーと雑音電力密度の比Eb/Noが
受信電界強度に比例するものとして、受信信号の1ビッ
ト当りの信号エネルギーと雑音電力密度の比Eb/No
を推定する。
Next, the operation in the above embodiment will be explained with reference to the flowchart shown in FIG. Electric field strength measurement circuit (24)
Received signal level detectors such as Assuming that Eb/No is proportional to the received electric field strength, the ratio of the signal energy per bit of the received signal to the noise power density Eb/No
Estimate.

伝送路変動速度推定回路(2B)では電界強度計測回路
(24)の出力信号かある一定しベルを単位時間に交差
する回数をカウントすることによって伝送路の変動の速
さを推定しそれをドツプラー周波数fdて表した後に忘
却係数設定回路(27)にその値を伝送する(Sll〜
515)。
The transmission path fluctuation speed estimation circuit (2B) estimates the speed of transmission path fluctuation by counting the number of times the output signal of the electric field strength measurement circuit (24) crosses a certain constant bell per unit time, and converts it into a Doppler signal. After expressing the frequency fd, the value is transmitted to the forgetting coefficient setting circuit (27) (Sll~
515).

忘却係数設定回路(27)では、受信信号の1ビット当
りの信号エネルギーと雑音電力密度の比Eb/No、及
びドツプラー周波数fdの推定値から前述した実施例の
項と同様に忘却係数を設定し、その値を等化部(28)
に送る(516〜519)。
The forgetting coefficient setting circuit (27) sets the forgetting coefficient from the ratio Eb/No of the signal energy per bit of the received signal to the noise power density and the estimated value of the Doppler frequency fd in the same manner as in the above embodiment. , the value is equalized by the equalizer (28)
Send to (516-519).

なお、上記実施例では、判定帰還形適応等化器の場合に
ついて示したが、FB部(2)、加算器(3)、判定器
(4)、スイッチ回路(6)、既知信号系列入力端子(
8)がない適応等化量の場合でもよい。
In the above embodiment, the case of a decision feedback adaptive equalizer is shown, but the FB section (2), adder (3), decider (4), switch circuit (6), known signal sequence input terminal (
A case of adaptive equalization without 8) may also be used.

(発明の効果) 以上のように、この発明によれば、受信信号の1ヒツト
当りの信号エネルギーと雑音電力密度の比Eb/No及
び伝送路の変動速度を推定し、伝送路の状態に応じて適
応等化器の等化特性が最良になるように適応等化器の忘
却係数の設定を行うように構成したので、等化特性の良
い適応等化器が得られる効果がある。
(Effects of the Invention) As described above, according to the present invention, the ratio Eb/No of the signal energy per hit of the received signal to the noise power density and the fluctuation speed of the transmission path are estimated, and the fluctuation speed of the transmission path is estimated. Since the configuration is such that the forgetting coefficient of the adaptive equalizer is set so that the equalization characteristics of the adaptive equalizer are the best, an adaptive equalizer with good equalization characteristics can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による適応等化器の構成図
、第2図は第1図の伝送路変動速度推定回路(22)に
備えられるドツプラー周波数推定テーブルの説明図、第
3図は第1図の忘却係数設定回路(23)に備えらねる
忘却係数設定表のテーブルの説明図、第4図は第1図の
一実施例の全体の処理の流れ及び各回路の内部の動作を
示すフローチャート、第5図はこの発明の他の実施例を
示す構成図、第6図は第5図の実施例の全体の処理の流
わ及び各回路の内部の動作を示すフローチャート、第7
図は従来の判定帰還形適応等化器の構成図、第8図は第
7図の判定帰還形適応等化器を用いた受信機の構成図、
第9図は受信信号のバーストフォーマット図、第10図
は受信信号の1ビット当りの信号エネルギーと雑音電力
密度の比Eb/N。 をパラメータとしたてときの判定帰還形適応等化器の忘
却係数に対する誤り率特性曲線図、第11図はドツプラ
ー周波数をパラメータとしたときの判定帰還形適応等化
器の忘却係数に対する誤り率特性的線図である。 (20)はタップ係数更新回路、(21)は電力比推定
回路、(22)は伝送路変動速度推定回路、(23)は
忘却係数設定回路、(24)は電界強度計測回路、(2
6)は伝送路変動速度推定回路、(27)は忘却係数設
定回路、(28)は等北部である。 なお、図中、同一符号は同一、又は相当部分を示す。 代理人  山  崎  宗  秋  −−一”1〜−二
」 @1図 箪2図   第3図 第4図 第5図 第10図      第11図 1N6図 第7図 ノ 第  8 rl!J 13 ノ 第9図
FIG. 1 is a block diagram of an adaptive equalizer according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of a Doppler frequency estimation table provided in the transmission path fluctuation speed estimation circuit (22) of FIG. 1, and FIG. 1 is an explanatory diagram of a forgetting coefficient setting table provided in the forgetting coefficient setting circuit (23) of FIG. 1, and FIG. 4 is an illustration of the overall processing flow of an embodiment of FIG. 1 and the internal operation of each circuit. 5 is a block diagram showing another embodiment of the present invention. FIG. 6 is a flowchart showing the overall processing flow and internal operation of each circuit in the embodiment of FIG. 5.
The figure is a block diagram of a conventional decision feedback adaptive equalizer, and FIG. 8 is a block diagram of a receiver using the decision feedback adaptive equalizer of FIG.
FIG. 9 is a diagram of the burst format of the received signal, and FIG. 10 is the ratio of signal energy per bit of the received signal to noise power density Eb/N. Fig. 11 shows the error rate characteristic curve for the forgetting coefficient of the decision feedback adaptive equalizer when the parameter is taken as a parameter. It is a target line diagram. (20) is a tap coefficient update circuit, (21) is a power ratio estimation circuit, (22) is a transmission path fluctuation speed estimation circuit, (23) is a forgetting coefficient setting circuit, (24) is an electric field strength measurement circuit, (2
6) is the transmission line fluctuation speed estimation circuit, (27) is the forgetting coefficient setting circuit, and (28) is the northern part. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent So Aki Yamazaki --1"1~-2" @1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 10 Figure 11 Figure 1N6 Figure 7-8 rl! J 13 Figure 9

Claims (2)

【特許請求の範囲】[Claims] (1)タップ付き遅延回路を有し、該タップ付き遅延回
路の各タップ出力にタップ係数を乗じて加算し該加算結
果に基づいて受信波の等化を行うように構成された適応
等化器において、フィルタのカップ係数値から伝送路の
変動速度を推定する伝送路変動速度推定回路と、受信信
号の所定情報の値とタップ係数値と入力信号の積和との
差である誤差から受信信号と雑音の電力比を推定する電
力比推定回路と、上記伝送路変動速度推定回路による伝
送路変動速度推定値と上記電力比推定回路による電力比
推定値とからデータの時間に対する重み付け係数を求め
る忘却係数設定回路と、受信信号の所定情報の値とタッ
プ係数値と入力信号の積和との差と忘却係数とに基づい
てフィルタのタップ係数の更新を行うタップ係数更新回
路とを備えたことを特徴とする適応等化器。
(1) An adaptive equalizer having a tapped delay circuit, configured to multiply each tap output of the tapped delay circuit by a tap coefficient and add the result, and equalize the received wave based on the addition result. A transmission path fluctuation speed estimating circuit estimates the fluctuation speed of the transmission path from the cup coefficient value of the filter, and a transmission path fluctuation speed estimation circuit that estimates the fluctuation speed of the transmission path from the cup coefficient value of the filter, and the reception signal is estimated from the error that is the difference between the value of predetermined information of the reception signal, the tap coefficient value, and the sum of products of the input signal. and a power ratio estimating circuit for estimating the power ratio of the noise to The present invention includes a coefficient setting circuit, and a tap coefficient updating circuit that updates the tap coefficients of the filter based on the difference between the value of predetermined information of the received signal, the tap coefficient value, and the sum of products of the input signal, and the forgetting coefficient. Features an adaptive equalizer.
(2)受信信号の電界強度を計測する電解強度計測回路
と、その計測値に基づいて伝送路の変動速度を推定する
伝送路変動速度推定回路と、上記電界強度計測回路の計
測値と上記伝送路変動速度推定値とを用いてデータの時
間に対する重み付け係数を求める忘却係数設定回路と、
上記忘却係数設定回路で設定した忘却係数を用いて受信
信号の等化を行う等化部とを備えたことを特徴とする適
応等化器。
(2) A field strength measuring circuit that measures the electric field strength of the received signal, a transmission path fluctuation speed estimation circuit that estimates the fluctuation speed of the transmission path based on the measured value, and the measured value of the field strength measuring circuit and the transmission a forgetting coefficient setting circuit that calculates a weighting coefficient for time of data using the estimated road fluctuation speed;
An adaptive equalizer comprising: an equalizer that equalizes a received signal using the forgetting coefficient set by the forgetting coefficient setting circuit.
JP31669490A 1990-11-21 1990-11-21 Adaptive equalizer Pending JPH04208707A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31669490A JPH04208707A (en) 1990-11-21 1990-11-21 Adaptive equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31669490A JPH04208707A (en) 1990-11-21 1990-11-21 Adaptive equalizer

Publications (1)

Publication Number Publication Date
JPH04208707A true JPH04208707A (en) 1992-07-30

Family

ID=18079863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31669490A Pending JPH04208707A (en) 1990-11-21 1990-11-21 Adaptive equalizer

Country Status (1)

Country Link
JP (1) JPH04208707A (en)

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* Cited by examiner, † Cited by third party
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