TWI433349B - Vertical light emitting diode device structure and method of fabricating the same - Google Patents

Description

Vertical light emitting diode device structure and manufacturing method thereof

This invention relates to LED fabrication and, more particularly, to the fabrication of vertical LEDs and the LED components formed thereby.

Cross-reference to related applications

This application is part of the following application: U.S. Provisional Patent Application No. 61/445,516, filed on Feb. 22, 2011, and U.S. Patent Application Serial No. 12/912,727, filed on Oct. 26, 2010, U.S. Patent Application Serial No. 11/891, 466, filed on Aug. 10, 2007, and U.S. Patent Application Serial No. U.S. Patent Application Serial No. 12/415,467, the entire disclosure of which is incorporated herein by reference.

Vertical light-emitting diodes (LEDs) including GaN-based materials are becoming more and more popular as light sources. Typically, epitaxial material layers including GaN are deposited on non-GaN substrates such as sapphire (Al ₂ O ₃ ) due to the low cost availability of high quality sapphire substrates. However, high power GaN-based LEDs generate relatively high amounts of heat during use; this heat needs to be effectively dissipated to enable the use of large-sized LED light sources and extend the useful life of the LEDs.

Although the sapphire substrate can grow a high quality epitaxial layer, the sapphire substrate is neither conductive nor thermally conductive and must be replaced by a good thermal conductor before it can be used in the final LED component package.

There are a number of techniques that can replace sapphire with a thermally conductive substrate. In one of the techniques, an excimer laser is used to initiate the interfacial region of the decomposed GaN, thereby removing the sapphire growth substrate. A method of removing a sapphire substrate from a laser is disclosed in U.S. Patent Nos. 6,455,340, 7,001,824 and 7,015,117. However, current laser lift-off methods for fabricating GaN light-emitting diodes are incompatible with conventional semiconductor processes because they involve the use of expensive laser devices. In addition, laser lift-off can cause damage to the remaining semiconductor layers, such as cracking.

In an alternative technique, a new body substrate is bonded to the surface of the epitaxial material layer, followed by chemical mechanical polishing to remove the sapphire growth substrate. Significant cost savings can be achieved with chemical mechanical polishing (CMP). In addition, polishing is a milder method that results in less damage than laser lift-off. However, the surface of the epitaxial material layer may be uneven due to various component processes before bonding a new host substrate. When a new substrate is bonded to an uneven surface, adhesive voids may occur, thereby reducing the adhesive adhesion and/or causing stress in the resulting component.

Therefore, there is a need in the art for improved techniques for bonding a new body substrate to an epitaxial layer in the fabrication of LED components.

The present invention relates to a method of forming a compound semiconductor LED element such as a GaN-based LED element. Some of the methods of the present invention for use in various process steps are described in U.S. Published Patent Application No. 2009-0218590, No. 2008-0197367, No. 2011-0037051, and U.S. Patent No. 7,846,753, which are incorporated herein by reference. The disclosure is incorporated by reference. In these applications and patents, sapphire is a material used as a host substrate on which a compound semiconductor layer is fabricated.

In such co-transfer patents and applications, a growth substrate, such as sapphire, has a compound semiconductor epitaxial layer, such as InGaN, grown thereon that includes GaN. The epitaxial layer typically has a thickness of from 3 microns to 10 microns and the growth substrate is about 430 microns.

After the land patterning, the epitaxial layer is partially or completely removed in some areas where the trench is formed. A layer of dielectric material and a layer of hard material are sequentially deposited and patterned. Diamond or diamond-like carbon is an exemplary hard material. The hard material acts as a polish stop material during the growth substrate removal process. Typical thicknesses of hard materials are from 1 to 5 microns. Due to the presence of hard materials, the wafer surface becomes uneven and the step height is greater than 1 micron.

Therefore, in order to bond a new body substrate to the resulting uneven epitaxial layer, the present invention provides a metal layer deposited on the epitaxial layer and then planarizing the deposited metal layer. A new body substrate is bonded to the planarized metal layer and the first growth substrate is removed. Cutting is used to form individual LED elements.

According to the present invention, the metal layer deposited on the epitaxially formed semiconductor layer (particularly a semiconductor layer including GaN or a compound semiconductor material including GaN) may be planarized before being bonded to a new host substrate, And a vertical LED is formed. As used herein, the term "on" means that one layer is above another layer and is in direct contact with the layer in one or more places, or is separated from the lower layer by a layer of intermediate material selected. 1A depicts a portion of an entire wafer for forming a plurality of LED dies that will ultimately be processed into LED elements for incorporation into a lighting fixture or lighting fixture. For ease of illustration, only a few LED dies are depicted. In FIG. 1A, a first substrate 110 capable of supporting epitaxial growth is provided. Exemplary substrate materials include sapphire, ruthenium, AlN, SiC, GaAs, and GaP, although it is understood that any material capable of supporting epitaxial growth of a subsequently formed compound semiconductor material layer can be used as the substrate 110. An epitaxial layer 120 of a compound semiconductor such as GaN or InGaN is formed on the substrate 110. Although InGaN is depicted as an exemplary material, it should be understood that other compound semiconductors, such as InGaP, AlInGaN, AlInGaP, AlGaAs, GaAsP, or InGaAsP, may be used depending on the overall desired color of the LED, but are not limited thereto; therefore, the pattern The mark "InGaN" is used only to indicate such a compound semiconductor layer. Although not shown in the figures, various active layer structures may be included in layer 120, such as multi-quantum well (MQW) structures, n-doped and p-doped materials (which may be combined with prior patents incorporated by reference above) The descriptions in the application are the same or different). Note that Figure 1A shows only one portion of the wafer that will eventually be separated into a plurality of individual LED elements. A typical wafer includes a plurality of dies formed on a large support substrate wafer such that a plurality of dies can be produced simultaneously (which will ultimately be fabricated into a final component).

After forming the starting material layer of the vertical LED, the trench 130 is formed in the multilayer structure 120 (formed in FIG. 1A). A dry etch such as plasma etching, and in particular inductively coupled plasma etching, is selected for forming trenches 130.

A passivation material layer 140 is formed in the trench 130. The passivation material covers at least the sidewalls and the substrate of the trench. The passivation material selected includes dielectrics such as hafnium oxide, tantalum nitride, and the like. A hard material 150 is formed over the passivation material and is patterned to expose the epitaxial semiconductor material, which acts as a polish stop layer during the growth substrate removal process. The hardness of the hard material is greater than the hardness of the epitaxial semiconductor layer. The hard material 150 typically has a thickness of from 1 to 5 microns.

In the embodiment of Figure 1, a portion of the hard material covers at least a portion of the epitaxial semiconductor layer 120 to form a hard material "shoulder" on the region. As a result, as shown in Fig. 1A, the entire surface becomes uneven due to the presence of the "shoulder" of the hard material film, and the step height is usually larger than 1 μm. The hard material film may be selected from diamond, diamond-like carbon, carbide such as SiC, nitride such as boron nitride, but is not limited thereto. A detailed description of the above process steps can be found in the patent applications and patents incorporated by reference.

As seen in FIG. 1A, a metal layer 160 is selectively deposited over the semiconductor structure 120. The metal layer can serve as an electrical connection, for example, a p-electrode connection, and can be used for optical reflection of light generated in the semiconductor layer. Typical metals include nickel, silver, titanium, aluminum, platinum, and alloys thereof, but any metal or other conductive material that can serve as electrical and optical reflections can be used for layer 160, layer 160 and selected epitaxial semiconductor material 120. Rong.

A deposited metal layer 170 covers the entire surface of the structure. Typical metal deposit thicknesses are from 10 to 100 microns. Since the substrate structure is not flat prior to metal deposition, the deposited metal surface 175 is also not flat, as seen by surface 175 in Figure 1A. Preferably, the deposited metal has a thermal conductivity higher than 130 W/m‧K in order to effectively dissipate heat from the light-emitting semiconductor layer structure 120.

To prepare to bond the metal layer 170 to a new body substrate, the metal surface 175 is planarized to form a new, flat metal layer surface 177 in FIG. 1B. The planarization may be selected from mechanical, chemical, chemical mechanical or thermal reflow planarization techniques. Typical final metal thicknesses range from 1 to 80 microns. For laser chip separation using laser cutting techniques, metal thicknesses greater than 80 microns are not optimal. However, if other cutting techniques (eg, mechanical cutting techniques) are used, a thicker metal layer can be selected as appropriate. The new surface is then ready for subsequent wafer bonding processes.

In FIG. 1C, a new body substrate 200 is bonded to the new surface 177 of the metal layer 170 by a thin adhesive layer 180. The new body substrate is usually a non-metallic material with high thermal conductivity (thermal conductivity higher than 130 W/m‧K), such as SiC, AlN, tantalum or other semiconductor materials; however, depending on the final application, the metal substrate can also be selected. . The new body substrate desirably has sufficient mechanical strength to adequately support the layer of semiconductor material in subsequent processing and is easily cut by a laser or mechanical dicing saw. The original thickness of the new body substrate is typically greater than 100 microns; however, the original thickness depends on the original overall size selected. The adhesive layer 180 can be a metal such as a metal solder or any other suitable permanent bonding material that has good conductivity. Since the metal surface 177 is flat, wafer cracking or adhesion voids do not occur on the bonded body substrate 200.

As seen in Figure ID, the new body substrate 200 is thinned as appropriate via any conventional mechanical, chemical or chemical mechanical thinning technique, however, depending on the original thickness of the new body substrate and the final desired thickness, thinning may not be required. Typical final thicknesses for individual devices range from 50 to 500 microns. Next, the growth substrate 110 is removed by a suitable technique such as polishing or chemical mechanical polishing. At this time, the light emitting semiconductor layer structure 120 has been successfully transferred from the original growth substrate 110 to the new body substrate 200.

In FIG. 1E, the orientation of the structure has been reversed ("flip-chip"), the new body substrate 200 is at the bottom, and the light-emitting semiconductor layer structure 120 is at the top. In order to form a separate component, a cut is typically used to separate each LED. As shown in Figure 1E, laser cutting is used to separate, but any other device separation technique can be used. Advantageously, the laser cut forms a narrow slit width (as small as 10 microns) compared to other separation techniques. When using laser cutting, the laser sawing depth is approximately up to the new body substrate 200, but generally does not require complete laser separation. As shown in FIG. 1F, using the splitting tool 190 located below the new body substrate 200, the LED device components can be separated by mechanical splitting.

A separate component is shown in Figure 1G. The semiconductor layer structure 120 includes an InGaN epitaxial layer (3 to 10 microns). Optionally, the "shoulder" portion of the hard material 150 at the peripheral region of the semiconductor layer structure 120 remains after the components are separated. Layer 170 is a high thermal conductivity metal layer (1 to 80 microns, thermal conductivity greater than 130 W/m‧K), and component 200 is a new body substrate (50 to 150 microns).

2A-2G depict another aspect of the invention in which a layer of hard material 150' is deposited only in the trench 130. The hard material may partially or completely fill the trench 130. Because the hard material 150' is not completely coplanar with the semiconductor material 120, there is still an uneven surface after depositing the metal layer 170, and planarization is still required.

In Figure 2G', the hard material 150' has been removed by any conventional technique or by selecting a separation location (so that the hard material 150' is removed during device separation). In this manner, passivation material 140 forms an outer edge around semiconductor material 120.

After separation into individual components, the vertical LEDs are packaged and incorporated into the LED lighting fixture. Packaging can include the addition of various phosphors or other compounds to alter the perceived color of the emitted LED light.

While the above invention has been described in terms of various embodiments, these embodiments are not limiting. Those skilled in the art will appreciate numerous variations and modifications. Such changes and modifications are considered to be within the scope of the appended claims.

110. . . First substrate

120. . . Epitaxial layer/light emitting semiconductor layer structure

130. . . trench

140. . . Passivation material layer

150. . . Hard material

150'. . . Hard material

160. . . Metal layer

170. . . Deposited metal layer

175. . . Initial metal surface

177. . . Flattened metal layer surface

180. . . Adhesive layer

190. . . Splitting tool

200. . . New body substrate

1A through 1G depict a method of forming a vertical LED in accordance with an aspect of the present invention.

2A through 2G depict another method of forming a vertical LED in accordance with an aspect of the present invention.

2G' depicts another vertical LED structure in accordance with an aspect of the present invention.

120. . . Epitaxial layer/light emitting semiconductor layer structure

140. . . Passivation material layer

160. . . Metal layer

170. . . Deposited metal layer

180. . . Adhesive layer

200. . . New body substrate

Claims (18)

A method for fabricating a plurality of compound semiconductor vertical light-emitting diode grains, the plurality of light-emitting diode crystal grains comprising a compound semiconductor epitaxial layer having one or more nitride-based compound semiconductor materials, And bonding a new main body substrate to the compound semiconductor vertical light emitting diode, the method comprising: providing a first growth substrate capable of supporting epitaxial growth of the compound semiconductor thereon; forming a first growth substrate Or a plurality of epitaxial layers of a compound semiconductor material; forming one or more trenches in at least a portion of the compound semiconductor material; depositing a passivation material in the one or more trenches; at least partially in the one or more trenches Depositing a hard material in the trench, the hardness of the hard material being greater than the hardness of the compound semiconductor material; depositing a high thermal conductivity metal layer on the compound semiconductor material; planarizing the deposited metal layer to form a substantially flat metal layer For subsequent bonding of the new body substrate; bonding the new body substrate to the metal layer, the new body High thermal conductivity substrate plate; and removing the first growth substrate. A method of fabricating a plurality of compound semiconductor vertical light emitting diode grains according to claim 1, wherein the hard material is additionally deposited on at least a portion of the compound semiconductor material to form a hard material shoulder on the compound semiconductor material. A method of fabricating a plurality of compound semiconductor vertical light emitting diode dies according to claim 1, further comprising: selectively depositing a metal layer over at least a portion of the compound semiconductor material, the metal layers forming an electrode, an optical reflector Or both functions. A method of fabricating a plurality of compound semiconductor vertical light emitting diode dies according to claim 1, further comprising: depositing a bonding metal between the planarized metal layer and the new body substrate, wherein the new body substrate It is a non-metallic material. The method of claim 1, wherein the hard material is diamond, diamond-like carbon, boron nitride or tantalum carbide. The method of claim 1, wherein the growth substrate is removed by polishing or chemical mechanical polishing. A method of fabricating a plurality of compound semiconductor vertical light emitting diode dies of claim 1, further comprising device separation to form a single light emitting diode. A method of fabricating a plurality of compound semiconductor vertical light-emitting diode dies according to claim 7, wherein the device is laser-cut. A method of fabricating a plurality of compound semiconductor vertical light emitting diode grains according to claim 1, wherein at least one of the compound semiconductor epitaxial layers comprises GaN or InGaN. A method of forming a lighting element having a compound semiconductor vertical light emitting diode of claim 7, the method comprising packaging the separate components. A compound semiconductor vertical light emitting diode structure comprising a compound semiconductor epitaxial layer having one or more layers of a nitride-based compound semiconductor material and capable of being bonded onto a new host substrate, The structure comprises: one or more epitaxial layers of a compound semiconductor material forming a portion of a vertical light emitting diode; one or more trenches formed in at least a portion of the compound semiconductor material, thereby forming the compound semiconductor material Generating a plurality of grains therein; a layer of passivation material deposited in the one or more trenches; a hard material at least partially deposited in the one or more trenches, the hardness of the hard material being greater than a hardness of a compound semiconductor material; a high thermal conductivity flattening metal layer deposited on the compound semiconductor material, the metal layer having a thermal conductivity greater than 130 W/m ‧ and a thickness of about 1 to 80 μm; a layer on the planarization metal layer; and a new high thermal conductivity main body substrate bonded to the planarization metal layer via the adhesive layer Having a thickness of about 50 to 500 microns. The compound semiconductor vertical light emitting diode structure of claim 11, wherein the hard material is additionally deposited on at least a portion of the compound semiconductor material. The compound semiconductor vertical light emitting diode structure of claim 11, further comprising a selectively deposited metal layer, the metal layers being over at least a portion of the compound semiconductor material, the metal layers forming an electrode, an optical reflector, Or take care of both functions. The compound semiconductor vertical light emitting diode structure of claim 11, wherein the hard material is diamond, diamond-like carbon, boron nitride or tantalum carbide. The compound semiconductor vertical light emitting diode structure of claim 11, wherein at least one of the compound semiconductor epitaxial layers comprises a GaN or InGaN composite compound material. A semiconductor vertical light-emitting diode is separated from the structure of the channel 11 by a trench so that the hard material remains along the sidewall of the compound semiconductor layer. The semiconductor vertical light emitting diode of claim 16, wherein the hard material has been removed from a region adjacent to the compound semiconductor material. A lighting element comprising a packaged vertical light emitting diode as claimed in claim 16.