TWI431801B - Light emitting diode package, a lead frame and a conductor that applied to the light emitting diode package - Google Patents

Description

Semiconductor package structure, lead frame and conductive member applied to semiconductor package structure

The present invention relates to a semiconductor package structure, and more particularly to a semiconductor package structure and a lead frame and a conductive member applied to a semiconductor package structure.

Optoelectronic technology and technology continue to develop and advance, making the technology of Light Emitting Diode (LED) mature, and its longevity, power saving, small size, etc., has gradually replaced traditional light bulbs as Use for lighting or warnings.

In recent years, in order to satisfy the user's efficiency with respect to the light-emitting diode, a high-efficiency light-emitting diode has been developed, and the most representative one is a Piranha type light emitting diode. The brightness and illumination angle of the piranha-type light-emitting diode are wider than the traditional light-emitting diode, and the piranha-type light-emitting diode has four electrical pins to assist heat dissipation and stably support the light. Diode.

Figure 1A and Figure 1B show schematic diagrams of conductive members and lead frames for conventional piranha-type light-emitting diodes.

Referring to FIG. 1A, the conductive member 10 of the piranha-type light-emitting diode includes a wafer carrier 11 and a wire leg 12 having a carrier surface 13 for illumination. The wafer 14 is carried thereon, and the light-emitting chip 14 and the wire-bonding leg 12 are electrically connected to each other by a wire 15 to form a solid crystal bonding wire region centered on the carrier surface 13, and an epoxy resin and a silicone rubber are used. The package 16 composed of phosphor powder covers the solid crystal wire region to form a complete piranha-type light-emitting diode structure.

Please refer to "Picture 1B". For example, the lead frame 20 with a common bracket spacing of 12.7 mm (mm) is taken as an example. The electrical pins 17 extending from both sides of the semi-finished products of the respective conductive members are respectively connected by the two working strips 21. In order to connect the semi-finished products of the conductive parts in series, and the working strips are used for the manufacture of the conductive parts by the manufacturer for clamping by the transport machine for the die and electroplating processes to achieve the purpose of automatic production. Finally, the work strip is removed after the conductive member is packaged to form a finished product of a single piranha type light-emitting diode.

The package structure of the piranha-type light-emitting diode is used, since the solid-bonded wire area is limited to the periphery of the carrier surface of the wafer carrier, and the light-emitting chip only depends on the single wire-bonding area electrically connected by the wire and the wire-supporting leg. When the wire is in the packaging process, the stress change and the heat expansion and contraction effect of the package are mostly concentrated on the joint between the package and the conductive member, and the thermal expansion coefficient of the material of the resin material package and the metal material conductive member is different. It is easy to cause the wire to break due to the stress pull inside the package structure, and the piranha type light-emitting diode cannot be smoothly illuminated.

Due to the continuous increase in the price of metal materials in recent years, the copper metal and iron metal used in the piranha-type light-emitting diodes have increased by 110% to 200% in recent years. The amount of electroplating silver that is ultimately used as a scrap removal work strip and an oversized lead frame during the electroplating process will increase the material cost of the manufacturer when manufacturing the piranha-type light-emitting diode. Raising, this will force manufacturers to increase the price of goods to meet the cost needs. Conversely, manufacturers must even reduce profits to stimulate sales.

Therefore, how to avoid the breakage of the wire due to the stress of the packaging process, and effectively use the space of the lead frame to reduce the volume of the work bar to be removed, so that the manufacturer can improve the piranha type light-emitting diode. In addition to product quality, the need to reduce manufacturing costs is also a goal that technicians in related fields are currently eager to achieve.

In view of the above problems, the present invention provides a semiconductor package structure, a lead frame for a semiconductor package structure, and a conductive member, thereby improving the reliability of the product caused by the breakage of the wire of the conventional piranha type LED. The problem.

The semiconductor package structure of the present invention includes a conductive member, a semiconductor wafer, and a package. The conductive member further includes a wafer carrier and a wire leg, wherein the wafer carrier has a carrier surface and a first electrical connector extending from the at least one self-loading surface, the wire supporting leg having at least one surrounding the carrier surface and carrying a wiring portion arranged in a face and a second electrical tab extending from the wiring portion. The semiconductor wafer is disposed on the carrier surface and electrically connected to the semiconductor wafer and the wiring portion by at least one wire. The package covers the semiconductor wafer, the wires, the carrier surface, and the wiring portion to form a semiconductor package structure.

In addition, the wire-bonding leg of the present invention also has an extension that surrounds and is forked to the carrier surface and is covered by the package to provide a choice of a plurality of wiring areas of the lead frame.

The effect of the invention is that the wire supporting leg extends at least one connecting portion to reduce the pulling of the internal stress due to the difference in thermal expansion coefficient between the package body and the conductive member when the semiconductor package structure is packaged, thereby causing the wire to be easily broken. Improve the reliability of semiconductor package construction.

The above description of the contents of the present invention and the following embodiments are described. The principles of the invention are illustrated and explained, and further explanation of the scope of the patent application of the invention is provided.

Conventional technology

10‧‧‧Electrical parts

11‧‧‧ wafer foot

12‧‧‧Threading feet

13‧‧‧Meet

14‧‧‧Lighting chip

15‧‧‧Wire

16‧‧‧Package

17‧‧‧Electrical pins

20‧‧‧ lead frame

21‧‧‧Working bar

this invention

100‧‧‧Semiconductor package construction

110‧‧‧Electrical parts

111‧‧‧ wafer foot

112‧‧‧Threading feet

1121, 1122‧‧ ‧ wiring department

1123‧‧‧Central wiring department

113‧‧‧Meased

117‧‧‧First electrical tab

1171, 1172‧‧‧ first endpoint

118‧‧‧Second electrical tab

1181, 1182‧‧‧ second endpoint

120‧‧‧ lead frame

121‧‧‧jobs

140‧‧‧Semiconductor wafer

150‧‧‧First wire

151‧‧‧second wire

160‧‧‧Package

B1‧‧‧ first outer boundary

B1’‧‧‧ first inner boundary

B2‧‧‧ second outer boundary

B2’‧‧‧ second inner boundary

1A is a schematic perspective view of a conductive member of the prior art; FIG. 1B is a schematic plan view of a lead frame of the prior art; FIG. 2 is a plan view of the lead frame of the present invention; FIG. 3A is a conductive member of the present invention; 3B is a perspective view of a conductive member of the present invention; and FIG. 4 is a perspective view of a semiconductor package structure of the present invention.

Fig. 2 is a schematic view showing a lead frame applied to the semiconductor package structure of the present invention. The lead frame 120 disclosed in the present invention includes a wafer receiving leg 111, a wire supporting leg 112, and two working strips 121. The wafer carrier 111 has a carrying surface 113 and two first electrical tabs 117 extending from the loading surface 113 to the Y and -Y directions, respectively. The wire supporting leg 112 includes a central connecting portion 1123 and two second electrical tabs 118 extending from the central connecting portion 1123 to the Y and -Y directions, respectively.

The design of the lead frame 120 includes two working strips 121 respectively disposed on the upper and lower sides of the lead frame 120 and connected to the two first electrical tabs 117 and the second electrical tabs 118. Further, the two work bars 121 are used as a positioning control unit (media) for transport and transportation, that is, a method similar to chain transport, so that the purpose of automated production can be achieved. Taking one side (Y direction) of the lead frame 120 as an example, the first electrical tab 117 is The second electrical tabs 118 respectively have a first end point 1171 and a second end point 1181. The two end points are located inside the side of the work bar 121; and further, the first end point 1171 The second end point 1181 is located between the first outer boundary B1 and the first inner boundary B1' of the work bar 121.

Therefore, the end positions of the first electrical tab 117 and the second electrical tab 118 can be used to determine the position of the inner and outer boundaries of the work bar 121. Therefore, the first electrical tab 117 and the second electrical tab 118 of the other side of the lead frame 120 (the Y-direction) also have a first end point 1172 and a second end point 1182, and The two end points are located between the second outer boundary B2 and the second inner boundary B2' of the side work bar 121.

Therefore, as described above, the lead frame structure of the present invention not only increases the function of the transport positioning of the work bar but also the production process of the automatic stamping and plating, not only increases the structural strength of the lead frame 120, but also limits the width of the conventional lead frame 120 by 25.4. The reduction of the mm (mm) to 20.4 mm (mm) greatly reduces the overall volume of the lead frame 120, thereby reducing the material cost and manufacturing cost of the lead frame 120 and the plating process.

In addition, the wire leg 112 may further include a wiring portion 1121, 1122 surrounding the periphery of the carrier surface 113 for providing a plurality of connection (weld) line regions of the lead frame 120.

3A and 4 are schematic perspective views showing a semiconductor package structure and a conductive member applied to a semiconductor package structure of the present invention. The semiconductor package structure 100 disclosed in the present invention includes a conductive member 110, a semiconductor wafer 140, and a package 160. The semiconductor package structure 100 disclosed in the present invention is a light emitting diode package structure.

The conductive member 110 of the present invention includes a wafer carrier 111 and a wire leg 112. The wafer carrier 111 has a carrying surface 113 and two first electrical tabs extending from the loading surface 113 117. The wire supporting leg 112 includes a central connecting portion 1123, two connecting portions 1121 and 1122 surrounding the periphery of the carrying surface 113, and second electrical tabs 118 extending from the central connecting portion 1123, respectively, and the first wire 150 and the second wire The wires 151 are electrically connected to the semiconductor wafer 140 and the wiring portions 1122 and 1121, respectively. The wafer holder 111 and the wire bonding leg 112 of the present invention respectively have a first electrical tab 117 and a second electrical tab 118. The first electrical tab 117 of the wafer receiving leg 111 and the wire bonding leg 112 Each of the second electrical contacts 118 has a first end point 1172 and a second end point 1182 for electrically connecting electrodes (not shown) to provide an electrical energy to the conductive member 110. The other first electrical tab 117 and the second electrical tab 118 of the die-receiving leg 111 and the wire-bonding leg 112 respectively have a first end point 1171 and a second end point 1181, which are used as a semiconductor. The heat dissipation of the package structure 100 increases the heat dissipation area of the semiconductor package structure 100.

The two wiring portions 1121, 1122 and the carrying surface 113 form an interdigitated structure, and in addition to providing a plurality of bonding line regions, a safety region not affected by the internal stress of the bracket corner is also provided. To avoid the problem that the subsequent process may be caused by the internal stress or the deformation of the bracket or the bracket.

In addition, as shown in the "3A", the two wiring portions 1121, 1122 surrounding the carrying surface 113 may be designed as a single wiring portion around the carrying surface 113 as shown in "3B". The first electrical conductors 118 are electrically connected to the semiconductor wafer 140 and the wiring portion 1122.

The semiconductor wafer 140 of the present invention is an illuminating wafer disposed on the carrying surface 113 of the wafer carrier 111. The first wire 150 or the second wire 151 is electrically connected to the second electrical tab 118 electrically connected to the electrode of the semiconductor chip 140 and the wire bonding leg 112 to electrically conduct the semiconductor chip 140 and The semiconductor wafer 140 is illuminated. It is worth noting that The wire bonding pins 112 of the present invention can selectively connect the second electrical connectors 118 to the electrodes at the same time according to the design of the semiconductor wafer 140. Therefore, the semiconductor wafers 140 can have two wires 150 and 151 respectively. It is connected to the two wiring portions 1122 and 1121 of the wire supporting leg 112 to avoid the problem of disconnection of a single wire, thereby increasing the reliability of the product.

However, the die pad 111 and the wire leg 112 of the conductive member 110 of the present invention may also be designed to have a single first electrical tab 117 and a second electrical tab 118, respectively, and respectively from the first electrical property. The ejector 117 and the second electrical tab 118 extend to the first end 1172 and the second end 1182 for electrical connection to the electrodes, and are not limited to the embodiments disclosed herein.

Please continue to refer to "Figure 4". The main material of the package 160 is epoxy resin or Silicone, and then covered with a phosphor powder or mixed process, and then covered with the surface 113, at least one wiring. The portions 1121, 1122, the semiconductor wafer 140, and the first conductive line 150 form a semiconductor package structure 100. The wiring portions 1121 and 1122 of the wire bonding pins 112 are disposed around the carrier surface 113 to form a safety bonding wire region with minimal influence of stress and deformation of the package body 160, thereby effectively reducing the resin between the wire bonding pins 112 and the package body 160. The stress caused by the difference in thermal expansion coefficient between the material and the metal material avoids the problem that the first wire 150 is broken due to the internal stress generated by the curing of the package 160.

In other words, the wire bonding legs 112 of the semiconductor package structure 100 and the wafer carrier pins 111 have partial interdigitated alignment regions, which are any lateral extensions of the wire bonding pins 112 (eg, the wiring portions 1121 in the X direction). 1122) and the carrier surface 113; therefore, the internal stress is not concentrated on the semicircular notch at both ends of the package body 160 and is concentrated in the staggered region (central region); that is, the package body 160 is located in the package body 160 due to the curing process of the package body 160 and The conductive member 110 is pulled outwardly The internal stress also decreases.

Furthermore, the first wire 150 is not located in a direction in which the internal stress is pulled outward, and its preferred position is perpendicular to the direction of the maximum stress.

In addition, the wiring portions 1121 and 1122 of the present invention are designed to surround the carrier surface 113 of the wafer carrier 111 according to the analysis result of the Finite Element Analysis (FEA), and the analysis simulation data is: conventional piranha type The deformation amount of the solid crystal bonding wire region of the light emitting diode is between 0.0172 and 0.0315 mm (mm), and the deformation amount of the solid crystal bonding wire region of the conductive member 110 of the present invention is between 0.0161 and 0.0295 mm (mm). The amount of deformation of the piranha type LED is significantly less than that of the conventional piranha type. Therefore, the design of the wiring portion 1121 of the present invention can effectively improve the material difference selected by the package body 160 and the conductive member 110, resulting in a difference in thermal expansion coefficient, causing stress pull inside the semiconductor package structure 100, thereby making the first wire 150 easy. The problem of breakage.

The semiconductor package structure of the present invention, the lead frame and the conductive member applied to the semiconductor package structure, wherein the wire leg extends at least one wire portion surrounding the carrier surface to reduce the possibility of breakage of the wire due to stress pulling during packaging In order to improve the reliability of the semiconductor package structure.

Although the embodiments of the present invention are disclosed above, it is not intended to limit the present invention, and those skilled in the art, regardless of the spirit and scope of the present invention, the shapes, structures, and features described in the scope of the present application. And the spirit of the invention is subject to change. Therefore, the scope of patent protection of the present invention is subject to the scope of the patent application attached to the specification.

100‧‧‧Semiconductor package construction

110‧‧‧Electrical parts

111‧‧‧ wafer foot

112‧‧‧Threading feet

1121, 1122‧‧ ‧ wiring department

1123‧‧‧Central wiring department

113‧‧‧Meased

117‧‧‧First electrical tab

1171, 1172‧‧‧ first endpoint

118‧‧‧Second electrical tab

1182‧‧‧second endpoint

140‧‧‧Semiconductor wafer

150‧‧‧First wire

160‧‧‧Package

Claims (6)

A lead frame for a semiconductor package structure includes: a wafer carrier having a carrier surface and a first electrical tab extending from the carrier surface; a wire leg supporting the wire branch The foot includes a central wiring portion and a second electrical tab extending from the central wiring portion; and a working strip connecting the first electrical tab and the second electrical tab, wherein the leg The working strip includes a first outer boundary and a first inner boundary, and the first electrical tab and the second electrical tab end edge are located between the first outer boundary and the first inner boundary. The lead frame for use in a semiconductor package structure according to claim 1, wherein the wire leg has a wire portion surrounding the carrier surface. The lead frame for use in a semiconductor package construction according to claim 1, wherein the wire leg has two wire portions surrounding the carrier surface. The lead frame for a semiconductor package structure according to claim 1, wherein the wire bonding leg forms a fork structure with the wafer bearing leg. The lead frame for use in a semiconductor package structure according to claim 4, wherein the fork structure is combined by the mounting surface and the wiring portion extending from the central wiring portion. The lead frame for a semiconductor package structure according to claim 1, wherein the extending direction of the first electrical tab extending from the carrier surface and the second extending from the central wiring portion Extension direction of the electrical tab the same.