TWI426603B - Hole-based ultra-deep photodiode in a cmos image sensor and a process thereof - Google Patents

Description

Hole-type ultra-deep light diode of complementary metal oxide semiconductor image sensor and manufacturing method thereof

The present invention relates to a complementary metal oxide semiconductor (CMOS) image sensor, and more particularly to a cavity type ultra-deep light diode for use in a CMOS image sensor of an automobile.

Complementary metal oxide semiconductor (CMOS) image sensors are commonly used in mobile phone cameras, webcams, surveillance cameras, toys or medical devices. CMOS image sensors can also be used in harsh environments, such as automotive applications, which are very demanding for image sensors due to their harsh operating environment. In order to be applied to a car, some problems of the CMOS image sensor must be solved.

First, in order for the car to get more detailed information at night to make a decision, the image sensor must have a higher sensitivity or signal to noise ratio (SNR).

Second, since the operating temperature of the car is higher than that of a general application, such as a camera for a mobile phone, a lower dark current is required to maintain a high dynamic range and reduce dark signal non-uniformity (DSNU). And reduce dark signal pulse noise.

Third, since the road surface scene at night is of a high dynamic range type, the CMOS image sensor requires good bloom control in the super bright area to prevent the dark areas around it from being overcharged by the extra bright areas. For some traditional high dynamic range mechanisms, due to the different integration time of the photodiode, the longer accumulated photodiode will destroy the message of the shorter accumulated photodiode.

Fourth, because the taillights and traffic signs have strong red light components, red light information is very important for automotive applications. Furthermore, in order to make a better decision, the image sensor needs to collect infrared light and near-infrared light information outside the visible spectrum.

Each pixel of a conventional CMOS image sensor expresses a signal electronically, and the transistors in the pixel are all N-type metal oxide semiconductor (NMOS) transistors. In the pixel, holes and electrons generated by photons are stored on the P side and the N side of the photodiode, respectively. After exposure, the NMOS transfer gate only transmits electrons to the N-type floating diffusion (FD) node, which converts the electrons into a voltage signal. This voltage signal is then passed by the subsequent circuit to the output of the pixel.

In order to improve the above-mentioned dark current and overflow problems, the hole type photodiode as shown in the first figure is disclosed. For reference, "Low-Crosstalk and Low-Dark-Current CMOS Image-Sensor technology" by Eric Stevens et al. Using a Hole-Based Detector", IEEE International Solid-State Circuits Conference 2008, 60-61.

The hole-type photodiode shown in the first figure is more capable of suppressing dark current than conventional electronic CMOS image sensors. Wherein, the P-type substrate 10 can serve as a discharge area of the overflow hole to transfer the bulk dark current. In addition, the dark current can be greatly reduced by the doping of the dopant at the Si/SiO ₂ interface, such as the shallow trench isolation region (STI) 12 and the N+ well 14, which is different from the electronic CMOS image sensing. The device will produce a dopant separation there. In addition, since the mobility of the hole is smaller than that of the electron, the drift current and the diffusion current of the cavity type CMOS image sensor are much smaller than that of the electronic CMOS image sensor under the same electric field and charge distribution. . Moreover, since the grounded P-type substrate 10 provides a low potential to discharge the hole of the hole-type photodiode, it can provide good overflow control and is suitable for automotive applications.

However, since the N-type dopant is heavier than the P-type dopant, the depth of the P-type photodiode 16 of the hole-type CMOS image sensor is limited by the implantation depth of the N-type well 18. For example, the atomic weight of the N-type phosphorus is 30.97 or the arsenic is 74.92, and the atomic weight of the P-type boron is 10.81. Therefore, the shallow P-type photodiode 16 cannot absorb a sufficient electron-hole pair to cover the absorption region of the red/near-infrared light. On the other hand, for a given depth of P-type photodiode 16, the depth of the N-type well 18 will be limited by crosstalk and spillover control. If it is too deep, the diffusion charge will enter adjacent pixels and cannot be absorbed by the P-type photodiode 16.

Therefore, there is a need to propose a novel CMOS image sensor to improve the red/near-infrared light response of the structure shown in the first figure and maintain its overflow and interference control.

In view of the above, one of the objects of the embodiments of the present invention is to provide a structure and a process for a cavity type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, which has an improved red/near infrared Photoreaction, reduced interference, spillover and less dark current.

According to an embodiment of the invention, the hole-type ultra-deep light diode of the CMOS image sensor comprises a P-type substrate, an N-type epitaxial layer and an ultra-deep P-type photodiode implantation region. The P-type substrate is grounded or connected to a negative supply. The N-type epitaxial layer is grown on a P-type substrate and connected to a positive power supply. The ultra-deep P-type photodiode implantation region is formed in the N-type epitaxial layer.

In order to enhance the longer wavelength response of red/near-infrared light and reduce diffusion interference, the electronic photodiode of the second figure has a deep N-type photodiode 20 that can absorb electron-hole pairs to cover red light. / Near-infrared light absorbs the area and absorbs more signals. In addition, the diffusion charge of the P-type epitaxial layer 22 under the deep N-type photodiode 20 can be largely reduced, and thus, the diffusion charge entering the adjacent pixel can be reduced. In the first figure, the interference caused by the overflow of the overflow will cause a poor red/near-infrared light reaction. However, the second map does not have a spillover of the first map.

In order to take advantage of the advantages of the first and second figures, the third figure shows a cross-sectional view of a cavity-type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor according to an embodiment of the invention. The figure shows only the main components. For a more detailed structure, please refer to the fourth C diagram. In the present embodiment, "deep" or "ultra-deep" means greater than 0.5 microns, such as 0.5-2 microns, and in a preferred embodiment means greater than 2 microns. The disclosed light diodes can be used in harsh environments, such as automotive applications, but are not limited thereto. As described in the first figure, the cavity type photodiode can reach a lower dark current, so the photodiode of the embodiment can meet the severe temperature requirements of automotive applications.

In the present embodiment, as in the first figure, the P-type substrate 30 is grounded or connected to a negative power supply. The P-type substrate 30 is used to discharge the overflow holes, which is advantageous for high dynamic range scenes at night. Under normal operation, the P-type substrate 30 can reduce the interference of red/near-infrared light signals. Further details regarding the spillover control can be found in "Interline CCD Image Sensor with an Antiblooming Structure" by Yasuo Ishihara et al., IEEE Transactions on Electron Devices, Vol. ED-31, No. 1, January 1984; or G. "Super Small, Sub 2μm Pixels For Novel CMOS Image Sensors" by Agranov et al., International Image Sensor Workshop, June 7-10, 2007, Ogunquit, Maine USA.

The N-type epitaxial layer 31 is formed on the P-type substrate 30 and is connected to the positive power supply AVDD. A deep P-type photodiode 32 implant region is formed in the N-type epitaxial layer 31. Since the present embodiment uses the N-type epitaxial layer 31 instead of the N-type well as in the first figure, it is not limited by the implantation depth of the heavier N-type dopant. Since the P-type dopant is lighter, the deep P-type photodiode 32 implantation region of the present embodiment can be deeper than the conventional electronic photodiode, thereby improving signal noise ratio and red light/near. Infrared light reaction.

An isolation region, such as a shallow trench isolation region (STI) 33, is formed in the N-type epitaxial layer 31. An N+ cell isolation layer 34 is formed on the sides and the bottom of the shallow trench isolation region 33. Compared with the P-type isolation layer 24 of the second figure, since the N-type dopant is heavy, the heat diffusion of the N-type isolation layer 34 of the present embodiment can be greatly reduced. Therefore, the isolation layer can be miniaturized and more space is left to the photodiode 32. Thereby, signal absorption and interference problems can be improved.

A transfer gate 35 is formed on the N-type epitaxial layer 31 between the deep P-type photodiode 32 implant region and the P-type floating diffusion (P+FD) 36 implant region.

The fourth to fourth C-pictures show the process of the hole-type ultra-deep light diode of the CMOS image sensor of the embodiment of the present invention. The same constituent elements as those in the third diagram are denoted by the same component symbols. The conventional semiconductor process technology can be used for each step, and the details are omitted.

In FIG. 4A, a P-type substrate (or simply a substrate) 30 is provided, and an N-type epitaxial layer (or simply an epitaxial layer) 31 is grown thereon. In this embodiment, the thickness of the epitaxial layer 31 is 6 micrometers or more, but not limited thereto.

Next, still referring to FIG. 4A, a plurality of deep P-type photodiode implants are performed to form a deep P-type photodiode (or simply photodiode) 32 implant region. The implant is performed in an area defined by a mask (not shown). Different energies can be used for each implant to achieve the desired profile. In addition, heat treatment can be used to smooth the contour after each implantation. The contour can also be determined according to the heat treatment of the subsequent process steps. Next, a shallow trench isolation region 33 is formed in the epitaxial layer 31.

In FIG. 4B, a cell isolation layer (or cell N-well) 34 is implanted on the sides and bottom of the shallow trench isolation region 33, and a deep isolation layer is implanted under the cell isolation layer 34 (or Deep N-type well) 37. In addition, an N-type channel 38 implant region is implanted in the surface region of the epitaxial layer 31, which is located above the implant region of the deep-light diode 32. The cell isolation layer 34, the deep isolation layer 37, and the channel 38 implant region can be performed in an appropriate order. Next, a transfer gate 35 is formed on the epitaxial layer 31.

In the fourth C diagram, a pinning 39 implant region is implanted on the surface layer region of the epitaxial layer 31. In this embodiment, the N-type tip 39 implant region is located within the implanted region of the channel 38. A P-type surface photodiode 40 implanted region is implanted between the implantation region of the channel 38 and the implant region of the deep-light diode 32 as a main hole-type photodiode. In this embodiment, the tip 39 implant region and the channel 38 implant region are primarily used to suppress dark current and optimize the transfer gate 35. The tip 39 implant region and the surface photodiode 40 implant region can be performed in a suitable order. Next, a P+ floating diffusion 36 implanted region is implanted.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following Within the scope of the patent application.

10‧‧‧P type substrate

12‧‧‧Shallow trench isolation zone

14‧‧‧N+ well

16‧‧‧Shallow P-type photodiode

18‧‧‧N type well

20‧‧‧Deep N-type photodiode

22‧‧‧P-type epitaxial layer

24‧‧‧P+ well

30‧‧‧P type substrate

31‧‧‧N type epitaxial layer

32‧‧‧Deep P-type photodiode

33‧‧‧Shallow trench isolation zone

34‧‧‧Isolation

35‧‧‧Transmission gate

36‧‧‧P+floating diffusion

37‧‧‧Deep isolation

38‧‧‧N-channel

39‧‧‧ Pinning

40‧‧‧Surface light diode

The first figure shows a cross-sectional view of a cavity type photodiode of a conventional CMOS image sensor.
The second figure shows an electronic deep-light diode.
The third figure shows a cross-sectional view of a cavity-type ultra-deep light diode of a CMOS image sensor according to an embodiment of the present invention.
The fourth to fourth C-pictures show the process of the hole-type ultra-deep light diode of the CMOS image sensor of the embodiment of the present invention.

30‧‧‧P type substrate

31‧‧‧N type epitaxial layer

32‧‧‧Deep P-type photodiode

33‧‧‧Shallow trench isolation zone

34‧‧‧Isolation

35‧‧‧Transmission gate

36‧‧‧P+floating diffusion

Claims (18)

A cavity-type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, comprising:
a P-type substrate, grounded or connected to a negative power supply;
An N-type epitaxial layer is grown on the P-type substrate, the N-type epitaxial layer is connected to a positive power supply; and an ultra-deep P-type photodiode implanted region is formed in the N-type epitaxial layer . The hole-type ultra-deep light diode of the CMOS image sensor according to claim 1, wherein the ultra-deep P-type photodiode implantation region has a thickness greater than 0.5 μm. The hole-type ultra-deep light diode of the CMOS image sensor according to claim 2, wherein the ultra-deep P-type photodiode implantation region has a thickness of 0.5 to 2 μm. The hole-type ultra-deep light diode of the CMOS image sensor according to claim 2, wherein the ultra-deep P-type photodiode implant region has a thickness greater than 2 micrometers. The hole type ultra-deep light diode of the CMOS image sensor described in claim 1 of the patent application further includes:
An isolation region is formed in the N-type epitaxial layer. The hole-type ultra-deep light diode of the CMOS image sensor according to claim 5, wherein the isolation region is a shallow trench isolation region. The hole-type ultra-deep light diode of the CMOS image sensor described in claim 5 of the patent application further includes:
An N-type cell isolation layer is formed on the sides and the bottom of the isolation region. A method for manufacturing a cavity type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, comprising:
Providing a P-type substrate;
An N-type epitaxial layer is grown on the P-type substrate; and an ultra-deep P-type photodiode implant region is formed in the N-type epitaxial layer. The method for manufacturing a cavity-type ultra-deep light diode of a CMOS image sensor according to claim 8 , wherein the forming of the ultra-deep P-type photodiode implant region comprises using different energy to perform a plurality of implantations. In. The method for manufacturing the cavity type ultra-deep light diode of the CMOS image sensor according to claim 9 of the patent application scope further includes:
A heat treatment is applied after each implantation or by subsequent processing steps. The method for manufacturing a cavity type ultra-deep light diode of the CMOS image sensor according to claim 8 of the patent application scope, further comprises:
An isolation region is formed in the N-type epitaxial layer. The method for manufacturing the cavity type ultra-deep light diode of the CMOS image sensor described in claim 11 of the patent application further includes:
Forming an N-type cell isolation layer on the sides and the bottom of the isolation region; and implanting an N-type deep isolation layer under the cell isolation layer. The method for manufacturing a cavity type ultra-deep light diode of the CMOS image sensor according to claim 8 of the patent application scope, further comprises:
A channel implant region is implanted in a surface region of one of the N-type epitaxial layers, wherein the channel implant region is above the ultra-deep P-type photodiode implant region. The method for manufacturing a cavity type ultra-deep light diode of the CMOS image sensor according to claim 13 of the patent application scope, further comprises:
Implanting an N-type pinning implant region on a surface region of the N-type epitaxial layer; and implanting a P-type surface photodiode implant region in the N-type epitaxial layer as a main The charge storage of the cavity type photodiode, wherein the surface photodiode implantation region is located between the channel implantation region and the ultra-deep P-type photodiode implantation region. The method for manufacturing a cavity type ultra-deep light diode of the CMOS image sensor according to claim 8 of the patent application scope, further comprises:
Forming a transfer gate on the N-type epitaxial layer; and forming a P-type floating diffusion (FD) implant region in the N-type epitaxial layer, wherein the transfer gate is located in the ultra-deep P-type photodiode implant The region is between the P-type floating diffusion implanted region. The method for manufacturing a cavity-type ultra-deep light diode of a CMOS image sensor according to claim 8 , wherein the ultra-deep P-type photodiode implant region has a thickness greater than 0.5 μm. The method for manufacturing a cavity-type ultra-deep light diode of the CMOS image sensor according to claim 16 , wherein the ultra-deep P-type photodiode implantation region has a thickness of 0.5 to 2 μm. The method for manufacturing a cavity-type ultra-deep light diode of the CMOS image sensor according to claim 16 , wherein the ultra-deep P-type photodiode implant region has a thickness greater than 2 μm.