TW201225268A - Hole-based ultra-deep photodiode in a CMOS image sensor and a process thereof - Google Patents

Hole-based ultra-deep photodiode in a CMOS image sensor and a process thereof Download PDF

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TW201225268A
TW201225268A TW99141774A TW99141774A TW201225268A TW 201225268 A TW201225268 A TW 201225268A TW 99141774 A TW99141774 A TW 99141774A TW 99141774 A TW99141774 A TW 99141774A TW 201225268 A TW201225268 A TW 201225268A
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image sensor
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TWI426603B (en
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Yang Wu
Fei-Xia Yu
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Himax Imaging Inc
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Abstract

A hole-based ultra-deep photodiode in a CMOS image sensor and an associated process are disclosed. A p-type substrate is grounded or connected to a negative power supply. An n-type epitaxial layer is grown on the p-type substrate, and is connected to a positive power supply. An ultra-deep p-type photodiode implant region is formed in the n-type epitaxial layer. Thermal steps are added to insure a smooth and deep doping profile.

Description

201225268 六、發明說明: 【發明所屬之技術領域】 _1] 本發明係有關一種互補式金屬氧化物半導體(CMOS)影 像感測器,特別是關於一種應用於汽車之CMOS影像感測 器的電洞型超深光一極體。 【先前技術】 [0002] 互補式金屬氧化物半導體(CMOS)影像感測器普遍應用 於行動電話之相機、網路攝影機、監視攝影機、玩具或 ^ 醫療設備。CM0S影像感測器還可應用於嚴厲的環境,例 如汽車應用,由於其嚴厲的操作環境,因此對於影像感 測器是非常苛求的。為了應用於汽車,必須解決CMOS影 像感測器的一些問題。 [0003] 第一,為了讓汽車於夜間能夠獲得更多細節訊息以進行 判定,影像感測器必須具有較高的靈敏度或信號雜訊比 (SNR)。 [00〇4]第二,由於汽車的操作溫度會高於一般應用,例如行動 〇 電話之相機’因此需要較低的暗電流,用以維持高動態 範圍,降低暗信號非均勻性(dark signal non— uniformity,DSNU)及降低暗信號脈衝雜訊(sh〇t noise) 0 [0005]第三,由於夜間的路面場景屬於高動態範圍型式,因此 CMOS影像感測器於超亮區域需要良好的外溢(bl〇〇ming )控制,以防止其翻較暗區域受到超亮區域之外溢電 荷而沖淡。對於傳統一些高動態範固機制,由於其光二 極體的累加(integration)時間不同,因此較長累加 0992072581-0 099141774 表單編號A0101 第3頁/共16頁 201225268 之光二極體會破壞較短累加之光二極體的訊息。 [_第四,由於汽車尾肢交通u具有㈣的紅光成分, 因此紅光訊息對於汽車應用是很重要的。再者,為了作 出更佳的判定,影像感測器需要收集可見光譜之外的紅 外光及近紅外光訊息。 闺賴CMOS影像感測器的每一像素係以電子來表示信號, 且像素中的電晶體皆型金屬氧化物半導體(NM〇s)電 晶體。於像素中,光子所產生的電洞及電子分別儲存於 光二極體的P側及N側。於曝光後,NM0S傳送閘僅傳送電 子至N型浮動擴散(floating diffusion,FD)節點, 再由FD接面電容將電子轉換為電壓信號。該電壓信號接 著由後續電路傳遞至像素的输出。 [0008] 為了改善上述的暗電流及外溢問題,因而揭露如第一圖 所示的電洞型光二極體,可參考Eric Stevens等人所發201225268 VI. Description of the Invention: [Technical Field of the Invention] _1] The present invention relates to a complementary metal oxide semiconductor (CMOS) image sensor, and more particularly to a hole for a CMOS image sensor of an automobile Super deep light one body. [Prior Art] [0002] Complementary metal oxide semiconductor (CMOS) image sensors are commonly used in mobile phone cameras, webcams, surveillance cameras, toys, or medical devices. The CM0S image sensor can also be used in harsh environments, such as automotive applications, which are very demanding for image sensors due to their harsh operating environment. In order to be applied to a car, some problems of the CMOS image sensor must be solved. [0003] First, in order for a car to obtain more detailed information for determination at night, the image sensor must have a higher sensitivity or signal to noise ratio (SNR). [00〇4] Second, since the operating temperature of the car will be higher than the general application, such as the camera of the mobile phone, it requires a lower dark current to maintain a high dynamic range and reduce dark signal non-uniformity (dark signal) Non-uniformity, DSNU) and reduction of dark signal pulse noise (sh〇t noise) 0 [0005] Third, since the road surface scene at night belongs to a high dynamic range type, the CMOS image sensor needs good in the super bright area. The bl〇〇ming control prevents the darker areas from being dimmed by the overflow of the super bright areas. For some traditional high-dynamic parametric mechanisms, due to the different integration time of the photodiode, the long-term accumulation of 0992072581-0 099141774 Form No. A0101 Page 3 of 16 201225268 Light diodes will destroy the shorter accumulation Light diode message. [_ Fourth, since the car tail traffic u has the red component of (4), the red light message is very important for automotive applications. Furthermore, in order to make a better decision, the image sensor needs to collect infrared and near-infrared light signals outside the visible spectrum. Each pixel of the CMOS image sensor expresses the signal electronically, and the transistors in the pixel are all metal oxide semiconductor (NM〇s) transistors. In the pixel, holes and electrons generated by photons are stored on the P side and the N side of the photodiode, respectively. After exposure, the NM0S transfer gate only delivers electrons to the N-type floating diffusion (FD) node, which converts the electrons into a voltage signal. This voltage signal is then passed to the output of the pixel by subsequent circuitry. [0008] In order to improve the above-mentioned dark current and overflow problems, the hole type photodiode as shown in the first figure is disclosed, which can be referred to by Eric Stevens et al.

表之 “Low-Crosstalk and LbwJDdrk」Curren1; CMOSTable "Low-Crosstalk and LbwJDdrk" Curren1; CMOS

Image-Sensor technology Using a Hole-BasedImage-Sensor technology Using a Hole-Based

Detector” ,2008年IEEE International Solid-State Circuits Conference, 60-61 。 [0009] 第一圖所示之電洞型光二極體較傳統電子型CMOS影像感 測器更能抑制暗電流。其中,P型基底1 〇可作為外溢電洞 的排放區,以轉移出基底(bulk)暗電流。此外,藉由 Si/Si〇2介面處之掺質(dopant)聚集,例如淺溝槽隔 離區(STI ) 12與N+井14之間,暗電流可大幅降低,此 異於電子型CMOS影像感測器會於該處產生摻質分離。另 099141774 表單編號A0101 0992072581-0 201225268 外,由岭;同的遷移率(㈣bUity)小於電子,因此在 2電場及電荷分佈狀況下,電洞型⑽s影像感測器的 休抓(drift) 1流及擴散電流遠小於電子型CMOS影像 感測器H由於接地之P型基㈣提供低電位以排放 電洞型光—極體所外溢電洞,因而可提供良好外溢控制 ,亟適用於汽車應用。 [0010] ο 然而,由於N型摻質重於p型摻質,使得電洞型CMOS影像 感測器的P型光二極體16之深度受限於n型井18的植入深 度。例如’ N型磷的原子量為30. 97或砷為74. 92,而p型 棚的原子量為1〇· 81。因此,淺p型光二極體16無法吸收 足夠電子-電洞對以涵蓋紅光/近紅外兔的吸收區域。另 一方面’對於給定深度的P整先二極體16,N型井18的深 度將受限於干擾(crosstalk)及外溢控制。如果太深 ,則擴散電荷會進入鄰近像素,而無法被P型光二極體16Detector", IEEE International Solid-State Circuits Conference 2008, 60-61. [0009] The hole-type photodiode shown in the first figure is more capable of suppressing dark current than conventional electronic CMOS image sensors. The type substrate 1 can serve as a discharge area for the overflow hole to transfer the bulk dark current. In addition, by the dopant accumulation at the Si/Si〇2 interface, such as a shallow trench isolation region (STI) Between 12 and N+ well 14, the dark current can be greatly reduced, which is different from the electronic CMOS image sensor where the dopant separation occurs. Another 099141774 Form No. A0101 0992072581-0 201225268, by Ling; the same The mobility ((4) bUity) is smaller than that of electrons. Therefore, under the condition of 2 electric field and charge distribution, the drift 1 current and diffusion current of the hole type (10) s image sensor are much smaller than that of the electronic CMOS image sensor H due to grounding. The P-type base (4) provides a low potential to discharge the holes of the hole-type light-pole body, thus providing good overflow control and suitable for automotive applications. [0010] ο However, since the N-type dopant is heavier than the p-type dopant Quality, making hole-type CMOS image The depth of the P-type photodiode 16 of the sensor is limited by the implantation depth of the n-type well 18. For example, the atomic weight of the N-type phosphorus is 30.97 or the arsenic is 74.92, and the atomic weight of the p-type shed is 1. 〇 81. Therefore, the shallow p-type photodiode 16 cannot absorb enough electron-hole pairs to cover the absorption region of the red/near-infrared rabbit. On the other hand, 'for a given depth of the P-first diode 16, The depth of the N-well 18 will be limited by crosstalk and spillover control. If too deep, the diffused charge will enter adjacent pixels and will not be P-type photodiode 16

[0011] ❹ 因此,亟需提出一種新穎CMOS影像感測器,以改進第一 圖所示結構之紅光/近紅外考反應並維持其外溢及干擾控 制。 【發明内容】 [0012] 鑑於上述,本發明實施例的目的之一在於提出一種互補 式金屬氧化物半導體(CMOS)影像感測器之電洞型超深 光二極體的結構及製程,其具有改良之紅光/近紅外光反 應、降低之干擾、外溢及較小之暗電流。 根據本發明實施例,CMOS影像感測器之電洞型超深光二 極體包含P型基底、N型磊晶層及超深P型光二極體植入區 099141774 表單編號A0101 第5頁/共16頁 0992072581-0 [0013] 201225268 域。P型基底接地或連接至負電源供給。N型磊晶層成長 於P型基底上,且連接至正電源供給。超深p型光二極體 植入區域形成於N型磊晶層内。 【實施方式] [0014] [0015] [0016] 099141774 為了增強紅光/近紅外光之較長波長反應並降低擴散干擾 ,第二圖提出之電子型光二極體具有一深N型光二極體2〇 ,其可吸收電子-電洞對以涵蓋紅光/近紅外光吸收區域 並吸收更多信號。此外,可大量降低位於深N型光二極體 20底下的P型為晶層22之擴散電荷=',因此,即可降低進入 鄰近像素之擴散電荷。於第一圖中,因外溢排出所降低 之干擾卻會造成不良的紅光/近紅外光反應。然而,第二 圖則沒有第一圖之外溢排出情形'。 為了兼顧第一圖及第二圖之優點,第三圖顯示本發明實 施例之互補式金屬氡化物半導體(CMOS)影像感測器之 電洞型超深光二極體的剖面圖。囷式僅顯示出主要組成 元件,較詳細結構請參閱第四C圖。在本實施例中,” , ”或”超深(ultra-deep) ”係指大於0. 5微米,例如 0. 5-2微米’在一較佳實施例中則指大於2微米。所揭露 之光二極體可適用於嚴厲環境,例如汽車應用,但不以 此為限。如第一圖所述,電洞型光二極體可達較低暗電 流,因此本實施例之光二極體可符合汽車應用的嚴苛溫 度要求。 在本實施例中’如同第一圖,P型基底30接地或連接至負 電源供給°卩型基底30用以排出外溢電洞,此有利於夜間 的高動態範圍場景。於一般操作下,P型基底30可降低紅 表單編號A0101 第6頁/共16頁 0992072581-0 201225268 光/近紅外光信號的干擾。關於外溢控制的進一步細節可 參考Yasuo Ishihara等人所發表之“InterUne ccd[0011] Therefore, there is a need to propose a novel CMOS image sensor to improve the red/near infrared test of the structure shown in the first figure and maintain its overflow and interference control. SUMMARY OF THE INVENTION [0012] In view of the above, one of the objects of the embodiments of the present invention is to provide a structure and a process for a cavity-type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, which has Improved red/near-infrared light response, reduced interference, spillover and less dark current. According to an embodiment of the invention, the cavity type ultra-deep light diode of the CMOS image sensor comprises a P-type substrate, an N-type epitaxial layer and an ultra-deep P-type photodiode implantation region 099141774. Form No. A0101 Page 5 / Total 16 pages 0992072581-0 [0013] 201225268 domain. The P-type substrate is grounded or connected to a negative supply. The N-type epitaxial layer is grown on a P-type substrate and connected to a positive power supply. The ultra-deep p-type photodiode implant region is formed in the N-type epitaxial layer. [0014] [0016] [0016] 099141774 In order to enhance the longer wavelength response of red/near-infrared light and reduce diffusion interference, the electronic photodiode of the second figure has a deep N-type photodiode 2〇, it can absorb electron-hole pairs to cover the red/near-light absorption region and absorb more signals. In addition, the P-type under the deep N-type photodiode 20 can be greatly reduced to be the diffusion charge of the crystal layer 22, so that the diffusion charge entering the adjacent pixels can be reduced. In the first figure, the reduced interference due to the overflow discharge causes a poor red/near-infrared light response. However, the second plan does not have a spillover of the first map. In order to take advantage of the advantages of the first and second figures, the third figure shows a cross-sectional view of a cavity-type ultra-deep light diode of a complementary metal halide semiconductor (CMOS) image sensor of the embodiment of the present invention. The 囷 type only shows the main components. For the detailed structure, please refer to the fourth C diagram. In the present embodiment, "," or "ultra-deep" means greater than 0.5 micrometers, such as 0.5 to 2 micrometers, and in a preferred embodiment, greater than 2 micrometers. The disclosed light diodes are suitable for use in harsh environments, such as automotive applications, but are not limited thereto. As described in the first figure, the cavity type photodiode can reach a lower dark current, so the photodiode of this embodiment can meet the severe temperature requirements of automotive applications. In the present embodiment, as in the first figure, the P-type substrate 30 is grounded or connected to a negative power supply substrate 30 for discharging an overflow hole, which is advantageous for a high dynamic range scene at night. Under normal operation, the P-type substrate 30 can be reduced in red Form No. A0101 Page 6 of 16 0992072581-0 201225268 Interference of light/near-infrared light signals. For further details on spill control, refer to "InterUne ccd" by Yasuo Ishihara et al.

Image Sensor with an Antibl〇〇ming Structure ^ . IEEE Transactions 〇n Electron Devices, Vol. ED-31,No. 1,1 984年1 月;或G Agran〇0 人所發表之 “Super Small,Sub 2//m pixels F〇r Novel CMOS Image Sensors" , International Image Sensor Workshop,2〇〇7年6月7_1〇 日’如仙-quit,Maine USA。 ❹ [0017] N型磊晶層31形成於P型基底3〇上,且連接至正電源供給 AVDD。深P型光二極體32植人區形成於N型蟲晶層31内。 由於本實施例使用N型磊晶層31而非如第一圖之n型井, 因此不會受到較重N型摻質的植入深度綱。由於p型摻 質較輕’ SJ此’相較於傳統電子型光—滅體’本實施例 之深P型光二極體32植入區可較深,因而能改善信號雜訊 比及紅光/近紅外光反應。 〇 [0018]於Ν型磊晶層31内形成一隔離區,例如淺溝槽隔離區( STI ) 33。於淺溝槽隔離區33的側邊及底部形成Ν+晶胞 (cell)隔離層34。相較於第二圖之ρ型隔離層24,由 於N型摻質較重,本實施例之ν型隔離層34的熱擴散可大 大降低。因此,可小型化隔離層,並留更多空間給光二 極體32。藉此,可改善信號吸收及干擾問題。 [0019]傳送閘35形成於N型蟲晶層31上’並位於深ρ型光二極體 32植入區與P型浮動擴散(P+FD) 36植入區之間。 099141774 表單編號A0101 第7頁/共16頁 0992072581-0 201225268 [0020] 第四A圖至第四C圖顯示本發明實施例之CMOS影像感測器 之電洞型超深光二極體的製程。與第三圖相同的組成元 件標示以相同元件符號。各步驟可使用傳統半導體製程 技術,其細節予以省略。 [0021] 於第四A圖中,提供P型基底(或簡稱基底)30,再於其 上成長一N型磊晶層(或簡稱為磊晶層)31。在本實施例 中,磊晶層31的厚度為6微米或大於6微米,但不以此為 限。 [0022] 接著,仍參閱第四A圖,執行多次深P型光二極體植入, 以形成深P型光二極體(或簡稱為光二極體)32植入區。 該植入係執行於一遮罩(未顯示於圖式)所定義的區域 内。每一次植入可使用不同能量以達到所需輪廓。此外 ,於每次植入後,可使用熱處理使其輪麻平滑。其輪麻 也可根據後續製程步驟之熱處理而決定。接著,形成淺 溝槽隔離區3 3於遙晶層31内。 [0023] 於第四B圖中,於淺溝槽隔離區33的側邊及底部植入晶胞 隔離層(或晶胞N型井)34,且於晶胞隔離層34下植入深 隔離層(或深N型井)37。此外,於磊晶層31上表層區域 植入N型通道38植入區域,其位於深光二極體32植入區上 方。上述晶胞隔離層34、深隔離層37及通道38植入區域 可依據適當之順序來執行。接著,形成傳送閘35於磊晶 層31上。 [0024] 於第四C圖中,於磊晶層31上表層區域植入梢(pinning )39植入區域。在本實施例中,N型梢39植入區域係位於 099141774 表單編號A0101 第8頁/共16頁 0992072581-0 201225268 通道38植人區域内。於通道38植人區域與深光二極體犯 植入區之間植入ρ型表面光二極體4〇植入區域,作為主要 電洞型光一極體。在本實施例中,梢⑽植入區域與通道 38植入區域主要係用以抑制暗電流並最佳化傳送問μ。 梢39植入區域與表面光二極體4〇植入區域可依據適當之 順序來執行。接著,植入ρ+浮動擴散36植入區域。 [0025] Ο [0026] Ο 以上所述僅為本發明之較佳實施例而已,並非用以限定 本發明之申請專利範圍;凡其它未脫離發明所揭示之精 神下所完成之等效改變或修飾,均應包含在下述之申請 專利範圍内》 【圖式簡單說明】 ' / : 第一圖顯示傳統CMOS影像感測器之電洞型.光二極體的剖 面圖。 第二圖顯示電子型深光二極體。 第三圖顯示本發明實施例之CMOS影像感測器之電洞型超 深光二極體的剖面圖.、 第四A圖至第四C圖顯示本發明實施例之C Μ 0 S影像感測器 之電洞型超深光二極體的製程。 099141774 【主要元件符號說明】 [0027] 10 Ρ型基底 12 淺溝槽隔離區 14 Ν+井 16 淺Ρ型光二極體 18 Ν型井 20 深Ν型光二極體 表單編號Α0101 第9頁/共16頁 0992072581-0 201225268 22 24 30 31 32 33 34 35 36 37 38 39 40 P型轰晶層 P+井 P型基底 N型遙晶層 深P型光二極體 淺溝槽隔離區 隔離層 傳送閘 P+浮動擴散 深隔離層 N型通道 梢(pinning) 表面光二極體 099141774 表單編號A0101 第10頁/共16頁 0992072581-0Image Sensor with an Antibl〇〇ming Structure ^ . IEEE Transactions Electron Electron Devices, Vol. ED-31, No. 1, January 1984; or G Agran〇0 published by "Super Small, Sub 2/ /m pixels F〇r Novel CMOS Image Sensors" , International Image Sensor Workshop, June 7th, 2017. '如仙-quit, Maine USA. ❹ [0017] N-type epitaxial layer 31 is formed in P-type The substrate 3 is connected to the positive power supply AVDD. The deep P-type photodiode 32 implanted region is formed in the N-type crystal layer 31. Since the present embodiment uses the N-type epitaxial layer 31 instead of the first figure The n-type well is therefore not subject to the implant depth of the heavier N-type dopant. Since the p-type dopant is lighter, 'SJ this' is compared to the conventional electronic-type light-extinguishing body'. The implantation region of the photodiode 32 can be deeper, thereby improving the signal noise ratio and the red/near-infrared light reaction. [0018] An isolation region, such as a shallow trench isolation region, is formed in the germanium-type epitaxial layer 31. (STI) 33. A germanium + cell isolation layer 34 is formed on the side and bottom of the shallow trench isolation region 33. Compared to the p-type isolation of the second figure 24. Since the N-type dopant is heavy, the thermal diffusion of the ν-type isolation layer 34 of the present embodiment can be greatly reduced. Therefore, the isolation layer can be miniaturized and more space is left for the photodiode 32. Thereby, the improvement can be improved. Signal Absorption and Interference Problems [0019] The transfer gate 35 is formed on the N-type silicon oxide layer 31' and is located between the deep p-type photodiode 32 implant region and the P-type floating diffusion (P+FD) 36 implant region. 099141774 Form No. A0101 Page 7 / Total 16 Page 0992072581-0 201225268 [0020] FIGS. 4A to 4C show processes of a hole-type ultra-deep light diode of a CMOS image sensor according to an embodiment of the present invention. The same constituent elements as those in the third figure are denoted by the same element symbols. The steps of the conventional semiconductor process technology can be used in the respective steps, and the details are omitted. [0021] In FIG. 4A, a P-type substrate (or simply a substrate) 30 is provided. Further, an N-type epitaxial layer (or simply an epitaxial layer) 31 is grown thereon. In the embodiment, the thickness of the epitaxial layer 31 is 6 micrometers or more, but not limited thereto. [0022 ] Next, still refer to Figure 4A, performing multiple deep P-type photodiode implants to form deep P Implanted region 32 of photodiode (or simply referred to as a light diode). The implant system executed on a mask (not shown in the drawings) within the defined area. Different energies can be used for each implant to achieve the desired profile. In addition, heat treatment can be used to smooth the numbness after each implantation. The wheel hemp can also be determined according to the heat treatment of the subsequent process steps. Next, a shallow trench isolation region 33 is formed in the crystal layer 31. [0023] In FIG. 4B, a cell isolation layer (or cell N-well) 34 is implanted on the sides and bottom of the shallow trench isolation region 33, and deep isolation is implanted under the cell isolation layer 34. Layer (or deep N-well) 37. In addition, an N-channel 38 implant region is implanted in the surface region of the epitaxial layer 31, which is located above the implant region of the deep-light diode 32. The cell isolation layer 34, the deep isolation layer 37, and the channel 38 implant region can be performed in an appropriate order. Next, a transfer gate 35 is formed on the epitaxial layer 31. [0024] In the fourth C diagram, a pinning 39 implant region is implanted on the surface layer region of the epitaxial layer 31. In this embodiment, the N-type tip 39 implanted region is located at 099141774 Form No. A0101 Page 8 of 16 0992072581-0 201225268 Channel 38 implanted area. A p-type surface photodiode 4〇 implanted region is implanted between the implanted region of the channel 38 and the implanted region of the deep-light diode to serve as the main cavity-type photo-polar body. In this embodiment, the tip (10) implant region and the channel 38 implant region are primarily used to suppress dark current and optimize the transfer. The tip 39 implant region and the surface photodiode 4 implant region can be performed in a suitable order. Next, a ρ+floating diffusion 36 implanted region is implanted. [0025] The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention as defined by the present invention; Modifications shall be included in the scope of the following patent application. [Simplified illustration] ' / : The first figure shows the hole type of the conventional CMOS image sensor. The second figure shows an electronic deep-light diode. The third figure shows a cross-sectional view of a cavity-type ultra-deep light diode of a CMOS image sensor according to an embodiment of the present invention. The fourth to fourth C-pictures show C Μ 0 S image sensing according to an embodiment of the present invention. The process of the hole type ultra-deep light diode of the device. 099141774 [Description of main component symbols] [0027] 10 Ρ type substrate 12 shallow trench isolation area 14 Ν+ well 16 shallow Ρ type photodiode 18 Ν type well 20 Ν type photodiode form number Α 0101 Page 9 / total Page 16 0992072581-0 201225268 22 24 30 31 32 33 34 35 36 37 38 39 40 P-type crystallized layer P+ well P-type base N-type remote layer deep P-type photodiode shallow trench isolation area isolation layer transmission gate P+ Floating diffusion deep isolation layer N-type channel pin (pinning) surface light diode 099141774 Form No. A0101 Page 10 / Total 16 pages 0992072581-0

Claims (1)

201225268 七、申請專利範圍: 1 . 一種互補式金屬氧化物半導體(CMOS)影像感測器之電 洞型超深光二極體,包含: 一P型基底,接地或連接至一負電源供給; 一N型蟲晶層,成長於該P型基底上*該N型蟲晶層 連接至一正電源供給;及 一超深P型光二極體植入區域,形成於該N型磊晶層 内。 2 .如申請專利範圍第1項所述CMOS影像感測器之電洞型超深 Ο 光二極體,其中上述超深p型光二極體植入區域之厚度大 於0. 5微米。 3 .如申請專利範圍第2項所述CMOS影像感測器之電洞型超深 光二極體,其中上述超深P型光二極體植入區域之厚度為 0. 5-2微米。 4 .如申請專利範圍第2項所述CMOS影像感測器之電洞型超深 光二極體,其令上述之超深P型光二極體植入區域之厚度 大於2微米。 ❹ 5 .如申請專利範圍第1項所述CMOS影像感測器之電洞型超深 光二極體,更包含: 一隔離區,形成於該N型磊晶層内。 6 .如申請專利範圍第5項所述CMOS影像感測器之電洞型超深 光二極體,其中上述之隔離區為一淺溝槽隔離區。 7 .如申請專利範圍第5項所述CMOS影像感測器之電洞型超深 光二極體,更包含: 一N型晶胞隔離層,形成於該隔離區的側邊及底部。 099141774 表單編號A0101 第11頁/共16頁 0992072581-0 201225268 8 . —種互補式金屬氧化物半導體(CMOS)影像感測器之電 洞型超深光二極體的製程方法,包含: 提供一 P型基底; 成長一N型蟲晶層於該P型基底上;及 形成一超深P型光二極體植入區域於該N型磊晶層内 〇 9 .如申請專利範圍第8項所述CMOS影像感測器之電洞型超深 光二極體的製程方法,其申上述超深P型光二極體植入區 域之形成包含使用不同能量以執行複數次植入。 10 .如申請專利範圍第9項所述CMOS影像感測器之電洞型超深 光二極體的製程方法,更包含: 於每一次該植入後或者藉由後續製程步驟施以一熱 處理。 11 .如申請專利範圍第8項所述CMOS影像感測器之電洞型超深 光二極體的製程方法,更包含: 形成一隔離區於該N型磊晶層内。 12 .如申請專利範圍第11項所述CMOS影像感測器之電洞型超 深光二極體的製程方法,更包含: 形成一 N型晶胞隔離層於該隔離區的側邊及底部;及 植入一 N型深隔離層於該晶胞隔離層下。 13 .如申請專利範圍第8項所述CMOS影像感測器之電洞型超深 光二極體的製程方法,更包含: 植入一通道植入區域於該N型磊晶層之一上表層區域 ,其中該通道植入區域位於該超深P型光二極體植入區域 上方。 14 .如申請專利範圍第13項所述CMOS影像感測器之電洞型超 099141774 表單編號 A0101 第 12 頁/共 16 頁 0992072581-0 201225268 深光二極體的製程方法,更包含: 植入一N型梢(pinning)植入區域於該N型磊晶層 之一上表層區域;及 植入一P型表面光二極體植入區域於該N型磊晶層内 作為一主要電洞型光二極體之電荷儲存,其中該表面光 一極體植入區域位於該通道植入區域與該超深p型光二極 體植入區域之間。 15 .如申清專利範圍第8項所述CMOS影像感測器之電洞型超深 光二極體的製程方法,更包含: 〇 形成一傳送閘於該N型磊晶層上,·及 形成一 P#浮動擴散(FD )植入區域於該n型磊晶層 内,其中該傳送閘位於該超深P型光二極體植入區域與該p 型浮動擴散植入區域之間。 16 •如申請專利範圍第8項所述CMOS影像感測备之電洞型超深 光二極體的製程方法,其中上述超深P型光二極體植入區 域之厚度大於0.5微米。 ::? ' 17 , Q •如申請專利範圍第16項所述CMOS影像感測器之電洞型超 深光二極體的製程方^,其中上述超深P型光二極體植入 區域之厚度為〇. 5_2微米。 18 ·如申請專利範圍第16項所述CM〇s影像感測器之電洞型超 深光二極體的製程方法,其中上述之超深P型光二極體植 入區域之厚度大於2微米。 099141774 表單編號A0101 第13頁/共16頁 0992072581-0201225268 VII. Patent application scope: 1. A cavity-type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, comprising: a P-type substrate, grounded or connected to a negative power supply; The N-type worm layer is grown on the P-type substrate. The N-type worm layer is connected to a positive power supply; and an ultra-deep P-type photodiode implantation region is formed in the N-type epitaxial layer. 5微米。 The thickness of the ultra-deep p-type photodiode implant region is greater than 0.5 microns. The thickness of the ultra-deep P-type photodiode implanted region is 0.5-2 μm, as described in claim 2, wherein the thickness of the ultra-deep P-type photodiode implant region is 0.5-2 μm. 4. The cavity-type ultra-deep light diode of the CMOS image sensor according to claim 2, wherein the thickness of the ultra-deep P-type photodiode implant region is greater than 2 μm. The hole-type ultra-deep diode of the CMOS image sensor according to claim 1, further comprising: an isolation region formed in the N-type epitaxial layer. 6. The cavity type ultra-deep light diode of the CMOS image sensor according to claim 5, wherein the isolation region is a shallow trench isolation region. 7. The cavity type ultra-deep light diode of the CMOS image sensor according to claim 5, further comprising: an N-type cell isolation layer formed on a side and a bottom of the isolation region. 099141774 Form No. A0101 Page 11 of 16 0992072581-0 201225268 8 . — A method for manufacturing a cavity-type ultra-deep light diode of a complementary metal oxide semiconductor (CMOS) image sensor, comprising: providing a P a type of substrate; growing an N-type insect layer on the P-type substrate; and forming an ultra-deep P-type photodiode implanted region in the N-type epitaxial layer. 9 as described in claim 8 A method for manufacturing a cavity-type ultra-deep light diode of a CMOS image sensor, wherein the formation of the ultra-deep P-type photodiode implant region comprises using different energies to perform a plurality of implants. 10. The method of manufacturing a cavity-type ultra-deep diode of a CMOS image sensor according to claim 9 of the patent application, further comprising: applying a heat treatment after each implantation or by a subsequent process step. 11. The method of manufacturing a hole-type ultra-deep diode of a CMOS image sensor according to claim 8, further comprising: forming an isolation region in the N-type epitaxial layer. 12. The method for manufacturing a cavity-type ultra-deep light diode of a CMOS image sensor according to claim 11, further comprising: forming an N-type cell isolation layer on a side and a bottom of the isolation region; And implanting an N-type deep isolation layer under the cell isolation layer. 13. The method for manufacturing a cavity-type ultra-deep light diode of a CMOS image sensor according to claim 8 , further comprising: implanting a channel implant region on one of the N-type epitaxial layers a region, wherein the channel implant region is above the ultra-deep P-type photodiode implant region. 14. The cavity type of the CMOS image sensor described in claim 13 is 099141774. Form No. A0101 Page 12 of 16 0992072581-0 201225268 The method of processing the deep-light diode further includes: implanting one An N-type pinning implant region is on a surface region of the N-type epitaxial layer; and implanting a P-type surface photodiode implant region in the N-type epitaxial layer as a main hole-type light II The charge storage of the polar body, wherein the surface light one-electrode implantation region is located between the channel implantation region and the ultra-deep p-type photodiode implantation region. 15. The method for manufacturing a cavity type ultra-deep light diode of a CMOS image sensor according to claim 8 of the patent scope, further comprising: forming a transfer gate on the N-type epitaxial layer, and forming A P# floating diffusion (FD) implant region is disposed in the n-type epitaxial layer, wherein the transfer gate is between the ultra-deep P-type photodiode implant region and the p-type floating diffusion implant region. [16] The method of manufacturing a cavity-type ultra-deep diode of the CMOS image sensing device according to claim 8 wherein the thickness of the ultra-deep P-type photodiode implant region is greater than 0.5 μm. ::? ' 17 , Q • The process of the cavity-type ultra-deep light diode of the CMOS image sensor described in claim 16 of the patent application, wherein the thickness of the ultra-deep P-type photodiode implant region is 〇. 5_2 microns. 18. The method of manufacturing a hole-type ultra-deep light diode of a CM〇s image sensor according to claim 16 wherein the thickness of the ultra-deep P-type photodiode implanted region is greater than 2 μm. 099141774 Form No. A0101 Page 13 of 16 0992072581-0
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US10672810B2 (en) 2017-10-31 2020-06-02 Taiwan Semiconductor Manufacturing Co., Ltd. CMOS image sensor with shallow trench edge doping
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US10998360B2 (en) 2017-10-31 2021-05-04 Taiwan Semiconductor Manufacturing Co., Ltd. Image sensor with shallow trench edge doping
US10998359B2 (en) 2017-10-31 2021-05-04 Taiwan Semiconductor Manufacturing Co., Ltd. Image sensor with shallow trench edge doping
TWI727190B (en) * 2017-10-31 2021-05-11 台灣積體電路製造股份有限公司 Integrated chip and methods of forming same
US11735609B2 (en) 2017-10-31 2023-08-22 Taiwan Semiconductor Manufacturing Company, Ltd. Image sensor with shallow trench edge doping

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