TWI425756B - Method for avoiding audible noise in a switching regulator - Google Patents

Description

A method of avoiding noise generated by a switching regulator

The present invention relates to a switching regulator, and more particularly to a method of avoiding noise generated by a switching regulator.

As shown in FIG. 1, the switching regulator includes a high-voltage side transistor M1 and a low-voltage side transistor M2 connected in series between a high voltage terminal VIN and a low voltage terminal GND via a phase node Ph, and the driver 14 is modulated according to a pulse width (Pulse Width Modulation; The PWM) signal Spwm generates control signals UG and LG to switch the high-voltage side transistor M1 and the low-voltage side transistor M2, respectively, and converts the input voltage VIN into an output voltage VOUT. There is an inductance L between the phase node Ph and the voltage output terminal VOUT, and the high voltage terminal VIN and the voltage output terminal VOUT have capacitors Ci and Co, respectively. The comparator 10 compares the output voltage VOUT with the reference voltage VREF to generate a comparison signal Sc, and the PWM on-time generator 12 generates a pulse width modulation signal Spwm based on the comparison signal Sc. Recently, in order to reduce the power consumption at light load, the switching regulator is designed to have a power saving mode, during which the switching frequency of the switching regulator is lowered to reduce switching loss, thereby improving performance.

2 is a signal waveform diagram of the switching regulator of FIG. 1 in a power saving mode. When the output voltage VOUT falls below the reference voltage VREF, the high-voltage side transistor M1 turns on for a period of time T1, and the inductor current IL charges the capacitor Co from the capacitor Ci via the high-voltage side transistor M1, as shown in FIG. The output voltage VOUT thus rises. During this T1, the inductor current IL rises with a slope (Ph - VOUT) / L ≒ (VIN - VOUT) / L. After the high-voltage side transistor M1 is turned off, the low-voltage side transistor M2 is turned on for a period of time T2, and the inductor current IL is charged from the low-voltage side GND via the low-voltage side transistor M2 to the capacitor Co, as shown in FIG. The voltage VOUT continues to rise, but the inductor current IL drops with a slope of -(VOUT-Ph) / L ≒ - (VOUT - GND) / L. Then, as indicated by time T3, both the high side transistor M1 and the low side transistor M2 are turned off, and the output voltage VOUT is gradually decreased due to the consumption of the load current Io until the output voltage VOUT falls to the reference voltage VREF and then the high voltage side is turned on. Crystal M1. The addition of time T3 causes the switching frequency of the switching regulator to decrease, and the longer the time of T1+T2+T3, the lower the switching frequency, the smaller the switching loss, and the higher the performance. However, when the time of T1+T2+T3 is longer than about 50μs, the switching frequency drops to the audio range of 20Hz~20KHz, and the charging and discharging frequencies of the capacitors Ci and Co thus enter the audio range, thus generating audible noise of the human ear.

A number of methods for improving noise have been proposed, such as U.S. Patent Nos. 6,525,514, 6,667,605, 6,784,646, 6,900,622, 7,045,994, 7,211,991, 7,400,122, 7,521,908, 7,652,461, and 7,701,186. Referring to FIG. 1 , the conventional improvement method mostly uses the time detector 16 to detect the period of the pulse width modulation signal Spwm. When the period of the pulse width modulation signal Spwm is greater than a preset threshold, the time detector 16 The signal SL is sent to the PWM turn-on time generator 12 to shorten the turn-on time T1 of the high side transistor M1. Under the same load current Io, shortening the turn-on time T1 can increase the switching frequency, but the setting of the turn-on time T1 is very difficult. If the turn-on time T1 is too short, the switching frequency will become too high, resulting in a decrease in performance, if the turn-on time If T1 is too long, the switching frequency will remain in the audio range. Furthermore, the turn-on time T1 has a minimum limit, and when the turn-on time T1 is in the nanosecond (ns) level, this method hardly achieves proper control.

Another common method is to open the low-voltage side transistor M2 until the output voltage VOUT drops to the reference voltage VREF after the high-voltage side transistor M1 and the low-voltage side transistor M2 are both turned off and maintained for a period of time, but the efficiency is greatly reduced by this method. .

One of the objects of the present invention is to provide a method for avoiding noise generated by a switching regulator.

In order to avoid the noise generated by the switching regulator, according to the present invention, the switching frequency of the switching regulator is detected, and when the switching frequency is lower than the threshold, the low-voltage side transistor of the switching regulator is turned on for a short time to avoid This switching frequency enters the audio range.

The method of the present invention temporarily opens the low-voltage side transistor when the switching frequency is lower than the critical value, and does not open the low-voltage side transistor until the output voltage drops to the reference voltage, so the switching regulator still maintains better performance.

Figure 4 is a diagram of a signal waveform in accordance with the method of the present invention as shown in Figure 5. Step S20 detects the switching frequency Fan of the switching regulator, and then proceeds to step S22 to determine whether the switching frequency Fan is smaller than the critical value Fth. There are many ways to detect the switching frequency Fan. For example, referring to FIG. 1 , FIG. 3 and FIG. 5 , the time detector 16 detects the pulse width modulation signal Spwm or the control signals UG and LG to obtain the high voltage side transistor M1. The turn-on time T1, the turn-on time T2 of the low-voltage side voltage crystal M2, and the sum of the times T3 when the high-voltage side and the low-voltage side transistors M1 and M2 are all turned off, Tan=T1+T2+T3, when Tan is greater than the preset time Tth, for example, greater than 50 μs. , indicating that the switching frequency Fan is smaller than the critical value Fth=1/Tth. If the switching frequency Fan is greater than the threshold Fth, the process returns to step S20 to continue detecting the switching frequency Fan. Conversely, if the switching frequency Fan is less than the threshold value Fth, step S24 is performed to open the low-voltage side transistor M2 for a short time T4, as indicated by the signal LG of FIG. For example, referring to FIG. 5 and FIG. 6, when the switching frequency Fan is smaller than the threshold Fth, the time detector 16 sends a signal SL to the PWM on-time generator 12, thereby turning on the low-voltage side transistor M2 for a short time T4, during which time The inductor current IL flows from the capacitor Co through the low-voltage side transistor M2 to the low-voltage terminal GND, and the variation slope of the inductor current IL is -(VOUT-Ph)/L≒-(VOUT-GND)/L. As shown in FIG. 5, at the end of time T4, the low-voltage side transistor M2 is turned off, and the inductor current IL continues to charge the phase node Ph. When the voltage of the phase node Ph is large enough, the base diode of the high-voltage side transistor M1 ( The body diode will be turned on, and the inductor current IL charges the capacitor Ci from the capacitor Co through the high-voltage side transistor M1, as shown in time T5 in FIG. 5 and FIG. After the end of step S24, the process returns to step S20 to continue detecting the switching frequency Fan. When the sum of the times T4, T5 and T6 is greater than the preset time Tth, the low-voltage side transistor M2 is turned on again for a short time T7. This process continues to repeat until the output voltage VOUT drops to the reference voltage VREF and back to the operation of time T1.

Referring to FIG. 4 and FIG. 5, the present invention opens the low-voltage side transistor M2 for a short time T4 when the switching frequency Fan is lower than the threshold value Fth, so that the capacitors Co and Ci are charged and discharged, so that the charging and discharging frequencies of the capacitors Co and Ci can be avoided. Noise is generated by entering the audio range. Since the present invention does not open the low side transistor M2 until the output voltage VOUT falls to the reference voltage VREF as in the prior art, the performance is better, and during the time T5, the charge of the capacitor Co is fed back to the capacitor Ci, thereby further improving the switching. The effectiveness of the regulator.

FIG. 8 is another method according to the present invention. Except for steps S20, S22 and S24 of FIG. 4, after step S24, step S26 is executed to actively open the high-voltage side transistor M1 for a short time T5, as shown in FIG. As shown, the inductor current IL is charged from the capacitor Co through the high-voltage side transistor M1 to the capacitor Ci as shown in FIG. After the end of step S26, the process returns to step S20 to continue detecting the switching frequency Fan.

In other embodiments, it is also possible to determine whether the switching frequency Fan is smaller than the critical value Fth by using only the times T3 and T6 at which the high-voltage side and the low-voltage side transistors M1 and M2 are closed.

In some control modes, the time T1 or T2 may be 0. Therefore, the switching regulator using such control detects only the sum of the non-zero time T1 or T2 and the time T3 when detecting the switching frequency Fan.

The foregoing embodiments also show that the method of the present invention is not limited by the type of switching regulator, and therefore, in addition to the buck switching regulators already shown, other types of switching regulators, such as fixed turn-on time (Constant) The On Time; COT) switching regulator, boost switching regulator, buck-boost switching regulator, constant current chopping COT switching regulator, etc., are all applicable to the method of the present invention.

The above description of the preferred embodiments of the present invention is intended to be illustrative, and is not intended to limit the scope of the invention to the disclosed embodiments. It is possible to make modifications or variations based on the above teachings or learning from the embodiments of the present invention. The embodiments are described and illustrated in the practical application of the present invention in various embodiments, and the technical idea of the present invention is intended to be equivalent to the scope of the following claims. Decide.

10. . . Comparators

12. . . PWM on time generator

14. . . driver

16. . . Time detector

Figure 1 is a circuit diagram of a switching regulator;

2 is a schematic diagram of the operation of the switching regulator in the power saving mode;

Figure 3 is a schematic view of the switching regulator during opening of the low voltage side transistor;

Figure 4 is a first embodiment of the present invention;

Figure 5 is a signal waveform diagram when the method of Figure 4 is implemented;

Figure 6 is a schematic illustration of the switching regulator during time T4 of Figure 5;

Figure 7 is a schematic illustration of the switching regulator during time T5 of Figure 5;

Figure 8 is a second embodiment of the present invention;

Fig. 9 is a signal waveform diagram when the method of Fig. 8 is implemented.

Claims (6)

A method for avoiding noise generated by a switching regulator having a high-voltage side transistor and a low-voltage side transistor switched at a switching frequency, the method comprising the steps of: (A) detecting the switching frequency; and (B When the switching frequency is lower than the threshold, the low-voltage side transistor is turned on for a first short time. The method of claim 1, wherein the step A comprises calculating a turn-on time of the high-voltage side transistor, an opening time of the low-voltage side transistor, and a time when the high-voltage side and the low-voltage side transistor are all turned off to determine the switching. frequency. The method of claim 1, wherein the step A comprises calculating a sum of an opening time of the high-voltage side transistor and a time when the high-voltage side and the low-voltage side transistor are both turned off to determine the switching frequency. The method of claim 1, wherein the step A comprises calculating a sum of an opening time of the low-voltage side transistor and a time when the high-voltage side and the low-voltage side transistor are both turned off to determine the switching frequency. The method of claim 1, wherein the step A comprises calculating a time when the high voltage side and the low side transistor are both turned off to determine the switching frequency. The method of claim 1, further comprising opening the high voltage side transistor for a second short time after the step B.