TWI423400B - Mems package structure and method for fabricating the same - Google Patents

Description

Microelectromechanical package structure and manufacturing method thereof

The present invention relates to a microelectromechanical package structure and a method of fabricating the same, and more particularly to a microelectromechanical package structure with low production cost and high process yield and a method of fabricating the same.

The development of Micro Electromechanical System (MEMS) technology has opened up a whole new field of technology and industry, which has been widely used in various microelectronic devices with both electronic and mechanical characteristics, such as absolute pressure sensors, Accelerator, miniature microphone, etc.

Since the operation of the microelectromechanical element is quite sensitive, its requirements for the cleanliness of the operating environment are also high. In order to prevent the external pollution source from entering the operating environment of the MEMS element and affecting the performance of the MEMS element, the packaging process is usually performed after the MEMS element is fabricated to seal the MEMS element in its operating environment. It can be seen that the yield of the packaging process has a great influence on the operational efficiency of the MEMS component.

In view of this, the present invention provides a method of fabricating a microelectromechanical package structure to improve the process yield of the microelectromechanical package structure.

The present invention also provides a microelectromechanical package structure to effectively hermetically mount the microelectromechanical structure.

The present invention provides a method of fabricating a microelectromechanical package structure by first providing a substrate, followed by forming a plurality of underlying metal layers and a plurality of first oxide layers on the substrate. Wherein, the underlying metal layers are interleaved with the first oxide layer to form a microelectromechanical structure and an interconnect structure. An upper metal layer is then formed over the interconnect structure and the microelectromechanical structure, wherein the upper metal layer has at least one first opening and at least one second opening. The first opening is located above the interconnect structure, and the second opening is located above the microelectromechanical structure, and the area of the first opening is larger than the area of the second opening. Thereafter, the first opening and the second opening are used as etching channels to remove a portion of the first oxide layer, and a first cavity is formed around the microelectromechanical structure, and a second cavity is formed above the interconnect structure. Wherein the first cavity is in communication with the second cavity. Thereafter, the second opening is first sealed in a vacuum environment, and then a package is formed over the upper metal layer in a non-vacuum environment to seal the first opening.

The present invention provides a microelectromechanical package structure including a substrate, an interconnect structure, a microelectromechanical structure, an upper metal layer, a deposit, and a package. The interconnect structure and the microelectromechanical structure are respectively disposed on the substrate, and the microelectromechanical structure is located in the first cavity. The upper metal layer is located above the interconnect structure and the microelectromechanical structure, and has a second cavity between the upper metal layer and the interconnect structure, which is connected to the first cavity. The upper metal layer has at least one first opening and at least one second opening, wherein the first opening is above the interconnect structure and communicates with the second cavity. The second opening is located above the microelectromechanical structure and communicates with the first cavity. Moreover, the area of the first opening is larger than the area of the second opening. The deposit is disposed on the upper metal layer to seal the second opening. The package is disposed above the upper metal layer to seal the first opening.

The invention also provides a microelectromechanical package structure comprising a substrate, an interconnect structure, a buffer member, a pressure bearing layer and an encapsulation layer. Wherein, the interconnect structure is disposed on the substrate and has a third cavity. The buffer member is partially disposed in the third cavity, and the pressure receiving layer is disposed above the interconnecting structure and has at least one fifth opening located above the third cavity and exposing a portion of the buffer member. The encapsulation layer is disposed on the pressure-bearing layer and is filled in the fifth opening to be connected to the buffer member.

The process of the microelectromechanical package structure of the invention firstly leaves a non-hermetic channel above the interconnect structure under a vacuum environment, and then completely seals the micro-electric structure under atmospheric pressure to avoid the micro-electromechanical structure in the vacuum When the environment is moved to atmospheric pressure, the film layer collapses in the MEMS region and the structure is damaged. Moreover, since the microelectromechanical package structure of the present invention can be fabricated in a low temperature environment, it is possible to reduce the occurrence of damage to the microelectromechanical structure from high temperature.

The above and other objects, features and advantages of the present invention will become more <RTIgt;

1A-1E are schematic cross-sectional views showing a microelectromechanical package structure in a manufacturing process in an embodiment of the present invention. Referring to FIG. 1A, a substrate 11 is first provided, which may be a germanium substrate or a silicon on insulator (SOI) substrate. In detail, one or more semiconductor elements 12 may be formed on the substrate 11, and when a plurality of semiconductor elements 12 are formed on the substrate 11, each of the semiconductor elements 12 is a shallow trench insulation (STI) 111. Separated from each other. However, the invention is not limited thereto.

Referring to FIG. 1B, a plurality of lower metal layers 13a, an upper metal layer 13b, a plurality of first contact windows 14a and a plurality of first oxide layers 15a are formed on the substrate 11. The lower metal layer 13a and the first oxide layer 15a are alternately stacked with each other, and the first contact window 14a is located in the first oxide layer 15a and is connected to the corresponding lower metal layer 13a. Specifically, the lower metal layer 13a, the first contact window 14a, and the first oxide layer 15a form an interconnect structure 16 and a microelectromechanical structure 17 on the substrate 11. The upper metal layer 13b is located above the lower metal layer 13a and has at least one first opening 132 and at least one second opening 136. The first opening 132 is located above the interconnecting structure 16, and the second opening is located above the microelectromechanical structure 17, and the first opening 132 and the second opening 136 respectively expose a portion of the first oxide layer 15a, and the first opening The area of one opening 132 is larger than the area of the second opening 136. Here, the material of the lower metal layer 13a and the upper metal layer 13b may be aluminum, the material of the first contact window 14a may be tungsten, and the material of the first oxide layer 15a may be yttrium oxide or other oxide.

Referring to FIG. 1C, a portion of the first oxide layer 15a is removed, and a first cavity 116a is formed around the microelectromechanical structure 17. At this time, a second cavity 116b communicating with the first cavity 116a is also formed above the interconnect structure 16. In detail, the present embodiment uses, for example, hydrofluoric acid vapor, and etches a portion of the first oxide layer 15a with the second opening 136 as an etching channel. Of course, those skilled in the art should know that in the process of removing a portion of the first oxide layer 15a, the first opening 132 and the second opening 136 may be simultaneously used as etching channels to increase the process rate.

Referring to FIG. 1D, after removing a portion of the first oxide layers 15a, the present embodiment damages the microelectromechanical structure 17 by avoiding external sources of contamination from the second opening 136 into the first inner cavity 116a. Under the environment, a deposit, that is, an encapsulation layer 19, is formed over the upper metal layer 13b to fill the second opening 136. In particular, since the aspect ratio of the second cavity 116b is sufficient to break the encapsulation layer 19 at the corresponding first opening 132, the first cavity 116a can still pass through the second after the deposition process of the encapsulation layer 19 is completed. The cavity 116b is in communication with the first opening 132. That is, the first cavity 116a does not belong to the airtight space. In this way, when the deposition process of the encapsulation layer 19 is completed and the structure shown in FIG. 2B is moved from the vacuum environment to the normal pressure, the encapsulation layer 19 is caused by the pressure difference between the first cavity 116a and the outside. The bending collapses, which in turn helps to improve the process yield.

Referring to FIG. 1E, after forming the encapsulation layer 19, the package 190 may be formed on the upper metal layer 13b in a non-vacuum environment to seal the first opening 132 to prevent external moisture or particles from passing through the first The opening 132 and the second cavity 116b enter the first cavity 116a to damage the microelectromechanical structure 17. At this point, and substantially complete the process of the MEMS package structure 10. It is worth mentioning that the package can be formed together in a wire bond process.

As can be seen from the above, before the package member 190 is formed, the first cavity 116a communicates with the outside through the second cavity 116b and the first opening 132, and the package 190 is formed in a non-vacuum environment, thereby avoiding the upper layer. The metal layer 13b is bent and collapsed due to the pressure difference between the first cavity 116a and the outside, and the process yield can be improved.

In addition, in another embodiment of the present invention, a second oxide layer 15b and a mask layer 18 may be sequentially formed on the upper metal layer 13b before forming the encapsulation layer 19, as shown in FIG. 2A. Show. A plurality of second contact windows 14b may be formed in the second oxide layer 15b. Moreover, the mask layer 18 has at least one third opening 182 and at least one fourth opening 184, wherein the third opening 182 is above the first opening 132 and the fourth opening 184 is above the microelectromechanical structure 17. In particular, the fourth opening 184 of the present embodiment is staggered with the second opening 136, but the invention is not limited thereto.

Thereafter, as shown in FIG. 2B, the third opening 182 and the fourth opening 184 are used as etching channels to remove portions of the second oxide layer 15b, thereby exposing the first opening 132 and the second opening 136. A portion of the first oxide layer 15a is subsequently removed in the same or similar manner as the previous embodiment to form a first cavity 116a and a second cavity 116b.

Specifically, the aperture of the third opening 182 of the mask layer 18 of the present embodiment is larger than the aperture of the first opening 132 of the upper metal layer 13b, and thus, in the deposition process of the encapsulation layer 19, as shown in FIG. 2C, The metal material as the encapsulation layer 19 is partially deposited on the upper metal layer 13b through the third opening 182 of the mask layer 18, and the other portion is passed through the upper metal layer 13b. An opening 132 is deposited on the interconnect structure 16. It can be seen that if the second cavity 116b has a sufficient aspect ratio, the third opening 182 and the first opening 132 can be filled without being covered by the encapsulation layer 19. However, the present invention does not limit the shape and size of the first opening 132 and the third opening 182 as long as it can satisfy the communication of the first cavity 116a with the outside after the formation of the encapsulation layer 19.

It can be seen from the above embodiments that the present invention can improve the process yield of the micro-electromechanical package structure. In order to make the present invention more familiar with the present invention, the application of the microelectromechanical package structure of the present invention will be described below by way of examples.

3 is a partial cross-sectional view showing a microelectromechanical package structure according to another embodiment of the present invention. Referring to FIG. 3 , the micro-electromechanical package structure 40 is, for example, a package structure of a microelectromechanical pressure sensor, and includes a substrate 31 inner wiring structure 32 , a buffer member 33 pressure bearing layer 34 , and an encapsulation layer 35 . The interconnect structure 32 is disposed on the substrate 31 and has a third cavity 322. In detail, the interconnect structure 32 is composed of, for example, a plurality of metal layers 324, a plurality of oxide layers 326, and a plurality of contact windows 328. Wherein, the metal layer 324 and the oxide layer 326 are alternately stacked with each other, and the contact window 328 is formed in the oxide layer 326. In particular, a portion of the metal layer 324, the contact window 328, and the oxide layer 326, for example, form an isolation structure 320 around the third cavity 322 on the substrate 31. The material of the metal layer 324 is, for example, aluminum, and the material of the contact window 328 may be tungsten. More specifically, prior to forming the interconnect structure 32, an undoped polysilicon layer 38 may be formed on the substrate 31, and the isolation structure 320 is formed on the undoped polysilicon layer 38.

The buffer member 33 is partially disposed in the third cavity 322 and may be made of aluminum. Specifically, the buffer member 33 may be completed in the process of the interconnect structure 32. The pressure bearing layer 34 is partially suspended above the third cavity 322 and has at least one fifth opening 342 located above the third cavity 322 to expose a portion of the cushioning member 33. The encapsulation layer 35 is disposed on the pressure-receiving layer 34 and filled in the fifth opening 342 to be connected to the buffer member 33. In particular, the encapsulation layer 35 of the present embodiment can be formed by a low temperature process, thereby preventing the internal structure of the microelectromechanical package structure 40 from being damaged in a high temperature environment, thereby easily ensuring a better production yield of the microelectromechanical package structure 40. And product quality. Specifically, the encapsulation layer 35 of the present embodiment is deposited in an environment of less than 350 degrees Celsius, and is preferably deposited in an environment between 50 degrees Celsius and 100 degrees Celsius. The material of the encapsulation layer 35 may be metal or other materials such as aluminum.

Moreover, since the pressure-receiving layer 34 can be connected to the buffer member 33 by the encapsulation layer 35, when the pressure-receiving layer 34 is bent toward the third cavity 322 due to the pressure applied from the outside, the buffer member 33 can be further used. Supporting force is provided to prevent the pressure bearing layer 34 from being excessively bent and damaged.

It should be noted that the foregoing embodiment is described by taking the packaging process of the absolute pressure sensor as an example, but it is not intended to limit the present invention. The present invention will be described below by taking as an example a package structure of an inertial sensor.

4 is a partial cross-sectional view showing a microelectromechanical package structure according to another embodiment of the present invention. Referring to FIG. 4, the micro-electromechanical package structure 50 is, for example, a package structure of an inertial sensor, which is different from the micro-electro-mechanical package structure 40 of the foregoing embodiment in that a portion of the buffer member 53 located in the third cavity 322 is connected. To the substrate 31. In detail, the buffer member 53 and the interconnect structure 32 are formed in the same process, and the buffer member 53 is also formed by stacking a plurality of film layers formed on the substrate 31. In addition, the micro-electromechanical package structure 50 further includes at least one movable member 56 partially located in the third cavity 322 and suspended above the substrate 31. In detail, the portion of the movable member 56 located in the third cavity 322 can move up and down in the third cavity 322.

Referring to FIG. 4, in the embodiment, although the pressure receiving layer 34 is partially suspended above the third cavity 322, it is also connected to the buffer member 53 through the encapsulation layer 35, and the buffer member 53 is fixed to the substrate. 31, so when the pressure receiving layer 34 is subjected to the pressure applied by the outside, the pressure receiving layer 34 can be prevented from being excessively bent by the support of the cushioning member 53 to damage or affect the range of motion of the movable member 56.

In the foregoing embodiment, the buffer member 53 is directly connected to the substrate 31, but the invention is not limited thereto. In other embodiments, the cushioning member 63 can also be suspended from the base 31 as shown in FIG. In detail, the micro-electromechanical package structure 60 of the embodiment further includes a stopper 62 between the substrate 31 and the buffer member 63, and the first spacing D1 between the stopper 62 and the buffer member 63, and the movable member 56 and the pressure receiving layer 35 are separated by a second spacing D2. It should be noted that, in order to ensure that the pressure receiving layer 35 is bent by external pressure, the movement path of the movable member 56 is not affected, and the first distance D1 between the stopper 62 and the buffer member 63 is smaller than the pressure receiving layer 35 and movable. The second spacing D2 between the pieces 56. Therefore, when the pressure receiving layer 35 is bent downward by the external pressure and the cushioning member 63 abuts against the stopper 62, the movable member 56 can still operate normally.

In summary, the present invention can complete the packaging of the microelectromechanical structure by using the CMOS process, thereby reducing the manufacturing steps of the microelectromechanical package structure, thereby reducing the production cost of the microelectromechanical package structure and improving the process yield. In particular, since the process of the microelectromechanical package structure of the present invention can be performed in a low temperature environment, it is possible to reduce the occurrence of damage to the microelectromechanical structure from high temperature.

In addition, in the process of the micro-electromechanical package structure of the present invention, a non-hermetic channel can be left in the CMOS circuit region under a vacuum environment, and then the micro-electromechanical structure is completely sealed under atmospheric pressure to avoid micro-electromechanical. When the package structure is moved from a vacuum environment to atmospheric pressure, a film collapse occurs in the microelectromechanical region, resulting in structural damage.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

10, 40, 50, 60. . . Microelectromechanical package structure

11, 31. . . Base

116a. . . First cavity

116b. . . Second cavity

12. . . Semiconductor component

13a. . . Lower metal layer

13b. . . Upper metal layer

132. . . First opening

136. . . Second opening

14a. . . First contact window

14b. . . Second contact window

15a. . . First oxide layer

15b. . . Second oxide layer

16, 32. . . Inline structure

17. . . Microelectromechanical structure

18. . . Mask layer

182. . . Third opening

184. . . Fourth opening

19, 35. . . Encapsulation layer

190. . . Package

320. . . Isolation structure

322. . . Third cavity

324. . . Metal layer

326. . . Oxide layer

328. . . Contact window

33, 53, 63. . . Buffer

34. . . Pressure layer

342. . . Fifth opening

38. . . Undoped polysilicon layer

56. . . Movable

62. . . Stop

D1. . . First spacing

D2. . . Second spacing

1A to FIG. 1E are schematic cross-sectional views showing a microelectromechanical package structure according to an embodiment of the present invention in a manufacturing process.

2A-2C are schematic cross-sectional views showing a microelectromechanical package structure according to another embodiment of the present invention in a partial manufacturing process.

3 is a partial cross-sectional view showing a microelectromechanical package structure according to another embodiment of the present invention.

4 is a partial cross-sectional view showing a microelectromechanical package structure according to another embodiment of the present invention.

FIG. 5 is a partial cross-sectional view showing a microelectromechanical package structure according to another embodiment of the present invention.

10. . . Microelectromechanical package structure

11. . . Base

116a. . . First cavity

116b. . . Second cavity

13a. . . Lower metal layer

13b. . . Upper metal layer

132. . . First opening

136. . . Second opening

14a. . . First contact window

15a. . . First oxide layer

16. . . Inline structure

17. . . Microelectromechanical structure

19. . . Encapsulation layer

190. . . Package

Claims (21)

A manufacturing method of a microelectromechanical package structure, comprising: providing a substrate; forming a plurality of lower metal layers and a plurality of first oxide layers on the substrate, wherein the lower metal layers are interlaced with the first oxide layers to form a microelectromechanical structure and an interconnect structure; forming an upper metal layer over the interconnect structure and the microelectromechanical structure, wherein the upper metal layer has at least one first opening and at least one second opening, the first The opening is located above the interconnecting structure, the second opening is located above the microelectromechanical structure, and the area of the first opening is larger than the area of the second opening; the first opening and the second opening are etched channels, Removing a portion of the first oxide layer to form a first cavity around the microelectromechanical structure, and forming a second cavity above the interconnect structure, wherein the first cavity and the second cavity Interconnecting; sealing the second opening in a vacuum environment; and forming a package over the upper metal layer in a non-vacuum environment to seal the first opening. The method of fabricating a microelectromechanical package structure according to claim 1, wherein after removing a portion of the first oxide layers, further comprising forming an encapsulation layer over the upper metal layer to fill the second opening And disconnecting at the corresponding first opening, and allowing the first cavity to communicate to the first opening through the second cavity. The method of fabricating a microelectromechanical package structure according to claim 1, wherein the method of removing a portion of the oxide layer comprises etching using a hydrofluoric acid vapor. The method for fabricating a microelectromechanical package structure according to claim 1, wherein before removing a portion of the first oxide layers, the method further comprises: forming a second oxide layer on the upper metal layer; Forming a mask layer on the dioxide layer, the mask layer having at least one third opening and at least one fourth opening, wherein the third opening is located above the first opening, the fourth opening is located above the microelectromechanical structure; And removing the portion of the second oxide layer by using the third opening and the fourth opening as etching channels to expose the first opening and the second opening. The method of fabricating a microelectromechanical package structure according to claim 4, wherein the aperture of the first opening is smaller than the aperture of the third opening. The method of fabricating a microelectromechanical package structure according to claim 4, wherein the fourth opening is staggered with the second opening. A microelectromechanical package structure comprising: a substrate; an interconnect structure disposed on the substrate; a microelectromechanical structure disposed on the substrate and located in a first cavity; an upper metal layer located at The interconnect structure has a second cavity between the upper metal layer and the interconnect structure, and is connected to the first cavity, and the upper metal layer has at least one first An opening and at least one second opening, wherein the first opening is located above the interconnecting structure and communicates with the second cavity, the second opening is located above the microelectromechanical structure and communicates with the first cavity, and the The first opening has an area larger than the area of the second opening; a deposit disposed over the upper metal layer to seal the second opening; and a package disposed over the upper metal layer to seal the first Opening. The MEMS package structure of claim 7, wherein the deposit is an encapsulation layer disposed between the upper metal layer and the package, and sealing the second opening, and corresponding to the first The opening is broken. The MEMS package structure of claim 8, further comprising a mask layer disposed between the upper metal layer and the encapsulation layer, wherein the mask layer has at least one third opening and at least one Four openings, and the third opening is located above the first opening, and the fourth opening is located above the microelectromechanical structure. The microelectromechanical package structure of claim 9, wherein the first opening has a smaller aperture than the third opening. The MEMS package structure of claim 9, wherein the second opening is staggered with the fourth opening. A microelectromechanical package structure comprising: a substrate; an interconnect structure disposed on the substrate and having a third cavity; a buffer member partially disposed in the third cavity; a layer partially suspended above the third cavity and having at least a fifth opening over the third cavity and exposing a portion of the buffer member; and an encapsulation layer disposed on the pressure receiving layer And filling the fifth opening to connect to the buffer member. The MEMS package structure of claim 12, wherein the material of the encapsulation layer comprises a metal. The MEMS package structure of claim 12, wherein the material of the encapsulation layer comprises aluminum. The MEMS package structure of claim 12, further comprising an isolation structure disposed on the substrate and surrounding the third cavity. The microelectromechanical package structure of claim 15 further comprising an undoped polysilicon layer disposed between the isolation structure and the substrate. The microelectromechanical package structure of claim 12, wherein the portion of the buffer member located in the third cavity is connected to the substrate. The microelectromechanical package structure of claim 12, wherein a portion of the buffer member located in the third cavity is suspended above the substrate. The MEMS package structure of claim 18, further comprising a stopper disposed between the substrate and the buffer member, and the buffer member and the stopper are separated by a first interval. The microelectromechanical package structure of claim 19, further comprising at least one movable member partially located in the third cavity and suspended above the substrate. The MEMS package structure of claim 20, wherein the movable member and the pressure receiving layer are separated by a second spacing, and the second spacing is greater than the first spacing.