TWI387555B - Mems integrated chip and method for making same - Google Patents

Mems integrated chip and method for making same Download PDF

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TWI387555B
TWI387555B TW98139395A TW98139395A TWI387555B TW I387555 B TWI387555 B TW I387555B TW 98139395 A TW98139395 A TW 98139395A TW 98139395 A TW98139395 A TW 98139395A TW I387555 B TWI387555 B TW I387555B
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substrate
mems
microelectromechanical
region
forming
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TW98139395A
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TW201118034A (en
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Chuan Wei Wang
Sheng Ta Lee
Hsin Hui Hsu
Wei Chung Wang
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Pixart Imaging Inc
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微機電系統晶片及其製作方法MEMS wafer and manufacturing method thereof

本發明有關於一種微機電系統晶片,也有關於此種系統晶片的製作方法。The present invention relates to a microelectromechanical system wafer, and to a method of fabricating such a system wafer.

微機電系統有各種應用,例如微聲壓傳感器、陀螺儀、加速度計等。大部份的微機電系統中包含微機電元件與其他微電子電路,必須互相整合,構成整合晶片。在其中一種先前技術中,微機電元件與微電子電路被置於晶圓同一表面,舉例而言可參閱圖1之平面圖,如圖所示,整合晶片中包含微機電元件區100和微電子電路元件(例如為CMOS元件)區200,且微機電元件區100由防護環120圍繞,以防止製作微機電元件的過程中因蝕刻損及微電子電路元件區200。MEMS have a variety of applications, such as micro-acoustic pressure sensors, gyroscopes, accelerometers, and more. Most MEMS systems contain MEMS components and other microelectronic circuits that must be integrated with each other to form an integrated wafer. In one of the prior art, the microelectromechanical component and the microelectronic circuit are placed on the same surface of the wafer. For example, referring to the plan view of FIG. 1, as shown, the integrated wafer includes the microelectromechanical component region 100 and the microelectronic circuit. An element (e.g., CMOS element) region 200, and the microelectromechanical device region 100 is surrounded by a guard ring 120 to prevent etch damage to the microelectronic circuit device region 200 during fabrication of the microelectromechanical device.

請參考圖2,圖2是沿圖1之A-A方向的剖面圖。在製作微電子電路元件和微機電元件的過程中,於基板11上,將沉積多層的介電層19(圖中未區分各層間的界線),而在此種先前技術中,必須藉由蝕刻該介電層19,以在微機電元件區100形成可活動之微機電元件(未示出),因此在微機電元件區100中將留下空間10。如前述,蝕刻介電層19時不宜損及微電子電路元件區200,因此乃設有防護環120,由多晶矽層12、金屬層15、16、17及18、及介電層19所構成。金屬層的數目可視微電子電路之內連線需求和微機電元件設計來決定。Please refer to FIG. 2. FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1. In the process of fabricating the microelectronic circuit component and the microelectromechanical component, a plurality of dielectric layers 19 (without dividing the boundaries between the layers) are deposited on the substrate 11, and in this prior art, etching must be performed. The dielectric layer 19 forms a movable microelectromechanical element (not shown) in the microelectromechanical element region 100, thus leaving a space 10 in the microelectromechanical element region 100. As described above, when the dielectric layer 19 is etched, the microelectronic circuit device region 200 is not damaged. Therefore, the guard ring 120 is provided, which is composed of the polysilicon layer 12, the metal layers 15, 16, 17 and 18, and the dielectric layer 19. The number of metal layers can be determined by the wiring requirements within the microelectronic circuit and the design of the MEMS components.

為了在同一表面上製作微機電元件與微電子電路元件,必須在其間提供電氣連結。上述先前技術中是使用一層或多 層金屬層來達成此連結,例如圖2中之第二金屬層16。然而,既然使用到一層或多層金屬層,該等金屬層便必須穿越防護環120,而在其穿越防護環120的位置處將不能與防護環120的其他部分(圖示中的第一接觸層14、第一金屬層15)構成緊密封閉的結構,否則即造成短路。因此,此種先前技術中,在蝕刻製作微機電元件時將不能完全避免損及微電子電路元件區200。In order to fabricate microelectromechanical components and microelectronic circuit components on the same surface, electrical connections must be provided therebetween. In the above prior art, one or more layers are used. A layer of metal is used to achieve this bond, such as the second metal layer 16 in FIG. However, since one or more layers of metal are used, the layers must pass through the guard ring 120 and will not be able to interact with other portions of the guard ring 120 (the first contact layer in the illustration) at the location through which the guard ring 120 is passed. 14. The first metal layer 15) constitutes a tightly closed structure, otherwise a short circuit is caused. Therefore, in this prior art, the damage to the microelectronic circuit component region 200 cannot be completely avoided when etching the microelectromechanical device.

此外,此種先前技術中,由於微機電元件與微電子電路設置於晶圓同一表面,因此較為耗用面積。In addition, in this prior art, since the microelectromechanical element and the microelectronic circuit are disposed on the same surface of the wafer, the area is relatively consumed.

有鑑於以上所述,有必要提供一種結構,可在功能上連結微機電元件與微電子電路元件,而仍能保護微電子電路元件區的完整性,此外並可減少微機電系統晶片所佔的面積。In view of the above, it is necessary to provide a structure that functionally couples MEMS components to microelectronic circuit components while still protecting the integrity of the microelectronic circuit component regions and, in addition, reducing the MEMS wafer footprint. area.

本發明之一目的在提供一種微機電系統晶片,其能保護微電子電路元件區的完整性,並佔據較少的面積。It is an object of the present invention to provide a microelectromechanical system wafer that protects the integrity of the microelectronic circuit component regions and occupies less area.

本發明之另一目的在提供一種微機電系統晶片的製作方法。Another object of the present invention is to provide a method of fabricating a microelectromechanical system wafer.

為達上述之目的,就本發明的其中一個觀點而言,提供了一種微機電系統晶片,包含:第一基板,其具有相對之第一表面與第二表面;位於第一表面之微電子電路元件區;位於第二表面之第一微機電元件區;以及將該微電子電路元件區與該第一微機電元件區電性連接之導線結構。In order to achieve the above object, in one aspect of the present invention, a microelectromechanical system wafer is provided, comprising: a first substrate having opposite first and second surfaces; and a microelectronic circuit on the first surface An element region; a first MEMS element region on the second surface; and a wire structure electrically connecting the microelectronic circuit device region to the first MEMS device region.

就本發明的另一個觀點而言,提供了一種微機電系統晶片之製作方法,包含下列步驟:提供一第一基板,其具有相 對之第一表面與第二表面;於該第一表面上,形成微電子電路元件區;形成穿越第一基板的導線結構;於該第二表面上,形成第一微機電元件區;以及使微電子電路元件區與第一微機電元件區藉由該導線結構而電連接,其中該形成微電子電路元件區、形成穿越第一基板的導線結構、與形成第一微機電元件區之步驟可為任意順序。In another aspect of the present invention, a method of fabricating a MEMS wafer is provided, comprising the steps of: providing a first substrate having a phase a first surface and a second surface; forming a microelectronic circuit component region on the first surface; forming a wire structure traversing the first substrate; forming a first MEMS element region on the second surface; The microelectronic circuit component region and the first microelectromechanical device region are electrically connected by the wire structure, wherein the step of forming the microelectronic circuit component region, forming the wire structure passing through the first substrate, and forming the first microelectromechanical device region may be In any order.

上述微機電系統晶片與製作方法中,該第一基板可為矽晶絕緣體(silicon on insulator,SOI)材料。In the above MEMS wafer and manufacturing method, the first substrate may be a silicon on insulator (SOI) material.

上述微機電系統晶片與製作方法中,該導線結構可為直通矽晶穿孔(through silicon via,TSV)方法所形成。In the above MEMS wafer and fabrication method, the wire structure may be formed by a through silicon via (TSV) method.

上述微機電系統晶片與製作方法中,該第一微機電元件區中可包含一動件,該動件由該矽晶絕緣體材料中之矽晶部份所形成。In the above MEMS wafer and manufacturing method, the first MEMS element region may include a moving member formed by a twin portion of the eutectic insulator material.

上述微機電系統晶片與製作方法中,可更提供一第二基板,並於第二基板上形成第二微機電元件區,且接合該第二基板與前述第一基板,使該第二微機電元件區與前述第一微機電元件區功能連接。In the above MEMS wafer and manufacturing method, a second substrate may be further provided, and a second MEMS element region is formed on the second substrate, and the second substrate and the first substrate are bonded to make the second MEMS The component region is functionally coupled to the aforementioned first microelectromechanical component region.

底下藉由具體實施例詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

本發明中的圖式均屬示意,主要意在表示製程步驟以及各層之間之上下次序關係,至於形狀、厚度與寬度則並未依照比例繪製。The drawings in the present invention are schematic and are mainly intended to represent the process steps and the relationship between the layers, and the shapes, thicknesses, and widths are not drawn to scale.

本發明的主要概念為:在基板的兩面分別設置微電子電 路與微機電元件,並以導線結構來提供兩者間的功能連結,導線結構的較佳實施例為直通矽晶穿孔(through silicon via,TSV)。其步驟可以為:(一)先設置微電子電路、再製作導線結構、再製作微機電元件;(二)先設置微電子電路、再製作微機電元件、再製作導線結構;(三)先設置微機電元件、再製作導線結構、再製作微電子電路元件;(四)先設置微機電元件、再製作微電子電路元件、再製作導線結構;(五)先設置導線結構、再製作微機電元件、再製作微電子電路元件;(六)先設置導線結構、再製作微電子電路元件、再製作微機電元件。The main concept of the present invention is to separately provide microelectronics on both sides of the substrate. The circuit and the microelectromechanical component are provided in a wire structure to provide a functional connection between the two. A preferred embodiment of the wire structure is a through silicon via (TSV). The steps may be: (1) first setting a microelectronic circuit, then fabricating a wire structure, and then fabricating a microelectromechanical component; (2) first setting a microelectronic circuit, then fabricating a microelectromechanical component, and then fabricating a wire structure; (3) first setting MEMS components, remanufactured wire structures, and fabricated microelectronic circuit components; (4) first set up microelectromechanical components, then fabricate microelectronic circuit components, and then fabricate wire structures; (5) first set wire structure, then fabricate microelectromechanical components And then make microelectronic circuit components; (6) first set the wire structure, then make microelectronic circuit components, and then make microelectromechanical components.

在以上步驟完畢後,或在微機電元件製作完畢後,尚可提供一層包覆層,以覆蓋並密封該微機電元件,且此包覆層上尚可設置對應的微機電元件,與基板上的微機電元件交互作用,例如構成出平面感測器,等等。After the above steps are completed, or after the microelectromechanical component is fabricated, a coating layer may be provided to cover and seal the microelectromechanical component, and the corresponding microelectromechanical component may be disposed on the cladding layer, and the substrate may be disposed on the substrate. The interaction of the microelectromechanical components, for example, constitutes a planar sensor, and the like.

以下就上述概念中之第(一)種製作方式,以實施例加以說明。參閱實施例之後,本技術領域之士當可類推應用至上述第(二)~(六)種製作方式中。Hereinafter, the first (1) production method of the above concept will be described by way of examples. After referring to the embodiments, the person skilled in the art can be applied to the above (2) to (6) production methods.

請參照圖3至圖9,在本實施例中,係提供一第一基板110作為微機電元件與微電子電路元件(例如為CMOS元件)之基板,如圖3所示,該基板可為矽晶絕緣體(silicon on insulator, SOI)材料,其具有第一表面111與第二表面112,其間以絕緣體31隔離。如圖4所示,於第一基板110的第二表面112上,沉積一保護層51。此保護層51例如為未摻雜之多晶矽層,或其他可提供電氣隔絕功能的材料層。如圖5所示,於第一基板110的第一表面111上,形成微電子電路元件區200a,包含形成如摻雜區13a、閘極層12a、金屬層15a、16a、17a、18a、及鈍化層(passivation)19a等微電子電路元件區所需之組成層別,其方式例如可使用標準的CMOS製程。Referring to FIG. 3 to FIG. 9 , in the embodiment, a first substrate 110 is provided as a substrate of a microelectromechanical component and a microelectronic circuit component (for example, a CMOS component). As shown in FIG. 3 , the substrate may be a germanium. Silicon on insulator, The SOI) material has a first surface 111 and a second surface 112 separated by an insulator 31 therebetween. As shown in FIG. 4, a protective layer 51 is deposited on the second surface 112 of the first substrate 110. This protective layer 51 is, for example, an undoped polysilicon layer, or other layer of material that provides electrical isolation. As shown in FIG. 5, on the first surface 111 of the first substrate 110, a microelectronic circuit device region 200a is formed, including, for example, a doped region 13a, a gate layer 12a, metal layers 15a, 16a, 17a, 18a, and A constituent layer required for a microelectronic circuit component region such as a passivation 19a, for example, a standard CMOS process can be used.

圖6說明本實施例之導線結構300,在本實施例中,係於第一基板110第二表面112上使用直通矽晶穿孔方法形成導線結構300,構成微機電元件與微電子電路元件之功能連結導線,並於過程中去除保護層51。直通矽晶穿孔之典型製作方法係以蝕刻方式製作穿孔後,在穿孔內填入阻障層310(barrier)、再填入導體層320(conductor),阻障層310材料例如可為鈦、氮化鈦、鉭、氮化鉭或以上材料之複合結構,阻障層310亦可視為黏著層(adhesion layer),因其除達成阻障功能外亦可提高導體層320與基板110的黏著。導體層320材料可為常用之穿孔導體材料例如鎢、銅等。需注意者,雖然本發明之較佳實施例係使用直通矽晶穿孔方法形成導線結構300,但將微機電元件與微電子電路元件功能連結之方式不限於使用直通矽晶穿孔,亦可為其他方式如:透過晶片外部之連接線(wire bond)來連接,此亦屬本發明的範圍。FIG. 6 illustrates the wire structure 300 of the present embodiment. In the present embodiment, the wire structure 300 is formed on the second surface 112 of the first substrate 110 by using a through-silicon via method to form a microelectromechanical component and a microelectronic circuit component. The wires are joined and the protective layer 51 is removed during the process. The through-silicone via is typically formed by etching. After the via is filled, a barrier layer 310 is filled and a conductor layer 320 is filled. The barrier layer 310 can be, for example, titanium or nitrogen. The composite structure of titanium, tantalum, tantalum nitride or the above material, the barrier layer 310 can also be regarded as an adhesion layer, because it can improve the adhesion of the conductor layer 320 and the substrate 110 in addition to the barrier function. The material of the conductor layer 320 may be a commonly used perforated conductor material such as tungsten, copper or the like. It should be noted that although the preferred embodiment of the present invention forms the wire structure 300 by using a through-pass twinning method, the manner in which the micro-electromechanical element and the micro-electronic circuit element are functionally coupled is not limited to the use of through-pass twinning, and may be other The manner is such that the connection is made through a wire bond outside the wafer, which is also within the scope of the invention.

接著參閱圖7,於第一基板110之第二表面112上,藉由蝕刻形成第一微機電元件區400;蝕刻方式視基板材質與所欲形成的微機電元件形狀而定,當基板為矽時,例如可使用非 等向性的ICP(Inductively Coupled Plasma,感應電漿)蝕刻,或使用等向性的XeF2蝕刻。形成第一微機電元件區400後,如圖8所示,再蝕刻去除部分絕緣層31,使第一微機電元件成為可動件,其蝕刻方式例如可為HF蒸氣蝕刻或緩衝氧化物蝕刻(buffered oxide etch)。在本實施例中,第一微機電元件即已構成完整的微機電元件,此微機電元件之動件由該矽晶絕緣體材料中之矽晶部份所形成。接著參閱圖9,以一包覆層410包覆保護第一微機電元件區400,便完成了微機電矽統晶片的整體結構。包覆層例如可以為另一矽基板,使用玻璃燒結(glass frit)、焊接(solder)或以感光性聚合物(photo-sensitive polymer)作為結合材料,與第一基板110接合。結合方式的細節非本案重點,可參閱本案申請人於98年8月3日申請的第098126099號申請案,在此不予贅述。Referring to FIG. 7, on the second surface 112 of the first substrate 110, a first MEMS element region 400 is formed by etching; the etching method depends on the substrate material and the shape of the MEMS element to be formed, when the substrate is 矽For example, you can use non An isotropic ICP (Inductively Coupled Plasma) etch, or an isotropic XeF2 etch. After the first microelectromechanical device region 400 is formed, as shown in FIG. 8, a portion of the insulating layer 31 is etched away to make the first microelectromechanical device a movable member, and the etching method thereof may be, for example, HF vapor etching or buffer oxide etching (buffered). Oxide etch). In this embodiment, the first microelectromechanical element has formed a complete microelectromechanical element, and the moving element of the microelectromechanical element is formed by a twinned portion of the crystalline insulator material. Referring next to FIG. 9, the first MEMS element region 400 is covered with a cladding layer 410 to complete the overall structure of the MEMS wafer. The cladding layer may be, for example, another tantalum substrate joined to the first substrate 110 using a glass frit, a solder, or a photo-sensitive polymer as a bonding material. The details of the combination method are not the focus of this case. Please refer to the application No. 098126099 filed by the applicant in this case on August 3, 1998, and will not be repeated here.

以下說明本發明的第二實施例。在本實施例中,於圖3-8之步驟後,接著見圖10與圖11,再提供第二基板500,此基板例如可為矽基板,並在該第二基板500上形成電氣連接端510及第二微機電元件區520。電氣連接端510的目的是使第二基板500與第一基板110達成電氣連接,使電訊號得以傳遞,其例如(但不限於)可與第一基板110之導線結構300連接。第二微機電元件區520可使用基板本身來製作,亦可在基板上透過沉積、微影、蝕刻的方式,以矽、金屬及/或絕緣層來製作。第二基板500與第一基板110的接合方式可使用上述任何方式,以玻璃燒結、焊接或以感光性聚合物作為結合材料來接合。如圖11所示,當第一基板110與第二基板500接合後,第二微機電元件區520與第一微機電元件區400 可達成組合性的功能,構成完整的微機電元件400a,此微機電元件400a可以感測垂直方向上的移動變化,例如可作為出平面感測器。在較佳實施型態中,於圖中未示出之外圍處,宜以氣密材料密封微機電元件400a和電氣連接處(510,300),此密封步驟可在第二基板500與第一基板110接合時一併完成,不另繪示說明。Next, a second embodiment of the present invention will be described. In this embodiment, after the steps of FIGS. 3-8, and then FIG. 10 and FIG. 11, a second substrate 500 is provided. The substrate can be, for example, a germanium substrate, and an electrical connection terminal is formed on the second substrate 500. 510 and a second MEMS element region 520. The purpose of the electrical connection end 510 is to make an electrical connection between the second substrate 500 and the first substrate 110 to enable the electrical signal to be transmitted, such as, but not limited to, being connectable to the wire structure 300 of the first substrate 110. The second MEMS element region 520 can be fabricated using the substrate itself, or can be formed on the substrate by deposition, lithography, or etching, using germanium, metal, and/or insulating layers. The manner in which the second substrate 500 is bonded to the first substrate 110 may be performed by any of the above methods, using glass sintering, soldering, or bonding with a photosensitive polymer as a bonding material. As shown in FIG. 11, after the first substrate 110 is bonded to the second substrate 500, the second MEMS element region 520 and the first MEMS element region 400 are A combined function can be achieved to form a complete microelectromechanical component 400a that can sense changes in motion in the vertical direction, such as an out-of-plane sensor. In a preferred embodiment, at a periphery not shown in the drawing, the microelectromechanical element 400a and the electrical connection (510, 300) are preferably sealed with a gas-tight material. The sealing step may be performed on the second substrate 500 and the first substrate 110. Completed at the time of joining, without further instructions.

以上已針對較佳實施例來說明本發明,唯以上所述者,僅係為使熟悉本技術者易於了解本發明的內容而已,並非用來限定本發明之權利範圍。對於熟悉本技術者,當可在本發明精神內,立即思及各種等效變化。舉例而言,以上所述各實施例中之材料、金屬層數等皆為舉例,還其他有各種等效變化的可能。又,與微機電元件整合之微電子電路不限於以CMOS元件製作,亦可包含雙極電晶體等。故凡依本發明之概念與精神所為之均等變化或修飾,均應包括於本發明之申請專利範圍內。The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. For those skilled in the art, various equivalent changes can be immediately considered within the spirit of the invention. For example, the materials, the number of metal layers, and the like in the above embodiments are all exemplified, and there are other possibilities for equivalent changes. Further, the microelectronic circuit integrated with the microelectromechanical element is not limited to being fabricated by a CMOS element, and may also include a bipolar transistor or the like. Equivalent changes or modifications of the concept and spirit of the invention are intended to be included within the scope of the invention.

10‧‧‧空間10‧‧‧ space

11‧‧‧基板11‧‧‧Substrate

12,12a‧‧‧多晶矽層12,12a‧‧‧Polysilicon layer

13,13a‧‧‧摻雜區13,13a‧‧‧Doped area

14‧‧‧第一接觸層14‧‧‧First contact layer

15,15a‧‧‧第一金屬層15,15a‧‧‧First metal layer

16,16a‧‧‧第二金屬層16,16a‧‧‧Second metal layer

17,17a‧‧‧第三金屬層17,17a‧‧‧ third metal layer

18,18a‧‧‧第四金屬層18,18a‧‧‧Fourth metal layer

19‧‧‧介電層19‧‧‧Dielectric layer

19a‧‧‧鈍化層19a‧‧‧ Passivation layer

31‧‧‧絕緣層31‧‧‧Insulation

51‧‧‧保護層51‧‧‧Protective layer

100‧‧‧微機電元件區100‧‧‧Microelectromechanical component area

110‧‧‧第一基板110‧‧‧First substrate

111‧‧‧第一表面111‧‧‧ first surface

112‧‧‧第二表面112‧‧‧ second surface

120‧‧‧防護環120‧‧‧ guard ring

200,200a‧‧‧微電子電路元件區200,200a‧‧‧Microelectronic circuit component area

300‧‧‧導線結構300‧‧‧Wire structure

310‧‧‧阻障層310‧‧‧Barrier layer

320‧‧‧導體層320‧‧‧ conductor layer

400‧‧‧第一微機電元件區400‧‧‧First MEMS component area

400a‧‧‧微機電元件400a‧‧‧Microelectromechanical components

410‧‧‧包覆層410‧‧‧Cladding

500‧‧‧第二基板500‧‧‧second substrate

510‧‧‧電氣連接端510‧‧‧Electrical connection

520‧‧‧第二微機電元件區520‧‧‧Second MEMS component area

圖1-2顯示先前技術。Figures 1-2 show prior art.

圖3-9示出本發明的第一實施例。Figures 3-9 illustrate a first embodiment of the present invention.

圖10-11示出本發明的第二實施例。Figures 10-11 illustrate a second embodiment of the present invention.

31‧‧‧絕緣層31‧‧‧Insulation

110‧‧‧第一基板110‧‧‧First substrate

200a‧‧‧微電子電路元件區200a‧‧‧Microelectronic circuit component area

300‧‧‧導線結構300‧‧‧Wire structure

400‧‧‧第一微機電元件區400‧‧‧First MEMS component area

410‧‧‧包覆層410‧‧‧Cladding

Claims (13)

一種微機電系統晶片,包含:第一基板,其具有相對之第一表面與第二表面;位於第一表面之微電子電路元件區;位於第二表面之第一微機電元件區;以及將該微電子電路元件區與該第一微機電元件區電性連接之導線結構,其中該導線結構為自該第二表面向該第一表面,貫穿該第一基板,並達於該第一表面,形成穿越該第一基板的導線結構。 A microelectromechanical system wafer comprising: a first substrate having opposing first and second surfaces; a microelectronic circuit component region on the first surface; a first MEMS element region on the second surface; a wire structure electrically connected to the first MEMS element region, wherein the wire structure is from the second surface toward the first surface, penetrates the first substrate, and reaches the first surface, A wire structure is formed through the first substrate. 如申請專利範圍第1項所述之微機電系統晶片,其中該第一基板為矽晶絕緣體材料(SOI)。 The MEMS wafer of claim 1, wherein the first substrate is a twinned insulator material (SOI). 如申請專利範圍第2項所述之微機電系統晶片,其中該第一微機電元件區中包含一動件,該動件由該矽晶絕緣體材料中之矽晶部份所形成。 The MEMS wafer of claim 2, wherein the first MEMS element region comprises a moving member formed by a twin portion of the eutectic insulator material. 如申請專利範圍第1項所述之微機電系統晶片,更包含一包覆層,包覆該第一微機電元件區。 The MEMS wafer of claim 1, further comprising a cladding layer covering the first MEMS element region. 如申請專利範圍第1項所述之微機電系統晶片,更包含一第二基板,與該第一基板接合,此第二基板包含第二微機電元件區,與前述第一微機電元件區構成微機電元件而提供組合性的功能。 The MEMS wafer of claim 1, further comprising a second substrate bonded to the first substrate, the second substrate comprising a second MEMS element region, and the first MEMS element region Microelectromechanical components provide a combined function. 如申請專利範圍第5項所述之微機電系統晶片,其中該第二基板與該導線結構電性連接。 The MEMS wafer of claim 5, wherein the second substrate is electrically connected to the wire structure. 一種微機電系統晶片之製作方法,包含下列步驟:提供一第一基板,其具有相對之第一表面與第二表面;於該第一表面上,形成微電子電路元件區; 自第二表面向該第一表面,以蝕刻方式製作穿孔以貫穿該第一基板,並達於該第一表面,形成穿越第一基板的導線結構;於該第二表面上,形成第一微機電元件區;以及使微電子電路元件區與第一微機電元件區藉由該導線結構而電連接,其中該形成微電子電路元件區、形成穿越第一基板的導線結構、與形成第一微機電元件區之步驟可為任意順序。 A method of fabricating a microelectromechanical system wafer, comprising the steps of: providing a first substrate having opposite first and second surfaces; and forming a microelectronic circuit component region on the first surface; Forming a through hole from the second surface toward the first surface to etch through the first substrate and reaching the first surface to form a wire structure passing through the first substrate; and forming a first micro on the second surface An electromechanical component region; and electrically interconnecting the microelectronic circuit component region and the first microelectromechanical device region by the wire structure, wherein the microelectronic circuit component region is formed, the wire structure is formed through the first substrate, and the first micro is formed The steps of the electromechanical component region can be in any order. 如申請專利範圍第7項所述之微機電系統晶片之製作方法,其中該第一基板為矽晶絕緣體材料。 The method of fabricating a microelectromechanical system wafer according to claim 7, wherein the first substrate is a twinned insulator material. 如申請專利範圍第8項所述之微機電系統晶片之製作方法,其中該形成第一微機電元件區之步驟包括:蝕刻該矽晶絕緣體材料之矽晶部份與絕緣體部分,以形成可動件。 The method of fabricating a microelectromechanical system wafer according to claim 8, wherein the step of forming the first microelectromechanical device region comprises: etching a twin portion of the germanium insulator material and an insulator portion to form a movable member . 如申請專利範圍第7項所述之微機電系統晶片之製作方法,更包括:在形成微電子電路元件區前,先於該第二表面上形成保護層。 The method of fabricating a microelectromechanical system wafer according to claim 7, further comprising: forming a protective layer on the second surface before forming the microelectronic circuit component region. 如申請專利範圍第10項所述之微機電系統晶片之製作方法,更包含:在以蝕刻方式製作穿孔以貫穿該第一基板之步驟前,移除該第二表面上的保護層,且其中形成穿越第一基板的導線結構之步驟包括:填入阻障材料;以及填入導體材料。 The method for fabricating a microelectromechanical system wafer according to claim 10, further comprising: removing the protective layer on the second surface before the step of forming the through hole by etching to penetrate the first substrate, and wherein The step of forming a wire structure through the first substrate includes: filling in the barrier material; and filling in the conductor material. 如申請專利範圍第7項所述之微機電系統晶片之製作方法,更包括:於形成第一微機電元件區後,形成包覆層,包覆該第一 微機電元件區。 The method for fabricating a microelectromechanical system wafer according to claim 7, further comprising: forming a cladding layer after the first microelectromechanical component region is formed, and coating the first Microelectromechanical component area. 如申請專利範圍第7項所述之微機電系統晶片之製作方法,更包括:提供一第二基板;於第二基板上形成第二微機電元件區;接合該第二基板與前述第一基板,使該第二微機電元件區與前述第一微機電元件區功能連接。 The method for fabricating a MEMS wafer according to claim 7 , further comprising: providing a second substrate; forming a second MEMS element region on the second substrate; bonding the second substrate and the first substrate The second MEMS element region is functionally coupled to the aforementioned first MEMS element region.
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