TWI421946B - Inkjet-printed transistor and manufacturing method thereof - Google Patents

Description

Printed semiconductor and manufacturing method thereof

The present invention relates to an electro-optical crystal and a method of manufacturing the same, and more particularly to a printed electro-transistor and a method of manufacturing the same.

Earthworms are the main constituent elements of the earth and an important material for the semiconductor industry. However, because the cost of bismuth is high, it is not easy to handle. It takes a lot of energy and cost to extract a very high-purity crowbar to cut into a piece of tantalum substrate. In addition, a large amount of tantalum substrate is also lost in the semiconductor manufacturing process. Therefore, materials scientists have always wanted to find a way to replace the ruthenium substrate.

At present, a liquid semiconductor solution has been gradually developed, and a transistor is successfully produced by printing. Scientists call this type of transistor a printed transistor.

However, one of the current difficulties in printing plasma is the precision of printing. Transistors have been developed to the nanometer level of precision, but the print heads for printing liquid semiconductor solutions are not as accurate. Therefore, in the manufacturing process of the printing transistor, the liquid semiconductor solution cannot be accurately printed at a predetermined position, so that the quality of the printing transistor cannot be effectively controlled.

The invention relates to a printing transistor and a manufacturing method thereof, which utilizes a combination design of a groove and a hydrophobic layer on a substrate, so that the semiconductor solution can be accurately printed in an appropriate place to improve the quality of the printed transistor. .

According to an aspect of the invention, a method of manufacturing a printing transistor is proposed. The manufacturing method of the printing transistor includes the following steps. A substrate is provided. A source and a drain are formed on the substrate. A hydrophobic layer is formed on the source and the drain. Forming a photoresist layer on the substrate and the hydrophobic layer, the photoresist layer having an opening, the opening exposing at least a portion of the substrate between the source and the drain and at least a portion of the hydrophobic layer. The photoresist layer is used as a mask to etch the substrate to form a recess between the source and the drain. A semiconductor solution is printed in the recess. An insulating layer is formed on the drain and the source. A gate is formed on the insulating layer.

According to another aspect of the invention, a printed transistor is provided. The printing transistor comprises a substrate, a source, a drain, a hydrophobic layer, a semiconductor layer, an insulating layer and a gate. The substrate has a recess. The source is disposed on the substrate. The drain is disposed on the substrate. The groove is disposed between the source and the drain. The hydrophobic layer is disposed on the source and the drain. The semiconductor layer is printed in the recess. The insulating layer is disposed on the source and the drain. The gate is disposed on the insulating layer.

In order to make the above-mentioned contents of the present invention more comprehensible, various embodiments are described below, and in conjunction with the drawings, the detailed description is as follows:

The following is a detailed description of the embodiments, which are intended to be illustrative only and not to limit the scope of the invention. In addition, the drawings in the embodiments omit unnecessary elements to clearly show the technical features of the present invention.

First embodiment

1 to 2, FIG. 1 is a plan view of the printing transistor 100 of the first embodiment, and FIG. 2 is a cross-sectional view of the printing transistor 100 of FIG. 1 along the section line 2-2'. . The printing die 100 of the present embodiment includes a substrate 110, a source 120, a drain 130, a hydrophobic layer 140, a semiconductor layer 150, an insulating layer 160, and a gate 170. From the top view of Fig. 1, only the gate 170 and the insulating layer 160 are seen. From the cross-sectional view of Fig. 2, the above elements are seen. The substrate 110 is, for example, a flexible insulating substrate. The substrate 110 has a recess 111. The source 120 and the drain 130 are disposed on the substrate 110. The material of the source 130 and the drain 140 is, for example, a metal material. The groove 111 is disposed between the source 120 and the drain 130.

The hydrophobic layer 140 is disposed on the source 120 and the drain 130. The hydrophobic layer 140 may be a hydrophobic film formed of a hydrophobic material or a hydrophobic film produced by treating the surfaces of the source 120 and the drain 130. The hydrophobic layer is, for example, a hydrophobic film produced by surface treatment of a source 130 and a drain 140 of a gold (Au) or silver (Ag) material using a long carbon chain thiol.

The semiconductor layer 150 is disposed in the recess 111 by means of printing. The semiconductor layer 150 is, for example, a semiconductor layer formed by spraying poly-3-hexylthiophene (P3HT) in the groove 111 and then passing through a heat curing process.

The insulating layer 160 is disposed on the source 120 and the drain 130, and the gate 170 is disposed on the insulating layer 160.

The manufacturing method of the printing die 100 of this embodiment will be clearly described below in conjunction with a flow chart. However, it will be apparent to those skilled in the art to which the present invention pertains that the printing die 100 of the present embodiment is not limited to this flowchart.

Referring to FIG. 3 and FIG. 4A to FIG. 5J, FIG. 3 is a flow chart showing a method of manufacturing the printing die 100 of the first embodiment, and FIGS. 4A to 4J are diagrams showing the steps of the steps of FIG. 5A to 5J are cross-sectional views showing the steps of Fig. 3. First, in step S301, as shown in FIGS. 4A and 5A, the substrate 110 is provided.

Next, in step S302, as shown in FIGS. 4B and 5B, the source electrode 120 and the drain electrode 130 are formed on the substrate 110.

Then, in step S303, as shown in FIGS. 4C and 5C, a hydrophobic layer 140 is formed on the source 120 and the drain 130. This step utilizes an additional hydrophobic material to form the hydrophobic layer 140. Alternatively, the surface treatment process of the source 120 and the drain 130 is performed to form the hydrophobic layer 140.

Next, in step S304, as shown in FIGS. 4D and 5D, a photoresist layer 900 is formed on the substrate 110 and the hydrophobic layer 140. The photoresist layer 900 has an opening 910. The opening 910 exposes a partial region between the source 120 and the drain 130 and a portion of the hydrophobic layer 140.

As shown in FIG. 4D, the first direction C1 and the second direction C2 are perpendicular to each other, and the source 120 and the drain 130 are arranged in the first direction C1. The width W1 of the opening 910 along the first direction C1 is greater than or equal to the distance D1 between the source 120 and the drain 130. The width W1 of the opening 910 in the first direction C1 is, for example, between 5 micrometers (um) and 500 micrometers.

In addition, the width W2 of the opening 910 along the second side C2 may be greater than, equal to, or less than the width W3 of the source 120 in the second direction C2 and the width W4 of the drain 130 in the second direction C2. In the present embodiment, the width W2 of the opening 910 along the second side C2 is greater than the width W3 of the source 120 in the second direction C2 and the width W4 of the drain 130 in the second direction C2. The width Width of the opening 910 along the second side C2 is, for example, between 30 microns and 500 microns.

Next, in step S305, as shown in FIGS. 4E and 5E, the substrate 110 is etched with the photoresist layer 900 as a mask to form a recess 111 between the source 120 and the drain 130. Wherein, the depth H1 of the groove 111 of the embodiment is greater than 30 nm. In this embodiment, this step uses an isotropic etching process, such as a wet etching process, to etch the substrate 110, so that a slight lateral etch occurs below the source 120 and the drain 130. The etching liquid selected in this embodiment not only etches the substrate 110 but also etches the hydrophobic layer 140 at the same time.

Then, in step S306, as shown in FIGS. 4F and 5F, the photoresist layer 900 is removed.

Next, in step S307, as shown in FIGS. 4G and 5G, the semiconductor solution 151 is printed in the recess 111. In this step, since the hydrophobic layer 140 is provided on both sides of the groove 111, when the semiconductor solution 151 is sprayed onto the hydrophobic layer 140, the semiconductor solution 151 flows in the direction of the groove 111 due to the repulsive force of the hydrophobic layer 140. In addition to the cohesive force of the semiconductor solution 151, and the range limitation provided by the recess 111, the semiconductor solution 151 can stay at the recess 111 between the source 120 and the drain 130.

In addition, since the substrate 110 is etched by an isotropic etching process in this embodiment, in the case where lateral etching occurs, the semiconductor solution 151 can contact the source 120 and the drain 130, and the semiconductor solution 151 is added. The area where the source 120 and the drain 130 are in contact.

Then, in step S308, as shown in FIGS. 4H and 5H, the semiconductor solution 151 is heated to form a solid semiconductor layer 150 in the recess 111.

Next, in step S309, as shown in FIGS. 4I and 5I, the insulating layer 160 is formed on the drain 120 and the source 130.

Then, in step S310, as shown in FIGS. 4J and 5J, the gate 170 is formed on the insulating layer 160. Through the above steps, the printing transistor 100 is completed.

Second embodiment

Please refer to FIG. 6, which is a cross-sectional view of step S305 of the second embodiment. The manufacturing method of the printing transistor of this embodiment is different from the manufacturing method of the printing transistor 100 of the first embodiment in step S305, and the rest of the same points will not be repeated.

As shown in FIG. 6, step S305 of the present embodiment etches only the substrate 110 without etching the hydrophobic layer 240. As such, the semiconductor solution 151 will all be repelled by the hydrophobic layer 240 into the recess 111 without remaining above the source 120 or drain 130.

Third embodiment

Referring to FIG. 7, a cross-sectional view of step S305 of the third embodiment is shown. The manufacturing method of the printing transistor of this embodiment is different from the manufacturing method of the printing transistor 100 of the first embodiment in step S305, and the rest of the same points will not be repeated.

As shown in FIG. 7, step S305 of the present embodiment uses an anisotropic etching process to reduce the occurrence of lateral etching to increase the strength of the substrate 110 supporting the source 120 and the drain 130.

In view of the above, the present invention has been disclosed in various embodiments, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100. . . Printed transistor

110. . . Substrate

111. . . Groove

120. . . Source

130. . . Bungee

140, 240. . . Hydrophobic layer

150. . . Semiconductor layer

151. . . Semiconductor solution

160. . . Insulation

170. . . Gate

900. . . Photoresist layer

910. . . Opening

C1. . . First direction

C2. . . Second direction

D1. . . Source and bungee distance

S301～S310. . . Process step

W1. . . Width of the opening in the first direction

W2. . . Width of the opening in the second direction

W3. . . Width of the source along the second direction

W4. . . The width of the bungee along the second direction

1 is a plan view showing a printing transistor of the first embodiment;

Figure 2 is a cross-sectional view of the printing transistor of Figure 1 taken along section line 2-2';

3 is a flow chart showing a method of manufacturing the printing transistor of the first embodiment;

4A-4J are top views of the steps of FIG. 3;

5A-5J are cross-sectional views showing the steps of FIG. 3;

Figure 6 is a cross-sectional view showing the step S305 of the second embodiment;

Fig. 7 is a cross-sectional view showing the step S305 of the third embodiment.

S301～S310. . . Process step

Claims (18)

A method for manufacturing a printed circuit, comprising: providing a substrate; forming a source and a drain on the substrate; forming a hydrophobic layer on the source and the drain; forming a photoresist layer on the substrate and On the hydrophobic layer, the photoresist layer has an opening exposing at least a portion of the substrate between the source and the drain and at least a portion of the hydrophobic layer; the photoresist layer is masked and etched The substrate is formed to form a recess between the source and the drain; a semiconductor solution is printed in the recess; an insulating layer is formed on the drain and the source; and a gate is formed On the insulation layer. The method of manufacturing a printing transistor according to claim 1, wherein the etching step simultaneously etches a portion of the substrate and a portion of the hydrophobic layer between the source and the drain. The method of manufacturing a printing transistor according to claim 1, wherein the etching step etches only a partial region of the substrate between the source and the drain. The method of manufacturing the printing transistor according to the first aspect of the invention, wherein the source and the drain are arranged along a first direction, the width of the opening along the first direction is greater than or equal to the source and the Bungee distance. The method of manufacturing a printing transistor according to claim 1, wherein the source and the drain are arranged in a first direction, and the width of the opening in the first direction is greater than 5 μm. The method of manufacturing a printing transistor according to claim 1, wherein the source and the drain are arranged in a first direction, and the opening has a width of less than 500 μm in the first direction. The method of manufacturing the printing transistor according to the first aspect of the invention, wherein the source and the drain are arranged along a first direction, and a second direction is substantially perpendicular to the first direction, the opening along the The width of the second direction is greater than 30 microns. The method of manufacturing the printing transistor according to the first aspect of the invention, wherein the source and the drain are arranged along a first direction, and a second direction is substantially perpendicular to the first direction, the opening along the The width in the second direction is less than 500 microns. The method for manufacturing a printing transistor according to claim 1, wherein the step of etching is an isotropic etching process. The method for manufacturing a printing transistor according to claim 1, wherein the step of etching is an anisotropic etching process. A printed circuit board comprising: a substrate having a recess; a source disposed on the substrate; a drain disposed on the substrate, the recess being disposed on the source and the drain a drain layer disposed on the source and the drain; a semiconductor layer printed in the recess; an insulating layer disposed on the source and the drain; and a gate disposed on the drain On the insulating layer. The printing transistor of claim 11, wherein the hydrophobic layer exposes the source and the drain adjacent to the recess. The printing transistor of claim 11, wherein the source and the drain are arranged along a first direction, and the width of the groove along the first direction is greater than or equal to the source and the drain The distance. The printing transistor of claim 11, wherein the source and the drain are arranged in a first direction, and the width of the groove in the first direction is greater than 50 micrometers. The printing transistor according to claim 11, wherein the source and the drain are arranged in a first direction, and the width of the groove in the first direction is less than 500 μm. The printing transistor of claim 11, wherein the source and the drain are arranged along a first direction, a second direction is substantially perpendicular to the first direction, and the groove is along the second The width of the direction is greater than 30 microns. The printing transistor of claim 11, wherein the source and the drain are arranged along a first direction, a second direction is substantially perpendicular to the first direction, and the groove is along the second The width of the direction is less than 500 microns. The printing transistor of claim 11, wherein the groove has a depth greater than 30 nm.