TWI421645B - Patterning method and stack structure for patterning - Google Patents

Patterning method and stack structure for patterning Download PDF

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TWI421645B
TWI421645B TW98118038A TW98118038A TWI421645B TW I421645 B TWI421645 B TW I421645B TW 98118038 A TW98118038 A TW 98118038A TW 98118038 A TW98118038 A TW 98118038A TW I421645 B TWI421645 B TW I421645B
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layer
film
patterned
forming
patterning
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TW98118038A
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TW201044114A (en
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Shih Hsiang Lai
Kuo Hui Su
Min Chi Wang
Shuo Wei Liang
Shin Chuan Chiang
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Taiwan Tft Lcd Ass
Chunghwa Picture Tubes Ltd
Au Optronics Corp
Hannstar Display Corp
Chi Mei Optoelectronics Corp
Ind Tech Res Inst
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Description

圖案化的方法以及用於圖案化的堆疊結構Patterned method and stacked structure for patterning

本發明是有關於一種圖案化的方法及用於圖案化之堆疊結構。The present invention relates to a method of patterning and a stacked structure for patterning.

目前在液晶顯示器(LCD)製作過程中,薄膜電晶體陣列(TFT array)製程仍是採用傳統積體電路(IC)產業之真空鍍膜、黃光顯影、與蝕刻等製程。而隨著面板尺寸的不斷增加,真空鍍膜方式將有製程設備成本過高與良率下降的問題,相較於傳統的物理氣相沈積方式所需的高成本,噴墨印刷(Ink-Jet Printing,IJP)製程近來引起相當多的重視。At present, in the process of manufacturing liquid crystal displays (LCDs), the TFT array process is still a process of vacuum coating, yellow light development, and etching in the conventional integrated circuit (IC) industry. With the increasing size of the panel, the vacuum coating method will have the problem of high cost and low yield of the process equipment. Compared with the high cost required by the traditional physical vapor deposition method, inkjet printing (Ink-Jet Printing) , IJP) process has recently attracted considerable attention.

噴墨印刷技術在平面顯示器(FPD)製程成本上有下列的優勢:(1)大幅節省了傳統薄膜電晶體液晶顯示器(TFT LCD)製程如薄膜沈積、黃光、微影、蝕刻中所需購置的鉅額設備和維護費用。(2)相較於旋塗(Spin-coating)製程,IJP有圖案化能力(約數十微米)與較佳材料利用率。(3)傳統黃光微影製程在更改產品設計時,需更改一整套光罩之設計,而噴墨印刷技術僅需進行程式和控制參數(Recipe)調變,即可因應不同產品之噴印需求。Inkjet printing technology has the following advantages in the cost of flat panel display (FPD) process: (1) Significant savings in traditional thin film transistor liquid crystal display (TFT LCD) processes such as thin film deposition, yellow light, lithography, etching Huge amount of equipment and maintenance costs. (2) IJP has a patterning ability (about several tens of micrometers) and a better material utilization ratio than a spin-coating process. (3) The traditional yellow light lithography process needs to change the design of a complete mask when changing the product design. The inkjet printing technology only needs to adjust the program and control parameters (Recipe) to meet the printing requirements of different products.

雖然,噴墨印刷技術相較傳統製程具上述優點,但其圖案化能力僅約30~60微米以上,無法符合高解析之需求。Although the inkjet printing technology has the above advantages compared with the conventional process, its patterning ability is only about 30 to 60 micrometers or more, which cannot meet the requirements of high resolution.

本發明提供一種圖案化的方法,可使用高能光束以提高圖案的解析度。The present invention provides a method of patterning that uses a high energy beam to increase the resolution of the pattern.

本發明提供一種圖案化的方法,在欲以高能光束熔損的薄膜上多沉積一層未經圖案化的覆蓋層(Cover layer),使其減緩高能光束能量對薄膜材料的影響,以改善薄膜的型態、平整性與圖案的精確性。The present invention provides a patterning method for depositing an unpatterned overlay layer on a film to be melted by a high energy beam, thereby slowing the effect of high energy beam energy on the film material to improve the film. Type, flatness and pattern accuracy.

本發明提供一種用於高能光束圖案化之堆疊結構,其減緩高能光束能量對薄膜材料的影響,以改善薄膜的平整性與圖案的精確性。The present invention provides a stacked structure for high energy beam patterning that mitigates the effects of high energy beam energy on the film material to improve film flatness and pattern accuracy.

本發明提出一種圖案化的方法,包括在基板上提供待圖案化的第一薄膜,接著,在第一薄膜上形成未經圖案化的覆蓋層,此未經圖案化的覆蓋層之材質與第一薄膜之材質相異。之後,以光束熔損未經圖案化的覆蓋層與第一薄膜,以形成圖案化的覆蓋層與圖案化的第一薄膜。其後,再選擇性移除圖案化的覆蓋層。The invention provides a method for patterning, comprising providing a first film to be patterned on a substrate, and then forming an unpatterned cover layer on the first film, the material of the unpatterned cover layer and the first The material of a film is different. Thereafter, the unpatterned cover layer and the first film are melted by the beam to form a patterned cover layer and the patterned first film. Thereafter, the patterned cover layer is selectively removed.

本發明又提出一種待圖案化之堆疊結構,包括第一薄膜與未經圖案化的覆蓋層。第一薄膜為待圖案化層。未經圖案化的覆蓋層,覆蓋於第一薄膜上,其材質與第一薄膜之材質相異。The invention further proposes a stack structure to be patterned, comprising a first film and an unpatterned cover layer. The first film is a layer to be patterned. The unpatterned cover layer covers the first film and has a material different from that of the first film.

本發明之圖案化的方法,使用高能光束以提高圖案的解析度。並且,本發明提供一種用於高能光束圖案化之堆疊結構,在欲以高能光束熔損的薄膜上多沉積一層未經圖案化的覆蓋層(Cover layer),使其減緩高能光束能量對薄膜 材料的影響,以改善薄膜的型態、平整性與圖案的精確性。The patterning method of the present invention uses a high energy beam to increase the resolution of the pattern. Moreover, the present invention provides a stacked structure for high energy beam patterning, depositing an unpatterned overlay layer on a film to be melted by a high energy beam, thereby slowing down the high energy beam energy to the film. The influence of the material to improve the shape, flatness and pattern accuracy of the film.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

噴墨印刷技術可搭配高能光束如雷射的熔損(Ablation)技術來達成金屬導線的圖案化,以提高圖案的解析度。然而薄膜經由雷射熔損製程來圖案化時,雷射的高能量卻會造成薄膜邊緣處翹起(Film curled)的現象,此現象改變了薄膜的線寬,並且衍生了粗糙度變差,甚至於附著力下降的問題。若將雷射能量降低,則有薄膜無法移除乾淨的疑慮。Inkjet printing technology can be used with high energy beams such as laser's Ablation technology to achieve the patterning of metal wires to improve the resolution of the pattern. However, when the film is patterned by a laser melt-dissipation process, the high energy of the laser causes a film curling phenomenon at the edge of the film, which changes the line width of the film and derivates the roughness. Even the problem of decreased adhesion. If the laser energy is lowered, there is a concern that the film cannot be removed.

本發明是在欲以高能光束熔損的薄膜上多沉積一層覆蓋層(Cover layer),使其減緩高能光束能量對薄膜材料的影響,以改善薄膜的平整性與圖案的精確性,提供具有良好之薄膜型態(morphology)的圖案化薄膜。The invention deposits a cover layer on a film which is to be melted by a high-energy beam, so as to slow down the influence of high-energy beam energy on the film material, to improve the flatness and pattern accuracy of the film, and to provide good A patterned film of a film morphology.

圖1A至1C-1是依照本發明一實施例所繪示之一種圖案化的方法。圖2A至2C-1是依照本發明另一實施例所繪示之一種圖案化的方法。1A through 1C-1 illustrate a method of patterning in accordance with an embodiment of the invention. 2A through 2C-1 illustrate a method of patterning in accordance with another embodiment of the present invention.

請參照圖1A與2A,本實施例之圖案化的方法,是先將待圖案化薄膜12形成在基板10上。接著,於薄膜12上多沉積一層覆蓋層14。Referring to FIGS. 1A and 2A, the patterning method of the present embodiment is to first form the film 12 to be patterned on the substrate 10. Next, a cover layer 14 is deposited on the film 12.

基板10之材質例如是玻璃、矽、聚對苯二甲酸乙二酯(PET)、聚萘二酸乙二醇酯(PEN)、聚對苯二甲酸環己烷對二甲醇酯(PCT)、聚醯亞胺(PI)、聚苯醚碸(PES),或前述 材料之組合。The material of the substrate 10 is, for example, glass, ruthenium, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polybutylene terephthalate (DM), Polyimine (PI), polyphenylene ether (PES), or the foregoing Combination of materials.

薄膜12包括導電層、絕緣層、半導體層或至少前述兩種材料所構成之複合材料層或堆疊層。導電層之材質至少包含Au、Ag、Cu、Ni、Cr、Ti、Al、Pt、Pd金屬或其合金。絕緣層之材質包括無機材料、有機材料或其組合。無機材料至少包括SiNx 、SiO2 、Al2 O3 、Al2 O3 、Ta2 O5 、TiO2 、ZrO2 、HfO2 ,其中SiNx 之中的X表示任何可能的數值;有機材料至少包括苯並環丁烯、有機矽氧烷、聚醯亞胺或矽酸鹽。半導體層之材質至少包括Si、Ge、GaAs、CdTe、ZnO、ZnSnO、InZnO、InGaZnO、InGaO或其它相似之金屬氧化物半導體材料。The film 12 includes a conductive layer, an insulating layer, a semiconductor layer, or a composite material layer or a stacked layer composed of at least the foregoing two materials. The material of the conductive layer contains at least Au, Ag, Cu, Ni, Cr, Ti, Al, Pt, Pd metal or an alloy thereof. The material of the insulating layer includes an inorganic material, an organic material, or a combination thereof. The inorganic material includes at least SiN x , SiO 2 , Al 2 O 3 , Al 2 O 3 , Ta 2 O 5 , TiO 2 , ZrO 2 , HfO 2 , wherein X in SiN x represents any possible value; These include benzocyclobutene, organodecane, polyimide or decanoate. The material of the semiconductor layer includes at least Si, Ge, GaAs, CdTe, ZnO, ZnSnO, InZnO, InGaZnO, InGaO or other similar metal oxide semiconductor materials.

薄膜12可以是未經圖案化的薄膜,如圖1A所示,或是已經過圖案化的薄膜,如圖2A所示。Film 12 can be an unpatterned film, as shown in Figure 1A, or a film that has been patterned, as shown in Figure 2A.

請參照圖1A,在一實施例中,上述薄膜12例如是以物理氣相沉積(Physical vapor deposition)、化學氣相沉積(Chemical vapor deposition)、溶液態製程沉積(Solution-processed deposition)、電鍍沉積(Electroplating deposition)、無電鍍沉積(Electroless plating deposition)、噴墨印刷沉積(Inkjet printing deposition),或其他類似的方法所形成之未圖案化的薄膜。Referring to FIG. 1A, in an embodiment, the film 12 is, for example, a physical vapor deposition, a chemical vapor deposition, a solution-processed deposition, or an electroplating deposition. (Electroplating deposition), electroless plating deposition, ink jet printing deposition, or other similar methods of unpatterned film.

請參照圖2A,在另一實施例中,上述薄膜12是以噴墨印刷沉積方式,在低溫下直接形成已圖案化的薄膜,以減少材料的成本以及機台設備的成本並應用。當然,上述薄膜12亦可採用其他可以直接圖案化的沉積製程所形成 之已圖案化的薄膜。或者,也可以採用物理氣相沉積、化學氣相沉積、溶液態製程沉積、電鍍沉積、無電鍍沉積或噴墨印刷沉積形成未圖案化層,再以任何已知的圖案化製程先進行圖案化。Referring to FIG. 2A, in another embodiment, the film 12 is formed by inkjet printing to form a patterned film directly at a low temperature to reduce the cost of the material and the cost of the machine equipment. Of course, the above film 12 can also be formed by other deposition processes that can be directly patterned. The patterned film. Alternatively, the unpatterned layer can also be formed by physical vapor deposition, chemical vapor deposition, solution process deposition, electroplating deposition, electroless deposition or ink jet printing, and then patterned first by any known patterning process. .

上述覆蓋層14可以是單層或是多層結構。多層結構之覆蓋層14的各層可以是由單一種或多種材料所構成。覆蓋層14之材質與薄膜之材質相異。覆蓋層14包括光阻層、導電層、絕緣層、半導體層或至少前述兩種材料層所構成之複合材料層或堆疊層。光阻層可以是正光阻層或是負光阻層。導電層之材質至少包含Au、Ag、Cu、Ni、Cr、Ti、Al、Pt、Pd金屬或其合金。絕緣層之材質至少包括無機材料、有機材料或其組合。無機材料至少包括SiNx 、SiO2 、Al2 O3 、Al2 O3 、Ta2 O5 、TiO2 、ZrO2 、HfO2 ;有機材料至少包括苯並環丁烯(Benzocyclobutene,BCB)、有機矽氧烷(siloxane)、聚醯亞胺(PI)或矽酸鹽(silsequioxane)。半導體層之材質至少包括Si、Ge、GaAs、CdTe、ZnO、ZnSnO、InZnO、InGaZnO、InGaO或其它相似之金屬氧化物半導體材料。上述覆蓋層的形成方法例如是物理氣相沉積、化學氣相沉積、溶液態製程沉積、電鍍沉積、無電鍍沉積、噴墨印刷沉積,或其他類似的方法。The cover layer 14 described above may be a single layer or a multilayer structure. The layers of the cover layer 14 of the multilayer structure may be composed of a single material or a plurality of materials. The material of the cover layer 14 is different from the material of the film. The cover layer 14 includes a photoresist layer, a conductive layer, an insulating layer, a semiconductor layer, or a composite material layer or a stacked layer composed of at least the foregoing two material layers. The photoresist layer can be a positive photoresist layer or a negative photoresist layer. The material of the conductive layer contains at least Au, Ag, Cu, Ni, Cr, Ti, Al, Pt, Pd metal or an alloy thereof. The material of the insulating layer includes at least an inorganic material, an organic material, or a combination thereof. The inorganic material includes at least SiN x , SiO 2 , Al 2 O 3 , Al 2 O 3 , Ta 2 O 5 , TiO 2 , ZrO 2 , HfO 2 ; the organic material includes at least Benzocyclobutene (BCB), organic A siloxane, a polyimine (PI) or a silsequioxane. The material of the semiconductor layer includes at least Si, Ge, GaAs, CdTe, ZnO, ZnSnO, InZnO, InGaZnO, InGaO or other similar metal oxide semiconductor materials. The formation method of the above coating layer is, for example, physical vapor deposition, chemical vapor deposition, solution process deposition, electroplating deposition, electroless deposition, ink jet printing deposition, or the like.

之後,以高能光束16透過光罩30熔損覆蓋層14與薄膜12,以形成圖案化的覆蓋層14a與圖案化的薄膜12a,如圖1B與2B所示。Thereafter, the cover layer 14 and the film 12 are melted by the high-energy beam 16 through the mask 30 to form a patterned cover layer 14a and a patterned film 12a, as shown in FIGS. 1B and 2B.

所述之高能光束16是指波長為1奈米以上的光束, 例如是波長為1奈米至20000奈米的光束,包括雷射,例如是氣體雷射、液態雷射、固態雷射或半導體雷射。氣體雷射例如是準分子雷射,其示範例如ArF(193奈米)、KrF(248奈米)、XeCl(308奈米)或XeCl(351奈米);氮氣雷射(337奈米);氬氣雷射(488奈米、514奈米);氦氖雷射(632.8奈米)或二氧化碳雷射(10600奈米)。液態雷射如染料雷射(400~700奈米)。固態雷射如Nd:YAG雷射(1064奈米)。半導體雷射的波長例如是390~1550奈米。所使用的雷射的波長,與欲熔損的薄膜和覆蓋層的材質與厚度有關,可以是一特定波長,或一波長範圍,例如是248奈米,或是150奈米至400奈米。所使用的雷射的能量與欲熔損的薄膜12和覆蓋層14的材質與厚度有關,例如是10至100000埃。在一實施例中,薄膜12為厚度100至300奈米的銀金屬薄膜,覆蓋層14為厚度1000至2000奈米的光阻材料,所使用的高能光束波長為248奈米且能量為300毫焦耳/平方公分,雷射槍數(shot number)為10次。在另一實施例中,薄膜12為厚度150至250奈米的銀金屬薄膜,覆蓋層14為厚度200至300奈米的有機絕緣材料,所使用的高能光束波長為248奈米且能量為400毫焦耳/平方公分,雷射槍數(shot number)為1次。當薄膜12為具有第一圖案的圖案化的薄膜時,其後所進行的高能光束熔損製程,則可以使得所形成之圖案化薄膜12a具有第二圖案。熔損製程可以僅是一個修邊處理製程,使得所形成之第二圖案與第一圖案的形狀相似但是尺寸不同。當然,熔損製 程也可以使得所形成之第二圖案與第一圖案在形狀上完全不同。The high-energy beam 16 refers to a light beam having a wavelength of 1 nm or more. For example, a light beam having a wavelength of from 1 nm to 20,000 nm, including a laser such as a gas laser, a liquid laser, a solid laser or a semiconductor laser. The gas laser is, for example, an excimer laser, such as ArF (193 nm), KrF (248 nm), XeCl (308 nm) or XeCl (351 nm); nitrogen laser (337 nm); Argon laser (488 nm, 514 nm); 氦氖 laser (632.8 nm) or carbon dioxide laser (10600 nm). Liquid lasers such as dye lasers (400~700 nm). Solid state lasers such as Nd:YAG lasers (1064 nm). The wavelength of the semiconductor laser is, for example, 390 to 1550 nm. The wavelength of the laser used is related to the material and thickness of the film and cover layer to be melted, and may be a specific wavelength, or a range of wavelengths, for example, 248 nm, or 150 nm to 400 nm. The energy of the laser used is related to the material and thickness of the film 12 and the cover layer 14 to be melted, for example, 10 to 100,000 angstroms. In one embodiment, the film 12 is a silver metal film having a thickness of 100 to 300 nm, and the cover layer 14 is a photoresist material having a thickness of 1000 to 2000 nm. The high energy beam has a wavelength of 248 nm and an energy of 300 m. Joules per square centimeter, the number of shots is 10 times. In another embodiment, the film 12 is a silver metal film having a thickness of 150 to 250 nm, and the cover layer 14 is an organic insulating material having a thickness of 200 to 300 nm. The high energy beam has a wavelength of 248 nm and an energy of 400. Millijoules per square centimeter, the number of shots is one. When the film 12 is a patterned film having a first pattern, the high energy beam melting process performed thereafter can cause the formed patterned film 12a to have a second pattern. The melt loss process may be only one trimming process such that the formed second pattern is similar in shape to the first pattern but different in size. Of course, the melt loss system The process may also cause the formed second pattern to be completely different in shape from the first pattern.

利用高能光束如雷射來熔損薄膜可以簡化圖案化製程,不須經由繁複的曝光顯影製程。而在熔損過程中高能光束對薄膜12所產生的熱效應則可透過覆蓋於薄膜12上覆蓋層14來減緩之,以減緩翹起現象,改善圖案化後的薄膜12a的平整性與圖案的精確性。The use of high-energy beams such as lasers to melt the film simplifies the patterning process without the need for complicated exposure and development processes. The thermal effect of the high-energy beam on the film 12 during the melt loss can be mitigated by covering the cover layer 14 on the film 12 to slow down the lift and improve the flatness and pattern of the patterned film 12a. Sex.

請參照圖1C與2C,在一實施例中,在進行高能光束熔損製程之後,可以將圖案化的覆蓋層14a移除。在另一實施例中,請參照圖1C-1與2C-1,在進行高能光束熔損製程之後,仍將圖案化的覆蓋層14a保留,直接繼續進行後續的製程。後續的製程例如是在基板10上形成另一層薄膜18,例如是導電層、絕緣層、半導體層或至少前述兩種薄膜所構成之複合材料層或堆疊層,以覆蓋在圖案化的覆蓋層14a上且在形成另一層薄膜18之後,圖案化的覆蓋層14a仍被保留,如圖1C-1與2C-1。Referring to FIGS. 1C and 2C, in an embodiment, the patterned cap layer 14a may be removed after the high energy beam melting process is performed. In another embodiment, referring to FIGS. 1C-1 and 2C-1, after the high energy beam melting process is performed, the patterned cap layer 14a is still retained, and the subsequent process is directly continued. Subsequent processes include, for example, forming another layer of film 18 on the substrate 10, such as a conductive layer, an insulating layer, a semiconductor layer, or a composite material layer or a stacked layer of at least two of the foregoing films to cover the patterned cover layer 14a. After and after forming another layer of film 18, the patterned cap layer 14a is still retained, as shown in Figures 1C-1 and 2C-1.

本發明之方法可以應用於各種領域,以下茲舉薄膜電晶體以及太陽能電池為應用例說明之,然而,本發明並不以此為限。The method of the present invention can be applied to various fields. The following description is given for the application of the thin film transistor and the solar cell. However, the present invention is not limited thereto.

圖3A至3C是依照本發明實施例所繪示之一種下閘極結構下接觸式之薄膜電晶體的製造方法的剖面示意圖。3A to 3C are cross-sectional views showing a method of fabricating a contact-type thin film transistor of a lower gate structure according to an embodiment of the invention.

請參照圖3A,本實施例薄膜電晶體的製造方法係先在基板110上形成閘極112。Referring to FIG. 3A, the method for fabricating the thin film transistor of the present embodiment first forms the gate 112 on the substrate 110.

之後,在基板110上方形成覆蓋層114,覆蓋住閘極 112。Thereafter, a cover layer 114 is formed over the substrate 110 to cover the gate 112.

接著,以高能光束116如準分子雷射透過光罩130熔損覆蓋層114與閘極112,進行修邊處理,以形成圖案化的覆蓋層114a與再次圖案化的閘極112a,如圖3B所示。在一實施例中,所使用的雷射例如是波長為248奈米的準分子雷射。Then, the high-energy beam 116, such as a quasi-molecular laser, is passed through the reticle 130 to melt the cover layer 114 and the gate 112, and trimming is performed to form the patterned cap layer 114a and the re-patterned gate 112a, as shown in FIG. 3B. Shown. In one embodiment, the laser used is, for example, an excimer laser having a wavelength of 248 nm.

之後,請參照圖3C,於基板110上形成介電層118。介電層118與圖案化的覆蓋層114a共同組成絕緣層118。Thereafter, referring to FIG. 3C, a dielectric layer 118 is formed on the substrate 110. The dielectric layer 118 and the patterned cap layer 114a together form an insulating layer 118.

然後,於介電層118上形成源極接觸層120與汲極接觸層122。Then, a source contact layer 120 and a drain contact layer 122 are formed on the dielectric layer 118.

之後,在源極接觸層120與汲極接觸層122之間的間隙124中形成主動層126,與源極接觸層120及汲極接觸層122電性耦接,以完成下閘極結構下接觸式(BGBC)之薄膜電晶體100A之製作。Thereafter, an active layer 126 is formed in the gap 124 between the source contact layer 120 and the gate contact layer 122, and is electrically coupled to the source contact layer 120 and the gate contact layer 122 to complete the lower gate structure contact. Fabrication of a thin film transistor 100A of the formula (BGBC).

以上是以下閘極結構下接觸式之薄膜電晶體100A之製作來說明之,然而,本發明並不限於此,下閘極結構上接觸式(BGTC)、上閘極結構上接觸式(TGTC)以及上閘極結構下接觸式(TGBC)之薄膜電晶體也可以採用類似於上述下閘極結構下接觸式的方法來製造。The above is explained in the following fabrication of the contact type thin film transistor 100A in the gate structure. However, the present invention is not limited thereto, and the lower gate structure contact type (BGTC) and the upper gate structure contact type (TGTC) are not limited thereto. The contact transistor (TGBC) thin film transistor of the upper gate structure can also be fabricated by a method similar to the contact method of the lower gate structure described above.

圖3A-1至3C-1是依照本發明實施例所繪示之一種下閘極結構上接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-1 to 3C-1 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor of a lower gate structure according to an embodiment of the invention.

請參照圖3A-1與3B-1,在基板110上形成閘極112。之後,在基板110上方形成覆蓋層114,覆蓋住閘極112。 接著,以高能光束116如準分子雷射透過光罩130熔損覆蓋層114與閘極112,進行修邊處理,以形成圖案化的覆蓋層114a與再次圖案化的閘極112a。Referring to FIGS. 3A-1 and 3B-1, a gate 112 is formed on the substrate 110. Thereafter, a cap layer 114 is formed over the substrate 110 to cover the gate 112. Next, the high-energy beam 116, such as a quasi-molecular laser, is passed through the mask 130 to melt the cover layer 114 and the gate 112, and trimming is performed to form the patterned cap layer 114a and the patterned gate 112a.

之後,請參照圖3C-1,於基板110上形成介電層118。介電層118與圖案化的覆蓋層114a共同組成絕緣層118。然後,於介電層118上形成主動層126。之後,於主動層126上形成源極接觸層120與汲極接觸層122,完成下閘極結構上接觸式之薄膜電晶體100B之製作。Thereafter, referring to FIG. 3C-1, a dielectric layer 118 is formed on the substrate 110. The dielectric layer 118 and the patterned cap layer 114a together form an insulating layer 118. An active layer 126 is then formed over the dielectric layer 118. Thereafter, the source contact layer 120 and the gate contact layer 122 are formed on the active layer 126 to complete the fabrication of the contact-type thin film transistor 100B on the lower gate structure.

圖3A-2至3C-2是依照本發明實施例所繪示之一種上閘極結構上接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-2 to 3C-2 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor on an upper gate structure according to an embodiment of the invention.

請參照圖3A-2,在基板110上形成主動層126。之後,於主動層126上形成源極接觸層120與汲極接觸層122。接著,於基板110上形成介電層118,覆蓋住源極接觸層120與汲極接觸層122。Referring to FIG. 3A-2, an active layer 126 is formed on the substrate 110. Thereafter, a source contact layer 120 and a drain contact layer 122 are formed on the active layer 126. Next, a dielectric layer 118 is formed on the substrate 110 to cover the source contact layer 120 and the gate contact layer 122.

之後,參照圖3B-2,在介電層118上形成閘極112。然後,在基板110上方形成覆蓋層114,覆蓋住閘極112。接著,以高能光束116如準分子雷射透過光罩130熔損覆蓋層114與閘極112,進行修邊處理,以形成圖案化的覆蓋層114a與再次圖案化的閘極112a,完成上閘極結構上接觸式之薄膜電晶體100C之製作,如圖3C-2。Thereafter, referring to FIG. 3B-2, a gate 112 is formed on the dielectric layer 118. Then, a cap layer 114 is formed over the substrate 110 to cover the gate 112. Then, the high-energy beam 116, such as the excimer laser, is passed through the reticle 130 to melt the cover layer 114 and the gate 112, and trimming is performed to form the patterned cap layer 114a and the re-patterned gate 112a to complete the gate. The fabrication of the contact-type thin film transistor 100C is as shown in Fig. 3C-2.

圖3A-3至3C-3是依照本發明實施例所繪示之一種上閘極結構下接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-3 to 3C-3 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor with an upper gate structure according to an embodiment of the invention.

請參照圖3A-3,在基板110上形成源極接觸層120與汲極接觸層122。之後,於基板110上形成主動層126,覆蓋源極接觸層120與汲極接觸層122上。接著,於主動層126上形成介電層118。Referring to FIG. 3A-3, a source contact layer 120 and a gate contact layer 122 are formed on the substrate 110. Thereafter, an active layer 126 is formed on the substrate 110 to cover the source contact layer 120 and the drain contact layer 122. Next, a dielectric layer 118 is formed over the active layer 126.

之後,參照圖3B-3,在介電層118上形成閘極112。然後,在基板110上方形成覆蓋層114,覆蓋住閘極112。接著,以高能光束116如準分子雷射透過光罩130熔損覆蓋層114與閘極112,進行修邊處理,以形成圖案化的覆蓋層114a與再次圖案化的閘極112a,完成上閘極結構下接觸式之薄膜電晶體100D之製作,如圖3C-3。Thereafter, referring to FIG. 3B-3, a gate 112 is formed on the dielectric layer 118. Then, a cap layer 114 is formed over the substrate 110 to cover the gate 112. Then, the high-energy beam 116, such as the excimer laser, is passed through the reticle 130 to melt the cover layer 114 and the gate 112, and trimming is performed to form the patterned cap layer 114a and the re-patterned gate 112a to complete the gate. The fabrication of the contact-type thin film transistor 100D under the pole structure is shown in Fig. 3C-3.

上述基板110可以是硬式基板或是可撓式基板。硬式基板的材質例如是玻璃、石英或矽晶圓。可撓式基板之材質可以是塑膠例如壓克力、PET、PEN、PCT、PI、PES、金屬箔(metal foil)或是紙或前述材料之組合。The substrate 110 may be a hard substrate or a flexible substrate. The material of the hard substrate is, for example, glass, quartz or germanium wafer. The material of the flexible substrate may be plastic such as acrylic, PET, PEN, PCT, PI, PES, metal foil or paper or a combination of the foregoing.

上述閘極112的材質包括金屬、摻雜多晶矽或透明導電氧化物等導電層。金屬例如是金、銀、鋁、銅、鉻、鎳、鈦、鉑、鈀或前述材料的合金等。透明導電氧化物如銦錫氧化物等。閘極112的形成方法例如是以噴墨製程,直接形成圖案化的導電層,以做為閘極112。The material of the gate 112 includes a conductive layer such as a metal, a doped polysilicon or a transparent conductive oxide. The metal is, for example, gold, silver, aluminum, copper, chromium, nickel, titanium, platinum, palladium or an alloy of the foregoing. A transparent conductive oxide such as indium tin oxide or the like. The method of forming the gate 112 is, for example, an inkjet process, and directly forms a patterned conductive layer as the gate 112.

上述覆蓋層114可以是單層或是多層結構。覆蓋層114中各層可以是由單一種或多種材料所構成。覆蓋層114之材質包括絕緣層,絕緣層之材質例如是以上實施例所述之無機材料、有機材料或其組合,於此不再贅述。覆蓋層114之厚度例如是10至100000埃。The cover layer 114 may be a single layer or a multilayer structure. The layers in the cover layer 114 may be composed of a single material or a plurality of materials. The material of the cover layer 114 includes an insulating layer. The material of the insulating layer is, for example, the inorganic material, the organic material or a combination thereof described in the above embodiments, and details are not described herein again. The thickness of the cover layer 114 is, for example, 10 to 100,000 angstroms.

上述介電層118可以是單層或是多層結構。介電層118可為有機材料者,例如是介電常數低於4的有機材料。此外,介電層118中各層之材質可以是由單一種有機材料所構成、多種有機材料所構成,或是包含有機材料與無機材料。介電層118之材質可以是感光性材料或不可感光性材料,例如是聚亞醯胺(PI)、聚乙烯酚(Polyvinyl phenol)、聚苯乙烯(PS)、壓克力或環氧樹脂。當然,在形成介電層118之前,如有需要也可以先將圖案化的覆蓋層114a移除之。The dielectric layer 118 may be a single layer or a multilayer structure. The dielectric layer 118 can be an organic material such as an organic material having a dielectric constant of less than 4. In addition, the material of each layer in the dielectric layer 118 may be composed of a single organic material, a plurality of organic materials, or an organic material and an inorganic material. The material of the dielectric layer 118 may be a photosensitive material or a non-photosensitive material, such as polyamidamine (PI), polyvinyl phenol, polystyrene (PS), acrylic or epoxy resin. Of course, the patterned cap layer 114a may be removed prior to forming the dielectric layer 118, if desired.

上述源極接觸層120與汲極接觸層122的形成方法例如是先形成一層導電材料層,然後,再將其圖案化。導電材料層之材質例如是金屬如金、銀、鋁、銅、鉻、鎳、鈦、鉑、鈀或前述材料的合金等。導電材料層之形成方法包括進行物理氣相沈積製程,物理氣相沈積製程例如是濺鍍製程或是蒸鍍製程。在另一實施例中,源極接觸層120與汲極接觸層122的形成方法也可以直接形成圖案化的導電層,例如是以噴墨製程來施行之。The method of forming the source contact layer 120 and the gate contact layer 122 is, for example, forming a layer of a conductive material and then patterning it. The material of the conductive material layer is, for example, a metal such as gold, silver, aluminum, copper, chromium, nickel, titanium, platinum, palladium or an alloy of the foregoing. The method for forming the conductive material layer includes performing a physical vapor deposition process, such as a sputtering process or an evaporation process. In another embodiment, the method of forming the source contact layer 120 and the gate contact layer 122 may also directly form a patterned conductive layer, for example, by an inkjet process.

上述主動層126可以是經過圖案化或是未經過圖案化者,其材質例如是半導體或是有機半導體。半導體例如是非晶矽、多晶矽、Ge、GaAs、CdTe和ZnO、InZnO、ZnSnO、InGaZnO、InGaO或其它相似之金屬氧化物半導體材料。有機半導體包括N型或P型之有機小分子、有機高分子、或有機小分子及有機高分子之混合物。有機小分子之材質例如是並五苯(Pentacene)或並四苯(Tetracene)。有機半導體高分子例如是聚(3-己烷基)噻吩 (Poly-(3-hexylthiophene),P3HT)。The active layer 126 may be patterned or unpatterned, and the material thereof is, for example, a semiconductor or an organic semiconductor. The semiconductor is, for example, amorphous germanium, polycrystalline germanium, Ge, GaAs, CdTe and ZnO, InZnO, ZnSnO, InGaZnO, InGaO or other similar metal oxide semiconductor materials. The organic semiconductor includes an N-type or P-type organic small molecule, an organic polymer, or a mixture of an organic small molecule and an organic polymer. The material of the organic small molecule is, for example, pentacene or Tetracene. The organic semiconductor polymer is, for example, poly(3-hexane)thiophene (Poly-(3-hexylthiophene), P3HT).

以上的實施例是以高能光束熔損閘極112為例來說明之,然而,本發明並不以此為限,如有需要也可以應用於以上述所述的各材料層中,例如是源極接觸層120、汲極接觸層122或主動層126。The above embodiment is described by taking the high-energy beam melting gate 112 as an example. However, the invention is not limited thereto, and may be applied to each material layer described above, for example, a source, if necessary. The contact layer 120, the drain contact layer 122 or the active layer 126.

圖4A至圖4C是依照本發明另一實施例所繪示之一種太陽能電池的製造方法的剖面流程示意圖。4A-4C are schematic cross-sectional views showing a method of fabricating a solar cell according to another embodiment of the invention.

請參照圖4A,在透明基板200上依序形成透明電極(前電極)202、光電轉換層與抗反射層210。透明基板200可以是硬式基板或可撓式基板。硬式基板例如是作為建築物之帷幕玻璃基板。可撓式基板例如是塑膠基板。透明電極202做為前電極,其材質例如是透明導電氧化物(transparent conductive oxide,TCO),比如是銦錫氧化物(indium tin oxide,ITO)、摻氟氧化錫(Fluorine-doped Tin Oxide,FTO)、摻鋁氧化鋅(Aluminium-doped zinc oxide,AZO)、摻鎵氧化鋅(Gallium-doped Zinc Oxide,GZO)或其組合。透明電極202的形成方法例如是採用化學氣相沈積法(CVD)、物理氣相沈積法(PVD)或是噴塗法形成於基板10上。Referring to FIG. 4A, a transparent electrode (front electrode) 202, a photoelectric conversion layer, and an anti-reflection layer 210 are sequentially formed on the transparent substrate 200. The transparent substrate 200 may be a hard substrate or a flexible substrate. The hard substrate is, for example, a curtain glass substrate as a building. The flexible substrate is, for example, a plastic substrate. The transparent electrode 202 is used as a front electrode, and the material thereof is, for example, a transparent conductive oxide (TCO), such as indium tin oxide (ITO), fluorine-doped tin oxide (Fluorine-doped Tin Oxide, FTO). ), Aluminium-doped zinc oxide (AZO), gallium-doped Zinc Oxide (GZO) or a combination thereof. The method of forming the transparent electrode 202 is formed on the substrate 10 by, for example, chemical vapor deposition (CVD), physical vapor deposition (PVD), or spray coating.

光電轉換層例如是由第一導電型層204、本質層(或稱為I層)206、第二導電型層208所構成。在一實施例中,第一導電型為P型且第二導電型為N型。在另一實施例中,第一導電型為N型且第二導電型為P型。以下以第一導電型層204為P型層,第二導電型層208為N型層為例 來說明本發明之透明型太陽能電池模組,然而,本發明並不以此為限。The photoelectric conversion layer is composed of, for example, a first conductive type layer 204, an essential layer (or referred to as an I layer) 206, and a second conductive type layer 208. In an embodiment, the first conductivity type is a P type and the second conductivity type is an N type. In another embodiment, the first conductivity type is N-type and the second conductivity type is P-type. Hereinafter, the first conductive type layer 204 is a P type layer, and the second conductive type layer 208 is an N type layer. The transparent solar cell module of the present invention will be described, however, the present invention is not limited thereto.

P型層204為具有P型摻質的半導體或P型絕緣層。P型摻質例如是硼。P型摻質的半導體例如是P型非晶矽、P型微晶矽、P型碳化矽或P型氧化矽。P型絕緣層例如是P型氧化矽。在一實施例中,P型層204為P型非晶矽,其厚度例如是5~10奈米(nm)。在另一實施例中,P型層204為P型氧化矽,其厚度例如是5~10奈米。P型層204的形成方法例如是在透明電極202形成於基板200上之後,利用化學氣相沈積法形成在透明電極202上。P型層204中的P型摻質可以在沈積時臨場進行之,或是在沈積製程結束之後,再利用離子植入製程以形成之。The p-type layer 204 is a semiconductor or P-type insulating layer having a P-type dopant. The P-type dopant is, for example, boron. The P-type dopant semiconductor is, for example, a P-type amorphous germanium, a P-type microcrystalline germanium, a P-type tantalum carbide or a P-type germanium oxide. The P-type insulating layer is, for example, a P-type yttrium oxide. In one embodiment, the P-type layer 204 is a P-type amorphous germanium having a thickness of, for example, 5 to 10 nanometers (nm). In another embodiment, the P-type layer 204 is a P-type yttrium oxide having a thickness of, for example, 5 to 10 nm. The formation method of the P-type layer 204 is, for example, formed on the transparent electrode 202 by a chemical vapor deposition method after the transparent electrode 202 is formed on the substrate 200. The P-type dopant in the P-type layer 204 can be deposited on-site at the time of deposition, or after the deposition process is completed, using an ion implantation process.

本質層206之材質包括本質半導體、本質摻質半導體,摻質例如是氟。本質層206例如是本質非晶矽、本質微晶矽(intrinsic microcrystalline silicon)、本質非晶矽摻雜氟、或本質微晶矽摻雜氟。在一實施例中,本質層206為本質非晶矽,其厚度例如是90~100奈米。在另一實施例中,本質層206為非晶矽摻雜氟,其厚度例如是小於100奈米。本質層206的形成方法例如是在P型層204形成於透明電極202上之後,利用化學氣相沈積法形成在P型層204上。The material of the intrinsic layer 206 includes an intrinsic semiconductor, an intrinsically doped semiconductor, and the dopant is, for example, fluorine. The intrinsic layer 206 is, for example, an intrinsic amorphous germanium, an intrinsic microcrystalline silicon, an intrinsic amorphous germanium doped fluorine, or an intrinsic microcrystalline germanium doped fluorine. In one embodiment, the intrinsic layer 206 is an intrinsic amorphous germanium having a thickness of, for example, 90 to 100 nanometers. In another embodiment, the intrinsic layer 206 is amorphous germanium doped fluorine having a thickness of, for example, less than 100 nanometers. The formation method of the intrinsic layer 206 is formed, for example, on the P-type layer 204 by chemical vapor deposition after the P-type layer 204 is formed on the transparent electrode 202.

N型層208是指材料層中具有例如是氮、磷或是砷等。N型材料層之材質包括N型非晶矽(N-a-Si)、N型微晶矽(N-c-Si)、N型氧化矽(N-SiOx )、氮化矽(SiNx )、N型碳化 矽(N-SiCx )。N-SiOx 、N-SiNx 以及N-SiCx 之中的X表示任何可能的數值。The N-type layer 208 means that the material layer has, for example, nitrogen, phosphorus or arsenic. The material of the N-type material layer includes N-type amorphous germanium (Na-Si), N-type microcrystalline germanium (Nc-Si), N-type germanium oxide (N-SiO x ), tantalum nitride (SiN x ), N-type Niobium carbide (N-SiC x ). N-SiO x, N-SiN x as well as from among the N-SiC x X represents any possible values.

抗反射層210形成在N型層208上。抗反射層210之材質可以反射長波長的光線,提升元件之效率。抗反射層210之材質例如是非晶質含氫的氮化矽(a-SiNx :H,其中的X表示任何可能的數值)。The anti-reflective layer 210 is formed on the N-type layer 208. The material of the anti-reflection layer 210 can reflect long-wavelength light and improve the efficiency of the component. The material of the anti-reflection layer 210 is, for example, amorphous hydrogen-containing tantalum nitride (a-SiN x :H, where X represents any possible value).

其後,在抗反射層210上形成金屬層212。金屬層212是以噴墨印刷沉積方式或是其他可以直接圖案化的沉積製程所形成之已圖案化的薄膜。金屬層212金屬例如是金、銀、鋁、銅、鉻、鎳、鈦、鉑、鈀或前述材料的合金等。之後,於金屬層212上形成一層覆蓋層214。可以是單層或是多層結構。覆蓋層204中各層可以是由單一種或多種材料所構成。覆蓋層204之材質例如是以上實施例所述者,於此不再贅述。覆蓋層204之厚度例如是10至100000埃。Thereafter, a metal layer 212 is formed on the anti-reflection layer 210. The metal layer 212 is a patterned film formed by an inkjet printing deposition method or other deposition process that can be directly patterned. The metal layer 212 metal is, for example, gold, silver, aluminum, copper, chromium, nickel, titanium, platinum, palladium or an alloy of the foregoing materials. Thereafter, a cover layer 214 is formed on the metal layer 212. It can be a single layer or a multilayer structure. The layers in the cover layer 204 may be composed of a single material or materials. The material of the cover layer 204 is, for example, the one described in the above embodiment, and details are not described herein again. The thickness of the cover layer 204 is, for example, 10 to 100,000 angstroms.

接著,請參照圖4B,以高能光束216如準分子雷射透過光罩230熔損覆蓋層214與金屬層212,進行修邊處理製程,以形成圖案化的覆蓋層204a與再次圖案化的金屬層212a。再次圖案化的金屬層212a,以做為背電極。在一實施例中,所使用的雷射例如是波長為248奈米的準分子雷射。Next, referring to FIG. 4B, the high-energy beam 216, such as a quasi-molecular laser, is passed through the mask 230 to melt the cover layer 214 and the metal layer 212 to perform a trimming process to form a patterned cap layer 204a and a re-patterned metal. Layer 212a. The metal layer 212a is patterned again as a back electrode. In one embodiment, the laser used is, for example, an excimer laser having a wavelength of 248 nm.

之後,請參照圖4C,移除覆蓋層204a。Thereafter, referring to FIG. 4C, the cover layer 204a is removed.

例一Example 1

在基板上噴墨印刷1 x 1cm2 大小的銀金屬薄膜後,接著,沉積一層光阻層做為覆蓋層,再以波長為248奈米且能量為300毫焦耳/平方公分的準分子雷射對覆蓋層與銀金屬薄膜進行雷射熔損製程,雷射槍數(shot number)為10次,以同時將覆蓋層與銀金屬薄膜圖案化,於雷射熔損製程後,直接將覆蓋層移除。由掃描式電子顯微鏡(SEM)的結果顯示銀薄膜邊緣鮮少或僅有少數有輕微翹起的現象。After ink-jet printing a 1 x 1 cm 2 silver metal film on a substrate, a photoresist layer is deposited as a cap layer, and an excimer laser having a wavelength of 248 nm and an energy of 300 mJ/cm 2 is applied. The laser melting process is performed on the cover layer and the silver metal film, and the number of shots is 10 times to simultaneously pattern the cover layer and the silver metal film. After the laser melting process, the cover layer is directly applied. Remove. The results of scanning electron microscopy (SEM) showed that the edges of the silver film were few or only slightly raised.

例二Case 2

此例與例一相同,但是,覆蓋層改以有機絕緣材料且所使用的雷射能量改為400mJ/cm2 ,雷射槍數改為1次,並且在雷射熔損製程後仍將覆蓋層保留下來。由SEM結果顯示銀薄膜經雷射熔損製程後,其邊緣並無翹起的現象。This example is the same as an embodiment, however, the laser energy is changed to the cover layer of organic insulating material and used to 400mJ / cm 2, the laser gun to a number of times, and will cover the laser erosion process The layer is retained. The SEM results show that the silver film has no warp after the laser melting process.

本發明在欲以高能光束熔損的薄膜上多沉積一層覆蓋層,透過簡易的製程,可減緩高能光束能量對薄膜材料的影響,改善薄膜的型態、平整性與圖案的精確性。The invention deposits a coating layer on the film to be melted by the high energy beam, and through a simple process, the influence of the high energy beam energy on the film material can be slowed down, and the shape, flatness and pattern accuracy of the film are improved.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10、110、200‧‧‧基板10,110,200‧‧‧substrate

12、12a、18‧‧‧薄膜12, 12a, 18‧ ‧ film

14、14a、114、114a、214、214a‧‧‧覆蓋層14, 14a, 114, 114a, 214, 214a‧ ‧ cover

16、116、216‧‧‧高能光束16, 116, 216‧‧‧ high energy beam

30、130、230‧‧‧光罩30, 130, 230‧‧‧ masks

112、112a‧‧‧閘極112, 112a‧‧‧ gate

118‧‧‧介電層118‧‧‧ dielectric layer

120‧‧‧源極接觸層120‧‧‧Source contact layer

122‧‧‧汲極接觸層122‧‧‧汲 contact layer

124‧‧‧間隙124‧‧‧ gap

126‧‧‧主動層126‧‧‧ active layer

202‧‧‧透明電極202‧‧‧Transparent electrode

204‧‧‧第一導電型層204‧‧‧First Conductive Layer

206‧‧‧本質層206‧‧‧The essence

208‧‧‧第二導電型層208‧‧‧Second conductive layer

210‧‧‧抗反射層210‧‧‧Anti-reflective layer

212‧‧‧金屬層212‧‧‧metal layer

圖1A至1C-1是依照本發明一實施例所繪示之一種圖案化的方法。1A through 1C-1 illustrate a method of patterning in accordance with an embodiment of the invention.

圖2A至2C-1是依照本發明另一實施例所繪示之一種圖案化的方法。2A through 2C-1 illustrate a method of patterning in accordance with another embodiment of the present invention.

圖3A至3C是依照本發明實施例所繪示之一種下閘極結構下接觸式之薄膜電晶體的製造方法的剖面示意圖。3A to 3C are cross-sectional views showing a method of fabricating a contact-type thin film transistor of a lower gate structure according to an embodiment of the invention.

圖3A-1至3C-1是依照本發明實施例所繪示之一種下閘極結構上接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-1 to 3C-1 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor of a lower gate structure according to an embodiment of the invention.

圖3A-2至3C-2是依照本發明實施例所繪示之一種上閘極結構上接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-2 to 3C-2 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor on an upper gate structure according to an embodiment of the invention.

圖3A-3至3C-3是依照本發明實施例所繪示之一種上閘極結構下接觸式之薄膜電晶體的製造方法的剖面示意圖。3A-3 to 3C-3 are schematic cross-sectional views showing a method of fabricating a contact-type thin film transistor with an upper gate structure according to an embodiment of the invention.

圖4A至圖4C是依照本發明另一實施例所繪示之一種太陽能電池的製造方法的剖面流程示意圖。4A-4C are schematic cross-sectional views showing a method of fabricating a solar cell according to another embodiment of the invention.

10‧‧‧基板10‧‧‧Substrate

12‧‧‧薄膜12‧‧‧ Film

14‧‧‧覆蓋層14‧‧‧ Coverage

16‧‧‧高能光束16‧‧‧High energy beam

30‧‧‧光罩30‧‧‧Photomask

Claims (26)

一種圖案化的方法,包括:在一基板上提供一第一薄膜,該第一薄膜待圖案化;在該第一薄膜上形成一未經圖案化的覆蓋層,其中該未經圖案化的覆蓋層之材質與該第一薄膜之材質相異;以一光束透過一光罩熔損該未經圖案化的覆蓋層與該第一薄膜,以形成一圖案化的覆蓋層與一圖案化的第一薄膜;以及選擇性移除該圖案化的覆蓋層。 A method of patterning, comprising: providing a first film on a substrate, the first film to be patterned; forming an unpatterned cover layer on the first film, wherein the unpatterned cover layer The material of the layer is different from the material of the first film; the unpatterned cover layer and the first film are melted by a light beam through a mask to form a patterned cover layer and a patterned a film; and selectively removing the patterned cover layer. 如申請專利範圍第1項所述之圖案化的方法,其中該光束包括氣體雷射、液態雷射、固態雷射或半導體雷射。 The method of patterning according to claim 1, wherein the beam comprises a gas laser, a liquid laser, a solid laser or a semiconductor laser. 如申請專利範圍第2項所述之圖案化的方法,其中該氣體雷射包括準分子雷射。 The method of patterning of claim 2, wherein the gas laser comprises an excimer laser. 如申請專利範圍第1項所述之圖案化的方法,其中該第一薄膜具有一第一圖案,該圖案化的第一薄膜具有一第二圖案,且該光束熔損該未經圖案化的覆蓋層與該第一薄膜之步驟,是對具有該第一圖案之該第一薄膜進行修邊處理製程,以形成該第二圖案。 The method of patterning according to claim 1, wherein the first film has a first pattern, the patterned first film has a second pattern, and the beam melts the unpatterned The step of covering the first film with the first film is to perform a trimming process on the first film having the first pattern to form the second pattern. 如申請專利範圍第1項所述之圖案化的方法,其中該第一薄膜為未圖案化層。 The method of patterning according to claim 1, wherein the first film is an unpatterned layer. 如申請專利範圍第1項所述之圖案化的方法,其中該第一薄膜與該未經圖案化的覆蓋層分別包括導電層、絕緣層、半導體層或至少前述兩種材料層所構成之複合材料層或堆疊層。 The method of patterning according to claim 1, wherein the first film and the unpatterned cover layer respectively comprise a conductive layer, an insulating layer, a semiconductor layer or a composite of at least two of the foregoing two material layers. Material layer or stacked layer. 如申請專利範圍第6項所述之圖案化的方法,其中該導電層之材質至少包含Au、Ag、Cu、Ni、Cr、Ti、Al、Pt、Pd金屬或其合金;該絕緣層之材質包括無機材料、有機材料或其組合,其中該無機材料至少包括SiNx 、SiO2 、Al2 O3 、Al2 O3 、Ta2 O5 、TiO2 、ZrO2 、HfO2 ,該有機材料至少包括苯並環丁烯(BCB)、有機矽氧烷(siloxane)、聚醯亞胺(PI)或矽酸鹽(silsequioxane);以及該半導體層之材質至少包括Si、Ge、GaAs、CdTe、ZnO、InZnO、ZnSnO、InGaZnO、InGaO或其它金屬氧化物半導體材料。The method of patterning according to claim 6, wherein the material of the conductive layer comprises at least Au, Ag, Cu, Ni, Cr, Ti, Al, Pt, Pd metal or alloy thereof; Including an inorganic material, an organic material, or a combination thereof, wherein the inorganic material includes at least SiN x , SiO 2 , Al 2 O 3 , Al 2 O 3 , Ta 2 O 5 , TiO 2 , ZrO 2 , HfO 2 , the organic material is at least Including benzocyclobutene (BCB), organosiloxane (siloxane), polyimine (PI) or silicate (silsequioxane); and the material of the semiconductor layer includes at least Si, Ge, GaAs, CdTe, ZnO , InZnO, ZnSnO, InGaZnO, InGaO or other metal oxide semiconductor materials. 如申請專利範圍第1項所述之圖案化的方法,其中該未經圖案化的覆蓋層包括光阻層。 The method of patterning of claim 1, wherein the unpatterned cover layer comprises a photoresist layer. 如申請專利範圍第1項所述之圖案化的方法,其中該第一薄膜是用以形成閘極、源極接觸層、汲極接觸層或主動層。 The method of patterning according to claim 1, wherein the first film is used to form a gate, a source contact layer, a gate contact layer or an active layer. 如申請專利範圍第1項所述之圖案化的方法,更包括於該圖案化的覆蓋層上形成至少一第二薄膜。 The method of patterning according to claim 1, further comprising forming at least one second film on the patterned cover layer. 如申請專利範圍第10項所述之圖案化的方法,更包括在形成該第二薄膜之前,移除該圖案化的覆蓋層。 The method of patterning of claim 10, further comprising removing the patterned cover layer prior to forming the second film. 如申請專利範圍第11項所述之圖案化的方法,其中在形成該第二薄膜之後,該圖案化的覆蓋層仍被保留。 The method of patterning of claim 11, wherein the patterned cover layer is retained after the second film is formed. 如申請專利範圍第10項所述之圖案化的方法,其中該第一薄膜為一閘極,形成該第二薄膜的方法包括:於該基板上形成一介電層;於該介電層上形成一源極接觸層與一汲極接觸層;以 及於該源極接觸層與該汲極接觸層之間的一間隙中形成一主動層。 The method of patterning according to claim 10, wherein the first film is a gate, and the method of forming the second film comprises: forming a dielectric layer on the substrate; on the dielectric layer Forming a source contact layer and a drain contact layer; And forming an active layer in a gap between the source contact layer and the drain contact layer. 如申請專利範圍第10項所述之圖案化的方法,其中該第一薄膜為一閘極,形成該第二薄膜的方法包括:於該基板上形成一介電層;於該介電層上形成一主動層;以及於該主動層上形成一源極接觸層與一汲極接觸層。 The method of patterning according to claim 10, wherein the first film is a gate, and the method of forming the second film comprises: forming a dielectric layer on the substrate; on the dielectric layer Forming an active layer; and forming a source contact layer and a drain contact layer on the active layer. 如申請專利範圍第1項所述之圖案化的方法,更包括於提供該第一薄膜之前,於該基板上形成至少一第三薄膜。 The method of patterning according to claim 1, further comprising forming at least a third film on the substrate before providing the first film. 如申請專利範圍第15項所述之圖案化的方法,其中該第一薄膜為一閘極,形成該第三薄膜的方法包括:於該基板上形成一主動層;於該主動層上形成一源極接觸層與一汲極接觸層;以及於該基板上形成一介電層,覆蓋該源極接觸層與該汲極接觸層。 The method of patterning according to claim 15, wherein the first film is a gate, and the method for forming the third film comprises: forming an active layer on the substrate; forming a layer on the active layer a source contact layer and a drain contact layer; and a dielectric layer is formed on the substrate to cover the source contact layer and the drain contact layer. 如申請專利範圍第15項所述之圖案化的方法,其中該第一薄膜為一閘極,形成該第三薄膜的方法包括:於該基板上形成一源極接觸層與一汲極接觸層;於該基板上形成一主動層,覆蓋該源極接觸層與該汲極接觸層並填入於該源極接觸層與該汲極接觸層之間的間隙; 於該基板上形成一介電層,覆蓋該主動層。 The method of patterning according to claim 15, wherein the first film is a gate, and the method of forming the third film comprises: forming a source contact layer and a drain contact layer on the substrate Forming an active layer on the substrate, covering the source contact layer and the drain contact layer and filling a gap between the source contact layer and the drain contact layer; A dielectric layer is formed on the substrate to cover the active layer. 如申請專利範圍第1項所述之圖案化的方法,其中該第一薄膜為太陽能電池之電極層且該基板的形成包括:提供一透明基板;形成一透明電極於該透明基板上;形成一光電轉換層於該透明電極上;形成一抗反射層於該光電轉換層上。 The method of patterning according to claim 1, wherein the first film is an electrode layer of a solar cell and the substrate is formed by: providing a transparent substrate; forming a transparent electrode on the transparent substrate; forming a A photoelectric conversion layer is on the transparent electrode; an anti-reflection layer is formed on the photoelectric conversion layer. 一種待圖案化之堆疊結構,包括:一第一薄膜,該第一薄膜為一待圖案化層;以及一未經圖案化的覆蓋層,覆蓋於該第一薄膜上,其中該未經圖案化的覆蓋層之材質與該第一薄膜之材質相異,當一光束透過一光罩熔損該第一薄膜時,該未經圖案化的覆蓋層覆蓋於該第一薄膜上,其中在以一光束透過一光罩熔損該第一薄膜時,該未經圖案化的覆蓋層覆蓋於該第一薄膜上。 A stacked structure to be patterned, comprising: a first film, the first film is a layer to be patterned; and an unpatterned cover layer covering the first film, wherein the unpatterned The material of the cover layer is different from the material of the first film. When a light beam is transmitted through the photomask to melt the first film, the unpatterned cover layer covers the first film, wherein The unpatterned cover layer covers the first film when the light beam is melted through the photomask to cover the first film. 如申請專利範圍第19項所述之待圖案化之堆疊結構,用於高能光束圖案化,其中高能光束為波長為1奈米以上的光束。 The stacked structure to be patterned as described in claim 19 is used for high energy beam patterning, wherein the high energy beam is a beam having a wavelength of 1 nm or more. 如申請專利範圍第19項所述之待圖案化之堆疊結構,其中該第一薄膜具有一第一圖案,該圖案化的第一薄膜具有一第二圖案,且該第二圖案與該第一圖案的形狀相似但是尺寸不同。 The stacked structure to be patterned according to claim 19, wherein the first film has a first pattern, the patterned first film has a second pattern, and the second pattern and the first The shapes of the patterns are similar but different in size. 如申請專利範圍第19項所述之待圖案化之堆疊結構,其中該第一薄膜具有一第一圖案,該圖案化的第一薄 膜具有一第二圖案,且該第二圖案與該第一圖案的形狀相完全不同。 The stacked structure to be patterned according to claim 19, wherein the first film has a first pattern, and the patterned first thin The film has a second pattern, and the second pattern is completely different in shape from the first pattern. 如申請專利範圍第19項所述之待圖案化之堆疊結構,其中該第一薄膜為未圖案化層。 The stacked structure to be patterned as described in claim 19, wherein the first film is an unpatterned layer. 如申請專利範圍第19項所述之待圖案化之堆疊結構,其中該第一薄膜以及該未經圖案化的覆蓋層分別包括導電層、絕緣層、半導體層或至少前述兩種薄膜所構成之複合材料層或堆疊層。 The stacked structure to be patterned according to claim 19, wherein the first film and the unpatterned cover layer respectively comprise a conductive layer, an insulating layer, a semiconductor layer or at least two of the foregoing films. Composite layer or stacked layer. 如申請專利範圍第24項所述之待圖案化之堆疊結構,其中該導電層之材質至少包含Au、Ag、Cu、Ni、Cr、Ti、Al、Pt、Pd金屬或其合金;該絕緣層之材質包括無機材料、有機材料或其組合,其中無機材料至少包括SiNx 、SiO2 、Al2 O3 、Al2 O3 、Ta2 O5 、TiO2 、ZrO2 、HfO2 ,該有機材料至少包括苯並環丁烯(Benzocyclobutene,BCB)、有機矽氧烷(siloxane)、聚醯亞胺(PI)或矽酸鹽(silsequioxane);以及該半導體層之材質至少包括Si、Ge、GaAs、CdTe和ZnO、InZnO、ZnSnO、InGaZnO、InGaO或其它金屬氧化物半導體材料。The stacked structure to be patterned according to claim 24, wherein the material of the conductive layer comprises at least Au, Ag, Cu, Ni, Cr, Ti, Al, Pt, Pd metal or alloy thereof; The material comprises an inorganic material, an organic material or a combination thereof, wherein the inorganic material comprises at least SiN x , SiO 2 , Al 2 O 3 , Al 2 O 3 , Ta 2 O 5 , TiO 2 , ZrO 2 , HfO 2 , the organic material At least Benzocyclobutene (BCB), organosiloxane (siloxane), polyimine (PI) or silicate (silsequioxane); and the material of the semiconductor layer includes at least Si, Ge, GaAs, CdTe and ZnO, InZnO, ZnSnO, InGaZnO, InGaO or other metal oxide semiconductor materials. 如申請專利範圍第24項所述之待圖案化之堆疊結構,其中該未經圖案化的覆蓋層包括光阻層。 The stacked structure to be patterned as described in claim 24, wherein the unpatterned cover layer comprises a photoresist layer.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0180101B1 (en) * 1984-11-01 1991-12-27 International Business Machines Corporation Deposition of patterns using laser ablation
TW379358B (en) * 1997-06-21 2000-01-11 Semiconductor Energy Lab Electronic device having liquid crystal display device
EP1257881B1 (en) * 2000-02-22 2006-04-19 Macdermid Graphic Arts, Inc. Laser imaged printing plates comprising a multi-layer slip film
WO2006129126A2 (en) * 2005-06-01 2006-12-07 Plastic Logic Limited Layer-selective laser ablation patterning
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