TWI416491B - Pixel circuit and display panel - Google Patents

Pixel circuit and display panel Download PDF

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TWI416491B
TWI416491B TW98134347A TW98134347A TWI416491B TW I416491 B TWI416491 B TW I416491B TW 98134347 A TW98134347 A TW 98134347A TW 98134347 A TW98134347 A TW 98134347A TW I416491 B TWI416491 B TW I416491B
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scan line
coupled
enabled
data
line
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TW201113854A (en
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Sumika Technology Co
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Abstract

A pixel circuit includes: a first display unit, a second display unit, a connecting capacitor, and a switching unit. The switching unit performs a switching operation according to whether a first scanning line or a second scanning line is enabled. When the first scanning line is enabled, a common voltage is supplied to the connecting capacitor. When the first scanning line is disabled and the second scanning line is enabled, the data voltage is supplied to the connecting capacitor, so as to push up the voltage difference of the crystals in the first display unit.

Description

畫素電路及顯示面板Pixel circuit and display panel

本發明是有關於一種畫素電路及具有該畫素電路之顯示面板,特別是指一種用以改善液晶色偏問題之畫素電路及具有該畫素電路之顯示面板。The present invention relates to a pixel circuit and a display panel having the pixel circuit, and more particularly to a pixel circuit for improving liquid crystal color shift problem and a display panel having the pixel circuit.

液晶顯示裝置已廣泛應用於日常生活中,但現今大多數的液晶顯示裝置普遍存在色偏(Washout)的問題,而依據現階段應用於處理色偏問題的技術大致可以分成以下兩種方式:第一種方式是利用耦合電容的方式,如:美國專利號6078367、5126865等專利,皆是採用此種方式來改善色偏的問題,但是這種方式最大的缺點是,由於電容耦合的關係造成輸入電壓大幅下降,例如:資料電壓為7伏特,但是顯示器中的主要區及次要區中液晶所接收到的電壓將分別下降為6.94伏特及4.6伏特,電壓下降將造成主要區及次要區因無法達到最大電壓,而使得液晶亮度(Luminance)大幅下降,所以此種方式雖然可以改善色偏的問題,但卻會限制液晶顯示的效率。Liquid crystal display devices have been widely used in daily life, but most of today's liquid crystal display devices generally have a problem of color shift (Washout), and the technology applied to process color shift problems according to the current stage can be roughly divided into the following two ways: One way is to use the coupling capacitor method, such as: US Patent Nos. 6078367, 5126865 and other patents, all of which use this method to improve the color shift problem, but the biggest disadvantage of this method is that the input is due to the capacitive coupling relationship. The voltage drops sharply. For example, the data voltage is 7 volts, but the voltage received by the liquid crystal in the main and secondary areas of the display will drop to 6.94 volts and 4.6 volts respectively. The voltage drop will cause the main area and the secondary area. The maximum voltage cannot be reached, and the liquid crystal brightness (Luminance) is greatly reduced. Therefore, although this method can improve the color shift problem, it limits the efficiency of the liquid crystal display.

第二種方式是利用輸入一高低準位不斷振盪的基準電位以控制該主要區及次要區的電壓,如:美國專利公開號2008/0024689、2006/0262237等相關技術,皆是採用此種方式。但此種方式最大的缺點為,由於需要一由外部輸入的基準電位,因此,在電路設計上往往需要相當多的放大器以推動之,所以會造成驅動電路的面積成本(Area overhead),同時,為了不會因為該輸入基準電位的導線延遲因素而影響液晶的驅動,因而必須將共同電壓(Vcom)的導線寬度加寬,以降低導線阻抗值,此舉同樣會造成增加驅動電路的面積成本之問題,因此,如何有效找出一種方式以處理液晶的色偏問題,又不致造成額外的生產成本及降低液晶的顯示效率,一直是相關領域人士急欲解決的問題。The second way is to control the voltage of the main area and the secondary area by inputting a reference potential that continuously oscillates at a high and low level, such as: US Patent Publication No. 2008/0024689, 2006/0262237, etc. the way. However, the biggest disadvantage of this method is that, since a reference potential input from the outside is required, a considerable number of amplifiers are often required to drive the circuit design, so that the area overhead of the driving circuit is caused, and at the same time, In order not to affect the driving of the liquid crystal due to the wire delay factor of the input reference potential, it is necessary to widen the wire width of the common voltage (Vcom) to reduce the wire resistance value, which also causes an increase in the area cost of the driving circuit. The problem, therefore, how to effectively find a way to deal with the color shift problem of liquid crystal without causing additional production cost and reducing the display efficiency of liquid crystal has been an urgent problem for people in related fields.

因此,本發明之目的,即在提供一種畫素電路,適用於接收一資料線輸出的一資料電壓和一公共電源輸出的一公共電壓並耦接至一第一掃描線及一第二掃描線,其包含:一第一顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一連接電容,具有一與該第一顯示單元之第二端耦接的第一端,以及一第二端;及一切換單元,其接收該公共電壓、資料電壓,並與該連接電容之第二端、第一掃描線和第二掃描線耦接,以基於該第一掃描線和第二掃描線的致能情形進行切換,以於該第一掃描線被致能時,提供該公共電壓給該連接電容的第二端,並於該第一掃描線被去能且第二掃描線被致能時,提供該資料電壓給該連接電容的第二端。Therefore, an object of the present invention is to provide a pixel circuit adapted to receive a data voltage outputted from a data line and a common voltage output from a common power supply and coupled to a first scan line and a second scan line. The first display unit has a first end coupled to the data line for receiving the data voltage, a second end, a third end coupled to the common power source, and a first a control line coupled to the scan line, and the control end turns on between the first end and the second end when the first scan line is enabled, and when the first scan line is disabled The first display unit is non-conductive; the second display unit has a first end coupled to the data line for receiving the data voltage, a second end, and a third coupled to the common power source And a control end coupled to the first scan line, and the control end turns on between the first end and the second end when the first scan line is enabled, and is in the first scan line When the energy is removed, the first end and the second end are not turned on; a connecting capacitor has one and the first a first end coupled to the second end of the display unit, and a second end; and a switching unit that receives the common voltage, the data voltage, and the second end of the connection capacitor, the first scan line, and the second The scan line is coupled to switch based on an enabling condition of the first scan line and the second scan line, to provide the common voltage to the second end of the connection capacitor when the first scan line is enabled, and The data voltage is supplied to the second end of the connection capacitor when the first scan line is disabled and the second scan line is enabled.

此外,本發明之另一目的,即在提供一種顯示面板,適用於接收一公共電源,其包含:n條掃描線,分別是第1~第n掃描線,且該等掃描線被依序致能;m條資料線,分別是第1~第m資料線,且每一資料線輸出一資料電壓;n×m個呈矩陣排列畫素電路,其中,第i列中的畫素電路耦接到第i掃描線、第i+1掃描線以及第j資料線,i=1~n-1,j=1~m,其中每一畫素電路包括:一第一顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一連接電容,具有一與該第一顯示單元之第二端耦接的第一端,以及一第二端;及一切換單元,接收該公共電壓和該資料電壓,並耦接至該連接電容之第二端和該第i、第i+1掃描線,以基於該第i、第i+1掃描線的致能情形進行切換,以於該第i掃描線被致能時,提供該公共電壓給該連接電容的第二端,並於該第i+1掃描線被致能時,改而提供該資料電壓給該連接電容的第二端,以進而改變該第一液晶電容之第一端的電位。In addition, another object of the present invention is to provide a display panel suitable for receiving a common power supply, comprising: n scan lines, which are first to nth scan lines, respectively, and the scan lines are sequentially m; data lines, respectively, are 1st to mth data lines, and each data line outputs a data voltage; n×m are matrix-arranged pixel circuits, wherein the pixel circuits in the i-th column are coupled To the ith scan line, the i+1th scan line, and the jth data line, i=1~n-1, j=1~m, wherein each pixel circuit includes: a first display unit having one and the The data line is coupled to receive the first end of the data voltage, a second end, a third end coupled to the common power source, and a control end coupled to the first scan line, and the control end is When the first scan line is enabled, the first end and the second end are turned on, and when the first scan line is deactivated, the first end and the second end are not turned on; The display unit has a first end coupled to the data line to receive the data voltage, a second end, a third end coupled to the common power source, and a a control line coupled to the scan line, and the control end turns on between the first end and the second end when the first scan line is enabled, and when the first scan line is disabled The first end and the second end are non-conducting; a connecting capacitor has a first end coupled to the second end of the first display unit, and a second end; and a switching unit receiving the common voltage and The data voltage is coupled to the second end of the connection capacitor and the ith, i+1th scan line to switch based on the enabling condition of the ith and i+1th scan lines. When the i scan line is enabled, the common voltage is supplied to the second end of the connection capacitor, and when the i+1th scan line is enabled, the data voltage is instead supplied to the second end of the connection capacitor. To thereby change the potential of the first end of the first liquid crystal capacitor.

有關本發明之前述及其他技術內容、特點與功效,在以下配合參考圖式之一個較佳實施例的詳細說明中,將可清楚的呈現。The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments.

參閱圖1,本發明畫素電路之一較佳實施例適用於耦接一第一掃描線Gn 和一第二掃描線Gn+1 ,並接收一公共電源輸出的一公共電壓(Common voltage,Vcom)、一資料線輸出的一資料電壓Vdata ,且該第一掃描線Gn 和第二掃描線Gn+1 是依序被致能(Enable)。而此實施例的畫素電路包含一第一顯示單元1、一第二顯示單元2、一連接電容3,及一切換單元4。Referring to Figure 1, one preferred embodiment of the pixel circuit applicable to the present invention is coupled to a first scan line G n, and a second scan line G n + 1, and receives a common power supply output a common voltage (Common voltage embodiment , Vcom), a data voltage V data output by a data line, and the first scan line G n and the second scan line G n+1 are sequentially enabled (Enable). The pixel circuit of this embodiment includes a first display unit 1, a second display unit 2, a connection capacitor 3, and a switching unit 4.

該第一顯示單元1具有一與該資料線耦接以接收該資料電壓Vdata 的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線Gn 耦接的控制端,且該控制端於該第一掃描線Gn 被致能時,使該第一端和第二端間導通,並於該第一掃描線Gn 被去能(Disable)時,使該第一端和第二端間不導通。The first display unit 1 has a first end coupled to the data line to receive the data voltage V data , a second end, a third end coupled to the common power source, and a first scan The control terminal of the line G n is coupled, and the control terminal turns on between the first end and the second end when the first scan line G n is enabled, and is disabled on the first scan line G n (Disable), the first end and the second end are not turned on.

第二顯示單元2與第一顯示單元1類似,也具有一與該資料線耦接以接收該資料電壓Vdata 的第一端、一第二端一與該公共電源耦接的第三端,及一與該第一掃描線Gn 耦接的控制端,且該控制端於該第一掃描線Gn 被致能時,使該第一端和第二端間導通,並於該第一掃描線Gn 被去能時,使該第一端和第二端間不導通。The second display unit 2 is similar to the first display unit 1 and has a first end coupled to the data line to receive the data voltage V data , and a second end coupled to the common power source. And a control end coupled to the first scan line G n , and the control end turns on between the first end and the second end when the first scan line G n is enabled, and the first when the scanning line G n is de-energized, so that between the first and second ends nonconductive.

該連接電容3具有一與該第一顯示單元1之第二端耦接的第一端,以及一第二端。The connection capacitor 3 has a first end coupled to the second end of the first display unit 1, and a second end.

該切換單元4接收該公共電壓Vcom、資料電壓Vdata ,並與該連接電容3之第二端、第一掃描線Gn 和第二掃描線Gn+1 耦接,以基於該第一掃描線Gn 和第二掃描線Gn+1 的致能情形進行切換。亦即於該第一掃描線Gn 被致能時,提供該公共電壓Vcom給該連接電容3的第二端,並於該第一掃描線Gn 被去能且第二掃描線Gn+1 被致能時,提供該資料電壓Vdata 給該連接電容3的第二端。The switching unit 4 receives the common voltage Vcom and the data voltage V data , and is coupled to the second end of the connection capacitor 3, the first scan line G n and the second scan line G n+1 to be based on the first scan. lines and second scan lines G n G n + 1 enable the switch case. I.e., to the first scanning line G n, when enabled, provides a second terminal of the common voltage Vcom is connected to the capacitor 3, and in the first scan line G n is de-energized and the second scanning line G n + When 1 is enabled, the data voltage V data is supplied to the second end of the connection capacitor 3.

詳細來說,切換單元4包括一第一電晶體41和一第二電晶體42。該第一電晶體41具有一耦接該公共電源的第一端、一耦接該連接電容3之第二端的第二端和一耦接第一掃描線Gn 的控制端,且該控制端於該第一掃描線Gn 被致能時,使該第一端和第二端問導通以提供該公共電壓Vcom給該連接電容3的第二端。而於該第一掃描線Gn 被去能時,使該第一端和第二端間不導通,而停止提供該公共電壓Vcom給該連接電容3的第二端。In detail, the switching unit 4 includes a first transistor 41 and a second transistor 42. The first transistor 41 has a first end coupled to the common power source, a second end coupled to the second end of the connection capacitor 3, and a control end coupled to the first scan line G n , and the control end to the first scan line G n, when enabled, such that the first and second ends Q is turned on to provide the common voltage Vcom to the second terminal of the capacitor 3 is connected. While in the first scan line G n is de-energized, so that between the first and second ends of the non-conductive stop providing the common voltage Vcom to the second terminal of the capacitor 3 is connected.

該第二電晶體42具有一接收該資料電壓Vdata 的第一端、一耦接該連接電容3之第二端的第二端和一耦接第二掃描線的控制端,且該控制端於該第二掃描線Gn+1 被致能時,使該第一端和第二端間導通,以提供該資料電壓Vdata 給該連接電容3的第二端。而於該第二掃描線Gn+1 被去能時,使該第一端和第二端間不導通,而停止提供該資料電壓Vdata 給該連接電容3的第二端。The second transistor 42 has a first end receiving the data voltage V data , a second end coupled to the second end of the connection capacitor 3, and a control end coupled to the second scan line, and the control end is When the second scan line Gn +1 is enabled, the first end and the second end are turned on to provide the data voltage Vdata to the second end of the connection capacitor 3. When the second scan line Gn +1 is deenergized, the first end and the second end are not turned on, and the supply of the data voltage Vdata to the second end of the connection capacitor 3 is stopped.

本實施例之畫素電路之操作方式分為以下兩階段:一充電階段及一電壓提升階段。The operation mode of the pixel circuit of this embodiment is divided into the following two phases: a charging phase and a voltage boosting phase.

充電階段Charging stage

當該第一掃描線Gn 被致能且該第二掃描線Gn+1 被去能時,第一、第二顯示單元1、2之第一端與第二端將分別被導通,因此,第一、第二顯示單元1、2之第二端的電位皆為該資料電壓Vdata ,同時,該第一電晶體41被導通且該第二電晶體42不被導通,因此,該連接電容3之第二端為該公共電壓Vcom,因此,該連接電容3之二端電壓差及該第一顯示單元1之第二端與第三端之電壓差皆為Vdata -Vcom。When the first scan line G n is enabled and the second scanning line G n + 1 is de-energized, the first and second display units of the first end and the second end 2 will be respectively turned on, The potentials of the second ends of the first and second display units 1 and 2 are all the data voltage V data , and the first transistor 41 is turned on and the second transistor 42 is not turned on. Therefore, the connection capacitor is The second terminal of the third terminal is the common voltage Vcom. Therefore, the voltage difference between the two terminals of the connection capacitor 3 and the voltage difference between the second terminal and the third terminal of the first display unit 1 are both V data -Vcom.

電壓提升階段Voltage boost phase

完成充電階段之後,該第一掃描線Gn 被去能且該第二掃描線Gn+1 被致能,此時,該第一電晶體41將不導通,而該第二電晶體42將被導通,因此連接電容3之第二端接收由該第二顯示單元2之第二端輸出之該資料電壓Vdata ,且因為該連接電容3沒有放電路徑可供放電,因此,該連接電容3之第一端的電壓將提升為2Vdata -Vcom。而因為連接電容3之第一端與第一顯示單元1之第二端耦接,因此該第一顯示單元1之第二端與該第三端之間的電壓差被提升為2Vdata -2Vcom。After completion of the charging phase, the first scan line G n is de-energized and the second scanning line G n + 1 is enabled, at this time, the first transistor 41 will not conduct, and the second transistor 42 Is turned on, so the second end of the connection capacitor 3 receives the data voltage V data outputted by the second end of the second display unit 2, and because the connection capacitor 3 has no discharge path for discharging, the connection capacitor 3 The voltage at the first end will be boosted to 2V data -Vcom. Because the first end of the connection capacitor 3 is coupled to the second end of the first display unit 1, the voltage difference between the second end of the first display unit 1 and the third end is raised to 2V data -2Vcom .

在此舉一例說明,假設公共電壓為0v,且資料電壓為7v,則第一顯示單元1之第二端的電壓在電壓提升階段可由7v提升為14v,而第二顯示單元2之第一端的電壓可為7v,因此兩液晶電容的液晶分子會受到不同的操作電壓而產生不同程度的扭轉,因此可達到多域(multi-domain)顯示的效果,以擴大顯示面板的視角。且相較於習知技術,本發明的兩操作電壓不只電壓值有提升,且差距也甚大,故可使多域顯示的效果更佳,而有效改善色偏的問題。且因為不需額外由外部輸入一基準電壓,因此在使用上更為方便有效。As an example, if the common voltage is 0v and the data voltage is 7v, the voltage of the second terminal of the first display unit 1 can be increased from 7v to 14v during the voltage boosting phase, and the first end of the second display unit 2 is The voltage can be 7v, so the liquid crystal molecules of the two liquid crystal capacitors are subjected to different operating voltages to produce different degrees of twisting, so that multi-domain display effects can be achieved to expand the viewing angle of the display panel. Compared with the prior art, the two operating voltages of the present invention not only increase the voltage value, but also have a large gap, so that the multi-domain display effect can be better, and the problem of color shift is effectively improved. Moreover, since it is not necessary to additionally input a reference voltage from the outside, it is more convenient and effective in use.

值得注意的是,在本實施例中,該第一、第二電晶體1、2皆為一薄膜電晶體(TFT),但不以此為限。It should be noted that, in this embodiment, the first and second transistors 1, 2 are all a thin film transistor (TFT), but not limited thereto.

參閱圖2,本發明顯示面板之一較佳實施例適用於接收公共電源提供的公共電壓Vcom,且包含n條間隔排列的掃描線G(1)~G(n)、m條間隔排列的資料線D(1)~D(m),以及n×m個如前述之畫素電路。且該n×m個畫素電路分別位於任兩條掃描線和任兩條資料線之間,且第i列中的畫素電路都是耦接到第i掃描線和第i+1掃描線,而第j行中的畫素電路都是耦接到第j資料線。m條資料線分別輸出m個資料電壓,且該等掃描線被依序致能,而當每一畫素電路所耦接到的掃描線被致能時會進行前述所說的充電階段或電壓提升階段。Referring to FIG. 2, a preferred embodiment of the display panel of the present invention is adapted to receive a common voltage Vcom provided by a common power source, and includes n spaced-apart scan lines G(1) G(n) and m spaced data. Lines D(1) to D(m), and n x m pixel circuits as described above. And the n×m pixel circuits are respectively located between any two scan lines and any two data lines, and the pixel circuits in the i-th column are all coupled to the ith scan line and the i+1th scan line. And the pixel circuits in the jth row are all coupled to the jth data line. m data lines respectively output m data voltages, and the scan lines are sequentially enabled, and when the scan lines coupled to each pixel circuit are enabled, the aforementioned charging phase or voltage is performed. Promotion phase.

參閱圖3,本發明與相關先前技術的伽碼曲線圖(Gamma Curve),觀察圖3可以發現本發明對於色偏處理的效果與相關先前技術相當,然而根據本發明之畫素電路針對每一畫素(pixel)處理之後,可以提升每一畫素之對應的液晶所接收到的電壓,所以,已知的改善色偏技術在電壓範圍較大的情形下往往可以有較好的效果。Referring to FIG. 3, the gamma curve of the present invention and related prior art, it can be seen from FIG. 3 that the effect of the present invention on color shift processing is comparable to that of the related prior art, however, the pixel circuit according to the present invention is directed to each After the pixel processing, the voltage received by the corresponding liquid crystal of each pixel can be increased. Therefore, the known improved color shifting technique can often have a better effect in the case of a large voltage range.

綜上所述,在第一顯示單元1中第二端與第三端的電壓差相較於先前技術中的方式,可以有效提高該第一顯示單元1中之液晶所接受到的電壓值,以提高液晶的顯示效率。此外,相較於先前技術中的方法,本發明所提供之方法並不需要額外輸入的基準電位,因此,並不會造成面積成本的增加,故確實能達成本發明之目的。In summary, the voltage difference between the second end and the third end of the first display unit 1 can effectively increase the voltage value received by the liquid crystal in the first display unit 1 compared with the prior art. Improve the display efficiency of the liquid crystal. In addition, the method provided by the present invention does not require an additional input reference potential compared to the method of the prior art, and therefore does not cause an increase in area cost, so that the object of the present invention can be achieved.

惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent.

1...第一顯示單元1. . . First display unit

2...第二顯示單元2. . . Second display unit

3...連接電容3. . . Connection capacitor

4...切換單元4. . . Switching unit

41...第一電晶體41. . . First transistor

42...第二電晶體42. . . Second transistor

圖1是本發明畫素電路之電路圖;Figure 1 is a circuit diagram of a pixel circuit of the present invention;

圖2是本發明顯示面板之示意圖;及2 is a schematic view of a display panel of the present invention; and

圖3是本發明與關先前技術之伽碼曲線圖。Figure 3 is a gamma plot of the prior art and the prior art.

1...第一顯示單元1. . . First display unit

2...第二顯示單元2. . . Second display unit

3...連接電容3. . . Connection capacitor

4...切換單元4. . . Switching unit

41...第一電晶體41. . . First transistor

42...第二電晶體42. . . Second transistor

Claims (6)

一種畫素電路,適用於接收一資料線輸出的一資料電壓和一公共電源輸出的一公共電壓並耦接至一第一掃描線及一第二掃描線,其包含:一第一顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一連接電容,具有一與該第一顯示單元之第二端耦接的第一端,以及一第二端;及一切換單元,其接收該公共電壓、資料電壓,並與該連接電容之第二端、第一掃描線和第二掃描線耦接,以基於該第一掃描線和第二掃描線的致能情形進行切換,以於該第一掃描線被致能時,提供該公共電壓給該連接電容的第二端,並於該第一掃描線被去能且第二掃描線被致能時,提供該資料電壓給該連接電容的第二端。A pixel circuit is configured to receive a data voltage of a data line output and a common voltage of a common power output, and is coupled to a first scan line and a second scan line, and includes: a first display unit, a first end coupled to the data line for receiving the data voltage, a second end, a third end coupled to the common power source, and a control end coupled to the first scan line, and The control terminal turns on between the first end and the second end when the first scan line is enabled, and prevents the first end and the second end from being turned on when the first scan line is disabled a second display unit having a first end coupled to the data line for receiving the data voltage, a second end, a third end coupled to the common power source, and a first scan line a control end, wherein the control terminal turns on between the first end and the second end when the first scan line is enabled, and makes the first end when the first scan line is disabled And a non-conducting between the second end; a connecting capacitor having a first end coupled to the second end of the first display unit And a second terminal; and a switching unit that receives the common voltage and the data voltage, and is coupled to the second end of the connection capacitor, the first scan line, and the second scan line to be based on the first scan line and The enabling condition of the second scan line is switched, so that when the first scan line is enabled, the common voltage is supplied to the second end of the connection capacitor, and the first scan line is disabled and the second scan is performed. When the line is enabled, the data voltage is supplied to the second end of the connection capacitor. 依據申請專利範圍第1項所述之畫素電路,其中,該切換單元包括:一第一電晶體,具有一耦接該公共電源的第一端、一耦接該連接電容之第二端的第二端和一耦接該第一掃描線的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通以使第二端接收該公共電壓,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二電晶體,具有一與該第二顯示單元之第二端耦接的第一端、一耦接該連接電容之第二端的第二端和一耦接該第二掃描線的控制端,且該控制端於該第二掃描線被致能時,使該第一端和第二端間導通以使第二端接收該資料電壓,並於該第二掃描線被去能時,使該第一端和第二端間不導通。The pixel circuit of claim 1, wherein the switching unit comprises: a first transistor having a first end coupled to the common power source and a second end coupled to the second end of the connection capacitor a second end and a control end coupled to the first scan line, and the control end is electrically connected between the first end and the second end to enable the second end to receive the common voltage when the first scan line is enabled And a non-conducting between the first end and the second end when the first scan line is deenergized; a second transistor having a first end coupled to the second end of the second display unit a second end coupled to the second end of the connection capacitor and a control end coupled to the second scan line, and the control end enables the first end and the second when the second scan line is enabled The terminals are turned on to enable the second terminal to receive the data voltage, and when the second scan line is deenergized, the first end and the second end are not turned on. 依據申請專利範圍第2項所述之畫素電路,其中,該第一、第二電晶體分別是一薄膜電晶體。The pixel circuit of claim 2, wherein the first and second transistors are respectively a thin film transistor. 一種顯示面板,適用於接收一公共電源,其包含:n條掃描線,分別是第1~第n掃描線,且該等掃描線被依序致能;m條資料線,分別是第1~第m資料線,且每一資料線輸出一資料電壓;n×m個呈矩陣排列畫素電路,其中,第i列中的畫素電路耦接到第i掃描線、第i+1掃描線以及第j資料線,i=1~n-1,j=1~m,其中每一畫素電路包括:一第一顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二顯示單元,具有一與該資料線耦接以接收該資料電壓的第一端、一第二端、一與該公共電源耦接的第三端,及一與該第一掃描線耦接的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一連接電容,具有一與該第一顯示單元之第二端耦接的第一端,以及一第二端;及一切換單元,接收該公共電壓和該資料電壓,並耦接至該連接電容之第二端和該第i、第i+1掃描線,以基於該第i、第i+1掃描線的致能情形進行切換,以於該第i掃描線被致能時,提供該公共電壓給該連接電容的第二端,並於該第i+1掃描線被致能時,改而提供該資料電壓給該連接電容的第二端,以進而改變該第一液晶電容之第一端的電位。A display panel is adapted to receive a common power supply, comprising: n scan lines, which are respectively 1st to nth scan lines, and the scan lines are sequentially enabled; m data lines are respectively 1~ The mth data line, and each data line outputs a data voltage; n×m pixels arranged in a matrix, wherein the pixel circuit in the i-th column is coupled to the ith scan line and the i+1th scan line And a jth data line, i=1~n-1, j=1~m, wherein each pixel circuit comprises: a first display unit having a first coupled to the data line to receive the data voltage a second end, a third end coupled to the common power source, and a control end coupled to the first scan line, and the control end enables the first scan line to be enabled The first end and the second end are electrically connected to each other, and when the first scan line is deenergized, the first end and the second end are not turned on; and a second display unit has a coupled to the data line Receiving a first end of the data voltage, a second end, a third end coupled to the common power source, and a control end coupled to the first scan line, and the control When the first scan line is enabled, the first end and the second end are turned on, and when the first scan line is deactivated, the first end and the second end are not turned on; The capacitor has a first end coupled to the second end of the first display unit, and a second end; and a switching unit that receives the common voltage and the data voltage and is coupled to the connection capacitor The two ends and the i-th and i-th scan lines are switched according to an enabling condition of the i-th and i-th scan lines, so that when the i-th scan line is enabled, the common voltage is supplied to Connecting the second end of the capacitor, and when the i+1th scan line is enabled, providing the data voltage to the second end of the connection capacitor to further change the first end of the first liquid crystal capacitor Potential. 依據申請專利範圍第4項所述之顯示面板,其中,該切換單元包括:一第一電晶體,具有一耦接該公共電源的第一端、一耦接該連接電容之第二端的第二端和一耦接該第一掃描線的控制端,且該控制端於該第一掃描線被致能時,使該第一端和第二端間導通以使第二端接收該公共電壓,並於該第一掃描線被去能時,使該第一端和第二端間不導通;一第二電晶體,具有一與該第二顯示單元之第二端耦接的第一端、一耦接該連接電容之第二端的第二端和一耦接該第二掃描線的控制端,且該控制端於該第二掃描線被致能時,使該第一端和第二端間導通以使第二端接收該資料電壓,並於該第二掃描線被去能時,使該第一端和第二端間不導通。The display panel of claim 4, wherein the switching unit comprises: a first transistor having a first end coupled to the common power source and a second end coupled to the second end of the connection capacitor And a control end coupled to the first scan line, and the control end is electrically connected between the first end and the second end to enable the second end to receive the common voltage when the first scan line is enabled, And when the first scan line is deenergized, the first end and the second end are not turned on; a second transistor has a first end coupled to the second end of the second display unit, a second end coupled to the second end of the connection capacitor and a control end coupled to the second scan line, and the control end enables the first end and the second end when the second scan line is enabled The second terminal receives the data voltage, and when the second scan line is deenergized, the first end and the second end are not turned on. 依據申請專利範圍第5項所述之顯示面板,其中,該第一、第二電晶體分別是一薄膜電晶體。The display panel of claim 5, wherein the first and second transistors are respectively a thin film transistor.
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