TWI252455B - Driving circuit for active matrix OLED - Google Patents

Driving circuit for active matrix OLED Download PDF

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TWI252455B
TWI252455B TW93101913A TW93101913A TWI252455B TW I252455 B TWI252455 B TW I252455B TW 93101913 A TW93101913 A TW 93101913A TW 93101913 A TW93101913 A TW 93101913A TW I252455 B TWI252455 B TW I252455B
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Taiwan
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tft
line
drive
reset
capacitor
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TW93101913A
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Chinese (zh)
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TW200525479A (en
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Wen-Chun Wang
Chien-Chung Kuo
Shin-Tai Luo
Hsi-Rong Han
Wen-Duei Liau
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Wintek Corp
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Abstract

A driving circuit for active matrix OLED has three thin film transistors and two capacitors in each pixel, wherein one of the scanning reset TFT gates is controlled by the scanning line of the row with the pixel, and the drain is connected to the data line of the column with the pixel. The detection of TFT is controlled by a threshold voltage. A storage capacitor is used to store the data voltage value (Vdata) representative of image signal. A compensation capacitor is used to store threshold voltage value (Vth) for driving TFT. Therefore, the summation of storage voltages in storage capacitor and compensation capacitor can drive TFT to output a current of corresponding magnitude to OLED component.

Description

1252455 五、發明說明(1) ' *- 【發明所屬之技術領域】 本發明係有關一種主動式有機電激發光二極體顯示器 之驅動電路,尤指一種可改善主動式有機發光二極體顯示 面板影像不均勻之驅動電路。 【先前技術】 、 有機電激發光顯示器技術(OLED )依驅動方式可分為被動式(Passive Matrix ; PMOLED)與主動式(Active Matnx ; AM0LED)。而所謂的主動式〇LED(AM〇LED),即是利 用薄膜電晶體(Thin Fi lm Transistor ; TFT),搭配電容來 儲存訊號,藉此控制〇LED的亮度灰階表現。 製作成 法提局 被限制 則須以 存訊號 ;至於 亮。因 的亮度 度的需 符合對 析度越 雖然被 於驅動方式 約5英时以 要得到高精 主動式驅動 仍然能保持 選擇到的畫 並不需要驅 現,也可以 現主動式驅 播放的流暢 上述之優越 動式0LED的 ,解析度無 内,產品將 細及大畫面 是以電容儲 原有的亮度 素才會被點 動到非常高 達成高解析 動0LED ,可 度,以及解 的特性。 本及技術門 ,因此應用 在低解析度 主動驅動方 ,所以當掃 被動驅動下 此在主動驅 ,因此可達 求。 0LED結 目前顯示器 來越高要求1252455 V. INSTRUCTION DESCRIPTION (1) '*- [Technical Field of the Invention] The present invention relates to a driving circuit for an active organic electroluminescence diode display, and more particularly to an active organic light emitting diode display panel A drive circuit with uneven image. [Prior Art], organic electroluminescent display technology (OLED) can be divided into passive (Passive Matrix; PMOLED) and active (Active Matnx; AM0LED) depending on the driving method. The so-called active 〇LED (AM〇LED) uses a thin film transistor (TFT) with a capacitor to store the signal, thereby controlling the grayscale performance of the 〇LED. If the production is not restricted, it must be stored in the signal; as for the bright. Because the brightness needs to be consistent with the resolution, the more the drive mode is about 5 inches, the high-precision active drive can still maintain the selected picture without the need to reproduce, but also the active drive can be played smoothly. The above-mentioned superior dynamic OLED has no resolution, and the product will be thin and large. The brightness of the original brightness will be jogged to a very high level to achieve high resolution, 0LED, scalability, and solution characteristics. This and the technical gate are therefore applied to the low-resolution active drive side, so when the sweep is driven by the passive drive, it is active. 0LED junction The current display is higher

檻較低,卻受制 產品尺寸侷限於 小尺寸市場。若 式為主,所謂的 描線掃過後畫素 ’只有被掃描線 動方式下,0LED 到較佳的壽命表 合TFT的技術可, 市場上對於畫面 ’充分展現0LEDThe lower the size, but the size of the product is limited to the small size market. If the pattern is dominant, the so-called trace line sweeps the picture ’ only in the scanning mode, the 0LED to the better life-matching TFT technology is available, and the market fully displays the 0LED for the picture

在玻璃基板上成長TFT的技術,可為非晶矽(am〇rph〇us S1 1 1C〇n ; a — Si )製程與低溫多晶矽(Low TemperatureThe technique of growing TFT on a glass substrate can be an amorphous germanium (am〇rph〇us S1 1 1C〇n; a — Si ) process and a low temperature polycrystalline germanium (Low Temperature).

第6頁 1252455 五、發明說明(2) poly-silicon ;LTPS)製程,LTPS TFT 與 a-Si TFT 的最大分 別在於其電性與製程繁簡的差異。LTPS TFT擁有較高的載 子移動率,較高載子移動率意味著TFT能提供更充份的電流 ’然而其製程上卻較繁複;而a_Si TFT則反之,雖然a_Si 的載子移動率不如LTPS,但由於其製程較簡單且成熟,因 此在成本上具有不錯的競爭優勢。 在目前LTPS-TFT產業中,由於低溫多晶矽薄膜電晶體 的遷移率(Mobi 1 i ty)已高達100〜2〇〇cmVV -sec,因此TFT- (^LED的驅動ic及資料ic已可逐步用LTPS的製程來實現,但 是由於製程技術的限制,整個面板的TFT其特性並非一致, 所以現階段主動式有機發光二極體顯示器最迫切需要解決 的問題,是如何減輕因低溫多晶矽薄膜電晶體特性不均勻 所帶來的不良影響。由於這些不良影響會從面板顯示出來 的影像馬上就能察覺’使有機發光二極體面板顯示出灰階 不良之影像,嚴重破壞面板影像之均勻性(Image Uni form ity),因此,不解決這個問題就很難進行更進一步 的開發應用。 於是,為解決上述之缺點,美國專利US 6, 229, 5 0 6 『Active Matrix Light Emitting Diode Pixel Structure And Concomitant Method』,此專利中有提出 一種4T2C(4個TFT電晶體與2個電容)之晝素電路,如「第1 圖」所示,該專利使用自動歸零(Auto-Zero )的機制,補 償TFT元件臨界電壓(Threshold Voltage ;Vth)的變異, 以改善影像之均勻性。該專利的驅動時序分為歸零階段(Page 6 1252455 V. Description of the invention (2) Poly-silicon; LTPS) process, the biggest difference between LTPS TFT and a-Si TFT is the difference between its electrical and process complexity. LTPS TFTs have higher carrier mobility, and higher carrier mobility means that TFTs can provide more sufficient currents. However, the process is more complicated; while a_Si TFTs are the opposite, although the carrier mobility of a_Si is not as good. LTPS, but because of its simple and mature process, it has a good competitive advantage in terms of cost. In the current LTPS-TFT industry, since the mobility of low-temperature polycrystalline germanium film transistors (Mobi 1 ty) has reached 100~2〇〇cmVV -sec, TFT-(^LED driving ic and data ic can be gradually used The process of LTPS is realized, but due to the limitation of process technology, the characteristics of the TFT of the whole panel are not the same. Therefore, the most urgent problem to be solved by the active organic light-emitting diode display at this stage is how to reduce the transistor characteristics of the low-temperature polycrystalline germanium film. The adverse effects caused by unevenness. Because these adverse effects will immediately be noticeable from the image displayed on the panel, 'the organic light-emitting diode panel displays an image with poor gray scale, which seriously damages the uniformity of the panel image (Image Uni Form ity), therefore, it is difficult to carry out further development and application without solving this problem. Therefore, in order to solve the above disadvantages, US Patent No. 6,229, 5 0 "Active Matrix Light Emitting Diode Pixel Structure And Concomitant Method" In this patent, a 4T2C (4 TFT transistors and 2 capacitors) pixel circuits are proposed, as shown in Figure 1. The patent uses the auto-zero (Auto-Zero) mechanism, the threshold voltage compensation TFT element (Threshold Voltage; Vth) variations, to improve the uniformity of the image which is incorporated into the drive timing zero phase (.

第7頁 1252455 五、發明說明(3)Page 7 1252455 V. Description of invention (3)

Auto-Zero Phase)210、載入資料階段(L〇ad Data phase) 220與發光階段(niuminate phase)23〇,請參閱『第2圖』 所示,係其控制信號時序圖。Auto-Zero Phase 210, the data phase (L〇ad Data phase) 220 and the niuminate phase 23〇, please refer to the “Figure 2” for the control signal timing diagram.

在歸零階段210之前,電晶體13及電晶體以為截止(〇FF ),電晶體T2為導通(ON),此時流過有機發光二極體(〇LED) 1 60的電流為前一個畫面框(Frame)之電流,由電晶體η之Before the zeroing phase 210, the transistor 13 and the transistor are turned off (〇FF), and the transistor T2 is turned on (ON), and the current flowing through the organic light emitting diode (〇LED) 1 60 is the previous frame. (Frame) current, by the transistor η

Vsg(源、閘極電壓差,即儲存於電容^兩端之電壓差)來控 制。Vsg (source and gate voltage difference, that is, the voltage difference stored across the capacitor ^) is controlled.

進入歸零階段2 1 〇之後,先導通(q n )電晶體τ 4,接著導 通(ON)電晶體T3,使電晶體!^之汲極端(1))與閘極端((〇相 連接,形成一個二極體之接法,然後截止(〇FF)電晶體T2, 此柃電晶體τι之閘極電壓會上升至一電壓值,此電壓值等 於高電位(Vdd)減去電晶體T1之臨界電壓(vth),亦即儲存 於電容Cs兩端之電壓差為電晶體以之臨界電壓,之後再將 電晶體T3截止(OFF),即可使電晶體T1之臨界電壓(vth)儲 存在電容Cs上,完成歸零階段21〇之動作。After entering the zeroing phase 2 1 〇, first turn on (qn) the transistor τ 4, then turn on (ON) the transistor T3, so that the transistor (^) is connected to the gate terminal ((〇) A diode connection, and then cut off (〇FF) transistor T2, the gate voltage of the transistor τι will rise to a voltage value equal to the high potential (Vdd) minus the threshold of the transistor T1 The voltage (vth), that is, the voltage difference stored across the capacitor Cs is the threshold voltage of the transistor, and then the transistor T3 is turned off (OFF), so that the threshold voltage (vth) of the transistor T1 is stored in the capacitor. On the Cs, the action of the zeroing phase 21 is completed.

接下來進入載入資料階段220,若資料線(Date Une) 110上變動之電壓為Δν,透過電晶體了4及 CoupU)到電晶㈣之問極端⑹。因此,儲存於電=(兩 端之電麼差為MX 〔Cc/(Cc+Cs)〕加上原本存於電容“之 Vth ’亦即電晶體T1之Vsg會包含電晶體T1 2Vth,這使得電 晶=T1輸出之電流僅與資料線11〇上變動之電壓(Ay)與 ,容Cc及Cs之大小有關,而不受每個晝素内電晶體TkVthNext, the loading data phase 220 is entered. If the voltage on the data line (Date Une) 110 is Δν, the transistor 4 and CoupU are transmitted through the transistor (4) to the extreme (6). Therefore, it is stored in electricity = (the difference between the two ends is MX [Cc / (Cc + Cs)] plus the Vsg originally stored in the capacitor "Vth", that is, the transistor T1 will contain the transistor T1 2Vth, which makes The current of the crystal=T1 output is only related to the voltage (Ay) of the data line 11〇 and the magnitude of the capacitance Cc and Cs, and is not affected by the transistor TkVth in each pixel.

1252455 五、發明說明(4) ---- 最後再進入發光階段230,此時讓電晶體T4截止(〇FF) ,且使電晶體T2導通(0N),電晶體T1會輸出目前晝面框(1252455 V. INSTRUCTIONS (4) ---- Finally, enter the illuminating phase 230. At this time, the transistor T4 is turned off (〇FF), and the transistor T2 is turned on (0N), and the transistor T1 outputs the current frame. (

Frame)之電流流過有機發光二極體16〇,使有機發光二極體 1 6 0元件發亮。 雖然此4T2C之晝素電路可以補償各晝素内之電晶體元 件臨界電壓(Vth)的變異,改善顯示器整體影像之均勻性, 但該專利除了貧料線11 〇、掃描線1 2〇、電源供應線(Vdd) 150之外,還需有歸零控制線(Auto-Zero Line) 130與發 光控制線(I 1 luminate Line ) 140等控制之線路,藉此電 容Cs負責記錄全部臨界電壓(Vth)以及所載入之部份9資料電 壓,而資料電壓載入是利用電容耦合的方式,較為複雜, 因此驅動方式的複雜度會因此增加,造成須使用非標準形 式之資料驅動I C,增加製造之成本。 同樣的為解決習知之問題,PH I L I PS公司亦發表一標題 為『A Comparison of Pixel Circuits for ActiveThe current of the frame flows through the organic light-emitting diode 16 turns, causing the organic light-emitting diode 160 element to illuminate. Although the 4T2C pixel circuit can compensate for the variation of the threshold voltage (Vth) of the transistor components in each pixel, and improve the uniformity of the overall image of the display, the patent has the exception of the lean line 11 扫描, the scanning line 12 〇, the power supply. In addition to the supply line (Vdd) 150, a control line such as an Auto-Zero Line 130 and an I 1 luminate Line 140 is required, whereby the capacitor Cs is responsible for recording the entire threshold voltage (Vth). ) and the part 9 data voltage loaded, and the data voltage loading is capacitive coupling, which is complicated, so the complexity of the driving method will increase, resulting in the use of non-standard data driving ICs, increasing manufacturing. The cost. Similarly, in order to solve the conventional problem, PH I L I PS also published a title "A Comparison of Pixel Circuits for Active

Matrix Polymer/Organic LED Displays』之論文,該論文 中提出一種4T 2 C之畫素電路,如「第3圖」所示。此電路巧 妙改變上述美國專利US 6, 229, 50 6中畫素電路(第1圖)中 兩個電容的連接位置,以解決上一篇專利資料電壓載入方 式過於複雜而不易實施之缺失。所以該論文所提之畫素電 路除了資料線310、掃描線320、電源供應線(Vdd) 350之外 ,如同美國專利US 6, 229, 506還需有歸零控制線(Auto-Zero Line)330 與發光控制線(Illuminate Line)340 等控制 之線路。A paper on Matrix Polymer/Organic LED Displays, in which a 4T 2 C pixel circuit is proposed, as shown in Figure 3. This circuit succinctly changes the connection position of the two capacitors in the above-mentioned U.S. Patent No. 6,229,506 in the pixel circuit (Fig. 1) to solve the problem that the voltage loading method of the prior patent is too complicated to implement. Therefore, in addition to the data line 310, the scan line 320, and the power supply line (Vdd) 350, the pixel circuit proposed in this paper requires a zero-control line (Auto-Zero Line) as in US Patent No. 6,229,506. 330 and control lines such as the Illuminate Line 340.

第9頁 1252455 五、發明說明(5) 又,該論文中驅動電路之控制信號也是一樣分為歸零 階段(Auto-Zero Phase)、載入資料階段(L〇ad Data Phase )與發光階段(I 1 1 u m i n a t e P h a s e )三個階段。 該執行歸零階段時,電晶體734為截止(〇FF),先導通 (ON)電晶體T33,使電晶體T31之汲極與閘極相連接,形成 一個一極體之接法’然後截止電晶體T 3 2,此時電晶體τ 3 1 =問極電壓會上升至高電位(Vdd)減去電晶體T3 1之臨界電 f(vth),亦即儲存於電容以及電容C2兩者電壓之總和為電 晶體T31之臨界電壓(vth),之後再將電晶體T33截止(OFF)Page 9 1252455 V. Description of the invention (5) In addition, the control signals of the driving circuit in this paper are also divided into Auto-Zero Phase, L〇ad Data Phase and Luminous Phase ( I 1 1 uminate P hase ) three stages. When the zeroing phase is performed, the transistor 734 is turned off (〇FF), and the transistor T33 is turned on (ON), and the drain of the transistor T31 is connected to the gate to form a one-pole connection. The transistor T 3 2, at this time, the transistor τ 3 1 = the gate voltage rises to a high potential (Vdd) minus the critical electric f (vth) of the transistor T3 1 , that is, the voltage stored in both the capacitor and the capacitor C2 The sum is the threshold voltage (vth) of the transistor T31, and then the transistor T33 is turned off (OFF).

,完成歸零階段之動作。 欠、,此電路載入資料電壓的方式是透過電晶體了34的導通, 資料電f會儲存於電容C1中,此時電容C2兩端之電壓仍會 保持之前所儲存之一定比例之v t h電壓值,即等於〔c丨/ (c + C2)〕X Vth。因此,電容C1及電容C2兩者電壓之總和為(, complete the action of the zeroing phase. Under, the circuit loads the data voltage by the conduction of the transistor 34. The data f is stored in the capacitor C1. At this time, the voltage across the capacitor C2 will still maintain a certain proportion of the vth voltage stored before. The value is equal to [c丨/ (c + C2)]X Vth. Therefore, the sum of the voltages of both the capacitor C1 and the capacitor C2 is (

Vdd Vdata+〔C1/(C1+C2)〕X Vth ),亦即電晶體T31 之。 會包含一部份的電晶體T31之Vth電壓值,這可以減低電晶 體tji輸出電流與電晶體T31臨界電壓值的相關性,補償一 邛伤電b曰體T31因製程因素所造成臨界電壓之變異。Vdd Vdata+[C1/(C1+C2)]X Vth ), that is, the transistor T31. It will contain a part of the Vth voltage value of the transistor T31, which can reduce the correlation between the output current of the transistor tji and the threshold voltage of the transistor T31, and compensate for the critical voltage caused by the process factor of the resistor T31. variation.

該2文中驅動用電晶體T31的臨界電壓值是由兩個電^ +广、、〃共同記憶,而其中一個電容所存之一部份臨界 Ϊ 在資料電壓載入時失去,因此該方法僅能補 ^ 4伤因製程因素所造成臨界電壓(Vth)之變里。 【發明内容】 t 爰疋本發明提出一種可以補償薄膜電晶體臨界電壓In this paper, the threshold voltage value of the driving transistor T31 is shared by two electrodes, and one of the capacitors is stored in a critical state, and the threshold is lost when the data voltage is loaded. Therefore, the method can only The damage of the threshold voltage (Vth) caused by the process factor is compensated. SUMMARY OF THE INVENTION The present invention proposes a compensation for the critical voltage of a thin film transistor.

1252455 五、發明說明(6) 變異的電壓寫入型主動式有機 〜 藉以改善因薄膜電晶體臨界 ’ X、> 一極體驅動電路, 影像缺陷。 i )特性不均勻所造成之 為達上述之目的’本發明提出之 括3個TFT及2個電容,係包括_ _ > &勒凌置母一晝素包 -驅動TFT,二電請存”FT,一偵測TFT, 電激發光元件;其中該掃描/置CTdF;補谓電容C"與—有機 畫素所在列之該條掃描線所押之閘極端(^ )是由該 電壓鎖住線來控制;而儲存= f FT則是由—臨界 號的資料電壓值(Vdata),而補償電容〃儲^存代表影像信 TFT的臨界電壓值(Vth),藉此,儲 、/疋用來♦儲存驅動 兩者儲存電壓的總和會使驅動m輸出、二及補大'電各Ct 予有機電激發光元件。 相對應大小之電流 【實施方式】 茲有關本發明之詳細内容 明如下: π谷及技術呪明,現配合圖式說 =閱「第4、5圖所示」’係本發明之每一 太Ξ 上畫素電路的連結與控制示意圖。:圖所Ϊ _ =發明之顯示面板40 0上每一條掃描線42〇與每一條料 線41〇交叉構成之畫素50 0驅動電 π 7 :電路包括3刪、2個電容及爾光= ^,:i*〇T^5i:,:r:A7i5i〇iM^(G) ^^ ( D )則連接至一資料線4 1 01252455 V. INSTRUCTIONS (6) Variant voltage-writing active organic ~ To improve the criticality of the thin film transistor 'X,> one-pole driving circuit, image defects. i) The non-uniformity is caused by the above-mentioned purpose. The present invention proposes three TFTs and two capacitors, including _ _ >& Le Ling, the mother-single package-driving TFT, "FT", a detecting TFT, an electroluminescent element; wherein the scanning/setting CTdF; the complementary capacitance C" and the - organic pixel are arranged by the scan line of the gate terminal (^) is the voltage Locking the line to control; and storing = f FT is the data voltage value (Vdata) of the critical number, and the compensation capacitor 〃 stores the threshold voltage value (Vth) representing the TFT of the image signal, thereby storing, /总 used to store the sum of the storage voltages of both drives, which will drive the output of the m, the second and the additional Ct to the organic electroluminescent element. The current of the corresponding size [Embodiment] As follows: π谷和技术呪明, now with the schema said = read "Figures 4 and 5" is a schematic diagram of the connection and control of each of the solar panels on the present invention. Fig. _ = Inverted display panel 40 0 Each scan line 42〇 intersects with each of the feed lines 41〇 to form a pixel 50 0 drive power π 7 : The circuit includes 3 cuts, 2 capacitors and erguang = ^,:i*〇T^5i:,:r:A7i5i〇iM^(G) ^^ ( D ) is connected to a data line 4 1 0

第11頁 1252455 五、發明說明(7) ;一儲存電容Cd,該儲存電容Cd有兩端,係設置於上述掃 描重置TFT 510之源極端(S )與一電源供應線(Vdci ) 451 之間。 一驅動TFT 530 ’該驅動TFT 5 30之源極端以)與上述 電源供應線(Vdd ) 450相連接。 一谓測TFT 520 ’該偵測TFT 5 20之閘極端(〇)與上述 臨界電壓鎖住線(Threshold-Lock ) 430連接,其汲極端( D )與上述驅動TFT 530之閘極端(G )相連接,其源極端( S )與驅動TFT 530之汲極端(D )相連接;一補償電容Ct, 該補你電谷Ct有兩端,係設置於上述掃描重置5 1 〇之源 極端(S )與偵測TFT 520之汲極端(D )之間。 “、 一有機電激發光元件540,該一端為陽極,與上述驅 TFT 530之汲極端(D)相連接,另一端為陰極,該陰極接 一共陰極線(Common Line) 440。 明再配合「第5圖」,其中掃描線420 (si、S2、S3 …Sn =資料線410 (D1、D2、D3 . . Dm)之交會處 即為母一畫素500之所在。現同時參閱「第4、5圖」,其中 u旦素500之主要控制關係如下,其掃描重置τρτ 之 閘:ί it)山疋由該畫素5〇0所在列之該條掃描線420所控制 。又:、則)則連接至該畫素50 0所在行之資料線410 電六cd係用則是由臨界電壓鎖住線430來控制。儲存 補ί # 丨存代表影像信號的資料電壓值(Vdata),而 補^電谷Ct則是用來儲存驅動TFT 53〇的臨界電壓 ,精此,儲存電容Cd及補償電容CW者儲存電壓的總和會Page 11 1252455 V. Inventive Description (7); a storage capacitor Cd having two ends disposed at a source terminal (S) of the scan reset TFT 510 and a power supply line (Vdci) 451 between. A driving TFT 530' is connected to the power supply line (Vdd) 450 as described above. A gate TFT 520' is connected to the threshold voltage lock line (Threshold-Lock) 430, and the gate terminal (D) and the gate terminal (G) of the above-mentioned driver TFT 530 are connected. Connected, the source terminal (S) is connected to the 汲 terminal (D) of the driving TFT 530; a compensation capacitor Ct, which has two ends, is set at the source terminal of the above scanning reset 5 1 〇 (S) is between the detection terminal 520 and the extreme (D) of the TFT 520. ", an organic electroluminescent device 540, the one end is an anode, connected to the 汲 terminal (D) of the driving TFT 530, and the other end is a cathode, the cathode is connected to a common cathode line (Common Line) 440. 5, wherein the intersection of scan line 420 (si, S2, S3 ... Sn = data line 410 (D1, D2, D3 . . Dm) is where the parent pixel 500 is located. See also "4th, 5, wherein the main control relationship of the u-nuclear 500 is as follows, and the scan resets the gate of τρτ: ί it) The hawthorn is controlled by the scanning line 420 of the column of the pixel 5〇0. Also:, then) is connected to the data line 410 where the pixel 50 is located. The electric six cd system is controlled by the threshold voltage lock line 430. The storage voltage value (Vdata) of the image signal is stored, and the voltage Ct is used to store the threshold voltage of the driving TFT 53〇. In this case, the storage capacitor Cd and the compensation capacitor CW store the voltage. General meeting

1252455 五、發明說明(8) 使驅動T F T 5 3 0輸出一相對應大小之電流予有機電激發光元 件54 0。 即,顯示面板40 0上每個晝素5 〇〇中的偵測TFT 5 20都 是由同一條臨界電壓鎖住線43 0來控制,而驅動TFT 5 30之 源極端(S )共接至同一電源供應線(v d d4 5 〇。且每個晝素 5 0 0中有機電激發光元件5 4 0的陰極則是共接至一共陰極線 4 4 0 ’共陰極線4 4 0會再透過一個外部之開關元件4 7 〇連接至 系統之接地端,該開關元件47 0是由一顯示信號線(Display L i n e ) 4 6 0所控制。 本發明之電路驅動方法說明如下: 請參閱「第6圖」所示,係本發明之控制信號時序圖。 如圖所示·本發明之驅動信號週期可分為三個階段,首先 ’臨界電壓鎖住階段(Threshold-Lock Phase ) 610 : 掃描線4 2 0與臨界電壓鎖住線4 3 〇之信號,會使每個畫 素驅動電路中的掃描重置TFT 510及偵測TFT 52 0導通(ON) ,此時資料線410的重置(Reset)為與電源供應線(vdd)45〇 之電壓位準相同,當掃描重置^了 51〇導通(〇N)時,會使原 本儲存影像資料電壓值的儲存電容Cd經由掃描重置TFT 5 1 〇 及資料線410放電(Discharge)。之後顯示信號線460信號線1252455 V. DESCRIPTION OF THE INVENTION (8) A drive current T F T 5 3 0 is outputted to a current of a corresponding magnitude to the organic electroluminescence element 54 0 . That is, the detecting TFTs 5 20 in each of the pixels 5 显示 on the display panel 40 0 are controlled by the same threshold voltage locking line 43 0 , and the source terminals (S ) of the driving TFTs 5 30 are connected to The same power supply line (vd d4 5 〇. and the cathode of the organic electroluminescent element 540 in each quinone 500 is connected to a common cathode line 4 4 0 'the common cathode line 4 4 0 will pass through an external The switching element 4 7 〇 is connected to the ground terminal of the system, and the switching element 47 0 is controlled by a display signal line (Display L ine ) 460. The circuit driving method of the present invention is described as follows: Please refer to "Fig. 6" The control signal timing diagram of the present invention is shown in the figure. As shown in the figure, the driving signal period of the present invention can be divided into three stages, first of all, 'Threshold-Lock Phase 610: Scanning Line 4 2 0 and the threshold voltage lock the signal of the line 4 3 ,, the scan reset TFT 510 and the detecting TFT 52 0 in each pixel driving circuit are turned ON, and the data line 410 is reset. It is the same as the voltage level of the power supply line (vdd) 45〇, when the scan is reset ^ 51〇 When the pass (〇N), the original image data storage capacitor would present voltage value stored Cd reset TFT 5 1 via the scan and data lines 410 square discharge (Discharge). After the display signal line 460 signal line

會控制顯示面板40 0外之開關元件47〇將之截止(〇FF),如 是,使共陰極線440與系統之接地端呈現斷路(〇pen circuit)的狀態’這時原本流經有機電激發光元件54〇之驅 動TFT 530的電流不再通過該有機電激發光元件54〇,而改 流至此時為導通(ON )狀態之偵測TFT 52〇,使驅動TFTThe switching element 47 of the display panel 40 0 is controlled to be turned off (〇FF), and if so, the common cathode line 440 and the ground end of the system are in a state of "open circuit". At this time, the organic electroluminescent element is originally flowed. The current of the driving TFT 530 of 54〇 is no longer passed through the organic electroluminescent element 54〇, but is changed to the detecting TFT 52〇 which is in an ON state at this time, so that the driving TFT is driven.

第13頁 1252455 五、發明說明(9) 53 0進行偵測其臨界電壓之動作。因為驅動^丁 5 3 0的電流 會經過偵測TFT 520、補償電容ct、掃描重置TFT 51 0的途 徑迫使補償電容Ct上的儲存電壓越來越小,如此將導致驅 動TFT 5 30電流也會因此越來越小,此現象會直到驅動TFT 5 3 0電流變成0為止。 最後’儲存電容Cd不會儲存任何電荷(即兩端電壓為〇) ,補償電容Ct兩端電壓差則會等於驅動TFT 530的臨界電壓 值(Vth) ’即儲存電容Cd放電重置,而補償電容ct將記憶驅 動TFT 530之臨界電壓值(vth)。(晝素500電路請參閱「第 4圖」)。綜合上述,在經過臨界電壓鎖住階段6丨〇後每個 畫素500電路中的驅動TFT 530的臨界電壓值(vth)會儲存在 自己晝素50 0電路中的補償電容ct上。 接下來,掃描線(Scan Line)420與臨界電壓鎖住線430 之仏號,會使每個畫素500驅動電路中的掃描重置TFT 510 及偵測TFT 52 0截止(OFF ),再進入第二階段,寫入階段 (Write Phase ) 620 : 在寫入階段620内,各掃描線4 20 (SI、S2 · · .Sn) 會依序送出掃描信號(Scan),當掃描信號(scan)位移 至該條掃描線420時,該條掃描線4 20上所有之畫素5〇〇中驅 動電路的掃描重置TFT 510會導通(ON),由於掃描重置TFT 510的導通(ON )與偵測TFT 520之截止(OFF ),因此資料 線410上的資料電壓(Vdata)可以透過掃描重置TFT 510的 導通(0 N )而存入儲存電容C d中’補償電容C t則因 <貞測τ F T 5 2 0之截止(〇 F F )而始終保持之前所s己憶之臨界電壓值(Page 13 1252455 V. Description of the invention (9) 53 0 The action of detecting the threshold voltage is performed. Because the current of the driving transistor 520, the compensation capacitor ct, and the scanning reset TFT 51 0 force the storage voltage on the compensation capacitor Ct to become smaller and smaller, which will cause the driving TFT 5 30 current to also be Therefore, it will become smaller and smaller, and this phenomenon will be until the driving TFT 530 current becomes zero. Finally, the storage capacitor Cd does not store any charge (ie, the voltage at both ends is 〇), and the voltage difference across the compensation capacitor Ct is equal to the threshold voltage value (Vth) of the driving TFT 530. That is, the storage capacitor Cd is discharged and reset, and the compensation is performed. The capacitance ct will memorize the threshold voltage value (vth) of the driving TFT 530. (Please refer to Figure 4 for the 昼素500 circuit). In summary, the threshold voltage value (vth) of the driving TFT 530 in each pixel 500 circuit after the threshold voltage locking phase 6 is stored in the compensation capacitor ct in the circuit of the pixel 50. Next, the scan line 420 and the threshold voltage lock line 430 are nicknames, so that the scan reset TFT 510 and the detection TFT 52 0 in each pixel 500 drive circuit are turned off (OFF), and then enter. The second stage, Write Phase 620: In the write phase 620, each scan line 4 20 (SI, S2 · · .Sn) will sequentially send a scan signal (Scan), when the scan signal (scan) When shifting to the scan line 420, the scan reset TFT 510 of all the pixel circuits of the pixel 4 of the scan line 420 is turned on (ON), and the ON (ON) of the TFT 510 is reset due to the scan. The cutoff (OFF) of the TFT 520 is detected. Therefore, the data voltage (Vdata) on the data line 410 can be stored in the storage capacitor Cd through the turn-on (0 N ) of the scan reset TFT 510. The compensation capacitor C t is due to <贞 τ FT FT 5 2 0 cutoff (〇 FF ) and always maintain the threshold value of the previous recall (

第14頁 1252455 五、發明說明(10)Page 14 1252455 V. Description of invention (10)

Vth)。如此最後,儲存電容Cd兩端電壓差會等於電源電壓 (Vdd)減去資料電壓(Vdata),即儲存電容Cd兩端電壓為 (Vdd—Vdata),如是儲存電容cd及補償電容ct兩者儲存電 壓的總和會等於(Vdd—Vdata+Vth);而,此電壓總和(Vdd —Vdata+Vth)會使驅動TFT 530在下一階段(顯示階段63〇 )時可以輸出一相對應大小之電流予有機電激發光元件54〇 ,所以此電流(I )大小可以下列數學式表示: I = (1/2)χ βχ (Vsg—Vth)2 I = (l/2)x βχ (Vdd —Vdata +Vth —Vth)2 I = (l/2)x )5 x (Vdd -Vdata)2 由上述之數學式(其中冷為驅動TFT 53〇之電導係數(Vth). So, the voltage difference between the storage capacitor Cd will be equal to the power supply voltage (Vdd) minus the data voltage (Vdata), that is, the voltage across the storage capacitor Cd is (Vdd - Vdata), if both the storage capacitor cd and the compensation capacitor ct are stored. The sum of the voltages will be equal to (Vdd - Vdata + Vth); however, the sum of the voltages (Vdd - Vdata + Vth) will cause the driving TFT 530 to output a current of a corresponding magnitude in the next stage (display phase 63 〇). The electromechanical excitation element 54〇, so the current (I) size can be expressed in the following mathematical formula: I = (1/2) χ βχ (Vsg - Vth) 2 I = (l / 2) x β χ (Vdd - Vdata + Vth —Vth)2 I = (l/2)x )5 x (Vdd -Vdata)2 From the above mathematical formula (where cold is the conductivity coefficient of the driving TFT 53〇 (

Transconductance Parameter))得知,驅動TFT 530 輸出 電流(I )之大小與其本身之臨界電壓值(Vth)無關,只與 寫入之資料電壓(V d a t a)大小有關,所以可以補償薄膜電晶 體(TFT)因製程因素所造成的臨界電壓(Vth )之變異。 當最後一條掃描線42 0 (Sn)也完成資料電壓(vdata )信號的寫入之後,接下來,顯示信號線4 6 0會控制開關元 件470將之導通(ON ),使共陰極線440連接至系統之接地 端’進入第三階段,顯示階段(Display Phase) 630 : 在這顯示階段630,每個畫素5 0 0驅動電路中的驅動TFT 53 0就可以輸出與寫入之資料電壓(Vdata )有關之電流(I )予有機電激發光元件5 4 0,使有機電激發光元件5 4 0發出 適當之亮度,而,此輸出電流(I )大小與驅動TFT 530之 臨界電壓值(Vth )無關。Transconductance Parameter)), the output current (I) of the driving TFT 530 is independent of its own threshold voltage value (Vth), and is only related to the size of the written data voltage (V data), so it can compensate for the thin film transistor (TFT). The variation of the threshold voltage (Vth) due to process factors. After the last scan line 42 0 (Sn) also completes the writing of the data voltage (vdata) signal, next, the display signal line 460 controls the switching element 470 to turn it on (ON), connecting the common cathode line 440 to The ground terminal of the system enters the third stage, Display Phase 630: In this display phase 630, the drive TFT 53 0 in each pixel 500 drive circuit can output and write the data voltage (Vdata The current (I) is applied to the organic electroluminescent device 504 to cause the organic electroluminescent device to emit appropriate brightness, and the output current (I) and the threshold voltage of the driving TFT 530 (Vth) ) Nothing.

第15頁 1252455 五、發明說明(11) 綜合上述說明,本發明相較於習知美國專利US 6,2 2 9,5 0 6 ’本案技術於資料電壓載入之前只需多一重置 (Reset)動作’以完成所謂的臨界電壓鎖住階段61〇之作動 ’避免複雜的資料電壓(Vdata)載入。 又’相較於習知之PHILIPS論文『A Comparison of Pixel Circuits for Active Matrix P〇 1 ymer/Organic LED Displays』,本案技術將臨界電壓值全部記錄在一個 補你電谷Ct (臨界電壓儲存電容)内,以補償臨界電壓變異 的效應。 本發明使用兩個電容(儲存電容Cd、補償電容Ct)來分 別處理兩件不同的事情,該補償電容ct專門負責全部臨界 電壓值(Vth )的記錄,另一儲存電容Cd則專門負責全部資 料電壓值(Vdata )的記錄。不同於美國專利us 6, 22 9 5 〇6 中’電各Cs須負貝5己錄全部臨界電壓(Vth)以及所載入之 部份資料電壓(Vdata );也不同於pHILips之論文,由電 容C1及電容C2兩者共同記錄臨界電壓,因此電容C2 口、有二 錄到部份臨界電壓’記錄在電容C1内之部份臨界電壓最= 即,本發明抚出之主動式有機電激發光顯示哭 電路,可以有以下之優點: °。心驅動 1·可以將臨界電麗值(Vth )全部記錄在一個 c t内,因此,能完全補償臨界電壓變異的效鹿。 員電容 2·該資料電壓(Vdat a )載入方式只需多一 (Reset),町避免如習知複雜之電路動作。 動作Page 15 1252455 V. INSTRUCTIONS (11) In combination with the above description, the present invention is only one more reset before the data voltage is loaded compared to the conventional US patent US 6,2 2 9,5 0 6 ' The Reset action "to complete the so-called threshold voltage lock phase 61" action to avoid complex data voltage (Vdata) loading. In addition, compared with the well-known PHILIPS paper "A Comparison of Pixel Circuits for Active Matrix P〇1 ymer/Organic LED Displays", the technology of this case records all the critical voltage values in a supplemental valley Ct (critical voltage storage capacitor). To compensate for the effects of critical voltage variations. The present invention uses two capacitors (storage capacitor Cd, compensation capacitor Ct) to separately handle two different things. The compensation capacitor ct is responsible for recording all threshold voltage values (Vth), and the other storage capacitor Cd is responsible for all data. Record of the voltage value (Vdata). Different from the US patent us 6, 22 9 5 〇6, the electricity voltage Cs must be recorded in the whole threshold voltage (Vth) and the part of the data voltage (Vdata) loaded; also different from the paper of pHILips, Capacitor C1 and capacitor C2 jointly record the threshold voltage, so the capacitor C2 port has two partial threshold voltages. The partial threshold voltage recorded in the capacitor C1 is the most = that is, the active organic electric excitation of the present invention The light display crying circuit can have the following advantages: °. Heart drive 1·The critical electric value (Vth) can be recorded in one c t , so the effect deer can be completely compensated for the critical voltage variation. Capacitor 2· The data voltage (Vdat a ) loading method only needs one more (Reset), and the town avoids complex circuit actions as is conventional. action

第16頁 1252455 五、發明說明(12) 3.本技術將控制OLED電流之電晶體開關元件470置於晝 素5 0 0外,以增加畫素5 0 0的開口率。 惟上述僅為本發明之較佳實施例而已,並非用來限定 本發明實施之範圍。即凡依本發明申請專利範圍所做的均 等變化與修飾,皆為本發明專利範圍所涵蓋。Page 16 1252455 V. INSTRUCTION DESCRIPTION (12) 3. This technique places the transistor switching element 470, which controls the OLED current, outside the halogen 500 to increase the aperture ratio of the pixel 500. The above are only the preferred embodiments of the present invention and are not intended to limit the scope of the present invention. That is, the equivalent changes and modifications made by the scope of the patent application of the present invention are covered by the scope of the invention.

第17頁 1252455Page 17 1252455

圖式簡單說明 【圖式簡單說明】 第1圖,係美國專利US 6, 2 2 9, 5 0 6之晝素電路示意圖。 第2圖,係美國專利US 6, 2 2 9, 5 0 6之控制信號時序圖。 第3圖,係PHIL IPS公司論文之畫素電路示意圖。 第4圖,係本發明之每一畫素内電路示意圖。 第5圖,係本發明之顯示面板上畫素電路的連結與控制示咅 第6圖,係本發明之控制信號時序圖。 【圖式之標號說明】 電晶體 ΤΙ、T2、T3、T4、T31、T32、T33、T34 電容 Cc 、 Cs 、 Cl 、 C2 儲存電容Cd 補償電容Ct 資料線1 1 0、3 1 0 掃描線1 2 0、3 2 0 歸零控制線1 3 0、3 3 0 發光控制線1 4 0、3 4 0 電源供應線1 5 0、3 5 0 有機發光二極體1 6 0、3 6 0 歸零階段2 1 0 載入資料階段2 2 0 發光階段2 3 0 顯示面板4 0 0 資料線4 1 0Brief description of the drawing [Simplified description of the drawing] Fig. 1 is a schematic diagram of a halogen circuit of the US patent US 6, 2 2 9, 5 0 6 . Figure 2 is a timing diagram of the control signals of U.S. Patent No. 6, 2 2 9, 5 06. Figure 3 is a schematic diagram of the pixel circuit of the paper by PHIL IPS. Figure 4 is a schematic diagram of the circuit within each pixel of the present invention. Fig. 5 is a diagram showing the connection and control of the pixel circuit on the display panel of the present invention. Fig. 6 is a timing chart of the control signal of the present invention. [Description of the figure] Transistor ΤΙ, T2, T3, T4, T31, T32, T33, T34 Capacitance Cc, Cs, Cl, C2 Storage capacitor Cd Compensation capacitor Ct Data line 1 1 0, 3 1 0 Scan line 1 2 0, 3 2 0 Return to zero control line 1 3 0, 3 3 0 Illumination control line 1 4 0, 3 4 0 Power supply line 1 5 0, 3 5 0 Organic light-emitting diode 1 6 0, 3 6 0 Zero phase 2 1 0 Loading data phase 2 2 0 Lighting phase 2 3 0 Display panel 4 0 0 Data line 4 1 0

第18頁 1252455 圖式簡單說明 掃描線4 2 0 臨界電壓鎖住線4 3 0 共陰極線4 4 0 電源供應線4 5 0 顯示信號線4 6 0 開關元件4 7 0 畫素500 掃描重置TFT 510 偵測TFT 520 驅動TFT 530 有機電激發光元件5 4 0 臨界電壓鎖住階段6 1 0 寫入階段6 2 0 顯示階段6 3 0Page 18 1252455 Schematic description of the scan line 4 2 0 Threshold voltage lock line 4 3 0 Common cathode line 4 4 0 Power supply line 4 5 0 Display signal line 4 6 0 Switching element 4 7 0 Pixel 500 Scan reset TFT 510 Detecting TFT 520 Driving TFT 530 Organic Electroluminescent Element 5 4 0 Threshold Voltage Locking Phase 6 1 0 Write Phase 6 2 0 Display Phase 6 3 0

第19頁Page 19

Claims (1)

!252455 六、申請專利範圍 之龜^一種主ί式有機電激發光二極體驅動電路4 t顯不面板上母—條掃描線與每一條資料錄ί 本發明 素驅3路,其中每一晝素之驅動電路包括,又構成之畫 一掃描重置T F Τ,該播y舌番τ ρ τ 描線士接,其,端(D) “接至— 之資'極線端(G)與該掃 重置mWA’該儲存電容有兩端’係設置於上过浐 重置m之源極端(s)與_電源供 於上迷掃描 -驅動tft ’該驅動TFT之源 s( :d) m 線(Vdd )相連接; )^、上述電源供應 一偵測TFT,該偵測TFT之閘極端 ? 〇)) 相連接,其源極端(S)與驅動m之汲 '極端(G) 一補償電容,該補償電容有兩端,係設()相連接; 重置TFT之源極端(s)與侦測TFT^_ ^ ^掃描 線; 鈿為陰極,该陰極接一共陰極 同時顯示面板有一開關元件, 上述共陰極線與接地端。 Μ開關疋件係用以連接 極體2驅Π:專述之主動式有機電賴^ 是由同-條臨界電::::=每個畫素中的娜- 極體3驅π mm:述之主動式有機電激發光二 路其h亥顯不基板上每個畫素令的驅動tft之 麵 第20頁 1252455 六、申請專利範圍 源極端(s)共接至同一電源供應線。 極體4=請專利範圍第1項所述之主動式有機電激發光二 路,其中該顯示基板上每個晝素中的有機電激 七九凡件的陰極共接至該共陰極線。 極體5驅範圍第1項所述之主動式有機電激發光二 體尸動電路’其中該開關元件係為—薄膜電晶體。 極體驅m範圍第1項所述之主動式有機電;發光二 制體苑動電路,其中該開關元件係由一顯示信號線所控 7 ·如申請專利範圍第1項所述之 極體驅動電路,Α Φ 動式有機電激發光二 分為-臨電路之方法係將驅動信號週期 人階段U^ Ph鎖住階/MThreSh〇ld~L〇Ck Phase)、- 寫 個階段。 PhaS〇與一顯示階段(Display Phase)等三 極體8驅m.】圍第7項所述之主動式有機電激發光二 料線的電壓位準# # ^ ^ &鎖住^段開始時,該資 壓位準4目同丰被重置(Reset)為與電源供應線Udd)之電 極體9驅nm”7項所述之主動式有機電激發光二 極體驅動電月路專利iW第7項所述之主動式有機電激發光 八τ δ亥寫入階段資料電壓(Vdata)將透過!252455 VI. The patent application scope of the turtle ^ A main ί-type organic electro-excitation diode drive circuit 4 t display panel on the mother-strip scan line and each record ί The invention is driven by 3 channels, each of which The driving circuit of the prime includes, and is configured to, a scan reset TF Τ, the broadcast y tongue τ ρ τ is drawn, and the end (D) is “connected to — the end of the pole line (G) and the Sweep reset mWA' the storage capacitor has two ends 'set in the upper pass 浐 reset m source extreme (s) and _ power supply for the upper scan-drive tft 'the source of the drive TFT s ( :d) m The line (Vdd) is connected; ), the above power supply supplies a detecting TFT, and the detecting TFT is connected to the gate terminal 〇))), and the source terminal (S) and the driving m are 汲 'extreme (G)-compensated Capacitor, the compensation capacitor has two ends, the system is connected with (); the source terminal (s) of the reset TFT and the detection TFT ^_ ^ ^ scan line; the cathode is a cathode, and the cathode is connected to a common cathode and the display panel has a switch Component, the above common cathode line and grounding terminal. ΜSwitching element is used to connect the pole body 2 drive: the active active organic power supply is Same-bar critical electricity::::= Na in each pixel - Pole body 3 drive π mm: The active organic electroluminescence light is described in the second way. Its hhai display is not driven by each pixel on the substrate. Page 20, 1252455 VI. The patent source range source (s) is connected to the same power supply line. Polar body 4 = active organic electroluminescence two-way as described in item 1 of the patent scope, where each of the display substrates The cathode of the organic electro-acoustic yoke in the individual elements is connected to the common cathode line. The active organic electroluminescence two-body corpse circuit of the first embodiment of the polar body 5 drive range, wherein the switching element is - A thin-film transistor. The active-type organic electric power according to the first aspect of the invention, wherein the switching element is controlled by a display signal line, and is controlled by a display signal line. The polar body drive circuit, Α Φ dynamic organic electric excitation light dichotomy - Pro circuit method will drive the signal cycle human phase U ^ Ph lock order / MThreSh〇ld ~ L〇Ck Phase), - write a stage PhaS〇 and a display phase (Display Phase) and other triodes 8 drive m. The voltage level of the active organic electroluminescence two-wire line described in item 7 # # ^ ^ & locks the ^ segment at the beginning, the pressure level 4 is the same as the power supply line is reset (Reset) Udd) electrode body 9 drive nm" in the active organic electroluminescent diode drive according to the seventh item, the active organic electroluminescence light described in the seventh item of the iW item 7th τ δ hai writing stage voltage ( Vdata) will pass 第21頁 1252455 六、申請專利範圍 掃描重置TFT的導通(ON)而存入上述儲存電容中,上述補償 電容則因偵測TFT之截止(OFF)而始終保持之前所記憶之臨 界電壓值(Vth)。Page 21 1252455 VI. Application for Patent Range Scanning resets the ON (ON) of the TFT and stores it in the storage capacitor. The compensation capacitor always maintains the previously stored threshold voltage due to the OFF of the detection TFT. Vth). 第22頁Page 22
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TWI416491B (en) * 2009-10-09 2013-11-21 Sumika Technology Co Pixel circuit and display panel
TWI424409B (en) * 2008-05-01 2014-01-21 Sony Corp Display apparatus and display-apparatus driving method
TWI425479B (en) * 2009-09-01 2014-02-01 Univ Nat Taiwan Science Tech Pixel and driving method thereof and illuminating device
US8878831B2 (en) 2010-11-11 2014-11-04 Au Optronics Corp. Pixel driving circuit of an organic light emitting diode
CN104217682A (en) * 2014-09-04 2014-12-17 上海天马有机发光显示技术有限公司 Pixel circuit, organic electroluminescent display panel and display device
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US9779659B2 (en) 2014-09-15 2017-10-03 Au Optronics Corp. Pixel architecture and driving method thereof
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TWI424409B (en) * 2008-05-01 2014-01-21 Sony Corp Display apparatus and display-apparatus driving method
TWI425479B (en) * 2009-09-01 2014-02-01 Univ Nat Taiwan Science Tech Pixel and driving method thereof and illuminating device
TWI416491B (en) * 2009-10-09 2013-11-21 Sumika Technology Co Pixel circuit and display panel
US8878831B2 (en) 2010-11-11 2014-11-04 Au Optronics Corp. Pixel driving circuit of an organic light emitting diode
TWI502261B (en) * 2013-12-12 2015-10-01 Chunghwa Picture Tubes Ltd Pixel array substrate and display panel
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US9779659B2 (en) 2014-09-15 2017-10-03 Au Optronics Corp. Pixel architecture and driving method thereof
US9978308B2 (en) 2015-11-25 2018-05-22 Au Optronics Corporation Pixel voltage compensation circuit
US10056035B2 (en) 2015-12-07 2018-08-21 Au Optronics Corp. Pixel circuit and driving method thereof

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