TWI415377B - Control chip for driving a motor and esd circuit structure thereof and computer device having this control chip - Google Patents

Abstract

A control chip for driving a motor drive, which includes a voltage terminal, and an input terminal of the motor rotation speed, and a ESD circuit is arranged between voltage terminal and input terminal of the motor rotation speed, in which the control chip of the motor drive is characteristic in that: the ESD circuit is consisted of at least one PNP semiconductor element and a plurality of NPN semiconductor elements, and the size of one of the plurality of NPN semiconductors is larger than others.

Description

Motor-driven control chip and its ESD circuit structure and computer device

The present invention relates to a motor-driven control wafer (hereinafter referred to as a PWM control wafer), and more particularly to a PWM control wafer having a voltage matching and ESD circuit.

In general, the heat dissipation mechanism in computer devices mostly uses single-phase motor fans, especially on portable computers (Note-Book; NB). In order to save power, most of the designs use PWM control chips. Drive a single-phase motor fan. In terms of the PWM control mode, the PWM control mode (also known as PWM control) of the conventional mode and the PWM control mode of the voltage mode are included; and in the PWM mode of the voltage mode, there are two control methods, one is the voltage ( That is, V _CC ) is used for PWM control; the other is for PWM control of ground (ie GND). Regardless of the control method, the purpose of the PWM control chip is to save energy, because one of the most important factors in the use of portable computers is the length of use.

When the PWM control chip is used on the NB or PC, the PWM control chip needs to output or transfer the rotational state of the single-phase motor to the control substrate (for example, NB or PC motherboard) via the FG pin. Therefore, the control substrate can notify the PWM control chip to drive the fan rotation formed by the single-phase motor according to the change of the FG signal of the single-phase motor and the ambient temperature. In addition, in order to save power, PWM control is performed on the V _CC side of the PWM control chip, and when PWM control is performed on V _CC , the voltage at the V _CC terminal changes with the PWM signal. When the voltage of the V _CC terminal changes with the PWM signal, it will affect the FG signal of the PWM control chip. At the same time, since the voltage system on the control substrate is not necessarily the same as the PWM control chip, in order to avoid the signal on the control substrate being subjected to V. The voltage at the _CC terminal changes with the PWM signal. Therefore, the pin of the FG signal of the PWM control chip will adopt the structure of OPEN Drain or OPEN Collector, so that the voltage between the PWM control chip and the control substrate can be matched. . However, the disadvantage of this design is the need to discard the protection of the ESD.

In the prior art, an ESD element 12 (e.g., a diode) is connected between the _VCC terminal and the FG signal terminal in the PWM control wafer 10 for enhancing ESD protection, as shown in FIG. However, when the voltage at the V _CC terminal changes with the signal of the PWM control circuit 40, for example, when the voltage level change at the V _CC terminal is from 5V to 0V, especially when the PWM voltage at the V _CC terminal is lowered below the SV _{CC .} When the voltage of the terminal is 0.6~0.7V, at this time, an ESD element 12 connected between the V _CC terminal and the FG signal terminal will be forwarded. When the ESD component 12 is turned on, the output state of the FG signal terminal is clamped at "V _CC +0.6V~0.7V". That is to say, when the voltage of the PWM at the V _CC terminal of the PWM control chip 10 drops to 0 V, the output voltage of the FG signal terminal is clamped at 0.6 V to 0.7 V. When the PWM control chip 10 is to send a high level voltage from the FG signal terminal to the control substrate 20, the FG signal terminal is clamped, and the correct signal cannot be transmitted to the control substrate 20, thereby causing the control substrate. 20 misjudgment, so that the motor can not work properly.

Another way to solve the ESD protection of the PWM control chip is to add a Zener diode 30 between the PWM control wafer 10 and the control substrate 20, as shown in FIG. However, since the zener diode 30 is an external component, when the PWM control chip 10 is in production, transportation, and assembly, each pin is protected from ESD, especially the transistor 11 at the FG signal end is OPEN Drain or The structure of the OPEN Collector is prone to ESD Fail and the yield is reduced. For example, the PWM control chip 10 is normal during production testing, but when it is sent to the client for assembly, it is found that the PWM control chip 10 is ESD Fail.

Obviously, in the architecture of Figure 1, in addition to the shortcomings of the output voltage of the single-phase motor speed output terminal (ie, FG signal terminal) of the PWM control chip to the control substrate may be clamped, there is also PWM control. The problem of insufficient ESD protection of the wafer.

In order to improve the motor speed output end of the PWM control chip (ie, the FG signal end), it is impossible to generate the correct signal transmission to the control substrate end, and at the same time increase the protection of the ESD of the PWM control chip.

SUMMARY OF THE INVENTION A primary object of the present invention is to provide an ESD circuit that is disposed between the voltage terminal of a motor-driven control wafer and the output of the motor speed to improve the ESD protection capability of the motor-driven control wafer.

Still another object of the present invention is to provide an ESD circuit that is disposed between a voltage terminal of a motor-driven control chip and an output terminal of a motor speed to improve the level determination problem of different voltage systems.

Still another object of the present invention is to provide an ESD circuit that is disposed between a voltage terminal of a motor-driven control chip and an output terminal of a motor speed, thereby improving the ESD capability of the motor-driven control wafer, thereby improving the yield of the product. .

According to the above object, the present invention firstly provides a motor-driven control chip comprising at least a voltage terminal and a motor speed output terminal, and an ESD circuit is disposed between the voltage terminal and the motor speed output terminal, wherein the motor drive control The wafer is characterized in that the ESD circuit is composed of at least one PNP semiconductor component and a plurality of NPN semiconductor components, and one of the plurality of NPN semiconductor components has a larger size than the other NPN semiconductor components.

The present invention further provides a portable computer configured with a motor drive control chip, which is composed of a motherboard, a display device, an input device, and a motor drive control chip, and the motor drive control chip includes at least one voltage terminal. And one horse The output end of the speed is connected to the motherboard through the output end of the motor speed. The portable computer is characterized in that: an ESD circuit is arranged between the voltage end of the motor drive control chip and the motor speed output end, and the ESD circuit system is The at least one PNP semiconductor component and the plurality of NPN semiconductor components are formed, and one of the plurality of NPN semiconductor components has a larger size than the other NPN semiconductor components.

In order to clearly illustrate the operation of the motor control wafer of the present invention, a single-phase motor will be described as an embodiment in the following description; however, the application of the present invention is not limited to voltage matching and ESD of a single-phase motor. To improve the application, it is also possible to extend this concept to the application of voltage matching and ESD improvement for control wafers of multiphase motors.

The single-phase motor-driven control chip of the present invention _performs PWM control at its V _CC end, and needs to output the rotation signal of the motor from the FG pin to the control substrate, so that the control substrate can correctly control the motor. At the same time, the voltage design between the control chip and the control substrate driven by the single-phase motor is not necessarily the same, so the FG pin is designed as an open drain or open collector circuit. However, the circuit architecture of the open drain or open collector cannot achieve ESD protection, so the ESD protection of the PWM control chip is weak.

According to the above situation, the present invention configures an ESD (Electrostatic Discharge) circuit between the V _CC voltage terminal of the single-phase motor-driven control chip and the output terminal (FG) of the single-phase motor speed, as shown in FIG. 2, wherein The structure of the ESD circuit is shown in Figure 3. First, please refer to Figure 2, an ESD circuit is arranged between the V _CC voltage terminal inside the PWM control chip and the output terminal (FG) of the single-phase motor speed; and the ESD circuit is composed of a plurality of semiconductor components (for example: two poles) Body-DIODE) is composed of serial connections. Next, as shown in FIG. 3, in the present embodiment, the ESD circuit is composed of five semiconductor elements including a diode formed by a PNP transistor and a diode formed by four NPN transistors. . In particular, the ESD circuit of the present invention has a larger size than the other one of the four NPN transistors (ie, the transistor connected to the output end of the single-phase motor speed) in order to improve its ESD protection capability. 3 NPN transistors. In addition, the last crystal in series with the ESD circuit (ie, the transistor connected to the V _CC terminal) uses a PNP transistor, the main purpose of which is to enhance the withstand voltage capability of the V _CC terminal. The operational state of the above circuit is explained below.

Next, referring to FIG. 2, when the single-phase motor-driven control wafer 10 (hereinafter referred to as the PWM control wafer) is connected to the control substrate 20, at this time, the SV _CC terminal of the control substrate 20 supplies a voltage of 5 V, and After the voltage of the V _CC terminal of the PWM control chip 10 is modulated by the PWM control circuit 40, the voltage level of the V _CC terminal changes from 1.5 V to 5 V (EX: V _CC = 5 V). When the PWM voltage at the V _CC terminal drops to 1.5V, the five diodes in the ESD circuit between the V _CC voltage terminal and the output terminal (FG) of the single-phase motor speed are turned on, which forces the PWM. The output voltage of the FG terminal of the control wafer 10 is clamped at 1.5V+(3.0V~3.5V); that is, between 4.5V and 5V; therefore, the output voltage of the FG terminal can be maintained at the High level and output to the control substrate normally. Therefore, the misjudgment of the control substrate 20 is not caused, that is, the control substrate 20 can correctly control the motor output. In particular, since the V _{CC of the} PWM control wafer 10 and the SV _{CC of the} control substrate 20 have a voltage matching problem, the High/Low (0 V) level definition at the FG terminal will vary with the voltage of the SV _CC . Different. For example, when the SV _CC is a 5V system, the High/Low level of the control substrate 20 is set at 2.5V/0 V; when the SV _{CC is} operated at the 12V system, the High/Low level of the control substrate 20 is set. Set at 6V/0 V up and down. Therefore, the present invention can solve the problems of different voltage systems by the number of serially connected semiconductor components (for example, diode-DIODE) to achieve a correct output signal to the control substrate 20.

In addition, the ESD circuit 50 of the present invention can solve the problem that the PWM control chip 10 has insufficient ESD protection capability in addition to solving the state in which the voltage of the FG terminal of the PWM control wafer 10 may not be outputted. As shown in Fig. 3, the ESD circuit of the present invention is capable of improving its ESD protection capability, and the first of the four NPN transistors (51, 52, 53, 54) (i.e., the output of the single-phase motor speed) The transistor of the terminal connection) has a larger size than the other three NPN transistors. Since, as the size of the transistor 51 becomes larger, its area between the base and the emitter of the transistor increases, so that the ability of the ESD protection of the transistor can be improved. Therefore, by the design of the NPN transistor in the ESD circuit, the ESD protection capability of the PWM control wafer 10 can be effectively improved. In addition, the last crystal in series with the ESD circuit (ie, the transistor connected to the V _CC terminal) uses a PNP transistor, the main purpose of which is to enhance the withstand voltage capability of the V _CC terminal.

Through the above design, the ESD circuit provided by the present invention can keep the output voltage of the PWM control chip FG signal terminal can be normally output to the control substrate; and the ESD of the PWM control chip can also be solved by the configuration of the transistor in the ESD circuit. The problem of insufficient protection. Therefore, the ESD circuit provided by the present invention can improve the yield of the PWM control wafer during production, transportation and assembly, thereby reducing the manufacturing cost.

It is to be emphasized again that the ESD circuit provided by the present invention is not limited to a series structure of five transistors, which is only one embodiment of the present invention. The ESD circuit can be formed using only one semiconductor element or a plurality of semiconductor elements can be connected in series in response to a level problem between different voltage systems. For example, if it is determined that the high/low level of the PWM control chip 10 is 2.5V/0 V (and the voltage level of the V _CC terminal changes from 0V to 5V), the ESD circuit of the present invention can selectively use four semiconductor components. Series structure (ie 1 PNP transistor and 3 NPN transistors). In addition, the five diodes in the present invention are formed by a semiconductor element, which may be a bipolar transistor (BJT), a metal oxide semiconductor (MOSFET), or a complementary MOS transistor ( CMOS). In addition, the computer device referred to in the present invention includes a desktop computer, a bare-bones computer device, and a portable computer.

In addition, the application of the PWM control chip of the present invention is not limited to the voltage matching and ESD improvement applications of single-phase motors, and it can also be extended to the application of voltage matching and ESD improvement of control wafers of multi-phase motors.

In addition, the type of the semiconductor component in the ESD circuit of the present invention may be an NPN transistor structure or a PNP transistor structure (for example, an ESD circuit is formed by using five PNP transistors in series), and therefore, the serial connection of the present invention The semiconductor component is not limited to the mixing of the NPN transistor and the PNP transistor, and the series connection of the NPN transistor alone or the PNP transistor alone can also achieve the improvement of the ESD.

In addition, the layout (LAYOUT) of the semiconductor components in the ESD circuit of the present invention can also be configured differently according to actual needs. For example, in addition to the previously disclosed embodiments of the present invention (ie, the size of the transistor 51 is larger than the other three NPN transistors), it is also possible to choose different sizes of the other three NPN transistors, such that It is also possible to solve the problem of voltage matching and further improve the functions in the ESD circuit.

The present invention has been disclosed by the above-described embodiments, and is not intended to limit the scope of application of the present invention; therefore, via the above teachings or embodiments of the present invention Some modifications to the ESD circuitry provided by the present invention are possible with the resulting motivation. Therefore, the technical idea of the present invention will be determined by the following claims and their equals.

10‧‧‧Motor-driven control chip

11‧‧‧OPEN DRAIN structure

12‧‧‧ diode

20‧‧‧Control substrate

30‧‧‧ZENER DIODE

40‧‧‧PWM control circuit

50‧‧‧ESD circuit

51~54‧‧‧NPN transistor

55‧‧‧PNP transistor

1 is a block diagram of a prior art circuit; FIG. 2 is a circuit diagram of a preferred embodiment of the present invention; and FIG. 3 is a schematic diagram of an ESD circuit of a preferred embodiment of the present invention.

10‧‧‧Motor-driven control chip

11‧‧‧OPEN DRAIN structure

20‧‧‧Control substrate

40‧‧‧PWM control circuit

50‧‧‧ESD circuit

Claims (13)

A motor-driven control chip, the motor-driven control chip includes at least a voltage terminal and an output terminal of a motor speed, and an ESD circuit is disposed between the voltage terminal and the output end of the motor speed, wherein the motor drive control The chip is characterized in that the ESD circuit is composed of at least one PNP semiconductor component and a plurality of NPN semiconductor components, the PNP semiconductor component is connected to the voltage terminal, and a base terminal of an NPN semiconductor component of the plurality of NPN semiconductor components The area between the (base) and the emitter is larger than the area between the base and the emitter of the other NPN semiconductor elements. The control chip of claim 1, wherein the ESD circuit is composed of a PNP semiconductor component and four NPN semiconductor components. The control wafer of claim 2, wherein an area between a base and an emitter of the NPN semiconductor component connected to the motor speed output end of the four NPN semiconductor components is larger than other The area between the base and the emitter of the NPN semiconductor component. The control chip of claim 1, wherein the voltage terminal is further connected to a PWM control circuit. The control wafer of claim 1, wherein the semiconductor elements are selected from the group consisting of: a double interface transistor (BJT), a metal oxide semiconductor (MOSFET), and a complementary MOS transistor ( CMOS). A computer device configured with a motor-driven control chip, comprising a motherboard, a display device, an input device and a motor-driven control chip, wherein the motor-driven control chip comprises at least a voltage terminal and a An output end of the motor speed is connected to the motherboard via an output end of the motor speed, wherein the computer device configured with the motor-driven control chip is characterized in that the voltage terminal of the motor-driven control chip and the motor speed Between outputs Configuring an ESD circuit, the ESD circuit is composed of at least one PNP semiconductor component and a plurality of NPN semiconductor components connected in series, the PNP semiconductor component being connected to the voltage terminal, and one of the plurality of NPN semiconductor components The area between the base and the emitter is larger than the area between the base and the emitter of the other NPN semiconductor elements. A computer device configured with a motor-driven control chip as described in claim 6 wherein the ESD circuit is composed of a PNP semiconductor component and four NPN semiconductor components. A computer device configured with a motor-driven control chip according to claim 7, wherein a base and an emitter of the NPN semiconductor component connected to the motor rotational speed output end of the four NPN semiconductor components are provided. The area between (emitter) is larger than the area between the base and emitter of other NPN semiconductor elements. A computer device configured with a motor-driven control chip as described in claim 6 wherein the voltage terminal is further connected to a PWM control circuit. A computer device configured with a motor-driven control chip as described in claim 6 wherein the semiconductor components are selected from the group consisting of: a double interface transistor (BJT), a metal oxide semiconductor transistor (MOSFET), and Complementary MOS semi-transistor (CMOS). A computer device configured with a motor-driven control chip as described in claim 6 wherein the computer device is selected from the group consisting of a desktop computer, a barebones computer, and a portable computer. An ESD circuit structure is composed of at least one PNP semiconductor component and a plurality of NPN semiconductor components, and an area between a base and an emitter of an NPN semiconductor component of the plurality of NPN semiconductor components is larger than The surface between the base and the emitter of other NPN semiconductor components product. The ESD circuit structure of claim 12, wherein the semiconductor components are selected from the group consisting of: a double interface transistor (BJT), a metal oxide semiconductor (MOSFET), and a complementary MOS transistor. (CMOS).