TWI415054B - Driving circuit for display panel - Google Patents

Abstract

The present invention relates to a driving circuit for a display panel, and comprises a switching module, a buffer circuit, and a plurality of resistive devices. The switching module is coupled to a first power supply and a second power supply. The voltage of the first power supply is smaller than that of the second power supply. The buffer circuit is coupled to the switching module, and is used for buffering a data signal and producing a buffer signal. The plurality of resistive devices is connected in series and coupled to the buffer circuit, and produces a plurality of driving signals between the plurality of resistive devices according to the buffer signal. The driving circuit switches between the first power supply and second power supply sequentially to supply power to the buffer circuit. Thereby, one of the plurality of driving signals charges a capacitor of the display panel for saving power of the driving circuit. Accordingly, the power of the display can be saved.

Description

Driving circuit for display panel

The present invention relates to a driving circuit, and more particularly to a driving circuit for a display panel.

According to the current development of technology, the variety of information products has been updated to meet the different needs of many people. Most of the early displays were cathode ray tube (CRT) displays. Due to their large size and power consumption, and the radiation generated, they are harmful to users who use the display for a long time. Today's displays on the market will gradually replace the old CRT monitors with liquid crystal displays (LCDs). Liquid crystal displays have the advantages of being thin and light, low in radiation and low in power consumption, and thus have become the mainstream in the current market.

As described above, the liquid crystal display controls the light transmittance of the liquid crystal unit according to the data signal to display an image. Since the active matrix type liquid crystal display adopts an active control switching device, such a liquid crystal display has an advantage in displaying animation, and a thin film transistor (TFT) is a closing device mainly used for an active matrix type liquid crystal display.

Please refer to the first figure, which is a schematic diagram of a driving system of a liquid crystal display of the prior art. As shown, the drive system includes a display panel 10', a scan drive circuit 12', a data drive circuit 14', a timing control circuit 16' and a reference voltage generating circuit 18'. The display panel 10' is configured to display images, and the scan driving circuit 12' is configured to generate and transmit a scan signal to the display panel 10' to drive a thin film transistor of the display panel 10', and the data driving circuit 14' is used to generate and transmit A data signal is sent to the display panel 10' to display the image according to the data signal. The timing control circuit 16' generates a timing control signal and respectively transmits the timing control signal to the scan driving circuit 12' and the data driving circuit 14' to control the scanning. The driving circuit 12' and the data driving circuit 14 respectively transmit the scanning signal and the data signal to the display panel 10' to display the image. In addition, the reference voltage generating circuit 18' generates a reference voltage and transmits the reference voltage to the data driving circuit 14', so that the data driving circuit 14' generates a data signal according to the timing control signal and the reference voltage.

Please refer to the second figure, which is a schematic diagram of a reference voltage generating circuit of the prior art. As shown in the figure, when the digital display data corresponding to RGB is composed of, for example, 6 bits, the reference voltage generating circuit 18' can output 64 kinds of specific voltages V0 to V63 corresponding to 2 ⁶ = 64 gray scale levels, respectively. . The reference voltage generating circuit 18' is constituted by a resistor dividing circuit in which resistors R0 to R7 are connected in series. Each of the resistors R0 to R7 is connected in series to eight resistors. That is, as shown in the third figure, eight resistors R01, R02, ..., and R08 are connected in series to form a resistor R0, and the remaining resistors R1 to R7 also have the same configuration as the resistor R0. Therefore, the reference voltage generating circuit 18' is composed of 64 resistors, and voltages V0 to V63 are generated.

However, since the reference voltage generating circuit 18' must use about 64 resistors in order to generate 64 different voltage levels, the area of the reference voltage generating circuit 18' will be increased, thereby increasing the area of the display device. Further, in order to reduce the area of the reference voltage generating circuit 18', it is necessary to use a resistor having a large resistance value, but increasing the resistance of the resistor affects the driving ability of the data driving circuit 14'. Further, when the data driving circuit 14' drives the display panel 10' through the resistors, a large amount of energy must be consumed in the resistor, and the power of the display device is wasted. Therefore, how to solve the above problem is to provide a novel display panel driving circuit, which can reduce the number of used resistors without affecting the driving capability of the data driving circuit 14', thereby reducing the area of the display device and saving display. The power of the device makes it possible to solve the above problems.

One of the objectives of the present invention is to provide a driving circuit for a display panel, which uses a switching module to switch a first power source or a second power source to a buffer circuit to save power of the driving circuit, thereby saving display device. Power.

It is an object of the present invention to provide a driving circuit for a display panel that utilizes a digital analog conversion circuit to reduce the use of the number of impedance elements, thereby saving the area of the display device.

The driving circuit for a display panel of the present invention comprises a switching circuit, a buffer circuit and a plurality of impedance elements. The switching module is coupled to a first power source and a second power source. The voltage of the first power source is lower than the voltage of the second power source. The buffer circuit is coupled to the switching module and buffers a data signal to generate a buffer signal. The impedance elements are connected in series with each other and coupled to the buffer circuit, and generate a plurality of driving signals between the impedance elements according to the buffering signal; wherein the driving circuit sequentially switches the first power source and the second power source, and supplies the power source to the buffer circuit. One of the driving signals is charged to one of the display panels to save power of the driving circuit, thereby saving power of the display device.

In order to provide a better understanding and understanding of the structural features and the efficacies of the present invention, please refer to the preferred embodiment and the detailed description as follows: please refer to the fourth figure, which is A schematic diagram of a drive system for a liquid crystal display of the invention. As shown, the drive system includes a display panel 10, a scan drive circuit 12, a data drive circuit 14, a timing control circuit 16, and a gamma circuit 18. The display panel 10 is configured to display images. The scan driving circuit 12 is configured to generate and transmit a scan signal to the display panel 10 to drive a thin film transistor of the display panel 10. The data driving circuit 14 is configured to generate and transmit a data signal to the display. The panel 10 displays the image according to the data signal, and the timing control circuit 16 generates a timing control signal, and respectively transmits the timing control signal to the scan driving circuit 12 and the data driving circuit 14 to control the scan driving circuit 12 and the data driving circuit 14 respectively. The scan signal and the data signal are transmitted to the display panel 10 to display the image. In addition, the gamma circuit 18 generates a reference voltage and transmits a reference voltage to the data driving circuit 14, so that the data driving circuit 14 generates a data signal according to the timing control signal and the reference voltage.

Please refer to the fifth figure, which is a block diagram of a preferred embodiment of the present invention. As shown, the driving circuit of the display panel of the present invention is applied to the data driving circuit 14 to receive 64 voltage levels generated by the gamma circuit 18. The driving circuit of the present invention can receive 8-bit signals. Therefore, the data driving circuit 14 needs to use eight driving circuits to receive and process 64 voltage levels, and the present embodiment is described by only one driving circuit. The driving circuit of the present invention comprises a switching module, a buffer circuit 142 and a plurality of impedance elements 143, 144, 146, 148 coupled to a first power source and a second power source, the voltage of the first power source being less than the voltage of the second power source In a preferred embodiment, the voltage of the second power source is twice the voltage of the first power source, and the buffer circuit 142 is coupled to the switching module and buffers a data signal to generate a buffer signal. The elements 143, 144, 146, 148 are connected in series with each other and coupled to the buffer circuit 142, that is, one end of the impedance element 143 is coupled to the buffer circuit 142, the other end of the impedance element 143 is connected in series with the impedance element 144, and one end of the impedance element 148 The buffer circuit 142 is coupled, and the other end of the impedance element 148 is connected in series to the impedance element 146. The impedance elements 143, 144, 146, 148 generate a complex number between the impedance elements 143, 144, 146, 148 according to the buffer signal. The driving signal, wherein the driving circuit sequentially switches the first power source and the second power source, and supplies the power to the buffer circuit 142 to enable one of the driving signals to charge the capacitor 100 of the display panel. In this way, the power of the driving circuit can be saved, thereby saving the power of the display device.

Please refer to the sixth figure as a driving sequence diagram of a preferred embodiment of the fifth figure. As shown in the figure, the dotted line represents that the driving circuit directly drives the display panel 10 by charging the capacitor 100 with a power supply twice, and the solid line represents that the driving circuit is first switched to the first power supply to the buffer circuit 142 by the switching module. The power source is doubled, and after a period of time, the switching module switches to the second power supply to the buffer circuit 142, wherein the second power source is twice the power source. As can be seen from the figure, the present invention The driving circuit is supplied to the buffer circuit 142 with two different power sources to drive the power consumed by the display panel 10 to be less than the power consumed by the power supply to the buffer circuit 142 to drive the display panel 10, that is, at the time T1. When the driving circuit is supplied with the first power source of the power supply to the buffer circuit 142, the driving circuit is supplied to the buffer circuit 142 with the second power of the double power source at the time of T2. Thus, the present invention can save the driving circuit. The power, which in turn saves the power of the display device.

In addition, the driving circuit of the present invention further includes an analog-to-digital conversion circuit 15 for converting an input signal to generate a data signal. The analog digital conversion circuit 15 is coupled to the gamma circuit 18 to receive the correction data generated by the gamma circuit 18 as an input signal, and the gamma circuit 18 generates the correction data according to a gamma curve. Furthermore, the analog-to-digital conversion circuit 15 is further coupled to a memory unit 20 for storing complex pixel data, and the analog digital conversion circuit 15 receives the pixel data and the correction data as input signals to generate data signals. . The memory unit 20 is a random access memory (RAM).

Referring to the fifth figure, a first switch 150, a second switch 152 and a third switch 154 are respectively disposed between the impedance elements 143, 144, 146, and 148. The analog digital conversion circuit 15 can generate a control signal to turn on/off the first switch 150, the second switch 152 or the third switch 154 according to the pixel data stored in the memory unit 20. Moreover, the buffer circuit 142 includes a first buffer 1420 and a second buffer 1421. The first buffer 1420 is for buffering the data signal to generate a first buffer signal, and the second buffer is for buffering the data signal to generate a second buffer signal, the impedance elements 143, 144, 146, 148. The driving signal is generated by the voltage difference between the first buffer signal and the second buffer signal generated by the first buffer 1420 and the second buffer 1421. The first buffer 1420 and the second buffer 1421 are an operational amplifier. The switching module includes a first switching switch 140 and a second switch 142. The first switching switch 140 is configured to switch the first power source or the second power source to supply power to the first buffer 1420. The second switching switch The 140 series is used to switch the first power source or the second power source, and supplies power to the second buffer 1421.

In summary, the driving circuit for the display panel of the present invention is a switching module coupled to a first power source and a second power source, the voltage of the first power source is less than the voltage of the second power source; The module is configured to buffer a data signal to generate a buffer signal; the plurality of impedance elements are connected in series and coupled to the buffer circuit, and the plurality of driving signals are generated between the impedance elements according to the buffering signal; wherein the driving circuit is sequentially switched The first power source and the second power source supply power to the buffer circuit, so that one of the driving signals charges a capacitor of the display panel to save power of the driving circuit, thereby saving power of the display device.

The invention is a novelty, progressive and available for industrial use, and should meet the requirements of the patent application stipulated in the Patent Law of China, and the invention patent application is filed according to law, and the prayer bureau will grant the patent as soon as possible. prayer.

However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and the shapes, structures, features, and spirits described in the claims are equivalently changed. Modifications are intended to be included in the scope of the patent application of the present invention.

Conventional technology:

10’. . . Display panel

12’. . . Scan drive circuit

14’. . . Data drive circuit

16’. . . Timing control circuit

18’. . . Reference voltage generating circuit

this invention:

10. . . Display panel

100. . . capacitance

12. . . Scan drive circuit

14. . . Data drive circuit

140. . . First switch

141. . . Second switch

142. . . Buffer circuit

1420. . . First buffer

1421. . . Second buffer

143. . . Impedance component

144‧‧‧ impedance components

146‧‧‧ impedance components

148‧‧‧ impedance components

15‧‧‧ analog digital conversion circuit

150‧‧‧First switch

152‧‧‧second switch

154‧‧‧ Third switch

16‧‧‧Sequence Control Circuit

18‧‧‧ 珈玛电路

20‧‧‧ memory unit

The first figure is a schematic diagram of a driving system of a liquid crystal display of the prior art;

The second figure is a schematic diagram of a reference voltage generating circuit of the prior art;

The third figure is a schematic diagram of a detailed reference voltage generating circuit of the prior art;

The fourth figure is a schematic diagram of a driving system of the liquid crystal display of the present invention;

Figure 5 is a block diagram of a preferred embodiment of the present invention;

The sixth figure is a driving timing diagram of a preferred embodiment of the fifth figure.

100. . . capacitance

140. . . First switch

141. . . Second switch

142. . . Buffer circuit

1420. . . First buffer

1421. . . Second buffer

143. . . Impedance component

144. . . Impedance component

146. . . Impedance component

148. . . Impedance component

15. . . Analog digital conversion circuit

150. . . First switch

152. . . Second switch

154. . . Third switch

18. . . Karma circuit

20. . . Memory unit

Claims (16)

A driving circuit for a display panel, comprising: a switching module coupled to a first power source and a second power source, wherein a voltage of the first power source is less than a voltage of the second power source; a buffer circuit coupled to the The switching module is configured to buffer a data signal to generate a buffer signal; and a plurality of impedance elements connected in series with each other and coupled to the buffer circuit, and generating between the impedance elements according to the buffer signal The driving circuit sequentially switches the first power source and the second power source, and supplies power to the buffer circuit to cause one of the driving signals to charge a capacitor of the display panel. The driving circuit of claim 1, wherein the voltage of the second power source is twice the voltage of the first power source. A driving circuit as described in claim 1, which is applied to a data driving circuit of the display panel. The driving circuit of claim 1, further comprising: an analog-to-digital conversion circuit for converting an input signal to generate the data signal. The driving circuit of claim 4, further comprising: a gamma circuit that generates and transmits the input signal to the analog-to-digital conversion circuit according to a gamma curve. The driving circuit of claim 1, further comprising: a plurality of switches, one end of which is coupled between each of the impedance elements of the impedance element, and the other end of which is coupled to the display panel to be based on a control signal Turning on one of the switches generates and transmits the drive signal to the capacitor. The driving circuit of claim 6, further comprising: an analog-to-digital conversion circuit that generates the control signal according to an input signal to turn on one of the switches. The driving circuit of claim 1, wherein the buffer circuit comprises: a first buffer for buffering the data signal to generate a first buffer signal; A second buffer is used to buffer the data signal to generate a second buffer signal. The driving circuit of claim 8, wherein the switching module comprises: a first switching switch for switching the first power source or the second power source to the first buffer; and a second switching And a switch for switching the first power source or the second power source to the second buffer. The driving circuit of claim 8, wherein the second buffer is an operational amplifier. The driving circuit of claim 8, wherein the first buffer is an operational amplifier. The driving circuit of claim 1, wherein the impedance elements are a resistor. A driving circuit for a display panel, comprising: a switching module coupled to a first power source and a second power source, the voltage of the first power source is less than a voltage of the second power source; and a buffer circuit coupled The switching module is configured to buffer a data signal to generate a buffer signal to generate a driving signal. The driving circuit sequentially switches the first power source and the second power source to supply power to the buffer circuit. The driving signal is charged to one of the display panels. The driving circuit of claim 13, wherein the voltage of the second power source is twice the voltage of the first voltage. The driving circuit of claim 13, further comprising: an analog-to-digital conversion circuit for converting an input signal to generate the data signal. The driving circuit of claim 15 further comprising: a gamma circuit that generates and transmits the input signal to the analog-to-digital conversion circuit according to a gamma curve.