TWI409769B - Liquid crystal display panel and driving method thereof - Google Patents

Abstract

A liquid crystal display panel is provided. The liquid crystal display panel has a first scan line, a second scan line, a first data line, a second data line and a pixel unit. The first scan line is enabled during a first frame period. The second scan line is enabled during a second frame period. The first data line is used for transmitting a first data signal. The second data line is used for transmitting a second data signal. The first pixel unit includes a liquid crystal capacitor, a first switch and a second switch. The first switch is controlled by the first scan line. The first data signal is driven to the liquid crystal capacitor via the enabled first switch as the first scan line enabled. The second switch is controlled by the second scan line. The second data signal is driven to the liquid crystal capacitor via the enabled second switch as second first scan line enabled.

Description

Liquid crystal display panel and driving method thereof

The present invention relates to a display panel, and more particularly to a liquid crystal display panel and a method of driving the same.

In a liquid crystal display, the polarity of the pixel voltage is switched once every once time to avoid damage to the physical properties of the liquid crystal molecules in the pixels. Common driving methods are, for example, dot inversion and column inversion. In comparison with the screen characteristics of the display, the dot-reversed liquid crystal display panel produced by the dot inversion driving method is superior in image quality. However, in the conventional liquid crystal display panel, the polarity of the signal voltage is reversed frequently due to the dot inversion driving method, resulting in a problem of high power consumption.

In order to reduce the power consumption required for a dot inversion liquid crystal display panel, a liquid crystal display conventionally using a flip pixel structure has been proposed, and its schematic diagram is as shown in FIG. In the liquid crystal display device 100, the liquid crystal display panel 120 is sequentially constructed by an odd-numbered pixel column 121 and an even-numbered pixel column 122. The pixel units of the odd pixel array 121 receive the pixel voltages transmitted by the data lines D(1) to D(M), respectively, and the pixel units in the even pixel columns 122 are the data lines D (2). ) is driven by D(M+1), and the pixel voltages of adjacent data lines D(1) to D(M+1) are designed to be voltages of different polarities. Where M is a positive integer. Under this positive and negative pixel structure, the effect of dot inversion liquid crystal display panel can be achieved by the driving method of row inversion. fruit. The purpose is to reduce the power consumption by using the line reversal instead of the dot inversion. However, in the liquid crystal display panel 120 constructed by using the front and back pixels, a cumulative transverse electric field is generated to affect the picture quality, and the influence of the transverse electric field on the liquid crystal occurs mostly on the display electrode and the data line on the left side thereof. The reason for the twins is as follows.

The pixel unit P of the odd pixel array 121 and the pixel unit Pb of the even pixel array 122 are taken as an example. The liquid crystal capacitors Clca and Clcb of the pixel units Pa and Pb receive the pixel voltages transmitted from the data lines D(1) and D(2), respectively. In the first picture period, the data lines D(1) and D(2) respectively transmit pixel voltages of opposite polarities. For example, the data lines D(1) and D(2) respectively transmit a positive polarity pixel voltage and a negative polarity pixel voltage during the first picture period. Therefore, the liquid crystal capacitors Clca and Clcb store the positive polarity and the negative polarity pixel voltage, respectively. Therefore, in the pixel unit Pa, the voltage of the pixel electrode of the liquid crystal capacitor Clca and the transistor Ta is higher than the voltage of the pixel electrode of the transistor Tb in the pixel unit Pb.

At this time, since the data line D(1) is a positive polarity pixel voltage, the electric field between the pixel electrode of the pixel unit Pb and the data line D(1) is higher than the pixel electrode and data of the pixel unit Pa. The electric field between lines D(1). In this way, the corresponding liquid crystal molecules in the pixel unit Pb have a larger rotation angle. Therefore, in the first picture period, the luminance of the pixel unit Pb is higher than the luminance of the pixel unit Pa. The other pixel units of the even pixel column 122 also have higher brightness than the other pixel units of the odd pixel column 121.

In the second picture period, the source driver reverses the polarity of the voltages output to the data lines D(1) and D(2), that is, the data lines are respectively A negative polarity pixel voltage and a positive polarity pixel voltage are transmitted. Therefore, the liquid crystal capacitors Clca and Clcb store the negative polarity and the positive polarity pixel voltage, respectively. Therefore, in the pixel unit Pa, the voltage of the pixel electrode of the liquid crystal capacitor Clca and the transistor Ta is lower than the voltage of the pixel electrode of the transistor Tb in the pixel unit Pb.

At this time, since the data line D(1) is a negative polarity pixel voltage, the electric field between the pixel electrode of the pixel unit Pb and the data line D(1) is higher than the pixel electrode and data of the pixel unit Pa. The electric field between lines D(1). In this way, the corresponding liquid crystal molecules in the pixel unit Pb have a larger rotation angle. Therefore, in the second picture period, the luminance of the pixel unit Pb is higher than the luminance of the pixel unit Pa. The other pixel units of the even pixel column 122 also have higher brightness than the other pixel units of the odd pixel column 121.

As can be seen from the above example, the brightness of the even pixel column 122 is always brighter than the odd pixel column 121. Thus, the even pixel columns 122 in the liquid crystal display panel are constantly brighter than the odd pixel columns 121, resulting in a horizontal bright grain on the screen of the liquid crystal display 120, which affects the picture quality.

Therefore, from the above problems, it can be known how to reduce the high power consumption derived from the driving method of the dot inversion, and solve the problem of bright and fine lines in the picture, thereby improving the picture quality, which is a problem of the industry. One.

The invention relates to a liquid crystal display panel and a driving method thereof, wherein two switches are arranged in each pixel unit, and sequentially driving a voltage of different polarity to a liquid crystal capacitor of a pixel unit to achieve a point reversal liquid crystal display surface. The board can reduce the power consumption, and can avoid the bright and fine lines of the picture, so as to improve the picture quality.

According to a first aspect of the present invention, a liquid crystal display panel includes a first scan line, a second scan line, a first data line, a second data line, and a first pixel unit. The first scan line is enabled in a scan period in a first picture period, and is disabled in a second picture period, and the second scan line is used to enable in the scan period in the second picture period, Not enabled during the first picture period. The first data line transmits a first data signal, and the second data line transmits a second data signal. One of the first and second data signals is positive for the first picture period and the second picture period. The data voltage, wherein the other of the first picture period and the second picture period, is a negative data voltage. . The first pixel unit includes a first liquid crystal capacitor, a first switch, and a second switch. The first switch is controlled by the first scan line, and when the first scan line is enabled, the first switch transmits the first data signal to the first liquid crystal capacitor. The second switch is controlled by the second scan line, and when the second scan line is enabled, the second switch transmits the second data signal to the first liquid crystal capacitor.

According to a first aspect of the present invention, a liquid crystal display includes a first scan line, a second scan line, a first data line, a second data line, a gate driver, a source driver, and a liquid crystal Display panel. The gate driver is configured to enable the first scan line and the second scan line in a scan period in a first picture period and a scan period in a second picture period, respectively. a source driver for respectively outputting a first data signal and a second data signal to the first data line and the second data line, first and second One of the data signals is a positive data voltage during the first picture period and the second picture period, and the other of the first picture period and the second picture period is a negative data voltage. . The liquid crystal display panel includes a first pixel unit. The first pixel unit includes a first liquid crystal capacitor, a first switch, and a second switch. The first switch is controlled by the first scan line. When the first scan line is enabled, the first open relationship transmits the first data signal to the first liquid crystal capacitor: the second switch is controlled by the second scan line, and the second When the scan line is enabled, the second switch transmits the second data signal to the first liquid crystal capacitor.

According to a first aspect of the present invention, a driving method for driving a liquid crystal display is proposed. The liquid crystal display includes a first scan line, a second scan line, a first data line, a second data line and a first pixel unit. The first pixel unit includes a first switch and a second switch. a first liquid crystal capacitor, the control ends of the first and second switches are respectively coupled to the first and second scan lines, and the first ends of the first and second switches are respectively coupled to the first and second data lines, the first The second end of the second switch is coupled to the first liquid crystal capacitor. The driving method includes: firstly, enabling the first scan line in a scan period in a first picture period to turn on the first switch and transmit the first data line A first data signal to the first liquid crystal capacitor. Then, the second scan line is enabled in the scan period in the second picture period to turn on the second switch, and transmit a second data signal to the first liquid crystal capacitor through the second data line. One of the first and second data signals is a positive data voltage, and the other is a negative data voltage.

In order to make the above-mentioned contents of the present invention more comprehensible, the preferred embodiments are described below, and the detailed description is as follows:

The liquid crystal display of the embodiment of the invention includes a first scan line, a second scan line, a first data line, a second data line, a gate driver, a source driver and a liquid crystal display panel. The gate driver enables the first scan line and the second scan line in a scan period in a first picture period and a scan period in a second picture period, respectively. The source driver outputs a first data signal and a second data signal to the first data line and the second data line, and one of the first and second data signals is positive in the first picture period and the second picture period. The data voltage of the other one of the first picture period and the second picture period is a negative data voltage. The liquid crystal display panel includes a first pixel unit. The first pixel unit includes a liquid crystal capacitor, a first switch and a second switch. The first switch is controlled by the first scan line. When the first scan line is enabled, the first open relationship transmits the first data signal to the liquid crystal capacitor. The second switch is controlled by the second scan line. When the second scan line is enabled, the second switch transmits the second data signal to the liquid crystal capacitor. The liquid crystal display of the embodiment of the present invention will be described in two embodiments.

First embodiment

Referring to FIG. 2, an example of a schematic diagram of a liquid crystal display according to a first embodiment of the present invention is shown. The liquid crystal display 200 includes scan lines GL(1) to GL(N), GR(1) to GR(N), data lines D(1) to D(M+1), a liquid crystal display panel 220, and a gate driver. 240 and one source Polar driver 260. N and M are each a positive integer.

The liquid crystal display panel 220 includes a plurality of pixel units, such as pixel units P1 to P4. The pixel units P1 and P3 are located in the odd pixel column, and the pixel units P2 and P4 are located in the even pixel column. The pixel unit P1 includes a liquid crystal capacitor Clc1, switches T1 and T1'. The pixel unit P2 includes a liquid crystal capacitor Clc2, switches T2 and T2'. The pixel unit P3 includes a liquid crystal capacitor Clc3, switches T3 and T3'. The pixel unit P4 includes a liquid crystal capacitor Clc4, switches T4 and T4'.

Both switches T1 and T3 are controlled by scan line GL(1). When the gate driver 240 enables the scan line GL(1), the switches T1 and T3 store the pixel voltages transmitted from the data lines D(1) and D(2) to the liquid crystal capacitors Clc1 and Clc3, respectively. The switches T1' and T3' are controlled by the scanning line GR(1). When the gate driver 240 enables the scan line GR(1), the switches T1' and T3' store the pixel voltages transmitted from the data lines D(2) and D(3) to the liquid crystal capacitors Clc1 and Clc3, respectively.

Similarly, switches T2 and T4 are both controlled by scan line GL(2). When the gate driver 240 enables the scan line GL(2), the switches T2 and T4 store the pixel voltages transmitted from the data lines D(1) and D(2) to the liquid crystal capacitors Clc2 and Clc4, respectively. The switches T2' and T4' are controlled by the scanning line GR(2). When the gate driver 240 enables the scan line GR(2), the switches T2' and T4' store the pixel voltages transmitted from the data lines D(2) and D(3) to the liquid crystal capacitors Clc2 and Clc4, respectively.

The source driver 260 outputs one of a positive polarity pixel voltage and a negative polarity pixel voltage to an odd data line, for example, D(1), D(3), and The positive polarity pixel voltage and the negative polarity pixel voltage are outputted from the other to the even data lines, for example, D(2), D(4), and the pixel voltage polarity of all data lines is kept constant, and does not follow the picture time. And change. In the present embodiment, the positive polarity pixel voltage is transmitted by an odd data line, and the negative polarity pixel voltage is transmitted by an even data line. That is, the data lines D(1) and D(3) transmit the positive polarity pixel voltage, while the data lines D(2) and D(4) transmit the negative polarity pixel voltage, which does not change with the picture time.

The operation of the liquid crystal display of the first embodiment will be described. Please also refer to FIG. 3, which is a timing diagram of the gate lines enabled by the gate driver of FIG. The liquid crystal display 200 displays one picture in a first picture period Tf1 and a second picture period Tf2, respectively.

The gate driver 240 sequentially enables the scan lines GL(1) and GR(2) in two consecutive scan periods in the first picture period Tf1. When the scan line GL(1) is enabled, that is, when the voltage on the scan line GL(1) is at a high level, the other scan lines are disabled, that is, the voltages on the other scan lines are at a low level. During the enable of the scanning line GL(1), the switches T1 and T3 in the pixel units P1 and P3 are turned on, and the positive polarity pixel voltage and the negative electrode transmitted from the data lines D(1) and D(2), respectively. The pixel voltage is stored to the liquid crystal capacitors Clc1 and Clc3.

In addition, the scanning line GR(1) is disabled during the period in which the scanning line GL(1) is enabled. Therefore, the switches T1' and T3' in the pixel units P1 and P3 are turned off. Therefore, the switches T1' and T3' do not store the pixel voltages of the data lines D(2) and D(3) to the liquid crystal capacitors Clc1 and Clc3, respectively. Therefore, in the first picture period Tf1, the liquid crystal capacitors Clc1 of the pixel units P1 and P3 And Clc3 stores the positive polarity and the negative polarity pixel voltage, respectively.

Next, the scan line GL(1) is turned into a disable, and the scan line GR(2) is turned into an enable. During the enable of the scan line GR(2), the switches T2' and T4' in the pixel units P2 and P4 are turned on, and the negative polarity pixel voltages transmitted from the data lines D(2) and D(3), respectively. The voltage with the positive polarity pixel is stored to the liquid crystal capacitors Clc2 and Clc4.

In addition, the scanning line GL(2) is disabled during the enable of the scanning line GR(2). Therefore, the switches T2 and T4 in the pixel units P2 and P4 are off. Therefore, the switches T2 and T4 do not store the pixel voltages of the data lines D(1) and D(2) to the liquid crystal capacitors Clc2 and Clc4, respectively. Therefore, in the first picture period Tf1, the liquid crystal capacitors Clc2 and Clc4 of the pixel units P2 and P4 respectively store the negative polarity and the positive polarity pixel voltage.

In the first picture period Tf1, the enabling order of the other scanning lines is similar to the above. For example, as shown in FIG. 3, after the scan lines GL(1) and GR(2) are sequentially enabled, the gate driver 240 enables the scan lines GL(3) and GR(4) to respectively Corresponding pixel unit.

The gate driver 240 sequentially enables the scan lines GR(1) and GL(2) in two consecutive scan periods in the second picture period Tf2 after the first picture period Tf1. Similarly, during the enable of the scan line GR(1), the switches T1' and T3' in the switching pixel units P1 and P3 are turned on, respectively, and the negative electrodes transmitted from the data lines D(2) and D(3), respectively. The pixel voltage and the positive pixel voltage are stored to the liquid crystal capacitors Clc1 and Clc3. During this period, the scanning line GL(1) is disabled, so the switches T1 and T3 in the pixel units P1 and P3 are off. Therefore, switches T1 and T3 will not be separately funded. The pixel voltages of the material lines D(1) and D(2) are stored to the liquid crystal capacitors Clc1 and Clc3.

Next, the scanning line GR(1) is turned into non-enabling, and the scanning line GL(2) is turned into enabling. During the enable of the scanning line GL(2), the switches T2 and T4 in the pixel units P2 and P4 are turned on, and the positive polarity pixel voltage and the negative electrode transmitted from the data lines D(1) and D(2), respectively. The pixel voltage is stored to the liquid crystal capacitors Clc2 and Clc4. During this period, the scanning line GR(2) is disabled, so the switches T2' and T4' in the pixel units P2 and P4 are off. Therefore, the switches T2' and T4' do not store the pixel voltages of the data lines D(2) and D(3) to the liquid crystal capacitors Clc2 and Clc4, respectively.

In the second picture period Tf2, the enabling order of the other scanning lines is similar to the above. For example, as shown in FIG. 3, after the scan lines GR(1) and GL(2) are sequentially enabled, the gate driver 240 enables the scan lines GR(3) and GL(4) to respectively Corresponding pixel unit.

It can be seen that in one picture period, one switch in each pixel unit is turned on, and the other switch is turned off, so that the pixel unit receives one of the positive polarity and the negative polarity pixel voltage. During the next frame period, one switch in each pixel unit is turned off, and the other switch is turned on, so that the pixel unit receives the other of the positive polarity and negative polarity pixel voltages. Therefore, in the first screen period Tf1, the polarities of the pixel units P1 to P4 are positive polarity, negative polarity, negative polarity, and positive polarity, respectively. In the next screen period Tf2, the polarities of the pixel units P1 to P4 are respectively converted into negative polarity, positive polarity, positive polarity, and negative polarity. Therefore, in this driving mode, the pixel voltages of all the data lines do not need to be changed with the screen time. Change, can still achieve the effect of point reversal. As such, the liquid crystal display of the embodiment of the present invention is more power-saving than the conventional dot-reversed liquid crystal display, and the charging time of the liquid crystal capacitor of each pixel unit is longer.

In the embodiment of the present invention, the gate driver 240 is a bilateral structure including a first side gate driving circuit 240L and a second side gate driving circuit 240R. The first side gate driving circuit 240L is used to enable the scanning lines GL(1) to GL(N), and the second side gate driving circuit 240R is used to enable the scanning lines GR(1) to GR(N). In practical applications, the gate driver 240 of the liquid crystal display 200 can also be a single-sided architecture. The gate driver of the unilateral architecture sequentially enables the above 2N scan lines GL(1) to GL(N), GR(1) to GR(N) according to the timing of FIG.

The liquid crystal display 200 described above can reduce the power consumption required for the source driver 260 to drive the liquid crystal display panel 220, as explained below. In the conventional architecture of FIG. 1, if the source driver outputs a positive polarity pixel voltage to a data line within one picture period, the negative picture pixel voltage needs to be output to the data line in the next picture period. Each data line is reversed in polarity during each frame period. When switching the polarity of each data line, the traditional architecture of the source driver is very power-hungry.

In this embodiment, each of the data lines D(1) to D(M+1) provides a voltage of a fixed polarity in any period of time, so that the structure of the dot-reversed liquid crystal display panel can be achieved. That is to say, the source driver 260 described in this embodiment does not need to perform polarity inversion for each data line. Therefore, the liquid crystal display 200 of the present embodiment can reduce the required power consumption more than the liquid crystal display 100 of the conventional front and back pixels.

In addition, the liquid crystal display 200 described above can remove the bright lines generated by the conventional liquid crystal display and improve the picture quality. The pixels P1 and P2 in Fig. 2 are taken as an example, and the following is explained. Assuming that the common voltage Vcom is 6V, the positive polarity pixel voltage is greater than 6V and the negative polarity pixel voltage is less than 6V. The voltage on the data line D(1) is always the positive polarity pixel voltage.

In the first picture period Tf1, it is assumed that the liquid crystal capacitors Clc1 and Clc2 of the pixels P1 and P2 have respectively stored a positive polarity and a negative polarity pixel voltage, for example, 10V and 2V. That is, in the pixel unit P1, the voltage of the pixel electrodes of the switches T1 and T1' is 10V; and in the pixel unit P2, the voltage of the pixel electrodes of the switches T2 and T2' is 2V. At this time, if the positive polarity pixel voltage on the data line D(1) is 12V, the electric field between the data line D(1) and the pixel electrode of the pixel unit P2 is 10V (12-2), which is greater than The electric field between the data line D(1) and the pixel electrode of the pixel unit P1 is 2V (12-10). Therefore, in the pixel unit P2, the angle at which the corresponding liquid crystal molecules rotate is large. Therefore, in the picture period Tf1, the luminance of the pixel unit P2 is higher than that of the pixel unit P1.

As can be seen from the above, since the pixel unit P2 in the even pixel column stores the negative polarity pixel voltage and the odd data line D adjacent to the pixel unit P2 in the even pixel column in the picture period Tf1 (1) The positive polarity pixel voltage is transmitted. Therefore, in the pixel unit of the even pixel column, the electric field between the data line D(1) and the pixel electrode is higher than the pixel unit of the odd pixel column, and the data line The electric field between D(1) and the pixel electrode. Therefore, by analogy, the brightness of other pixels in the even-numbered pixels will be higher than the brightness of the pixels in the odd-numbered pixels. Therefore, in the screen period Tf1, the liquid crystal display panel The even-numbered pixels of 220 will be brighter than the odd-numbered columns.

During the picture period Tf2, the liquid crystal capacitors Clc1 and Clc2 of the pixels P1 and P2 respectively store a negative polarity and a positive polarity pixel voltage, assuming 2V and 10V, and the pixel voltage of the data line D(1) is assumed to be 12V. . Therefore, the electric field between the data line D(1) and the pixel electrode of the pixel unit P2 is 2V (12-10), and the electric field between the data line D(1) and the pixel electrode of the pixel unit P1 is 10V. (12-2). Therefore, the electric field of the pixel unit P1 is higher than the electric field of the pixel unit P2. Therefore, in the picture period Tf2, the luminance of the pixel P1 is higher than the pixel P2. Similarly, in the picture period Tf2, the brightness of the odd-numbered pixel columns of the liquid crystal display panel 220 is higher than the brightness of the even-numbered pixel columns.

It can be seen that in the first picture period Tf1, the even pixel column is brighter than the odd pixel column. In the next picture period Tf2, the odd pixel column is brighter than the even pixel column. Since the picture period is very short, under the effect of persistence of vision, the human eye does not feel the brightness of the odd-numbered pixels and the even-numbered columns. Therefore, the user will feel that the liquid crystal display of the present invention has uniform brightness. In contrast, in the conventional liquid crystal display of FIG. 1, the even-numbered pixel columns are always brighter than the odd-numbered pixel columns, and a horizontal bright fine line is produced. Therefore, the liquid crystal display of the embodiment of the present invention effectively solves the problem that the picture in the conventional picture produces a horizontal bright grain of a strip.

Furthermore, in the embodiment of the present invention, each of the data lines transmits a pixel voltage of the same polarity, so that the liquid crystal display of the embodiment of the present invention can effectively reduce the crosstalk phenomenon. In this way, the purpose of improving the picture quality can be achieved.

Second embodiment

Referring to FIG. 4, an example of a schematic diagram of a liquid crystal display 400 in accordance with a second embodiment of the present invention is shown. Similarly, in the second embodiment, the operation of each pixel unit in the liquid crystal display panel 420 will be described by taking the pixel units P1' to P4' of the liquid crystal display panel 420 of the liquid crystal display 400 as an example. Different from the first embodiment, the switches T2 and T4 in the pixel units P2' and P4' are connected to the data lines D(2) and D(3) when the scanning line GL(2) is enabled. The voltage is stored to the liquid crystal capacitors Clc2 and Clc4. The switches T2' and T4' respectively store the data lines D(1) and D(2) pixel voltages to the liquid crystal capacitors Clc2 and Clc4 when the scanning line GR(2) is enabled.

The driving manner of the liquid crystal display 400 of the present embodiment will be described below in conjunction with a timing chart. Please also refer to FIG. 5, which is a timing diagram of the enable of each scan line by the gate driver 440 of FIG.

The gate driver 440 sequentially enables the scan lines GL(1) and GL(2) in two consecutive scan periods in the first picture period Tf1. Like the pixel units P1 and P3 of the first embodiment, the scan line GR(1) is disabled during the enable of the scanning line GL(1). Therefore, the switches T1 and T3 in the pixel units P1' and P3' are turned on, and the switches T1' and T3' are turned off. Therefore, in the first picture period Tf1, the liquid crystal capacitors Clc1 and Clc3 of the pixel units P1' and P3' are respectively stored by the data lines D(1) and D(2) for positive polarity in the first picture period Tf1. With the negative polarity pixel voltage.

Then, the scanning line GL(1) is turned into non-enabling, and the scanning line GL(2) is turned into enabling. The scan line GR(2) is also disabled during the enable of the scan line GL(2). The switches T2 and T4 in the pixel units P2' and P4' The switches T2' and T4' are turned off. Therefore, as in the first embodiment, the negative polarity pixel voltage and the positive polarity pixel voltage on the data lines D(2) and D(3) are transmitted to the liquid crystal capacitors Clc2 and Clc4, respectively.

In the first picture period Tf1, the enabling order of the other scanning lines is similar to the above. For example, in FIG. 5, after the scan lines GL(1) and GL(2) are sequentially enabled, the gate driver 440 enables the scan lines GL(3) and GL(4) to respectively enable the corresponding The pixel unit.

Next, in two consecutive scanning periods in the second picture period Tf2, the gate driver 440 sequentially enables the scanning lines GR(1) and GR(2). Similarly, during the enable of the scan line GR(1), the switches T1' and T3' in the switching pixel units P1' and P3' are turned on, and the switches T1 and T3 are turned off. Therefore, the negative polarity pixel voltage and the positive polarity pixel voltage on the data lines D(2) and D(3) are respectively stored in the liquid crystal capacitors Clc1 and Clc3.

Then, the scanning line GR(1) is turned into non-enabling, and the scanning line GR(2) is turned into enabling. While the scanning line GR(2) is enabled, the switches T2' and T4' in the pixel units P2' and P4' are turned on, and the switches T2 and T4 are turned off. Therefore, the positive polarity pixel voltage and the negative polarity pixel voltage on the data lines D(1) and D(2) are respectively stored in the liquid crystal capacitors Clc2 and Clc4.

In the second picture period Tf2, the enabling order of the other scanning lines is similar to the above. For example, as shown in FIG. 5, after the scan lines GR(1) and GR(2) are sequentially enabled, the gate driver 440 sequentially enables the scan lines GR(3) and GR(4) to Enable the corresponding pixel unit separately.

Similarly, the gate driver 440 can be a single-sided architecture or a bilateral architecture. In the second embodiment, the gate driver 440 is a bilateral architecture, including The first side gate driving circuit 440L and the second side gate driving circuit 440R.

As in the first embodiment, the polarities of the pixel units P1' to P4' are reversed in polarity within one picture period. However, the pixel voltage of all data lines does not need to change with the screen time. Therefore, in this driving mode, the liquid crystal display 400 constructed by the dot inversion liquid crystal display panel can also be realized.

As in the first embodiment, the liquid crystal display of the present embodiment also has the effect of reducing the power consumption required for the source driver to drive the liquid crystal display panel. In addition, the liquid crystal display of the embodiment can also solve the problem that the conventional liquid crystal display has horizontal bright and fine lines and reduce the effect of the crosstalk phenomenon. The reason for this has been detailed above and will not be described here.

In the first and second embodiments, the positive polarity pixel voltage is transmitted by an odd data line, and the negative polarity pixel voltage is transmitted by an even data line. In fact, the odd data line and the even data line can respectively transmit the negative polarity and the positive polarity pixel voltage.

In the liquid crystal display disclosed in the above embodiments of the present invention, the source driver only needs to output a pixel voltage of a fixed polarity to each data line to perform dot inversion. Therefore, the source driver according to the embodiment of the present invention does not need to perform polarity switching on the signal transmitted by each data line, thereby reducing energy consumption. At the same time, the liquid crystal display of the embodiment of the present invention also solves the problem of temperature overheating caused by the frequent switching of the polarity of the pixel voltage by the conventional source driver. In addition, in the liquid crystal display according to the embodiment of the present invention, a large electric field appears alternately between the pixel unit of the odd pixel column and the even pixel column and the adjacent data line. Therefore, the liquid crystal display of the embodiment of the invention The display can solve the problem that the picture of the conventional liquid crystal display produces a strip of horizontal bright lines. In addition, in the embodiment of the present invention, each of the data lines transmits a pixel voltage of the same polarity, so that the liquid crystal display of the embodiment of the present invention can effectively reduce the crosstalk phenomenon. Therefore, the purpose of improving the picture quality can be achieved.

In view of the above, the present invention has been disclosed in a preferred embodiment, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100, 200, 400‧‧‧ liquid crystal display

120, 220, 420‧‧‧ LCD panel

121‧‧‧ odd paintings

122‧‧‧ even paintings

240, 440‧‧ ‧ gate driver

240L, 440L‧‧‧ first side gate drive circuit

240R, 440R‧‧‧second side gate drive circuit

260, 460‧‧‧ source driver

Clc1, Clc2, Clc3, Clc4, Clca, Clcb‧‧‧ liquid crystal capacitors

D(1) to D(M+1)‧‧‧ data line

Tf1‧‧‧ first screen period

Tf2‧‧‧second screen period

G(1) to G(N), GL(1) to GL(N), GR(1) to GR(N)‧‧‧ scan lines

P1 to P4, P1' to P4'‧‧‧ pixel units

Pa, Pb‧‧ pixels

T1 to T4, T1' to T4', Ta, Tb‧‧" switches

Vcom‧‧‧Common voltage

FIG. 1 is a schematic diagram showing a liquid crystal display conventionally constructed using front and back pixels.

2 is a view showing an example of a schematic diagram of a liquid crystal display according to a first embodiment of the present invention.

FIG. 3 is a timing diagram showing the respective scan lines enabled by the gate driver of FIG. 2.

4 is a view showing an example of a schematic diagram of a liquid crystal display according to a second embodiment of the present invention.

Figure 5 is a timing diagram showing the enable of each of the gate drivers of the gate driver of Figure 4.

200‧‧‧LCD display

220‧‧‧LCD panel

240‧‧ ‧ gate driver

240L‧‧‧first side gate drive circuit

240R‧‧‧Second side gate drive circuit

260‧‧‧Source Driver

Clc1 to Clc4‧‧‧Liquid Crystal Capacitors

D(1) to D(M+1)‧‧‧ data line

GL(1) to GL(N), GR(1) to GR(N)‧‧‧ scan lines

P1 to P4‧‧‧ pixel unit

T1 to T4, T1' to T4'‧‧‧ switch

Vcom‧‧‧Common voltage

Claims (17)

A liquid crystal display panel includes: a first scan line for enabling in a scan period in a first picture period, and non-enabling in a second picture period; a second scan line for Enabled during the scan period in the second picture period, not enabled in the first picture period; a first data line for transmitting a first data signal; and a second data line for transmitting a second data line Data signal, one of the first and second data signals is a positive data voltage in the first picture period and the second picture period, and the other is in the first picture period and the second picture period The system is a negative polarity data voltage; and a first pixel unit, comprising: a first liquid crystal capacitor; a first switch controlled by the first scan line, when the first scan line is enabled, the first a switch transmits the first data signal to the first liquid crystal capacitor; and a second switch is controlled by the second scan line, and when the second scan line is enabled, the second switch uses the second data The signal is transmitted to the first liquid crystal capacitor. The liquid crystal display panel of claim 1, wherein the liquid crystal display panel further comprises: a third scan line for enabling in the scan period in the second screen period, in the first screen period Internal non-energy; a fourth scan line for scanning in the first picture period The segment is enabled to be disabled during the second picture period; and a second pixel unit includes: a second liquid crystal capacitor; a third switch controlled by the third scan line, when the third When the scan line is enabled, the third open relationship transmits the first data signal to the second liquid crystal capacitor; and a fourth switch is controlled by the fourth scan line, when the fourth scan line is enabled, The fourth open relationship transmits the second data signal to the second liquid crystal capacitor. The liquid crystal display panel of claim 2, wherein the liquid crystal display panel further comprises: a third data line for transmitting a third data signal; and a third pixel unit comprising: a third liquid crystal a fifth switch, controlled by the first scan line, when the first scan line is enabled, the fifth open relationship transmits the second data signal to the third liquid crystal capacitor; and a sixth switch Controlled by the second scan line, when the second scan line is enabled, the sixth open relationship transmits the third data signal to the third liquid crystal capacitor; and a fourth pixel unit, including: a fourth liquid crystal capacitor; a seventh switch controlled by the third scan line, when the third scan line is enabled, the seventh open relationship transmits the second data signal to the a fourth liquid crystal capacitor; and an eighth switch controlled by the fourth scan line, when the fourth scan line is enabled, the eighth open relationship transmits the third data signal to the fourth liquid crystal capacitor; The first and the second data signal have opposite polarities, and the first and the third data signal have the same polarity. The liquid crystal display panel of claim 1, wherein the liquid crystal display panel further comprises: a third scan line for enabling in the scan period in the first screen period, in the second screen period a second scan line for enabling in a scan period in the second picture period, not enabled in the first picture period; and a second pixel unit including: a first a third liquid crystal capacitor; a third switch controlled by the third scan line, when the third scan line is enabled, the third open relationship transmits the second data signal to the second liquid crystal capacitor; The fourth switch is controlled by the fourth scan line. When the fourth scan line is enabled, the fourth open relationship transmits the first data signal to the second liquid crystal capacitor. The liquid crystal display panel of claim 4, wherein the liquid crystal display panel further comprises: a third data line for transmitting a third data signal; and a third pixel unit comprising: a third liquid crystal capacitance; a fifth switch controlled by the first scan line, when the first scan line is enabled, the fifth open relationship transmits the second data signal to the third liquid crystal capacitor; and a sixth switch Controlling the second scan line, when the second scan line is enabled, the sixth open relationship transmits the third data signal to the third liquid crystal capacitor; and a fourth pixel unit, including: a fourth a liquid crystal capacitor; a seventh switch controlled by the third scan line, when the third scan line is enabled, the seventh open relationship transmits the third data signal to the fourth liquid crystal capacitor; and an eighth a switch, controlled by the fourth scan line, when the fourth scan line is enabled, the eighth open relationship transmits the second data signal to the fourth liquid crystal capacitor; wherein the first and second data are The polarity of the signal is reversed, and the first and the third data signal have the same polarity. A liquid crystal display comprising: a first scan line; a second scan line; a first data line; a second data line; and a gate driver for respectively during a scan period in a first picture period and The first scan line and the second scan line are enabled in a scan period in a second picture period; a source driver for respectively outputting a first data signal and a second data signal to the first data line and the second data line, wherein one of the first and second data signals is in the first picture period And the second picture period is a positive data voltage, wherein the other of the first picture period and the second picture period are negative data voltages; and a liquid crystal display panel comprises: a first picture The prime unit includes: a first liquid crystal capacitor; a first switch controlled by the first scan line, and when the first scan line is enabled, the first open relationship transmits the first data signal to the first a liquid crystal capacitor; and a second switch controlled by the second scan line. When the second scan line is enabled, the second switch transmits the second data signal to the first liquid crystal capacitor. The liquid crystal display of the sixth aspect of the invention, wherein the liquid crystal display further comprises: a third scan line and a fourth scan line, wherein the gate driver is used in the scan period of the second picture period respectively The third scan line and the fourth scan line are enabled in the scan period in the first picture period; and a second pixel unit includes: a second liquid crystal capacitor; and a third switch controlled by the first a third scan line, when the third scan line is enabled, the third open relationship transmits the first data signal to the second liquid crystal capacitor; A fourth switch is controlled by the fourth scan line. When the fourth scan line is enabled, the fourth open relationship transmits the second data signal to the second liquid crystal capacitor. The liquid crystal display of claim 7, wherein the liquid crystal display further comprises: a third data line, the source driver is configured to output a third data signal to the third data line; and a third pixel unit The method includes: a third liquid crystal capacitor; a fifth switch controlled by the first scan line, and when the first scan line is enabled, the fifth open relationship transmits the second data signal to the third liquid crystal And a sixth switch controlled by the second scan line, when the second scan line is enabled, the sixth open relationship transmits the third data signal to the third liquid crystal capacitor; and a fourth The pixel unit includes: a fourth liquid crystal capacitor; a seventh switch controlled by the third scan line, and when the third scan line is enabled, the seventh open relationship transmits the second data signal to the pixel a fourth liquid crystal capacitor; and an eighth switch controlled by the fourth scan line, when the fourth scan line is enabled, the eighth open relationship transmits the third data signal to the fourth liquid crystal capacitor; The first and the second data signal have opposite polarities, the first The polarity is the same as the third data signal. The liquid crystal display of claim 7, wherein the gate driver comprises a first side gate driving circuit and a second side gate driving circuit, wherein the first side gate driving circuit is configured to enable the The first scan line and the third scan line, the second side gate driving circuit is configured to enable the second scan line and the fourth scan line. The liquid crystal display of the sixth aspect of the invention, the liquid crystal display further comprising: a third scan line and a fourth scan line, wherein the gate driver is used in the scan period of the first picture period respectively The third scan line and the fourth scan line are enabled in the scan period of the second picture period; and a second pixel unit includes: a second liquid crystal capacitor; and a third switch controlled by the first a third scan line, when the third scan line is enabled, the third open relationship transmits the second data signal to the second liquid crystal capacitor; and a fourth switch is controlled by the fourth scan line, when the When the fourth scan line is enabled, the fourth open relationship transmits the first data signal to the second liquid crystal capacitor. The liquid crystal display of claim 10, wherein the liquid crystal display further comprises: a third data line, the source driver is configured to output a third data signal to the third data line; and a third pixel unit The method includes: a third liquid crystal capacitor; a fifth switch controlled by the first scan line, when the first When the scan line is enabled, the fifth open relationship transmits the second data signal to the third liquid crystal capacitor; and a sixth switch is controlled by the second scan line, when the second scan line is enabled, The sixth open relationship transmits the third data signal to the third liquid crystal capacitor; and a fourth pixel unit, comprising: a fourth liquid crystal capacitor; and a seventh switch controlled by the third scan line When the third scan line is enabled, the seventh open relationship transmits the third data signal to the third liquid crystal capacitor; and an eighth switch is controlled by the fourth scan line, when the fourth scan line is caused The eighth open relationship transmits the second data signal to the third liquid crystal capacitor; wherein the first and the second data signals have opposite polarities, and the first and the third data signals have the same polarity. The liquid crystal display of claim 10, wherein the gate driver comprises a first side gate driving circuit and a second side gate driving circuit, wherein the first side gate driving circuit is configured to enable the The first scan line and the third scan line, the second side gate driving circuit is configured to enable the second scan line and the fourth scan line. The liquid crystal display panel of claim 12, wherein the first side gate driving circuit is configured to sequentially enable the first scan line and the third in a scan period in the first picture period. a scan line, the second side gate driving circuit is configured to sequentially enable the second scan line and the fourth scan line during the scan period in the second picture period. For example, the liquid crystal display panel described in claim 12, The first side gate driving circuit is configured to enable the first scan line in a scan period in the first picture period, and enable the third scan line in a scan period in the second picture period The second side gate driving circuit is configured to enable the second scan line during the scan period in the second picture period, and enable the fourth scan line in the scan period of the first picture period. A driving method for driving a liquid crystal display, the liquid crystal display comprising a first scan line, a second scan line, a first data line, a second data line and a first pixel unit, the first picture The prime unit includes a first switch, a second switch, and a first liquid crystal capacitor. The control ends of the first and second switches are respectively coupled to the first and second scan lines, and the first and second switches are respectively The first and the second data lines are respectively coupled to the first and second data lines, and the second ends of the first and second switches are coupled to the first liquid crystal capacitor. The driving method comprises: (a) in a first picture period Enabling the first scan line during the scan period to turn on the first switch, transmitting a first data signal to the first liquid crystal capacitor through the first data line; and (b) scanning in a second picture period The second scan line is enabled to turn on the second switch to transmit a second data signal to the first liquid crystal capacitor through the second data line; wherein one of the first and second data signals is The first picture period and the second picture period are both positive Of a data voltage, wherein the other of the first frame period in the second frame period are both negative data line voltage. The driving method of claim 15, wherein the liquid crystal display further comprises a third scan line, a fourth scan line, and a first a second pixel unit, the second pixel unit further includes a third switch, a fourth switch and a second liquid crystal capacitor, wherein the control ends of the third and fourth switches are respectively coupled to the third and fourth scan lines The first ends of the third and fourth switches are respectively coupled to the first and the second data lines, and the second ends of the third and fourth switches are coupled to the second liquid crystal capacitor, wherein, in the step (a) And (b), the driving method further includes: (a1) enabling the fourth scan line during the scan period in the first picture period to turn on the fourth switch and transmitting the second data line The second data signal is sent to the second liquid crystal capacitor; and wherein, after the step (b), the driving method further comprises: (b1) enabling the third scan line during the scan period in the second picture period, The third data switch is turned on, and the first data signal is transmitted to the second liquid crystal capacitor through the first data line. The driving method of claim 16, wherein the liquid crystal display further comprises a third scan line, a fourth scan line, and a second pixel unit, wherein the second pixel unit further comprises a third a switch, a fourth switch, and a second liquid crystal capacitor, wherein the control ends of the third and fourth switches are respectively coupled to the third and fourth scan lines, and the first ends of the third and fourth switches are respectively coupled to the And the second data line, the second end of the third and fourth switches are coupled to the second liquid crystal capacitor, wherein between the steps (a) and (b), the driving method further comprises: (a1 The fourth scan line is enabled in the scan period of the first picture period to turn on the fourth switch, and the first data signal is transmitted to the second liquid crystal capacitor through the first data line; and wherein After the step (b), the driving method further includes: (b1) enabling the third in the scanning period in the second picture period And a switch for turning on the third switch, and transmitting the second data signal to the second liquid crystal capacitor through the second data line.