TWI402923B - - Google Patents

Info

Publication number
TWI402923B
TWI402923B TW099106657A TW99106657A TWI402923B TW I402923 B TWI402923 B TW I402923B TW 099106657 A TW099106657 A TW 099106657A TW 99106657 A TW99106657 A TW 99106657A TW I402923 B TWI402923 B TW I402923B
Authority
TW
Taiwan
Application number
TW099106657A
Other languages
Chinese (zh)
Other versions
TW201131670A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to TW099106657A priority Critical patent/TW201131670A/zh
Publication of TW201131670A publication Critical patent/TW201131670A/zh
Application granted granted Critical
Publication of TWI402923B publication Critical patent/TWI402923B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Dicing (AREA)
TW099106657A 2010-03-08 2010-03-08 Manufacturing method and structure of surface mount diode component of silicon chip-substrate integrated packaging TW201131670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW099106657A TW201131670A (en) 2010-03-08 2010-03-08 Manufacturing method and structure of surface mount diode component of silicon chip-substrate integrated packaging

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW099106657A TW201131670A (en) 2010-03-08 2010-03-08 Manufacturing method and structure of surface mount diode component of silicon chip-substrate integrated packaging

Publications (2)

Publication Number Publication Date
TW201131670A TW201131670A (en) 2011-09-16
TWI402923B true TWI402923B (enrdf_load_stackoverflow) 2013-07-21

Family

ID=49225975

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099106657A TW201131670A (en) 2010-03-08 2010-03-08 Manufacturing method and structure of surface mount diode component of silicon chip-substrate integrated packaging

Country Status (1)

Country Link
TW (1) TW201131670A (enrdf_load_stackoverflow)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3489961A (en) * 1966-09-29 1970-01-13 Fairchild Camera Instr Co Mesa etching for isolation of functional elements in integrated circuits
US4016593A (en) * 1974-06-07 1977-04-05 Hitachi, Ltd. Bidirectional photothyristor device
JPS6260234A (ja) * 1985-09-09 1987-03-16 Fuji Electric Co Ltd 半導体ダイオ−ド素子の製造方法
US4667189A (en) * 1984-04-25 1987-05-19 Energy Conversion Devices, Inc. Programmable semiconductor switch for a display matrix or the like and method for making same
US6617670B2 (en) * 2000-03-20 2003-09-09 Sarnoff Corporation Surface PIN device
US20070221944A1 (en) * 2005-11-15 2007-09-27 Myung Cheol Yoo Light emitting diodes and fabrication methods thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3489961A (en) * 1966-09-29 1970-01-13 Fairchild Camera Instr Co Mesa etching for isolation of functional elements in integrated circuits
US4016593A (en) * 1974-06-07 1977-04-05 Hitachi, Ltd. Bidirectional photothyristor device
US4667189A (en) * 1984-04-25 1987-05-19 Energy Conversion Devices, Inc. Programmable semiconductor switch for a display matrix or the like and method for making same
JPS6260234A (ja) * 1985-09-09 1987-03-16 Fuji Electric Co Ltd 半導体ダイオ−ド素子の製造方法
US6617670B2 (en) * 2000-03-20 2003-09-09 Sarnoff Corporation Surface PIN device
US20070221944A1 (en) * 2005-11-15 2007-09-27 Myung Cheol Yoo Light emitting diodes and fabrication methods thereof

Also Published As

Publication number Publication date
TW201131670A (en) 2011-09-16

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees