TWI401866B - Predicting-type synchronous rectification controller, switching power converter with the predicting-type synchronous rectification controller and controlling method thereof - Google Patents

Description

Predictive synchronous rectification controller, switching power conversion circuit with the same, and control method thereof

The invention relates to a synchronous rectification controller applied to an exchange type power conversion circuit and a control method thereof, in particular to a predictive synchronous rectification controller and a control method thereof.

In the technical field of power conversion, it is a common technical means to use a transistor switch to replace a diode to reduce power consumption.

Figure 1 is a typical power conversion circuit with a secondary side synchronous rectification function. The primary side of the power conversion circuit has a pulse width modulation controller 11 and a main switch 12. The pulse width modulation controller 11 outputs a pulse signal to control the on/off of the main switch 12 in accordance with the feedback signal from the isolated feedback device 13. The secondary side of the power conversion circuit has a synchronous rectification switch 15 and a primary side synchronous rectification controller 20. The secondary side synchronous rectification controller 20 controls the on or off of the synchronous rectification switch 15 in accordance with the signal from the secondary side winding 142 of the transformer 14.

When the main switch 12 is turned on, the DC input terminal VIN supplies power to the primary side winding 140 of the transformer 14. At the same time, the synchronous rectification switch 15 is rendered off. Therefore, power from the DC input terminal VIN is stored in the transformer 14. Subsequently, when the main switch 12 is turned off, the secondary side synchronous rectification controller 20 detects a change in the polarity of the voltage of the secondary side winding 142, and controls the synchronous rectification switch 15 to be turned on. At this time, the transformer 14 starts to release the stored energy to the output terminal VO and the filter capacitor 16.

It is worth noting that the secondary side synchronous rectification controller 20 must accurately control the duty cycle of the synchronous rectification switch 15 to simulate the operation of the diode, avoiding loss of conversion efficiency or causing the switch to burn. In the power conversion circuit of Fig. 1, the primary side switch 12 on the primary side and the synchronous rectifier switch 15 on the secondary side must be alternately turned on. In order to prevent the on-time of the main switch 12 from being overlapped with the synchronous rectification switch 15, a dead time must be reserved between the on-time of the main switch 12 and the on-time of the synchronous rectification switch 15. That is, during this dead time, both the main switch 12 and the synchronous rectification switch 15 are turned off.

The secondary side synchronous rectification controller 20 in Fig. 1 employs a complicated digital control method to calculate the dead time. As shown in the figure, the secondary side synchronous rectification controller 20 has a clock buffer unit 22, a digital turn-off controller 24 and an output driving unit 26.

Fig. 2 is a block diagram showing the digital cutoff controller 24 in Fig. 1. As shown in the figure, the digital cut-off controller 24 includes an oscillating unit 242, a first counter 243, a second counter 244, a limited state control unit 246, and an output control unit 248. . The first counter 243 and the second counter 244 are both counters that can be counted up and down. The oscillating unit 242 is configured to generate an internal counting clock signal CLK for counting by the first counter 243 and the second counter 244. The limited state control means 246 receives the external synchronization signal SYNC and controls the counting period of the first counter 242 and the second counter 243 in accordance with the external synchronization signal Sync. The external sync signal Sync is the output signal of the secondary side winding 142 of the transformer 14.

Figure 3 is a waveform diagram of the control signals in the controller 24 of the off-controller. Referring to FIG. 2 simultaneously, when the state control device 246 detects the leading edge of the first switching period TS1 of the external synchronization signal Sync, the first counter 242 is controlled to start counting until the limited state control device 246 detects the external synchronization. The leading edge of the second switching cycle TS2 of the signal Sync. Subsequently, the limited state control device 246 controls the first counter 242 to start counting down until the limited state control device 246 detects the leading edge of the third switching period TS3 of the external synchronization signal Sync. Assuming that the first counter 242 counts up to n in the first switching period TS1, when the first counter 242 counts down to nx, the limited state control device 246 generates an output cutoff signal, and the control output control unit 248 stops outputting the pilot number ( That is, the high-level driving signal OUT). The value of x is the counted number of preset dead time times, and the size can be set by the dead zone setting terminal DTS.

In addition, when the limited state control device 246 detects the leading edge of the second switching period TS2 of the external synchronization signal Sync, the second counter 243 is simultaneously controlled to start counting until the limited state control device 246 detects the external synchronization signal Sync. The leading edge of the third switching period TS3. The second counter 243 is similar in operation to the first counter 242. In the third switching period TS3, the limited state control means 246 generates an output cutoff signal according to the number of counts of the second counter 243, and the control output control unit 248 stops outputting the pilot number.

The secondary side synchronous rectification controller 20 utilizes the number of counters 242, 243 above and the number of passes to effectively predict the on-time of the synchronous rectification switch in the next switching cycle while maintaining a substantially fixed dead time. However, the circuit design of the secondary side synchronous rectification controller 20 is quite complicated, and the manufacturing cost is not easily reduced.

One of the main objects of the present invention is to solve the problem that the conventional predictive secondary side synchronous rectification controller has a complicated circuit structure and proposes a solution.

Another main object of the present invention is to provide an analog type secondary side synchronous rectification controller that can accurately control the dead time to avoid a decrease in power conversion efficiency or cause a switch to burn out.

In order to achieve the foregoing objective, an embodiment of the present invention provides a predictive synchronous rectification controller for controlling at least one switch. The synchronous rectification controller has a sawtooth generator, a peak sampling unit, and an output control unit. The sawtooth generator receives a synchronization signal to generate a sawtooth signal. The peak sampling unit captures a peak voltage of one of the sawtooth signals to generate a reference voltage signal. The output control unit compares the sawtooth wave signal with the reference voltage signal to generate a synchronous rectification control signal to control the conduction state of the switch.

An embodiment of the present invention provides a power conversion circuit having a predictive synchronous rectification function. The power conversion circuit has a transformer, a synchronous rectification switch and a predictive secondary side synchronous rectification controller. Wherein, the transformer comprises a primary side winding and a primary side winding. A synchronous rectification relationship is connected to the secondary side winding. The predictive secondary side synchronous rectification controller is used to control the synchronous rectification switch. The secondary side synchronous rectification controller has a sawtooth generator, a peak sampling unit and an output control unit. The sawtooth generator receives a sync signal to generate a sawtooth signal. The peak sampling unit captures a peak voltage of one of the sawtooth signals to generate a reference voltage signal. The output control unit compares the sawtooth wave signal with the reference voltage signal to generate a synchronous rectification control signal to control the conduction state of the synchronous rectification switch.

An embodiment of the present invention provides a predictive synchronous rectification control method for controlling a synchronous rectification switch of a power conversion circuit. The predictive synchronous rectification control method comprises at least the following steps: (a) generating a sawtooth wave signal with the same period according to a synchronous signal; and (b) generating a peak voltage of the sawtooth wave signal according to a peak period of the sawtooth wave signal. a gradually attenuating reference voltage signal, the maximum voltage of one of the reference voltage signals being less than the peak voltage of the sawtooth wave signal; and (c) comparing the reference voltage signal with the sawtooth wave signal of the next cycle to generate a synchronous rectification control signal, Controls the conduction state of the synchronous rectification switch.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

The invention is a predictive synchronous rectification controller and method. The control circuit and control method can be applied to the control of a flyback, forward, half bridge or full bridge topology in Current Continuous Mode (CCM). In addition, the predictive synchronous rectification controller of the present invention adopts a simple analog circuit to control the on-period of the synchronous rectification switch, and is suitable for the secondary side synchronous rectification control of the switching power supply of various fixed frequencies.

The predictive synchronous rectification controller of the invention generates a sawtooth wave signal according to the primary side side synchronization signal, and captures the peak voltage of the sawtooth wave signal to generate a corresponding reference voltage, and the reference voltage and the next duty cycle The sawtooth wave signals are compared to generate a dead zone signal, and the synchronous rectifier switch is turned off.

Fig. 4 is a circuit diagram showing a first embodiment of the synchronous rectification power conversion circuit of the present invention. This embodiment is a flyback power conversion circuit. As shown in the figure, the primary side of the power conversion circuit has a pulse width modulation controller 31 and a main switch 32. The pulse width modulation controller 31 outputs a pulse signal to control the on or off of the main switch 32 in accordance with the feedback signal from the isolated feedback device 33. The secondary side of the power conversion circuit has a synchronous rectification switch 35 and a primary side synchronous rectification controller 40. The secondary side synchronous rectification controller 40 controls the conduction state of the synchronous rectification switch 32 according to a synchronization signal Sync0 corresponding to the pulse signal of the primary side. In the present embodiment, the secondary side synchronous rectification controller 40 controls the on or off of the synchronous rectification switch 35 in accordance with a synchronization signal Sync0 from the secondary side auxiliary winding 344 of the transformer 34. The high-low potential change of the synchronous signal Sync0 is opposite to the pulse signal of the primary side.

When the pulse signal control main switch 32 is turned on, the DC input terminal VIN supplies power to the primary side winding 341 of the transformer 34. At the same time, the secondary side synchronous rectification controller 40 controls the synchronous rectification switch 35 to be turned off. Therefore, power from the DC input terminal VIN is stored in the transformer 34. Subsequently, when the pulse signal control main switch 32 is turned off, the potential of the sync signal Sync0 changes. After detecting the change in the potential of the synchronization signal Sync0, the secondary side synchronous rectification controller 40 controls the synchronous rectification switch 35 to be turned on. At this point, transformer 34 begins to release stored energy to output VO and filter capacitor 36.

Fig. 6 is a circuit diagram showing a first embodiment of the secondary side synchronous rectification controller 40 of Fig. 4. As shown in the figure, the secondary side synchronous rectification controller 40 has a sawtooth wave generator 42, a peak sampling unit 44, an output control unit 46 and an output driving unit 48. The sawtooth generator 42 receives a sync signal Sync0 to generate a sawtooth signal Ramp. The peak sampling unit 44 captures a peak voltage of the sawtooth wave signal Ramp to generate a reference voltage signal PS. The output control unit 46 compares the sawtooth wave signal Ramp with the reference voltage signal PS to generate a synchronous rectification control signal SRC. The output driving unit 48 generates a driving signal OUT according to the synchronous rectification control signal SRC, and controls the conduction state of the synchronous rectification switch 35.

The sawtooth generator 42 has a sawtooth generating capacitor 422, a charging power source 424 and a reset switch 426. The charging power source 424 is configured to charge the sawtooth generating capacitor 422 to generate a sawtooth wave signal Ramp. The rising slope of the sawtooth wave signal Ramp is controlled by the sawtooth wave generating capacitance 422. The reset switch 426 is used to bleed the charge stored by the sawtooth generating capacitor 422. The turn-on state of the reset switch 426 is controlled by the sync signal Sync0. In the present embodiment, the charging power source 424 is a constant current source. However, the present invention is not limited thereto, and the charging power source may also be a certain voltage source.

The peak sampling unit 44 has a holding capacitor 442, a bleeder element 444 and a reference bias source 446. The holding capacitor 442 is for storing the sawtooth wave signal Ramp from the sawtooth wave generator 42. The bleeder element 444 is for discharging the charge stored in the holding capacitor 442. The output signal of one of the high voltage terminals of the holding capacitor is the aforementioned reference voltage signal PS. The reference bias source 446 is disposed between the holding power source 442 and the sawtooth wave generator 42 for lowering the voltage of the sawtooth wave signal Ramp outputted by the sawtooth wave generator 42 so that the maximum voltage stored by the holding capacitor 442 is smaller than the sawtooth. The peak voltage of the wave signal Ramp. The bleeder element 444 of this embodiment is a bleeder impedance. However, the present invention is not limited thereto, and the bleeder element 444 may also be a constant current source or other input equivalent impedance.

The output control unit 46 has a comparator 462 and a cut-off switch 464. The comparator 462 compares the potential of the sawtooth wave signal Ramp with the predicted reference voltage signal PS to generate a dead time control signal Comp to turn on the cut-off switch 464. The duration of the dead time control signal Comp is the defined dead time. When the cut-off switch 464 is turned on, the potential of the synchronous signal Sync0 which is originally at a high level is pulled low, and the synchronous rectification control signal SRC is generated to the output driving unit 48 to control the on-time of the synchronous rectification switch 35.

Next, the secondary side synchronous rectification controller of this embodiment has a power input terminal VCC. The external power source is supplied to the sawtooth generator 42 and the output drive unit 48 through the power input terminal VCC. Referring to FIG. 4 at the same time, in the present embodiment, the power input terminal VCC is connected to the primary side auxiliary winding 344. However, the invention is not limited thereto. This power input terminal VCC can also be connected to other DC power supplies.

Fig. 7 is a control waveform diagram of the synchronous rectification controller of Fig. 6. As shown in the figure, in the first secondary side conduction period ta1, the synchronization signal Sync0 is at a high potential, and the reset switch 426 is in an off state. At this time, the charging power source 424 charges the sawtooth wave generating capacitor 422 to gradually increase the potential of the high voltage end of the sawtooth wave generating capacitor 422 (that is, the potential of the sawtooth wave signal Ramp). Subsequently, when entering the first primary side conduction period tb1, the synchronization signal Sync0 transitions to a low potential. At this time, the reset switch 426 is turned on, and the sawtooth wave generating capacitor 422 is rapidly discharged to form the sawtooth wave signal Ramp. Subsequently, when entering the second secondary side conduction period ta2, the synchronization signal Sync0 is reset to a high potential, and the reset switch 426 is turned off again to recharge the sawtooth generation capacitor 422.

The voltage of the sawtooth wave signal Ramp is stored to the holding capacitor 442 through the reference bias source 446. The bias voltage Vr provided by the reference bias source 446 causes the maximum voltage stored by the holding capacitor 442 to be less than the peak voltage of the sawtooth signal Ramp. When entering the first primary side conduction period tb1, the potential of the sawtooth wave signal Ramp is rapidly lowered. In contrast, since the charge in the holding capacitor 442 is slowly released through the bleeder element 444 having a high impedance, the potential of the predicted reference voltage signal PS outputted from the high voltage terminal of the holding capacitor 442 gradually decreases gradually.

After entering the second secondary side conduction period ta2, the potential of the sawtooth wave signal Ramp rises again. However, the potential of the predicted reference voltage signal PS is still slowly decreasing. Initially, the potential of the sawtooth signal Ramp is still lower than the potential of the predicted reference voltage signal PS. As the potential of the sawtooth wave signal Ramp gradually rises, at a certain time point, when the potential of the sawtooth wave signal Ramp rises above the potential of the predicted reference voltage signal PS, the comparator 462 then generates a dead time control signal Comp. The dead time control signal Comp is used to adjust the length of the second secondary side conduction period ta2 of the synchronization signal Sync0 to generate the synchronous rectification control signal SRC.

This high potential dead time control signal Comp continues until the second primary side conduction period ta2 begins. As shown in the figure, the rising point of the synchronous rectification control signal SRC is the same as the synchronization signal Sync0. However, the timing of the falling portion of the synchronous rectification control signal SRC is determined by the dead time control signal Comp.

The dead time control signal Comp defines a dead time td in the secondary side conduction period ta1, ta2, ta3. As shown in the figure, the dead time corresponding to the second on period (including the second primary side conduction period tb2 and the second secondary side conduction period ta2) is a comparison with the predicted reference voltage signal PS corresponding to the second conduction period. It is determined by the sawtooth wave signal Ramp of the second secondary side conduction period ta2. The maximum voltage of the predicted reference voltage signal PS of the second conduction period is determined by the peak voltage of the sawtooth wave signal Ramp corresponding to the first secondary side conduction period ta1.

During each conduction period, the rising slope of the sawtooth wave signal Ramp and the falling slope of the predicted reference voltage signal PS are both maintained constant. Therefore, the duration of the high potential synchronous rectification control signal SRC of each on period is determined by the peak voltage of the sawtooth signal Ramp of the previous on period, that is, by the length of time of the previous secondary side conduction period.

The rising slope of the sawtooth wave signal Ramp can be adjusted by changing the capacitance value of the sawtooth wave generating capacitor 422. The falling slope of the predicted reference voltage signal PS can be adjusted through the bleeder element 444 and the holding capacitor 442. The length of the dead time can be adjusted by changing the rising slope of the sawtooth signal Ramp and the falling slope of the predicted reference voltage signal PS. The larger the capacitance value of the sawtooth wave generating capacitor 422, the larger the impedance of the bleeder element 444, the larger the capacitance value of the holding capacitor 442, and the shorter the dead time.

Fig. 5 is a circuit diagram showing a second embodiment of the synchronous rectification flyback power conversion circuit of the present invention. In the embodiment of FIG. 4, the synchronous rectification switch 35 is disposed between the secondary side winding 342 and the ground. The synchronous rectification switch 35 of the embodiment is disposed on the secondary side winding 342 and the output end VO. between. In addition, in the embodiment of FIG. 4, the secondary side synchronous rectification controller 40 is connected to the auxiliary winding 344 to extract the required electric energy, and the secondary side synchronous rectification controller 40 of the present embodiment is connected to The secondary side winding 342, the auxiliary winding 344 is also changed in series to the output of the secondary side winding 342. Although the circuit connection is different, the operation principle of the secondary side synchronous rectification controller 40 of the present embodiment is substantially the same as that of the embodiment of FIG. 4, and details are not described herein.

Figure 8 is a circuit diagram of a second embodiment of the secondary side synchronous rectification controller of the present invention. Figure 9 is a waveform diagram of the corresponding control signal. Compared with the embodiment of FIG. 6, the sawtooth wave generator 42 of the embodiment has a trailing edge triggering unit 427 for capturing the edge of the synchronization signal Sync0 to generate a trailing edge trigger pulse wave FTP control reset. Switch 426 is turned "on" to cause sawtooth generation capacitor 422 to discharge. In addition, the sawtooth wave generator 42 of FIG. 6 controls the reset switch 426 to perform periodic conduction by the synchronization signal Sync0 to generate a discontinuous sawtooth wave signal Ramp. In contrast, the present embodiment utilizes the trigger pulse wave FTP to turn on the reset switch 426 to greatly shorten the on-time of the reset switch 426 to generate an approximately continuous sawtooth wave signal Ramp. The operation of the other parts of the secondary side synchronous rectification controller is substantially the same as that of the embodiment of Fig. 6, and will not be described herein.

Figure 10 is a circuit diagram showing a third embodiment of the synchronous rectification power conversion circuit of the present invention. This embodiment is a forward power conversion circuit. The difference from the flyback power conversion circuit of the first embodiment of the present invention is that the polarity of the secondary side winding 542 of the present embodiment is different from that of the secondary side winding 342 of the first embodiment, and the synchronous rectifier switch of this embodiment The setting position of 55 is different from that of the synchronous rectification switch 35 of the first embodiment. The synchronous rectification switch 55 and the secondary side winding 542 form a loop. Further, an inductor 56 is connected between the synchronous rectification switch 55 and the filter capacitor 36. Further, the present embodiment omits the auxiliary winding 344 in the first embodiment.

Next, in the present embodiment, the secondary side synchronous rectification controller 60 is connected to the front end of the secondary side rectifying diode 57 to capture the synchronizing signal Sync1. Compared with the embodiment of FIG. 4 and FIG. 5, the synchronization signal Sync1 has the opposite change of the high and low potentials of the pulse signal on the primary side. In this embodiment, the sync signal Sync1 is consistent with the high and low potential changes of the pulse signal on the primary side. That is to say, in the primary side conduction period, the synchronization signal Sync1 will assume a high potential instead of a low potential.

Fig. 11 is a view showing the waveform of the control signal for converting the sync signal Sync1 in Fig. 10 into the dead time control signal Comp to control the on state of the synchronous rectification switch 55 by the secondary side synchronous rectification controller of the present invention. The embodiment different from FIG. 9 controls the reset switch 426 to be turned on by using a trailing edge trigger to form a sawtooth wave signal Ramp. Since the synchronization signal Sync1 of the embodiment is consistent with the high and low potential changes of the pulse signal on the primary side, the Rising Edge triggering mode is generated in the embodiment to generate a leading edge trigger pulse RTP control reset switch to be turned on to form Sawtooth signal Ramp. The principle of the generation of the dead time control signal Comp and the synchronous rectification control signal SRC in this embodiment is substantially the same as the embodiment of the sixth and ninth embodiments, and will not be described herein.

The invention utilizes the on-period defined by the synchronous signal Sync0, Sync1, generates a sawtooth wave signal Ramp, uses the peak sampling technique to capture the peak voltage of the sawtooth wave signal Ramp, and sets a reference bias voltage Vr to generate a dead time control signal Comp . Therefore, the present invention can replace the conventional complicated digital control circuit. Secondly, since the peak voltage drawn by the peak sampling technique of the present invention varies depending on the length of the actual duty cycle, it can be adapted to the actual duty cycle. The length of the dead time can be set by the sawtooth wave generating capacitor 422 and the holding capacitor 442. In summary, the secondary side synchronous rectification controller of the present invention is a predictive control method that captures the sawtooth wave signal of the previous cycle to set the dead time. Therefore, it can be applied to a high-efficiency power supply control under conditions in which the operating frequency deviation is large and the power supply voltage variation range is large.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

11,31. . . Pulse width modulation controller

12,32. . . Main switch

13,33. . . Feedback device

15,35. . . Synchronous rectifier switch

20. . . Secondary side synchronous rectification controller

14. . . transformer

141. . . Primary side winding

142. . . Secondary side winding

VIN. . . Input

VO. . . Output

16,36. . . Filter capacitor

twenty two. . . Clock buffer unit

twenty four. . . Digital cutoff controller

26. . . Output drive unit

242. . . Oscillation unit

243. . . First counter

244. . . Second counter

246. . . Limited state control device

248. . . Output control unit

CLK. . . Counting clock signals

Sync, Sync0, Sync1. . . Synchronization signal

TS1. . . First switching cycle

TS2. . . Second switching cycle

TS3. . . Third switching cycle

DTS. . . Dead zone setting

40. . . Secondary side synchronous rectification controller

34. . . transformer

341. . . Primary side winding

342. . . Secondary side winding

344. . . Auxiliary winding

42. . . Sawtooth generator

44. . . Peak sampling unit

46. . . Output control unit

48. . . Output drive unit

Ramp. . . Sawtooth signal

PS. . . Prediction reference voltage signal

SRC. . . Synchronous rectification control signal

OUT. . . Drive signal

Comp. . . Dead time control signal

FTP. . . Trailing edge triggered pulse wave

RTP. . . Leading edge triggered pulse wave

422. . . Sawtooth generation capacitor

424. . . Charger

426. . . Reset switch

442. . . Holding capacitor

444. . . Drain element

446. . . Reference bias source

462. . . Comparators

464. . . Cut-off switch

427. . . Trailing edge trigger unit

54. . . transformer

541. . . Primary side winding

542. . . Secondary side winding

55. . . Synchronous rectifier switch

56. . . inductance

57. . . Rectifier diode

60. . . Secondary side synchronous rectification controller

Figure 1 is a typical power conversion circuit with a secondary side synchronous rectification function.

Figure 2 is a block diagram of the digital cut-off controller in Figure 1.

Figure 3 shows the waveform of the control signal of the coefficient off controller.

Fig. 4 is a circuit diagram showing a first embodiment of the synchronous rectification power conversion circuit of the present invention.

Fig. 5 is a circuit diagram showing a second embodiment of the synchronous rectification power conversion circuit of the present invention.

Figure 6 is a circuit diagram of a first embodiment of the secondary side synchronous rectification controller of Figure 4;

Fig. 7 is a control waveform diagram of the synchronous rectification controller of Fig. 6.

Figure 8 is a circuit diagram of a second embodiment of the secondary side synchronous rectification controller of the present invention.

Figure 9 is a waveform diagram of a preferred embodiment of the control signal of the secondary side synchronous rectification controller of Figure 8.

Figure 10 is a circuit diagram showing a third embodiment of the synchronous rectification power conversion circuit of the present invention.

Figure 11 is a waveform diagram of a preferred embodiment of the control signal of the secondary side synchronous rectification controller of Figure 10.

31. . . Pulse width modulation controller

32. . . Main switch

33. . . Feedback device

35. . . Synchronous rectifier switch

VIN. . . Input

VO. . . Output

36. . . Filter capacitor

Sync0. . . Synchronization signal

40. . . Secondary side synchronous rectification controller

34. . . transformer

341. . . Primary side winding

342. . . Secondary side winding

344. . . Auxiliary winding

42. . . Sawtooth generator

44. . . Peak sampling unit

46. . . Output control unit

48. . . Output drive unit

Ramp. . . Sawtooth signal

PS. . . Prediction reference voltage signal

OUT. . . Drive signal

Claims (20)

A secondary side synchronous rectification controller for controlling at least one synchronous rectification switch, the secondary side synchronous rectification controller comprising: a sawtooth wave generator, receiving a synchronization signal to generate a sawtooth wave signal; and a peak sampling unit And extracting a peak voltage of the sawtooth wave signal to generate a predicted voltage reference signal whose voltage is gradually decreasing; and an output control unit comparing the sawtooth wave signal and the predicted reference voltage signal to generate a dead time control signal The conduction state of the synchronous rectification switch is controlled. When the potential of the sawtooth wave signal is higher than the potential of the predicted reference voltage signal, the output control unit turns off the synchronous rectification switch. The secondary side synchronous rectification controller of claim 1, wherein the sawtooth wave generator comprises: a sawtooth wave generating capacitor; and a charging power source that generates a capacitance charge to the sawtooth wave to generate the sawtooth wave And a reset switch to bleed the sawtooth wave to generate a charge stored by the capacitor, the reset relationship being controlled by the synchronous signal. The secondary side synchronous rectification controller according to claim 2, wherein the charging power source is a certain current source or a certain voltage source. The secondary side synchronous rectification controller of claim 1, wherein the peak sampling unit comprises: a holding capacitor for receiving the sawtooth wave signal; and a bleeder element for venting and storing The charge of the holding capacitor; wherein a high voltage terminal of the holding capacitor outputs the predicted reference voltage signal. The secondary side synchronous rectification controller of claim 4, wherein the bleeder element is a bleeder impedance or a constant current source. The secondary side synchronous rectification controller of claim 4, wherein the peak sampling unit further comprises a reference bias source for lowering a storage voltage of the holding capacitor to maximize the storage voltage. The value is less than the peak voltage of the sawtooth signal. The secondary side synchronous rectification controller according to claim 1, wherein the synchronous signal is an output signal of the primary side winding. The secondary side synchronous rectification controller according to claim 1, wherein the output control unit generates a synchronous rectification control signal to control an on state of the synchronous rectification switch according to the dead time control signal and the synchronization signal. A power conversion circuit with a secondary side synchronous rectification function, comprising: a transformer comprising a primary side winding and a primary side winding; a synchronous rectification switch connected to the secondary side winding; and a primary stage side synchronous rectification control And the secondary side synchronous rectification controller comprises: a sawtooth wave generator, receiving a synchronization signal to generate a sawtooth wave signal; and a peak sampling unit for capturing the sawtooth wave signal a peak voltage is generated to generate a predicted voltage reference signal whose voltage is gradually decreasing; and an output control unit compares the sawtooth wave signal and the predicted reference voltage signal to generate a dead time control signal to control the conduction state of the synchronous rectifier switch When the potential of the sawtooth wave signal is higher than the potential of the predicted reference voltage signal, the output control unit turns off the switch. The power conversion circuit of claim 9, wherein the sawtooth generator comprises: a sawtooth wave generating capacitor; a charging power source that generates a capacitance charge to the sawtooth wave to generate the sawtooth wave signal; The switch is reset to bleed the sawtooth wave to generate a charge stored by the capacitor, and the reset relationship is controlled by the sync signal. The power conversion circuit of claim 10, wherein the charging power source is a constant current source or a certain voltage source. The power conversion circuit of claim 9, wherein the peak sampling unit comprises: a holding capacitor for receiving the sawtooth wave signal; and a bleeder element for venting and storing the holding capacitor a charge; wherein a high voltage terminal of the holding capacitor outputs the predicted reference voltage signal. The power conversion circuit of claim 12, wherein the bleeder element is a bleeder impedance or a constant current source. The power conversion circuit of claim 12, wherein the peak sampling unit further comprises a reference bias source for lowering a storage voltage of the holding capacitor so that the maximum value of the storage voltage is less than the sawtooth The peak voltage of the wave signal. The power conversion circuit of claim 9, wherein the secondary side synchronous rectification controller comprises a power input terminal connected to the primary side auxiliary winding. The synchronous rectification controller of claim 9, wherein the synchronization signal is one of the output signals of the secondary winding. A predictive synchronous rectification control method for controlling at least one synchronous rectification switch of a switched power conversion circuit includes at least the following steps: generating a sawtooth wave signal of the same period according to a synchronization signal; according to the sawtooth wave signal The peak voltage, under a period of the sawtooth wave signal, generates a predicted voltage reference signal whose voltage is gradually decreasing; and compares the predicted reference voltage signal with the sawtooth wave signal of the next cycle to generate a dead time control signal control The on state of the synchronous rectification switch. The predictive synchronous rectification control method according to claim 17, wherein a maximum voltage of one of the predicted reference voltage signals is smaller than a corresponding peak voltage of the corresponding sawtooth wave signal. The predictive synchronous rectification control method of claim 17, wherein the step of controlling the synchronous rectification switch by using the dead time control signal comprises: capturing the synchronization signal, wherein the synchronization signal defines at least one stage side conduction. a period of time; using the dead time control signal to shorten a length of time of the secondary side conduction period of the corresponding synchronization signal; and controlling the conduction state of the synchronous rectification switch by using the adjusted synchronization signal. The predictive synchronous rectification control method of claim 17, wherein the step of comparing the predicted reference voltage signal with the sawtooth signal of the next period to generate a dead time control signal is based on the prediction reference The dead time control signal is generated when the potential of the voltage signal is lower than the sawtooth signal of the next cycle.