TWI383358B - Circuit and method for eliminating power-off noise of tft panel - Google Patents
Circuit and method for eliminating power-off noise of tft panel Download PDFInfo
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本發明係關於一種薄膜電晶體液晶顯示器(TFT-LCD)面板之關機雜訊消除電路,特別是關於一種消除縱向關機雜訊的電路。The present invention relates to a shutdown noise cancellation circuit for a thin film transistor liquid crystal display (TFT-LCD) panel, and more particularly to a circuit for eliminating vertical shutdown noise.
TFT-LCD面板於關機時為了避免殘影的發生,通常會搭配重置積體電路(reset IC)和閘極驅動器的XAO功能,利用關機瞬間打開面板上所有TFT的方式,將液晶電容儲存的電荷相互中和,來進行關機殘影消除的動作。然而,上述方法並不能解決縱向關機雜訊的問題。In order to avoid the occurrence of afterimages when the TFT-LCD panel is turned off, it is usually used with the reset IC and the XAO function of the gate driver to store the liquid crystal capacitors by turning on all the TFTs on the panel at the moment of shutdown. The charges are neutralized with each other to perform the action of turning off the afterimage. However, the above method does not solve the problem of vertical shutdown noise.
就縱向關機雜訊的問題而言,在關機的瞬間所有電壓準位均向下降,由於系統設計及搭配性的差異,系統上每一個電壓的放電速度並不一致。以源極驅動器而言,雖然規格書要求關機順序是類比電壓(VAA)停止輸出的時間需早於數位電壓(VDD),然而在實際應用時卻很難控制。當關機順序未滿足規格書,或VAA、VDD掉至正常之工作電壓之下時,源極驅動器即可能產生誤動作,導致輸出電壓發生異常。當源極驅動器之每一個輸出通道之間存在差異時,將使每一個資料線的最終狀態不一致,因此將導致縱向關機彩色直條紋或撇狀條紋(band mura)的產生。As far as the problem of vertical shutdown noise is concerned, all voltage levels are declining at the moment of shutdown. Due to differences in system design and collocation, the discharge speed of each voltage on the system is not uniform. In terms of the source driver, although the specification requires that the shutdown sequence be analog voltage (VAA) to stop outputting earlier than the digital voltage (VDD), it is difficult to control in practical applications. When the shutdown sequence does not meet the specification, or VAA and VDD fall below the normal operating voltage, the source driver may malfunction, resulting in an abnormal output voltage. When there is a difference between each of the output channels of the source driver, the final state of each data line will be inconsistent, thus causing the vertical shutdown of color straight stripes or band mura.
本發明之一薄膜電晶體液晶顯示器面板之關機雜訊消除電路之一實施例,包含一開關機偵測電路、一程序控制電路及一放電電路。該開關機偵測電路係根據一關機程序以產生一控制訊號。該程序控制電路係根據該控制訊號以中止一類比電源與至少一源極驅動器電源之電連接。該放電電路係根據該控制訊號將該至少一源極驅動器電源電連接至一接地電位。An embodiment of the shutdown noise cancellation circuit of a thin film transistor liquid crystal display panel of the present invention comprises a switch detection circuit, a program control circuit and a discharge circuit. The switch detection circuit generates a control signal according to a shutdown procedure. The program control circuit is configured to suspend an electrical connection between the analog power source and the at least one source driver power supply based on the control signal. The discharge circuit electrically connects the at least one source driver power supply to a ground potential according to the control signal.
本發明之一薄膜電晶體液晶顯示器面板之關機雜訊消除電路之一實施例,包含一重置積體電路、一第一電阻、一第二開關、一第一開關、一第二電阻及一第三開關。該重置積體電路用於比較液晶面板之電源電壓之位準是否下降至一預定值。該第一電阻之一端點電連接至該重置積體電路之輸入端,另一端點電連接至該重置積體電路之輸出端。該第二開關連接供應該液晶面板之類比電源至該至少一源極驅動器之電源輸入端。該第一開關之控制端電連接至該重置積體電路之輸出端,其一輸入端電連接至該第二開關之控制端。該第二電阻之一端點電連接至該第二開關之控制端,其另一端點電連接至該類比電源。該第三開關之控制端電連接至該第二開關之控制端,其一輸入端電連接至該至少一源極驅動器之電源輸入端,其另一輸入端電連接至接地位準。An embodiment of a shutdown noise cancellation circuit of a thin film transistor liquid crystal display panel of the present invention comprises a reset integrated circuit, a first resistor, a second switch, a first switch, a second resistor and a The third switch. The reset integrated circuit is configured to compare whether the level of the power supply voltage of the liquid crystal panel drops to a predetermined value. One end of the first resistor is electrically coupled to the input of the reset integrated circuit, and the other end is electrically coupled to the output of the reset integrated circuit. The second switch is connected to supply an analog power supply of the liquid crystal panel to a power input end of the at least one source driver. The control end of the first switch is electrically connected to the output end of the reset integrated circuit, and an input end thereof is electrically connected to the control end of the second switch. One end of the second resistor is electrically connected to the control terminal of the second switch, and the other end thereof is electrically connected to the analog power source. The control terminal of the third switch is electrically connected to the control terminal of the second switch, one input terminal is electrically connected to the power input end of the at least one source driver, and the other input terminal is electrically connected to the ground level.
本發明之一薄膜電晶體液晶顯示器面板之關機雜訊消除方法之一實施例,包含以下步驟:根據該TFT-LCD面板一關機程序以產生一控制訊號;根據該控制訊號以中止供應至源極驅動器之類比電源,並將至少一源極驅動器之電源輸入端連接至接地端,其中根據控制訊號將至少一源極驅動器之電源輸入端經由一開關之導通電連接至一接地電位。An embodiment of the method for canceling noise cancellation of a thin film transistor liquid crystal display panel of the present invention comprises the steps of: generating a control signal according to a shutdown procedure of the TFT-LCD panel; and suspending supply to the source according to the control signal The power source of the driver is connected to the ground terminal of the at least one source driver, and the power input terminal of the at least one source driver is electrically connected to a ground potential via a switch according to the control signal.
圖1係本發明具體實施例之薄膜電晶體液晶顯示器面板之關機雜訊消除電路之第一實施例。該關機雜訊消除電路1包含一開關機偵測電路10、一程序控制電路11及一放電電路12。該開關機偵測電路10係根據一關機程序以產生一控制訊號CON,其中該關機程序係於一第一訊號S1之位準下降至一預定值時被啟動。而當該關機程序啟動時,該控制訊號CON係位於一低位準狀態。該第一訊號S1係該類比電源VAA或一重置積體電路之輸入電源,且其係來自一時序控制器或一PWM電路之一關機訊號。該程序控制電路11係由至少一MOS電晶體、類比開關器或一繼電器組成,且根據該控制訊號CON以中止一類比電源VAA與至少一源極驅動器電源之電連接。該放電電路12係由一放電電阻、一MOS電晶體或一繼電器組成,其根據該控制訊號CON將該至少一源驅動器電源電連接至一接地電位。申請人之另一本國專利申請號95133525,發明名稱「平面顯示器及其時序控制器」揭露消除關機雜訊之電路,本發明將其內容納入參考。1 is a first embodiment of a shutdown noise cancellation circuit of a thin film transistor liquid crystal display panel according to an embodiment of the present invention. The shutdown noise cancellation circuit 1 includes a switch detection circuit 10, a program control circuit 11, and a discharge circuit 12. The switch detection circuit 10 generates a control signal CON according to a shutdown process, wherein the shutdown process is initiated when the level of a first signal S1 drops to a predetermined value. When the shutdown program is started, the control signal CON is in a low level state. The first signal S1 is an input power source of the analog power source VAA or a reset integrated circuit, and is a shutdown signal from a timing controller or a PWM circuit. The program control circuit 11 is composed of at least one MOS transistor, an analog switch or a relay, and according to the control signal CON, suspends the electrical connection between the analog power source VAA and the at least one source driver power supply. The discharge circuit 12 is composed of a discharge resistor, a MOS transistor or a relay, and electrically connects the at least one source driver power supply to a ground potential according to the control signal CON. Another national patent application No. 95133525 of the Applicant, the inventor entitled "Planar Display and Its Timing Controller" discloses a circuit for eliminating shutdown noise, the disclosure of which is incorporated herein by reference.
圖2係本發明具體實施例之薄膜電晶體液晶顯示器面板之關機雜訊消除電路。第二實施例之關機雜訊消除電路2更進一步描述第一實施例之關機雜訊消除電路1之細部電路結構。開關機偵測電路10包含一第一電阻R1及一重置積體電路U1,第一電阻R1之一端點電連接至重置積體電路U1之輸入端以接收一輸入電源S1,第一電阻R1之另一端點電連接至重置積體電路U1之輸出端。程序控制電路11包含一第二電阻R2、一第二開關Q2及一第一開關Q1,第二開關Q2之二端點分別電連接至該類比電源VAA及至少一源極驅動器電源、第二電阻R2之二端點分別電連接至第二開關Q2之控制端點及該類比電源VAA,第一開關Q1之二端點分別電連接至第二開關Q2之控制端點及接地電位、且第一開關Q1之控制端點用以接收控制訊號CON。放電電路12包含一第三開關Q3,第三開關Q3之二端點分別電連接至接地電位及至少一源極驅動器電源。2 is a shutdown noise canceling circuit of a thin film transistor liquid crystal display panel according to an embodiment of the present invention. The shutdown noise canceling circuit 2 of the second embodiment further describes the detailed circuit configuration of the power-off noise canceling circuit 1 of the first embodiment. The switch detection circuit 10 includes a first resistor R1 and a reset integrated circuit U1. One end of the first resistor R1 is electrically connected to the input end of the reset integrated circuit U1 to receive an input power S1. The first resistor The other end of R1 is electrically coupled to the output of the reset integrated circuit U1. The program control circuit 11 includes a second resistor R2, a second switch Q2, and a first switch Q1. The two ends of the second switch Q2 are electrically connected to the analog power source VAA and the at least one source driver power supply and the second resistor, respectively. The second end of R2 is electrically connected to the control end of the second switch Q2 and the analog power supply VAA, and the two end points of the first switch Q1 are respectively electrically connected to the control end of the second switch Q2 and the ground potential, and the first The control terminal of switch Q1 is used to receive control signal CON. The discharge circuit 12 includes a third switch Q3, and the two ends of the third switch Q3 are electrically connected to the ground potential and the at least one source driver power supply, respectively.
第二實施例之重置積體電路U1、第二電阻R2是屬於開關機偵測電路,第一開關Q1、第二開關Q2、第一電阻R1是屬於電源順序控制電路,而第三開關Q3是屬於關機快速放電電路。The reset integrated circuit U1 and the second resistor R2 of the second embodiment belong to the switch detection circuit, and the first switch Q1, the second switch Q2, the first resistor R1 belong to the power supply sequence control circuit, and the third switch Q3 It belongs to the shutdown fast discharge circuit.
本發明之薄膜電晶體液晶顯示器(TFT-LCD)面板之關機雜訊消除方法之第三實施例係根據該TFT-LCD面板之一關機程序以產生一控制訊號。關機程序係於一第一訊號S1之位準下降至一預定值時被啟動。第一訊號S1係來自液晶面板之時序控制器或PWM電路之一關機訊號,其係作為類比電源VAA或一重置積體電路之輸入電源。之後,根據控制訊號CON以中止源極驅動器之類比電源VAA連接至少一源極驅動器之電源輸入端,且根據該控制訊號CON將至少一源極驅動器之電源輸入端電連接至一接地電位。A third embodiment of the method for canceling the noise cancellation of the thin film transistor liquid crystal display (TFT-LCD) panel of the present invention is based on a shutdown procedure of the TFT-LCD panel to generate a control signal. The shutdown procedure is initiated when the level of a first signal S1 drops to a predetermined value. The first signal S1 is a shutdown signal from a timing controller or a PWM circuit of the liquid crystal panel, which is used as an input power source for the analog power supply VAA or a reset integrated circuit. Then, the power input terminal of the at least one source driver is connected to the analog power source VAA according to the control signal CON, and the power input terminal of the at least one source driver is electrically connected to a ground potential according to the control signal CON.
第三實施例在電源開啟時,在數位電源VDD先被建立後,重置積體電路才將輸出控制訊號拉至高準位。此時第一開關Q1、第二開關Q2被致能,第三開關Q3被關閉,類比電源VAA才被建立,據此以符合源極驅動器之開機順序。當關機時,若數位電源VDD下降至重置積體電路的偵測電位之下,此時重置積體電路即會將輸出控制訊號CON拉至低準位。此時第一開關Q1、第二開關Q2被關閉,第三開關Q3被致能,類比電源VAA會在瞬間透過第三開關Q3被快速放電至接地準位,據此以符合源極驅動器之關機順序。In the third embodiment, when the power is turned on, after the digital power supply VDD is first established, the integrated circuit is reset to pull the output control signal to the high level. At this time, the first switch Q1 and the second switch Q2 are enabled, the third switch Q3 is turned off, and the analog power supply VAA is established, thereby complying with the power-on sequence of the source driver. When the power is turned off, if the digital power supply VDD falls below the detection potential of the reset integrated circuit, resetting the integrated circuit at this time will pull the output control signal CON to the low level. At this time, the first switch Q1 and the second switch Q2 are turned off, the third switch Q3 is enabled, and the analog power supply VAA is quickly discharged to the grounding level through the third switch Q3 in an instant, thereby complying with the shutdown of the source driver. order.
當開關機順序完全符合規格書的要求,且類比電源VAA放電的速度非常快(小於數個毫秒)的情形下,即使源極驅動器之每個輸出通道在關機降壓的過程中有些微差異,由於源極驅動器之類比電源VAA已透過第三開關Q3快速放電至接地準位,所以每個輸出通道都被固定於接地準位,因此畫面會接近一致,也不會產生關機雜訊的現象。When the sequence of the switch is completely in accordance with the requirements of the specification, and the analog power supply VAA discharges very fast (less than a few milliseconds), even if each output channel of the source driver is slightly different in the process of shutting down the voltage, Since the source driver VAA has been quickly discharged to the grounding level through the third switch Q3, each output channel is fixed to the grounding level, so the picture will be nearly uniform and there will be no shutdown noise.
本發明之技術內容及技術特點已揭示如上,然而熟悉本項技術之人士仍可能基於本發明之教示及揭示而作種種不背離本發明精神之替換及修飾。因此,本發明之保護範圍應不限於實施例所揭示者,而應包括各種不背離本發明之替換及修飾,並為以下之申請專利範圍所涵蓋。The technical and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should be construed as being limited by the scope of the appended claims
1...關機雜訊消除電路1. . . Shutdown noise cancellation circuit
10...開關機偵測電路10. . . Switching machine detection circuit
11...程序控制電路11. . . Program control circuit
12...放電電路12. . . Discharge circuit
2...關機雜訊消除電路2. . . Shutdown noise cancellation circuit
VAA...類比電源VAA. . . Analog power supply
CON...控制訊號CON. . . Control signal
Q1...第一開關Q1. . . First switch
Q2...第二開關Q2. . . Second switch
Q3...第三開關Q3. . . Third switch
圖1係本發明之薄膜電晶體液晶顯示器面板之關機雜訊消除電路之第一實施例;圖2係本發明之薄膜電晶體液晶顯示器面板之關機雜訊消除電路之第二實施例。1 is a first embodiment of a shutdown noise canceling circuit of a thin film transistor liquid crystal display panel of the present invention; and FIG. 2 is a second embodiment of a shutdown noise canceling circuit of the thin film transistor liquid crystal display panel of the present invention.
1...關機雜訊消除電路1. . . Shutdown noise cancellation circuit
10...開關機偵測電路10. . . Switching machine detection circuit
11...程序控制電路11. . . Program control circuit
12...放電電路12. . . Discharge circuit
CON...控制訊號CON. . . Control signal
VAA...類比電源VAA. . . Analog power supply
R1、R2...電阻R1, R2. . . resistance
Q1...第一開關Q1. . . First switch
Q2...第二開關Q2. . . Second switch
Q3...第三開關Q3. . . Third switch
Claims (4)
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TWI383358B true TWI383358B (en) | 2013-01-21 |
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Citations (4)
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US6741226B2 (en) * | 2000-10-30 | 2004-05-25 | Nec Corporation | Method of driving plasma display and plasma display |
TW594662B (en) * | 2003-06-03 | 2004-06-21 | Chunghwa Picture Tubes Ltd | Method for restraining noise when flat display turn on/off |
TW200425026A (en) * | 2003-05-09 | 2004-11-16 | Toppoly Optoelectronics Corp | Display device having electrostatic discharge protection function and panel thereof |
CN1734533A (en) * | 2004-08-02 | 2006-02-15 | 精工爱普生株式会社 | Display panel, drive circuit, display device, and electronic equipment |
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US6741226B2 (en) * | 2000-10-30 | 2004-05-25 | Nec Corporation | Method of driving plasma display and plasma display |
TW200425026A (en) * | 2003-05-09 | 2004-11-16 | Toppoly Optoelectronics Corp | Display device having electrostatic discharge protection function and panel thereof |
TW594662B (en) * | 2003-06-03 | 2004-06-21 | Chunghwa Picture Tubes Ltd | Method for restraining noise when flat display turn on/off |
CN1734533A (en) * | 2004-08-02 | 2006-02-15 | 精工爱普生株式会社 | Display panel, drive circuit, display device, and electronic equipment |
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