TWI383291B - Computer system, power control system and method thereof - Google Patents
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本發明係關於一種電腦系統、電源控制系統及方法,特別是一種可完全切斷電源訊號傳輸之電腦系統、電源控制系統及方法。The invention relates to a computer system, a power control system and a method, in particular to a computer system, a power control system and a method capable of completely cutting off power signal transmission.
隨著科技的發展,電腦系統的功能也越來越強大。電腦系統也發展出允許遠端管理或是修復網路的功能,即如Intel公司的主動式管理技術(Active Management Technology,AMT)。若是電腦系統支援主動式管理技術,則電腦系統在電路設計上,必須要確保在電腦系統關機時部分電路仍可以正常運作。因此必須要仰賴連接電源模組,包括連接外部電源、內部的電池模組或是供應即時時脈(Real Time Clock,RTC)的備用電池。With the development of technology, the functions of computer systems are becoming more and more powerful. Computer systems have also developed features that allow remote management or repair of the network, such as Intel The company's Active Management Technology (AMT). If the computer system supports active management technology, the computer system must ensure that some circuits can still operate normally when the computer system is shut down. Therefore, you must rely on the connection of the power module, including the connection of external power, internal battery modules or backup batteries that supply Real Time Clock (RTC).
但在先前技術當中,若是電腦系統在開發過程或是產線測試時發生問題,可能必須將電腦系統之電路的電源完全斷開才能重新進行設定。以供應即時時脈的備用電源訊號而言,則必須要將主機板上的備用電池拆除才行。但如此一來,則會耗費大量的工作量,並且拆開主機版也可能造成零件的損壞。However, in the prior art, if the computer system has problems during the development process or the production line test, it may be necessary to completely disconnect the power of the circuit of the computer system to re-set. In the case of an alternate power signal that supplies an instant clock, the spare battery on the motherboard must be removed. However, this will cost a lot of work, and disassembling the main unit may also cause damage to the parts.
因此,有必要發明一種新的控制系統,用來控制電源訊號的傳輸,以解決先前技術的缺失。Therefore, it is necessary to invent a new control system for controlling the transmission of power signals to solve the lack of prior art.
本發明之主要目的係在提供一種電源控制系統,用以控制電源模組傳輸至記憶模組及晶片組之電源訊號。The main object of the present invention is to provide a power control system for controlling power signals transmitted from a power module to a memory module and a chipset.
本發明之另一主要目的係在一種電源控制方法。Another main object of the present invention is a power control method.
為達成上述之目的,本發明之電源控制系統係用於電腦系統。電腦系統包括記憶模組、晶片組、電源模組及電源控制系統。電源模組係用以供應電源訊號。電源控制系統包括輸入訊號模組、控制模組、第一開關電路及第二開關電路。輸入訊號模組用以輸入一訊號。控制模組係與輸入訊號模組電性連接。第一開關電路係與電源模組、控制模組及記憶模組電性連接。第二開關電路係與電源模組、控制模組及晶片組電性連接。其中輸入訊號模組輸入訊號後,控制模組係控制第一開關電路及第二開關電路,以切斷電源模組與記憶模組及晶片組之電源訊號傳輸,再將第一開關電路及第二開關電路導通以恢復電源訊號。To achieve the above objects, the power control system of the present invention is used in a computer system. The computer system includes a memory module, a chipset, a power module, and a power control system. The power module is used to supply power signals. The power control system includes an input signal module, a control module, a first switch circuit, and a second switch circuit. The input signal module is used to input a signal. The control module is electrically connected to the input signal module. The first switch circuit is electrically connected to the power module, the control module and the memory module. The second switching circuit is electrically connected to the power module, the control module and the chip set. After the input signal module inputs the signal, the control module controls the first switch circuit and the second switch circuit to cut off the power signal transmission of the power module and the memory module and the chipset, and then the first switch circuit and the first The second switch circuit is turned on to restore the power signal.
本發明之電源控制方法包括以下步驟:藉由該電源控制系統判斷是否輸入訊號;若是,則控制第一開關電路及第二開關電路斷路,以切斷電源訊號;以及控制第一開關電路及第二開關電路導通以恢復電源訊號。The power control method of the present invention includes the following steps: determining, by the power control system, whether to input a signal; if yes, controlling the first switch circuit and the second switch circuit to open to cut off the power signal; and controlling the first switch circuit and The second switch circuit is turned on to restore the power signal.
為讓本發明之上述和其他目的、特徵和優點能更明顯易懂,下文特舉出本發明之具體實施例,並配合所附圖式,作詳細說明如下。The above and other objects, features and advantages of the present invention will become more <
請先參考圖1係本發明電腦系統之架構圖。Please refer to FIG. 1 for the architecture diagram of the computer system of the present invention.
本發明之電腦系統1可為桌上型電腦或是筆記型電腦等系統,但本發明並不以此為限。電腦系統1包括電源控制系統10、電源模組30、記憶模組40及晶片組50。電源模組30用以供應電源訊號,並藉由電源控制系統10以決定是否能將電源訊號傳輸至記憶模組40及晶片組50。電源模組30包括用以供應主電源訊號,如利用外部電源及電池供應,或是利用備用電池供應之備用電源訊號。The computer system 1 of the present invention may be a desktop computer or a notebook computer, but the invention is not limited thereto. The computer system 1 includes a power control system 10, a power module 30, a memory module 40, and a chipset 50. The power module 30 is configured to supply a power signal, and the power control system 10 determines whether the power signal can be transmitted to the memory module 40 and the chip set 50. The power module 30 includes a backup power signal for supplying a main power signal, such as an external power source and a battery supply, or a backup battery.
記憶模組40係為一互補式金屬氧化層半導體(Complementary Metal Oxide Semiconductor,CMOS),用以儲存資料以提供電腦系統1之基本輸入輸出系統(Basic Input Output System,BIOS)執行之用。在一般之情況下,電腦系統1關機時,記憶模組40係藉由備用電池的備用電源訊號,使其即時時脈(Real Time Clock,RTC)元件仍可持續作用。如此一來,電腦系統1開機時即可讀取正確的時間。晶片組50可為電腦系統1之南橋晶片,但本發明並不以此為限。在一般之情況下,電腦系統1關機時,主電源訊號仍會提供晶片組50些許的電源。此時即稱為系統電源狀態S5。The memory module 40 is a complementary metal oxide semiconductor (CMOS) for storing data to provide a basic input/output system (BIOS) for the computer system 1. Under normal circumstances, when the computer system 1 is turned off, the memory module 40 uses the backup power signal of the backup battery to make its Real Time Clock (RTC) component still sustainable. In this way, the computer system 1 can read the correct time when it is turned on. The chipset 50 can be a south bridge wafer of the computer system 1, but the invention is not limited thereto. Under normal circumstances, when the computer system 1 is turned off, the main power signal will still provide a small amount of power to the chipset 50. This is called the system power state S5.
電源控制系統10係用以控制傳輸至記憶模組40及晶片組50之電源訊號。電源控制系統10包括控制模組11、輸入訊號模組12、第一開關電路21及第二開關電路22。控制模組11可為嵌入式控制器(Embedded controller)或是鍵盤控制器(Keyboard Controller),但本發明並不以此為限。輸入訊號模組12係與控制模組11電性連接,用以輸入訊號至控制模組11。輸入訊號模組12所輸入之訊號可為利用組合鍵持續按壓所鍵入之訊號。如此一來,即可避免使用者誤觸。其組合鍵係先利用控制模組11做設定。舉例而言,可藉由控制模組11設定使用者需先按壓下Fn及C鍵,同時按壓下電源開關鍵一段時間後,才會輸入訊號。但本發明並不以上述的按壓方式為限。The power control system 10 is used to control the power signals transmitted to the memory module 40 and the chipset 50. The power control system 10 includes a control module 11, an input signal module 12, a first switch circuit 21, and a second switch circuit 22. The control module 11 can be an embedded controller or a keyboard controller, but the invention is not limited thereto. The input signal module 12 is electrically connected to the control module 11 for inputting signals to the control module 11. The signal input by the input signal module 12 can be a continuous pressing of the typed signal by using the combination key. In this way, users can be prevented from accidentally touching. The combination key is first set by the control module 11. For example, the control module 11 can set the user to press the Fn and C keys first, and simultaneously press the power button for a certain period of time before inputting the signal. However, the present invention is not limited to the above-described pressing method.
第一開關電路21係與控制模組11、電源模組30及記憶模組40電性連接。當第一開關電路21導通時,能夠同時供應記憶模組40電源訊號,包括主電源訊號及備用電源訊號。控制模組11控制第一開關電路21之斷路或導通,以決定記憶模組40是否能夠接收其電源訊號。同樣地,第二開關電路22係與控制模組11、電源模組30及晶片組50電性連接。當第二開關電路22導通時,能夠供應晶片組50主電源訊號。控制模組11係控制第二開關電路22之斷路或導通,以決定晶片組50是否能夠接收主電源訊號。The first switch circuit 21 is electrically connected to the control module 11 , the power module 30 , and the memory module 40 . When the first switch circuit 21 is turned on, the power signal of the memory module 40 can be simultaneously supplied, including the main power signal and the standby power signal. The control module 11 controls the opening or conducting of the first switching circuit 21 to determine whether the memory module 40 can receive its power signal. Similarly, the second switch circuit 22 is electrically connected to the control module 11 , the power module 30 , and the chip set 50 . When the second switching circuit 22 is turned on, the chip group 50 main power signal can be supplied. The control module 11 controls the opening or conducting of the second switching circuit 22 to determine whether the chip set 50 can receive the main power signal.
接著請參考圖2關於本發明電源控制方法之流程圖。此處需注意的是,以下雖以具有電源控制系統10之電腦系統1為例說明本發明之電源控制之方法,但本發明之電源控制方法並不以使用在電源控制系統10為限。Next, please refer to FIG. 2 for a flowchart of the power control method of the present invention. It should be noted that the power control method of the present invention is described below by taking the computer system 1 having the power control system 10 as an example, but the power control method of the present invention is not limited to the power control system 10.
首先進行步驟201:藉由電源控制系統判斷是否輸入一訊號。First, step 201 is performed: determining, by the power control system, whether a signal is input.
首先電源控制系統10先判斷輸入訊號模組12是否有輸入一訊號。例如控制模組11利用掃描鍵盤陣列的方式來判斷是否有組合鍵被按壓,或者是組合鍵是否有依照特定順序被按壓。First, the power control system 10 first determines whether the input signal module 12 has a signal input. For example, the control module 11 uses a method of scanning the keyboard array to determine whether a combination key is pressed, or whether the combination key is pressed in a specific order.
若是,則進行步驟202:判斷是否持續輸入達到一第一特定時間。If yes, proceed to step 202: determine whether the continuous input reaches a first specific time.
控制模組11再判斷此訊號是否持續輸入達第一特定時間。例如組合鍵被持續按壓超過八秒以上。第一特定時間可藉由控制模組11進行設定。The control module 11 then determines whether the signal is continuously input for the first specific time. For example, the combination key is continuously pressed for more than eight seconds. The first specific time can be set by the control module 11.
若是,則進行步驟203。若沒有持續輸入到第一特定時間,則有可能為使用者誤觸到組合鍵,因此電源控制系統10就不會動作。If yes, proceed to step 203. If the first specific time is not continuously input, there is a possibility that the user may mistakenly touch the combination key, so the power supply control system 10 does not operate.
步驟203:控制一第一開關電路及一第二開關電路,以切斷電源訊號。Step 203: Control a first switch circuit and a second switch circuit to cut off the power signal.
控制模組11即控制第一開關電路21及第二開關電路22,使其斷路。如此一來,記憶模組40及晶片組50即完全無法接收到電源訊號,包括在系統電源狀態S5下的主電源訊號及備用電源訊號。The control module 11 controls the first switch circuit 21 and the second switch circuit 22 to open the circuit. As a result, the memory module 40 and the chipset 50 are completely unable to receive the power signal, including the main power signal and the standby power signal in the system power state S5.
最後進行步驟204:等待一第二特定時間後,再恢復電源訊號。Finally, step 204 is performed: after waiting for a second specific time, the power signal is restored.
控制模組11經過第二特定時間後,例如等待三秒鐘後,再控制第一開關電路21及第二開關電路22,使其導通。如此一來即恢復供電,記憶模組40及晶片組50可接收到主電源訊號及備用電源訊號。經由上述的步驟203斷電及步驟204恢復供電的流程,記憶模組40及晶片組50即可重新啟動。After the second specific time has elapsed, for example, the control module 11 waits for three seconds, and then controls the first switching circuit 21 and the second switching circuit 22 to turn on. In this way, the power supply is restored, and the memory module 40 and the chipset 50 can receive the main power signal and the standby power signal. The memory module 40 and the chipset 50 can be restarted by the power-off in step 203 and the process of restoring the power supply in step 204.
此處需注意的是,本發明之電源控制方法並不以上述之步驟次序為限,只要能達成本發明之目的,上述之步驟次序亦可加以改變。It should be noted that the power control method of the present invention is not limited to the above-described sequence of steps, and the order of the above steps may be changed as long as the object of the present invention can be achieved.
利用本發明的電源控制系統10及方法,即可在不拆除電腦系統1的硬體架構下,對記憶模組40及晶片組50進行重置。尤其是對於將備用電源訊號切斷之流程而言,並不需要將備用電池拆除。因此可節省下許多的工作量,亦可避免損壞到電腦系統1的硬體。With the power control system 10 and method of the present invention, the memory module 40 and the chip set 50 can be reset without the hardware structure of the computer system 1. Especially for the process of cutting off the standby power signal, it is not necessary to remove the backup battery. Therefore, a lot of work can be saved, and the hardware of the computer system 1 can be avoided.
綜上所陳,本發明無論就目的、手段及功效,在在均顯示其迥異於習知技術之特徵,懇請 貴審查委員明察,早日賜准專利,俾嘉惠社會,實感德便。惟應注意的是,上述諸多實施例僅係為了便於說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。To sum up, the present invention, regardless of its purpose, means and efficacy, shows its distinctive features of the prior art. You are requested to review the examination and express the patent as soon as possible. It should be noted that the various embodiments described above are merely illustrative for ease of explanation, and the scope of the invention is intended to be limited by the scope of the claims.
1...電腦系統1. . . computer system
10...電源控制系統10. . . Power control system
11...控制模組11. . . Control module
12...輸入訊號模組12. . . Input signal module
21...第一開關電路twenty one. . . First switching circuit
22...第二開關電路twenty two. . . Second switching circuit
30...電源模組30. . . Power module
40...記憶模組40. . . Memory module
50...晶片組50. . . Chipset
圖1係本發明電腦系統之架構圖。1 is a block diagram of a computer system of the present invention.
圖2係本發明電源控制方法之流程圖。2 is a flow chart of a power control method of the present invention.
1...電腦系統1. . . computer system
10...電源控制系統10. . . Power control system
11...控制模組11. . . Control module
12...輸入訊號模組12. . . Input signal module
21...第一開關電路twenty one. . . First switching circuit
22...第二開關電路twenty two. . . Second switching circuit
30...電源模組30. . . Power module
40...記憶模組40. . . Memory module
50...晶片組50. . . Chipset
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US6611918B1 (en) * | 1999-12-21 | 2003-08-26 | Intel Corporation | Method and apparatus for changing bias levels to reduce CMOS leakage of a real time clock when switching to a battery mode of operation |
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US6611918B1 (en) * | 1999-12-21 | 2003-08-26 | Intel Corporation | Method and apparatus for changing bias levels to reduce CMOS leakage of a real time clock when switching to a battery mode of operation |
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