201030504 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種電腦系統、電源控制系統及方法， 特別是一種可完全切斷電源訊號傳輸之電腦系統、電源控 制系統及方法。 【先前技術】201030504 VI. Description of the Invention: [Technical Field] The present invention relates to a computer system, a power control system and method, and more particularly to a computer system, a power control system and a method for completely cutting off power signal transmission. [Prior Art]
隨著科技的發展，電腦系統的功能也越來越強大。電 腦系統也發展出允許遠端管理或是修復網路的功能，即如 Intel®公司的主動式管理技術 （Active Management Technology，AMT)。若是電腦系統支援主動式管理技術， 則電腦系統在電路設計上，必須要確保在電腦系統關機時 部分電路仍可以正常運作。因此必須要仰賴連接電源模 組，包括連接外部電源、内部的電池模組或是供應即時時 脈（Real Time Clock，RTC )的備用電池。 但在先前技術當中，若是電腦系統在開發過程或是產 線測試時發生_，可能必須將電腦系統之電路的電源完 全斷開才能重新進行設定。以供應㈣時脈的㈣電源訊 號而言’則必須要將主機板上的備用電池折除才行。但如 此一來，則會耗費大量的工作詈，祐 造成零件的㈣。 並且_主機版也可能 ，用來控制電源 因此，有必要發明一種新的控制系統 訊號的傳輸，以解決先前技術的缺失。 【發明内容】 4 201030504 本發明之主要目的係在提供一種電源控制系統，用以 控制電源模組傳輸至記憶模組及晶片組之電源訊號。 本發明之另一主要目的係在一種電源控制方法。 為達成上述之目的，本發明之電源控制系統係用於電 腦系統。電腦系統包括記憶模組、晶片組、電源模組及電 源控制系統。電源模組係用以供應電源訊號。電源控制系 統包括輸入訊號模組、控制模組、第一開關電路及第二開 關電路。輸入訊號模組用以輸入一訊號。控制模組係與輸 φ 入訊號模組電性連接。第一開關電路係與電源模組、控制 模組及記憶模組電性連接。第二開關電路係與電源模組、 控制模組及晶片組電性連接。其中輸入訊號模組輸入訊號 後，控制模組係控制第一開關電路及第二開關電路，以切 斷電源模組與記憶模組及晶片組之電源訊號傳輸，再將第 一開關電路及第二開關電路導通以恢復電源訊號。 本發明之電源控制方法包括以下步驟··藉由該電源控 制系統判斷是否輸入訊號；若是，則控制第一開關電路及 @ 第二開關電路斷路，以切斷電源訊號；以及控制第一開關 電路及第二開關電路導通以恢復電源訊號。 【實施方式】 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉出本發明之具體實施例，並配合所附圖式， 作詳細說明如下。 請先參考圖1係本發明電腦系統之架構圖。 本發明之電腦系統1可為桌上型電腦或是筆記型電腦 5 201030504 等系統’但本發明並不以此為限。電腦系統】包括電源控 制系統10、電源模組30、記憶模組4〇及晶片組5〇。電源 模組30用以供應電源訊號，並藉由電源控制祕1〇以決 定是否能將電源訊號傳輸至記憶模組4〇及晶片組5〇。電 源模組3G包括用以供應主電源訊號，如利用外部電源及電 池供應，或是利用備用電池供應之備用電源訊號。 記憶模組40係為一互補式金屬氧化層半導體 (Complementary Metal Oxide Semiconductor，CM〇s)，用 ❿ 以儲存資料以提供電腦系統1之基本輸入輸出系統（BasicWith the development of technology, the functions of computer systems are becoming more and more powerful. The computer system has also evolved capabilities that allow remote management or repair of the network, such as Intel® Active Management Technology (AMT). If the computer system supports active management technology, the computer system must be designed to ensure that some circuits can still operate normally when the computer system is shut down. It is therefore necessary to rely on the connection of the power module, including the connection of an external power supply, an internal battery module or a spare battery that supplies a Real Time Clock (RTC). However, in the prior art, if the computer system occurred during the development process or the line test, it may be necessary to completely disconnect the power of the circuit of the computer system to re-set it. In order to supply (4) the (four) power signal of the clock, it is necessary to dismantle the spare battery on the motherboard. But as a result, it will cost a lot of work, and it will cause parts (4). And _ host version is also possible to control the power supply. Therefore, it is necessary to invent a new control system signal transmission to solve the lack of prior art. SUMMARY OF THE INVENTION The main purpose of the present invention is to provide a power control system for controlling power signals transmitted from a power module to a memory module and a chipset. Another main object of the present invention is a power control method. To achieve the above object, the power control system of the present invention is used in a computer system. The computer system includes a memory module, a chipset, a power module, and a power control system. The power module is used to supply power signals. The power control system includes an input signal module, a control module, a first switch circuit, and a second switch circuit. The input signal module is used to input a signal. The control module is electrically connected to the input φ signal module. The first switching circuit is electrically connected to the power module, the control module and the memory module. The second switching circuit is electrically connected to the power module, the control module and the chip set. After the input signal module inputs the signal, the control module controls the first switch circuit and the second switch circuit to cut off the power signal transmission of the power module and the memory module and the chipset, and then the first switch circuit and the first The second switch circuit is turned on to restore the power signal. The power control method of the present invention includes the following steps: determining, by the power control system, whether to input a signal; if so, controlling the first switch circuit and the @second switch circuit to open to cut off the power signal; and controlling the first switch circuit And the second switch circuit is turned on to restore the power signal. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the appended claims. Please refer to FIG. 1 for the architecture diagram of the computer system of the present invention. The computer system 1 of the present invention may be a desktop computer or a notebook computer 5 201030504, etc. 'But the invention is not limited thereto. The computer system includes a power control system 10, a power module 30, a memory module 4A, and a chipset 5A. The power module 30 is configured to supply a power signal, and the power control module determines whether the power signal can be transmitted to the memory module 4 and the chip set 5A. The power module 3G includes a standby power signal for supplying a main power signal, such as an external power source and a battery supply, or a backup battery. The memory module 40 is a Complementary Metal Oxide Semiconductor (CM〇s), which is used to store data to provide a basic input/output system of the computer system 1 (Basic)
InputOutputSystem’BIOS)執行之用。在一般之情況下， 電腦系統1關機時，記憶模組40係藉由備用電池的備用電 源訊號’使其即時時脈（Real Time Clock，RTC)元件仍 可持續作用。如此一來，電腦系統丨開機時即可讀取正確 的時間。晶片組50可為電腦系統1之南橋晶片，但本發明 並不以此為限。在一般之情況下，電腦系統1關機時，主 電源訊號仍會提供晶片組50些許的電源。此時即稱為系統 φ 電源狀態S5。 電源控制系統1〇係用以控制傳輸至記憶模組4〇及晶 片組50之電源訊號。電源控制系統1〇包括控制模組u、 輸入訊號模組12、第一開關電路21及第二開關電路22。 控制模組11可為喪入式控制器（Embedded controller)或 是鍵盤控制器（Keyboard Controller )，但本發明並不以此 為限。輸入訊號模組12係與控制模組11電性連接，用以 輸入訊號至控制模組η ^輸入訊號模組12所輸入之訊號 可為利用組合鍵持續按壓所鍵入之訊號。如此一來，即可 6 201030504 避免使用者誤觸。其組合鍵係先利用控制模組^做設定。 = ㈣_ u設定使用者以按壓下ρη 鍵’同時按壓下電源開關鍵一段時間後，才 號。但本發明並不以上述的按壓方式為限。 5 第一開關電路21係與控制模組u、電源模組3〇及記 2模組40電性連接。當第-開關電路21導通時，能夠同 時供應記憶模組4G電源訊號，包括主電源訊號及備用電源 訊號三控制模組11控制第一開關電路21之斷路或導通， ❹ 以決疋記憶模組4〇是否能夠接收其電源訊號。同樣地，第 開關電路22係與控制模組u、電源模組3〇及晶片組5〇 電性連接。當第二開關電路22導通時，能夠供應晶片組 50主電源訊號。控制模組n係控制第二開關電路22之斷 路或導通，以決定晶片組5〇是否能夠接收主電源訊號。 接著請參考圖2關於本發明電源控制方法之流程圖。 此處需注意的是’以下雖以具有電源控制系統1〇之電腦系 統1為例說明本發明之電源控制之方法，但本發明之電源 參控制方法並不以使用在電源控制系統10為限。 首先進行步驟201:藉由電源控制系統判斷是否輸入一 訊號。 I先電源控制系統10先判斷輸入訊號模組12是否有 /入=訊號。例如控制模組n利用掃描鍵盤陣列的方式來 判斷是否有組合鍵被按壓，或者是組合鍵是否有依照特定 順序被按壓。 若是，則進行步驟202 :判斷是否續輸入達到一第一 特定時間。 201030504 控制模組11再判斷此訊號是否持續輸入達第一特定時 間。例如組合鍵被持續按壓超過八秒以上。第一特定時間 可藉由控制模組11進行設定。 若是，則進行步驟203。若沒有持續輸入到第一特定時 間，則有可能為使用者誤觸到組合鍵，因此電源控制系統 10就不會動作。 步驟203 :控制一第一開關電路及一第二開關電路，以 切斷電源訊號。 ⑩ 控制模組11即控制第一開關電路21及第二開關電路 22，使其斷路。如此一來，記憶模組40及晶片組50即完 全無法接收到電源訊號，包括在系統電源狀態S5下的主電 源訊號及備用電源訊號。 最後進行步驟204:等待一第二特定時間後，再恢復電 源訊號。 控制模組11經過第二特定時間後，例如等待三秒鐘 後，再控制第一開關電路21及第二開關電路22，使其導 ❿ 通。如此一來即恢復供電，記憶模組40及晶片組50可接 收到主電源訊號及備用電源訊號。經由上述的步驟203斷 電及步驟204恢復供電的流程，記憶模組40及晶片組50 即可重新啟動。 此處需注意的是，本發明之電源控制方法並不以上述 之步驟次序為限，只要能達成本發明之目的，上述之步驟 次序亦可加以改變。 利用本發明的電源控制系統10及方法，即可在不拆除 電腦系統1的硬體架構下，對記憶模組40及晶片組50進 8 201030504 行重置。尤其是對於將備用電源訊號切斷之流程而言，並 不需要將備用電池拆除。因此可節省下許多的工作量，亦 可避免損壞到電腦系統1的硬體。 綜上所陳，本發明無論就目的、手段及功效，在在均 顯示其迥異於習知技術之特徵，懇請貴審查委員明察， 早曰賜准專利，俾嘉惠社會，實感德便。惟應注意的是， 上述諸多實施例僅係為了便於說明而舉例而已，本發明所 主張之權利範圍自應以申請專利範圍所述為準，而非僅限 ❿ 於上述實施例。 【圖式簡單說明】 圖1係本發明電腦系統之架構圖。 圖2係本發明電源控制方法之流程圖。 【主要元件符號說明】 電腦系統1 電源控制系統10 控制模組11 輸入訊號模組12 第一開關電路21 第二開關電路22 電源模組30 記憶模組40 晶片組50 9InputOutputSystem'BIOS) is used for execution. Under normal circumstances, when the computer system 1 is turned off, the memory module 40 relies on the backup power signal of the backup battery to make its Real Time Clock (RTC) component still sustainable. In this way, the computer system can read the correct time when it is turned on. The chipset 50 can be a south bridge wafer of the computer system 1, but the invention is not limited thereto. Under normal circumstances, when the computer system 1 is turned off, the main power signal will still provide a small amount of power to the chipset 50. This is called the system φ power state S5. The power control system 1 is used to control the power signals transmitted to the memory module 4 and the chip group 50. The power control system 1 includes a control module u, an input signal module 12, a first switch circuit 21, and a second switch circuit 22. The control module 11 can be an embedded controller or a keyboard controller, but the invention is not limited thereto. The input signal module 12 is electrically connected to the control module 11 for inputting signals to the control module η. The signal input by the input signal module 12 can be used to continuously press the typed signal by using the combination key. In this way, you can avoid the user's accidental touch on 6 201030504. The combination key is first set by using the control module ^. = (4)_ u Set the user to press the ρη key while pressing the power button for a while. However, the present invention is not limited to the above-described pressing method. The first switch circuit 21 is electrically connected to the control module u, the power module 3, and the block module 40. When the first switch circuit 21 is turned on, the power supply signal of the memory module 4G can be simultaneously supplied, and the main power signal and the standby power signal control module 11 control the disconnection or conduction of the first switch circuit 21, so as to determine the memory module. 4〇 Is it able to receive its power signal? Similarly, the first switch circuit 22 is electrically connected to the control module u, the power module 3A, and the chip set 5A. When the second switching circuit 22 is turned on, the chip group 50 main power signal can be supplied. The control module n controls the opening or conducting of the second switching circuit 22 to determine whether the chip group 5 can receive the main power signal. Next, please refer to FIG. 2 for a flowchart of the power control method of the present invention. It should be noted here that the following describes the power control method of the present invention by taking the computer system 1 having the power control system as an example, but the power supply control method of the present invention is not limited to the power control system 10 . First, step 201 is performed: determining, by the power control system, whether a signal is input. The first power control system 10 first determines whether the input signal module 12 has a /in=signal. For example, the control module n uses the manner of scanning the keyboard array to determine whether a combination key is pressed, or whether the combination key is pressed in a specific order. If yes, proceed to step 202: determine whether the continued input reaches a first specific time. 201030504 The control module 11 then determines whether the signal is continuously input for the first specific time. For example, the combination key is continuously pressed for more than eight seconds. The first specific time can be set by the control module 11. If yes, proceed to step 203. If the input is not continued for the first specific time, the combination key may be accidentally touched by the user, so the power control system 10 does not operate. Step 203: Control a first switch circuit and a second switch circuit to cut off the power signal. The control module 11 controls the first switch circuit 21 and the second switch circuit 22 to open the circuit. As a result, the memory module 40 and the chipset 50 are completely unable to receive the power signal, including the main power signal and the standby power signal in the system power state S5. Finally, step 204 is performed: after waiting for a second specific time, the power signal is restored. After the second specific time has elapsed, for example, the control module 11 waits for three seconds, and then controls the first switching circuit 21 and the second switching circuit 22 to be turned on. In this way, the power supply is restored, and the memory module 40 and the chipset 50 can receive the main power signal and the standby power signal. The memory module 40 and the chipset 50 can be restarted by the above-described step 203 being powered off and the step 204 resuming the power supply. It is to be noted that the power supply control method of the present invention is not limited to the above-described order of steps, and the order of the above steps may be changed as long as the object of the present invention can be attained. With the power control system 10 and method of the present invention, the memory module 40 and the chipset 50 can be reset in a hardware architecture without removing the computer system 1. Especially for the process of cutting off the standby power signal, it is not necessary to remove the backup battery. This saves a lot of work and avoids damage to the hardware of the computer system 1. To sum up, the present invention, regardless of its purpose, means and efficacy, shows its distinctive features of the prior art. You are requested to review the examinations and grant the patents as soon as possible. It is to be noted that the various embodiments described above are intended to be illustrative only, and the scope of the invention is intended to be limited by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a computer system of the present invention. 2 is a flow chart of a power control method of the present invention. [Main component symbol description] Computer system 1 Power control system 10 Control module 11 Input signal module 12 First switch circuit 21 Second switch circuit 22 Power module 30 Memory module 40 Chip set 50 9