TWI382643B - With synchronous control of the return-type circuit - Google Patents

With synchronous control of the return-type circuit Download PDF

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TWI382643B
TWI382643B TW097127237A TW97127237A TWI382643B TW I382643 B TWI382643 B TW I382643B TW 097127237 A TW097127237 A TW 097127237A TW 97127237 A TW97127237 A TW 97127237A TW I382643 B TWI382643 B TW I382643B
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synchronous rectification
circuit
rectification switch
synchronous
signal
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TW097127237A
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TW201006111A (en
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Spi Electronic Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Description

具備同步控制的返馳式電路Flyback circuit with synchronous control

一種具備同步控制的返馳式電路,尤其是指一種藉由同步信號控制二次側與一次側同步的電路。A flyback circuit with synchronous control, in particular, a circuit for controlling synchronization of the secondary side and the primary side by a synchronization signal.

現今大多數電器設備為取得穩定的電流而工作,皆需透過一電源供應器取得市內電力並轉換為直流或交流之電力輸出,而電源供應器包含範圍很廣,包括轉換器(Converter)、變頻器(Inverter)等等,其中有一類稱為返馳式轉換器(Flyback Converter)。在電源供應器電路中,使用返馳式轉換器可達到設計簡單、價格便宜的優點;返馳式轉換器的特性在於該電路中用於轉換電力之變壓器一次側線圈與二次側線圈極性相反,且當輸入電流通過一次側線圈時,二次側線圈通常利用一二極體或一開關元件阻止電流導通,並且將能量儲存在變壓器中,而一次側線圈截止時,該二極體自動因二次側線圈感應電勢之極性反向而導通,或者由導通該開關元件而使二次側線圈之電流得以流通;而目前返馳式轉換器為了提高效率,通常都是以一開關元件控制二次側線圈能量的釋放,然而開關元件需要控制信號觸發而啟閉,因此後續有控制該開關元件之電路創作。Most electrical devices today work to achieve a stable current, and all need to obtain local power through a power supply and convert it into DC or AC power output. The power supply includes a wide range of converters, including converters. Inverters, etc., one of which is called a Flyback Converter. In the power supply circuit, the use of the flyback converter can achieve the advantages of simple design and low price; the characteristic of the flyback converter is that the primary side coil of the transformer for converting power in the circuit is opposite in polarity to the secondary side coil. And when the input current passes through the primary side coil, the secondary side coil usually uses a diode or a switching element to block current conduction, and stores energy in the transformer, and when the primary side coil is turned off, the diode is automatically caused by The polarity of the induced potential of the secondary side coil is reversed and turned on, or the current of the secondary side coil is circulated by turning on the switching element; and in order to improve efficiency, the current flyback converter is usually controlled by a switching element. The release of the energy of the secondary side coil, however, the switching element needs to be triggered by the control signal to be turned on and off, so that subsequent circuit creation for controlling the switching element is performed.

利用開關元件截止二次側線圈之先前創作有美國專利第7233505號的「High efficiency flyback converter with primary,secondary,andtertiary windings」,其中該flyback converter包含一primary side(可翻為一次側)以及一secondary side(可翻為二次側),分別具有一primary winding(12)與一secondary winding(22),並有一tertiary winding(23)感應該secondary winding的極性變化,其中該secondary side之截止或導通是由一MOSFET(標號25)控制,而該MOSFET的動作則是由該tertiary winding感應的信號控制,換言之,該創作的MOSFET同步動作係藉由二次側的自激所產生;另一類似創作如美國專利第6424544號的「continuous mode flyback converter」其中該converter包含一primary winding(101)、一secondary winding (107)以及一auxiliary winding(108),透過auxiliary winding感應primary winding的極性變化而產生一信號控制該transistor(110)的動作,因此該先前專利亦同是利用二次側自激的方式達到二次側同步啟閉的作用;唯前述返馳式自激同步控制仍具有缺失,基本上該自激信號是截取自一次側線圈的極性變化,且該二次側線圈的極性變化是源自於該一次側線圈的電流變動,換言之,一次側線圈的極性變化後二次側線圈才開始有反應,如此即無法達到零電壓切換(ZVS)的功效,自然會產生切換損耗;再者,當該一次側線圈於輕載、短路或者其他異常狀態下停止電流之切換時,該二次側線圈即無法感應到極性變化,亦即該二次側線圈感應電勢並未隨一次側極性變化而改變時,該自激控制的機制將失去規律,屆時該自激頻率會隨負載阻抗、電路本體阻抗等等許多因素影響而極度不規律且難以預測,如此將造成二次側產生極端混亂之電力波形,將毀壞該返馳式轉換器。U.S. Patent No. 7,233,505, "High efficiency flyback converter with primary, secondary, and electrical windings", wherein the flyback converter includes a primary side (which can be turned into a primary side) and a secondary a side (which may be turned into a secondary side) having a primary winding (12) and a secondary winding (22), respectively, and a tertiary winding (23) sensing a polarity change of the secondary winding, wherein the secondary side is turned off or turned on Controlled by a MOSFET (reference numeral 25), the action of the MOSFET is controlled by the signal induced by the tertiary winding, in other words, the created MOSFET synchronous action is generated by the self-excitation of the secondary side; another similar creation US Patent No. 6424544 "continuous mode flyback converter" in which the converter includes a primary winding (101) and a secondary winding. (107) and an auxiliary winding (108), which senses the polarity change of the primary winding by the auxiliary winding to generate a signal to control the operation of the transistor (110), so the prior patent also uses the secondary side self-excited way to reach two The function of the secondary side synchronous opening and closing; only the aforementioned flyback type self-excited synchronous control still has a defect, basically the self-excited signal is intercepted from the polarity change of the primary side coil, and the polarity change of the secondary side coil is derived from The current fluctuation of the primary side coil, in other words, the secondary side coil starts to react after the polarity of the primary side coil changes, so that the effect of zero voltage switching (ZVS) cannot be achieved, and switching loss is naturally generated; When the primary side coil is switched between light load, short circuit or other abnormal state, the secondary side coil cannot sense the polarity change, that is, the secondary side coil induced potential does not change with the primary side polarity change. The self-excited control mechanism will lose its regularity. At that time, the self-excited frequency will be extremely irregular due to many factors such as load impedance, circuit body impedance and so on. It is difficult to predict that this will cause an extremely turbulent power waveform on the secondary side that will destroy the flyback converter.

因此習知自激式返馳式轉換器的控制技術仍待改進,以避免上述異常狀態下的失控與電路損壞。Therefore, the control technology of the conventional self-excited flyback converter still needs to be improved to avoid runaway and circuit damage in the above abnormal state.

有鑑於習知自激式返馳式轉換器的控制技術在異常時具有失控之風險,且二次側無法提前與一次側取得同步的缺失,本發明提供一種透過同步信號使二次側配合一次側能同步動作之返馳式電路,並限制其最低自激週期的長度以避免該返馳式電路自激失控的問題。In view of the fact that the control technology of the conventional self-excited flyback converter has the risk of losing control when abnormal, and the secondary side cannot be synchronized with the primary side in advance, the present invention provides a secondary side that is matched once by the synchronization signal. The side can synchronize the action of the flyback circuit and limit the length of its minimum self-excited period to avoid the self-excited runaway problem of the flyback circuit.

本發明為一種具備同步控制的返馳式電路,該返馳式電路之一、二次側分別具有感應極性相反之一次側線圈與二次側線圈,其中該二次側線圈之電流導通週期受控於一同步整流開關之啟閉,而返馳式電路更包括一脈寬調變單元、一同步控制單元及一導通週期限制單元,其中該脈寬調變單元產生一驅動信號控制該一次側線圈之電流導通週期,並於產生該驅動信號之前,先提供一輸出時序領先該驅動信號之同步信號,而同步控制單元透過一感應線圈組取得此同步信號,並以該同步信號驅動同步整流開關截止,而且該導通週期限制單元於該同步整流開關導通後啟始一週期限制時序,且該同步整流開關持續導通 至該週期限制時序結束時,該導通週期限制單元產生一強迫截止信號截止該同步整流開關之導通,並於該同步整流開關截止後,該導通週期限制單元重置回初始狀態,以此控制模式維持該返馳式電路運作之最低工作頻率。The present invention is a flyback type circuit with synchronous control, wherein one of the secondary side and the secondary side respectively have a primary side coil and a secondary side coil of opposite polarity, wherein the current conduction period of the secondary side coil is affected by Controlling the opening and closing of a synchronous rectification switch, the flyback circuit further includes a pulse width modulation unit, a synchronization control unit and a conduction period limiting unit, wherein the pulse width modulation unit generates a driving signal to control the primary side The current conduction period of the coil, and before generating the driving signal, first provide an output timing to lead the synchronization signal of the driving signal, and the synchronous control unit obtains the synchronization signal through an induction coil group, and drives the synchronous rectification switch with the synchronization signal Off, and the on-period limiting unit starts a period limit timing after the synchronous rectification switch is turned on, and the synchronous rectification switch is continuously turned on At the end of the period limit timing, the on period limiting unit generates a forcing off signal to turn off the conduction of the synchronous rectification switch, and after the synchronous rectification switch is turned off, the on period limiting unit is reset back to the initial state, thereby controlling the mode Maintain the minimum operating frequency of the flyback circuit operation.

藉由上述之電路架構,返馳式電路之二次側可藉由同步信號與該一次側同步動作以達到零電壓切換(ZVS)的效果,並且於一次側暫停工作或發生異常時,該導通週期限制單元可自動維持最低的工作頻率,以避免該返馳式電路自激失控。With the above circuit structure, the secondary side of the flyback circuit can achieve the effect of zero voltage switching (ZVS) by synchronizing the synchronization signal with the primary side, and when the primary side is suspended or an abnormality occurs, the conduction is performed. The cycle limiting unit automatically maintains the lowest operating frequency to avoid self-excited runaway of the flyback circuit.

本發明為一種具備同步控制的返馳式電路,請參閱圖1、圖2,如圖所示為一返馳式電路,電路中的變壓器1可區分為一次側與二次側,該變壓器1之一、二次側分別具有感應極性相反之一一次側線圈11與一二次側線圈12,該二次側線圈12之電流導通週期受控於一同步整流開關5之啟閉,而該一次側線圈11之電流導通週期則受控於一脈寬調變單元3,該脈寬調變單元3係產生一驅動信號(VG1 )驅動一功率開關4的啟閉,進而控制該一次側線圈11之電流導通週期,另,該脈寬調變單元3更於產生該驅動信號(VG1 )之前先提供一輸出時序領先該驅動信號(VG1 )之同步信號(Syn),而該同步信號(Syn)透過一感應線圈組61傳送至二次側,一同步控制單元6自該感應線圈組61取得該同步信號,並以該同步信號驅動該同步整流開關5截止;另,該二次側線圈12旁設一自激線圈2,當該脈寬調變單元3令該功率開關4截止後,該自激線圈2受該一次側線圈11之極性變化而感應一自激信號驅動該同步整流開關5導通;當該同步整流開關5導通後,一導通週期限制單元7將自該同步整流開關5截取一電流或電壓信號,並藉此令該導通週期限制單元7啟始一週期限制時序,其中,若該脈寬調變單元3再次產生該同步信號截止該同步整流開關5,於該同步整流開關5截止後,該導通週期限制單元7也將重置回初始狀態,若發生異常狀態或暫態變化使該脈寬調變單元3停止送出驅動信號,該同步整流開關5持續導通至該週期限制時序結束 時,該導通週期限制單元7會產生一強迫截止信號強迫截止該同步整流開關5,以維持返馳式電路運作之最低工作頻率;上述電路中,該同步整流開關5更連接一同步整流開關驅動單元51,該同步整流開關驅動單元51受該自激線圈2之自激信號觸發後,提供一足夠之電壓以確保該同步整流開關5導通,因此該同步整流開關驅動單元51係依據該同步信號、強迫截止信號以及該自激信號決定導通該同步整流開關5的時序;藉由上述之電路架構,本返馳式電路除了藉由該自激線圈2維持基本的自激功能以外,更利用該同步控制單元6與該感應線圈組61在一次側線圈激磁前取得一同步信號(Syn)截止該同步整流開關5,再者,為了避免一次側停止動作而使該二次側的自激週期失控,該導通週期限制單元7提供一週期限制時序,當該同步整流開關5導通至該週期限制時序時間後,由該導通週期限制單元7強制截止該同步整流開關5以維持最低之工作頻率,達到避免自激週期失控之功效。The invention is a flyback circuit with synchronous control. Please refer to FIG. 1 and FIG. 2, which is a flyback circuit. The transformer 1 in the circuit can be divided into a primary side and a secondary side. The transformer 1 One of the secondary sides has a primary side coil 11 and a secondary side coil 12 opposite in polarity, and the current conduction period of the secondary side coil 12 is controlled by the opening and closing of a synchronous rectifier switch 5, and The current conduction period of the primary side coil 11 is controlled by a pulse width modulation unit 3, which generates a driving signal (V G1 ) to drive the opening and closing of a power switch 4, thereby controlling the primary side. coil current conduction cycle 11, the other, the pulse width modulation unit 3 is further to generate the driving signal (V G1) before to provide an output timing ahead of the drive signal (V G1) of the synchronization signal (Syn), and the synchronization The signal (Syn) is transmitted to the secondary side through an induction coil group 61, a synchronization control unit 6 obtains the synchronization signal from the induction coil group 61, and drives the synchronous rectifier switch 5 to be turned off by the synchronization signal; The side coil 12 is adjacent to a self-excited coil 2, when the pulse width is adjusted After the power switch 4 is turned off, the self-excited coil 2 is induced by a polarity change of the primary side coil 11 to induce a self-excitation signal to drive the synchronous rectification switch 5 to be turned on; when the synchronous rectification switch 5 is turned on, a conduction period is performed. The limiting unit 7 will intercept a current or voltage signal from the synchronous rectification switch 5, and thereby cause the on-period limiting unit 7 to initiate a period limit timing, wherein the pulse width modulation unit 3 generates the synchronization signal again. The synchronous rectification switch 5 is also reset to the initial state after the synchronous rectification switch 5 is turned off, and if the abnormal state or transient change occurs, the pulse width modulation unit 3 stops sending the driving signal. When the synchronous rectification switch 5 is continuously turned on until the end of the period limit timing, the on-period limiting unit 7 generates a forced-off signal to forcibly cut off the synchronous rectification switch 5 to maintain the minimum operating frequency of the flyback circuit operation; The synchronous rectification switch 5 is further connected to a synchronous rectification switch drive unit 51. The synchronous rectification switch drive unit 51 is subjected to a self-excitation signal of the self-excited coil 2. After the triggering, a sufficient voltage is provided to ensure that the synchronous rectification switch 5 is turned on. Therefore, the synchronous rectification switch driving unit 51 determines the timing of turning on the synchronous rectification switch 5 according to the synchronization signal, the forced-off signal, and the self-excitation signal; In addition to the self-excited function of the self-excited coil 2, the synchronous control unit 6 and the induction coil group 61 obtain a synchronization signal before the primary side coil is excited by the above-mentioned circuit structure. (Syn) is turned off by the synchronous rectification switch 5, and further, in order to avoid the primary side stop operation, the self-excited period of the secondary side is out of control, the on-period limiting unit 7 provides a period limit timing when the synchronous rectification switch 5 is turned on. After the period limit time is limited, the on-period limiting unit 7 forcibly turns off the synchronous rectification switch 5 to maintain the lowest operating frequency, thereby achieving the effect of avoiding the self-excitation period out of control.

請參閱圖2以及圖3-1至圖3-5,該等圖式為本發明實施例電路圖與圖2各節點之波形圖,於該實施例中可見該同步整流開關驅動單元51包含一具有高、低準位狀態之閂閘迴路(主要由半導體開關Q3、Q4所構成)以維持該同步整流開關5之工作狀態,因此該閂閘電路受自激線圈2的自激信號觸發後可提供穩定的電壓確保該同步整流開關5的導通;然而當該脈寬調變單元3產生該驅動信號(VG1 )令該功率開關4導通前,該脈寬調變單元3先產生該同步信號(Syn),透過該感應線圈組61觸發該同步控制單元6中的半導體開關Q6,因而牽動該同步整流開關驅動單元51中閂閘迴路的閘極電壓,使該閂閘電路輸出位於低位準狀態,進而截止該同步整流開關5;而該同步整流開關5導通時,該導通週期限制單元7自該同步整流開關5旁擷取一電流或電壓信號,該導通週期限制單元7包含一充放電迴路以及一參考電壓源Vcc,該充放電迴路連接至參考電壓源Vcc,並設定一截止電壓位準,該截止電壓可由半導體開關Q5的轉態電壓決定,當該同步整流開關5導通後該充放電迴路藉由該參考電壓源Vcc而充 電,並由該充放電迴路充電之電壓是否到達該截止電壓位準而決定產生該強迫截止信號之時序,換言之,當該同步整流開關5持續導通,致使該充放電迴路的電壓到達該截止電壓位準,則該半導體開關Q5之工作狀態將改變,亦牽動該閂閘電路之閘極電壓,進而強迫該同步整流開關5截止,確保該返馳式電路的最低運作頻率,若該同步整流開關5受該同步信號觸發截止時會一併觸發該充放電迴路放電,故該導通週期限制單元7可不斷重複回歸初始狀態重新啟始該週期限制時序,而該週期限制時序係由該充放電迴路充電至該截止電壓位準而決定;請參閱圖3-1至圖3-5,其中圖3-1代表該同步整流開關5之閘極電壓波形(CTL),圖3-2代表該同步控制單元6中半導體開關Q6之VCE電壓波形(DR),圖3-3是該變壓器1二次側線圈12兩端電壓波形(PLL),圖3-4為該同步信號之波形(Syn),圖3-5則為該導通週期限制單元7之充放電迴路的電容兩端電壓波形(VC1 );由圖中可見,當該同步信號為高準位時將使該同步整流開關驅動單元51、該導通週期限制單元7之電容電壓、該同步整流開關5之閘極電壓變為低準位,使該同步整流開關5截止,因而圖3-1、圖3-2、圖3-3的波形降至低準位,直到一次側之電流導通狀態改變後,二次側因自激而產生電流與電壓,該充放電迴路也因該同步信號(Syn)觸發而放電,圖3-5之電容兩端電壓波形亦降至低準位。Referring to FIG. 2 and FIG. 3-1 to FIG. 3-5, the schematic diagram is a circuit diagram of an embodiment of the present invention and a waveform diagram of each node of FIG. 2. In this embodiment, the synchronous rectification switch driving unit 51 includes a latching circuit of a high and low level state (mainly composed of semiconductor switches Q3, Q4) to maintain the operating state of the synchronous rectification switch 5, so that the latch circuit is triggered by the self-excited signal of the self-excited coil 2 The stable voltage ensures the conduction of the synchronous rectification switch 5; however, before the pulse width modulation unit 3 generates the drive signal (V G1 ) to turn on the power switch 4, the pulse width modulation unit 3 first generates the synchronization signal ( Syn), triggering the semiconductor switch Q6 in the synchronous control unit 6 through the induction coil group 61, thereby pulling the gate voltage of the latch circuit in the synchronous rectification switch driving unit 51, so that the latch circuit output is in a low level state, Further, the synchronous rectification switch 5 is turned off; and when the synchronous rectification switch 5 is turned on, the conduction period limiting unit 7 draws a current or voltage signal from the synchronous rectification switch 5, and the conduction period limiting unit 7 includes a charging and discharging a loop and a reference voltage source Vcc, the charge and discharge loop is connected to the reference voltage source Vcc, and a cutoff voltage level is set, the cutoff voltage can be determined by the transition voltage of the semiconductor switch Q5, and the charge is turned on when the synchronous rectifier switch 5 is turned on The discharge circuit is charged by the reference voltage source Vcc, and the voltage charged by the charge and discharge circuit reaches the cutoff voltage level to determine the timing of generating the forced cutoff signal, in other words, when the synchronous rectifier switch 5 is continuously turned on, When the voltage of the charge and discharge circuit reaches the cutoff voltage level, the working state of the semiconductor switch Q5 will change, and the gate voltage of the latch circuit is also pulled, thereby forcing the synchronous rectifier switch 5 to be turned off, thereby ensuring the flyback circuit. The minimum operating frequency, if the synchronous rectification switch 5 is triggered by the synchronization signal, the charging and discharging circuit discharge is triggered together, so the conduction period limiting unit 7 can repeatedly repeat the initial state to restart the cycle limiting timing, and The cycle limit timing is determined by charging the charge and discharge loop to the cutoff voltage level; see Figure 3-1 to 3-5, wherein FIG. 3-1 represents the gate voltage waveform (CTL) of the synchronous rectification switch 5, and FIG. 3-2 represents the VCE voltage waveform (DR) of the semiconductor switch Q6 in the synchronous control unit 6, FIG. 3-3 It is the voltage waveform (PLL) of the secondary side coil 12 of the transformer 1, Figure 3-4 shows the waveform of the synchronization signal (Syn), and Figure 3-5 shows the capacitance of the charge and discharge circuit of the conduction period limiting unit 7. The terminal voltage waveform (V C1 ); as can be seen from the figure, when the synchronization signal is at a high level, the synchronous rectification switch driving unit 51, the capacitance voltage of the on-period limiting unit 7, and the gate of the synchronous rectification switch 5 are caused. The voltage becomes a low level, causing the synchronous rectification switch 5 to be turned off, so that the waveforms of FIG. 3-1, FIG. 3-2, and FIG. 3-3 are lowered to a low level until the current conduction state of the primary side is changed, and then The side generates current and voltage due to self-excitation, and the charge and discharge circuit is also discharged by the synchronization signal (Syn), and the voltage waveform across the capacitor of FIG. 3-5 also falls to a low level.

請再參閱圖2以及圖4-1至圖4-5等圖示,圖4-1至4-5等圖示代表圖2中返馳式電路產生異常狀態下各結點之波形圖,其中圖4-1代表該同步整流開關5之閘極電壓波形,圖4-2代表該同步控制單元6之半導體開關Q6之VCE電壓波形,圖4-3代表變壓器1二次側線圈12兩端,圖4-4代表該同步信號(Syn)之波形,圖4-5則為該導通週期限制單元7之充放電迴路的電容兩端電壓波形;首先,特別要注意的是該同步信號(Syn)正常輸出三個脈波後即停止,代表該脈寬調變單元3亦停止輸出該驅動信號(VG1 )使一次側停止動作,若未有該同步信號(Syn)的觸發,該同步整流開關5會持續導通,此時特別值得注意的是圖4-5的充放電迴路電壓,圖4-5中可見該充放電迴路 的電壓到達該截止電壓位準(於該模擬之波形中,該截止電壓位準約為14V)時,該充放電迴路將產生該強迫截止信號強迫該同步整流開關5截止,因此可看到圖4-1、圖4-2與圖4-3之電壓波形仍能維持較低的頻率正常切換,使該返馳式電路不至失去控制。Referring to FIG. 2 and FIG. 4-1 to FIG. 4-5 and the like, the diagrams of FIGS. 4-1 to 4-5 and the like represent the waveform diagrams of the nodes in the abnormal state generated by the flyback circuit in FIG. 2, wherein 4-1 represents the gate voltage waveform of the synchronous rectification switch 5, FIG. 4-2 represents the VCE voltage waveform of the semiconductor switch Q6 of the synchronous control unit 6, and FIG. 4-3 represents the two ends of the secondary side coil 12 of the transformer 1, 4-4 represents the waveform of the synchronization signal (Syn), and FIG. 4-5 shows the voltage waveform across the capacitor of the charge and discharge loop of the conduction period limiting unit 7; first, the synchronization signal (Syn) is particularly noted. After the normal output of the three pulse waves, the pulse width modulation unit 3 also stops outputting the drive signal (V G1 ) to stop the primary side. If there is no trigger of the synchronization signal (Syn), the synchronous rectifier switch 5 will continue to conduct, especially noteworthy is the charge and discharge loop voltage of Figure 4-5, the voltage of the charge and discharge loop reaches the cutoff voltage level in Figure 4-5 (in the waveform of the simulation, the cutoff When the voltage level is about 14V), the charge and discharge circuit will generate the forced cutoff signal to force the synchronous rectifier switch 5 to cut Therefore, it can be seen that the voltage waveforms of FIG. 4-1, FIG. 4-2 and FIG. 4-3 can still maintain a low frequency normal switching, so that the flyback circuit does not lose control.

雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內而所作之些許更動與潤飾,皆應涵蓋於本發明中,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and any modifications and refinements made by those skilled in the art without departing from the spirit and scope of the invention should be In the invention, the scope of the invention is therefore defined by the scope of the appended claims.

綜上所述,本發明較習知之電路增進上述功效,應已充分符合新穎性及進步性之法定創新專利要件,爰依法提出申請,懇請 貴局核准本件發明專利申請案,以勵創作,至感德便。In summary, the conventional circuit of the present invention enhances the above-mentioned effects, and should fully comply with the novelty and progressive statutory innovation patent requirements, and submit an application according to law, and invites your office to approve the invention patent application, to encourage creation, to Feeling the virtues.

1‧‧‧變壓器1‧‧‧Transformer

11‧‧‧一次側線圈11‧‧‧One-side coil

12‧‧‧二次側線圈12‧‧‧second side coil

2‧‧‧自激線圈2‧‧‧Self-excited coil

3‧‧‧脈寬調變單元3‧‧‧ Pulse width modulation unit

4‧‧‧功率開關4‧‧‧Power switch

5‧‧‧同步整流開關5‧‧‧Synchronous rectifier switch

51‧‧‧同步整流開關驅動單元51‧‧‧Synchronous rectifier switch drive unit

6‧‧‧同步控制單元6‧‧‧Synchronous control unit

61‧‧‧感應線圈組61‧‧‧Induction coil set

7‧‧‧導通週期限制單元7‧‧‧Continuation cycle limiting unit

圖1為本發明之電路架構方塊圖。1 is a block diagram of a circuit architecture of the present invention.

圖2為本發明之實施電路圖。Figure 2 is a circuit diagram showing the implementation of the present invention.

圖3-1為該實施電路圖之波形圖(一)。Figure 3-1 is a waveform diagram (1) of the circuit diagram of the implementation.

圖3-2為該實施電路圖之波形圖(二)。Figure 3-2 is a waveform diagram (2) of the circuit diagram of the implementation.

圖3-3為該實施電路圖之波形圖(三)。Figure 3-3 is a waveform diagram (3) of the circuit diagram of the implementation.

圖3-4為該實施電路圖之波形圖(四)。Figure 3-4 is a waveform diagram (4) of the circuit diagram of the implementation.

圖3-5為該實施電路圖之波形圖(五)。Figure 3-5 is a waveform diagram (5) of the circuit diagram of the implementation.

圖4-1為該實施電路於異常狀態下之波形圖(一)。Figure 4-1 is a waveform diagram (1) of the implementation circuit in an abnormal state.

圖4-2為該實施電路於異常狀態下之波形圖(二)。Figure 4-2 shows the waveform (2) of the implementation circuit in an abnormal state.

圖4-3為該實施電路於異常狀態下之波形圖(三)。Figure 4-3 shows the waveform (3) of the implementation circuit in an abnormal state.

圖4-4為該實施電路於異常狀態下之波形圖(四)。Figure 4-4 shows the waveform (4) of the implementation circuit in an abnormal state.

圖4-5為該實施電路於異常狀態下之波形圖(五)。Figure 4-5 shows the waveform of the implementation circuit in an abnormal state (5).

1‧‧‧變壓器1‧‧‧Transformer

11‧‧‧一次側線圈11‧‧‧One-side coil

12‧‧‧二次側線圈12‧‧‧second side coil

2‧‧‧自激線圈2‧‧‧Self-excited coil

3‧‧‧脈寬調變單元3‧‧‧ Pulse width modulation unit

4‧‧‧功率開關4‧‧‧Power switch

5‧‧‧同步整流開關5‧‧‧Synchronous rectifier switch

51‧‧‧同步整流開關驅動單元51‧‧‧Synchronous rectifier switch drive unit

6‧‧‧同步控制單元6‧‧‧Synchronous control unit

61‧‧‧感應線圈組61‧‧‧Induction coil set

7‧‧‧導通週期限制單元7‧‧‧Continuation cycle limiting unit

Claims (6)

一種具備同步控制的返馳式電路,該返馳式電路之一、二次側分別具有感應極性相反之一一次側線圈與二次側線圈,其中該二次側線圈之電流導通週期受控於一同步整流開關之啟閉,該返馳式電路更包括:一脈寬調變單元,係產生一驅動信號控制該一次側線圈之功率開關導通週期,並於產生該驅動信號之前先行輸出一時序領先該驅動信號之同步信號;一同步控制單元,該同步控制單元係藉由一感應線圈組取得該同步信號,並以該同步信號使同步整流開關截止;一導通週期限制單元,係於該同步整流開關導通後啟始一週期限制時序,其中,於該同步信號截止該同步整流開關後,該導通週期限制單元將重置回初始狀態,且該同步整流開關持續導通至該週期限制時序結束時,該導通週期限制單元產生一強迫截止信號截止該同步整流開關之導通,以維持該返馳式電路運作之最低工作頻率。A flyback circuit with synchronous control, one of the secondary circuits and the secondary side respectively have one primary side coil and a secondary side coil with opposite polarity, wherein the current conduction period of the secondary side coil is controlled In a synchronous rectification switch, the flyback circuit further includes: a pulse width modulation unit that generates a driving signal to control a power switch on period of the primary side coil, and outputs the first time before generating the driving signal a synchronization signal that leads the driving signal; a synchronous control unit that acquires the synchronization signal by an induction coil group and turns off the synchronous rectifier switch with the synchronization signal; a conduction period limiting unit is After the synchronous rectification switch is turned on, a period limit timing is started, wherein after the synchronization signal turns off the synchronous rectification switch, the on period limiting unit is reset back to an initial state, and the synchronous rectification switch is continuously turned on until the end of the period limit timing The on-period limiting unit generates a forced-off signal to turn off the conduction of the synchronous rectification switch to maintain the Fly-lowest operating frequency of the circuit operation. 如申請專利範圍第1項所述之具備同步控制的返馳式電路,其中該二次側更包括一自激線圈與該一次側線圈耦合,而透過該一次側線圈之極性變化產生一自激信號,並藉由該自激信號驅動該同步整流開關。The flyback circuit with synchronous control according to claim 1, wherein the secondary side further includes a self-excited coil coupled to the primary side coil, and a self-excited is generated by a polarity change of the primary side coil. And driving the synchronous rectification switch by the self-excited signal. 如申請專利範圍第1項或第2項所述之具備同步控制的返馳式電路,其中該同步整流開關更連接至一同步整流開關驅動單元,該同步整流開關驅動單元依據該同步信號、強迫截止信號以及自激信號決定同步整流開關導通之時序。The flyback circuit with synchronous control as described in claim 1 or 2, wherein the synchronous rectification switch is further connected to a synchronous rectification switch driving unit, and the synchronous rectification switch driving unit is forced according to the synchronization signal The cutoff signal and the self-excited signal determine the timing at which the synchronous rectification switch is turned on. 如申請專利範圍第3項所述之具備同步控制的返馳式電路,其中同步整流開關驅動單元包含一具有高、低準位狀態之閂閘迴路以控制該同步整流開關之工作狀態。The flyback circuit with synchronous control according to claim 3, wherein the synchronous rectification switch driving unit comprises a latch circuit having a high and low level state to control an operating state of the synchronous rectification switch. 如申請專利範圍第1項所述之具備同步控制的返馳式電路,其中該導通週期限制單元包含一充放電迴路以及一參考電壓源,該充放電迴路連接該參考電壓源,並設定一截止電壓位準,由該充放電迴路充電之電壓是否到達該截止電壓位準而決定產生該強迫截止信號之時序。The flyback circuit with synchronization control according to claim 1, wherein the conduction period limiting unit comprises a charging and discharging circuit and a reference voltage source, the charging and discharging circuit is connected to the reference voltage source, and a cutoff is set. The voltage level determines whether the voltage of the charge and discharge circuit reaches the cutoff voltage level to determine the timing of generating the forced cutoff signal. 如申請專利範圍第5項所述之具備同步控制的返馳式電路,其中該週期限制時序係由該充放電迴路充電至該截止電壓位準而決定。The flyback circuit with synchronous control according to claim 5, wherein the cycle limit timing is determined by charging the charge and discharge circuit to the cutoff voltage level.
TW097127237A 2008-07-18 2008-07-18 With synchronous control of the return-type circuit TWI382643B (en)

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