TWI362590B - Storage apparatus with ieee1394 interface - Google Patents

Storage apparatus with ieee1394 interface Download PDF

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Publication number
TWI362590B
TWI362590B TW95111390A TW95111390A TWI362590B TW I362590 B TWI362590 B TW I362590B TW 95111390 A TW95111390 A TW 95111390A TW 95111390 A TW95111390 A TW 95111390A TW I362590 B TWI362590 B TW I362590B
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microprocessor
interface controller
signal
connector
flash memory
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TW95111390A
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Chinese (zh)
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TW200737195A (en
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Ke-You Hu
Yong-Xing You
Qian-Sheng Liu
Feng-Long He
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Hon Hai Prec Ind Co Ltd
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Description

1362590 六、發明說明: 【發明所屬之技術領域】 [0001] 本發明係關於一種存儲裝置,尤係一種可與電腦 1£££1394介面連接的穩定性高的1£££1394存儲裝置。 【先前技術】 [0002] IEEE1394介面是一種電氣與電子工程師協會(IEEE, Institute of electrical and Electronic En~ gineers)制定的資料傳輸匯流排介面標準,IEEEI394 有兩種標準介面:IEEE1394a介面和IEEE1394b介面。 IEEE1394a 介面可支援 100 Mbps、200 Mbps、 400Mbps的資料傳輸速度,具有熱插拔功能。 IEEE1 394b是一種高速傳輸匯流排介面標準,其擴展了 IEEE1 394a的傳輸速度,IEEE1394b介面可支援 800Mbps的資料傳輸速率。目前IEEE 1394a/b介面爲桌 上型電腦、筆記型電腦、伺服器、工作站與消費性電子 産品的重要輸出周邊設備,可進行多媒體應用的資料即 時傳輸。 [0003] 目前在電腦的存儲裝置中經常用到具有IEEE1394介面的 外置硬碟,透過與電腦的IEEE1394a/b介面連接來讀入 或寫出資料,而IEEE1394外置硬碟較昂貴,其驅動機構 爲機械構造,嗓音大’體積大’重量很難減輕,在撞擊 、震動、干擾等情況下,容易造成資料的損壞。 【發明内容】 [0004] 有鑒於此,有必要提供一種穩定性高的IEEE1394存f堵| 置。 095111390 表單編號A0101 第4頁/共10頁 1003422232-0 1362590 1100年11月16日修正替 [0005] 一種IEEE1394存儲裝置,包括IEEE1 394連接器、與該 IEEE1394連接器連接的介面控制器、與該介面控制器連 接的微處理器、與該微處理器連接的快閃記憶體晶片及 連接在該介面控制器與該微處理器之間的鎖存器,當寫 入訊號至該IEEE1394存儲裝置時,該微處理器可將該介 面控制器從該IEEE1394連接器接收的訊號轉換成該快閃 記憶體晶片所能識別的訊號’並儲存在該快閃記憶體晶 片中,讀出時,該微處理器將儲存在該快閃記憶體晶片 的訊號轉換成該介面控制器可識別的訊號,並透過該 IEEE1394連接器傳出’在該微處理器與該介面控制進行 通訊時,該微處理器將位址訊號鎖存在該鎖存器中,以 與該介面控制器相互傳送資料訊號。 [0006] 相較習知技術,該IEEE1394存儲裝置符合IEEE1394介 面協定,採用半導體快閃記憶體晶片,穩定性高,它可 以取代習知的IEEE1394外置硬碟,即使在撞擊、震動、 干擾等情況下,也不會損壞所存儲的資料》 【實施方式】 [0007] 請參考圖1,一種IEEE1 394存儲裝置的較佳實施方式包 括IEEE1394連接器10、與該IEEE1394連接器10連接的 介面控制器12、與該介面控制器12連接的微處理器14、 連接在該介面控制器12及該微處理器14之間的鎖存器16 及與該微處理器14連接的快閃記憶體晶片18。 [0008] 該IEEE1 394連接器10爲IEEE1394b-2000介面標準的連 接器,該介面控制器12選用美國德州儀器(TI)公司的 TSB43AA82晶片,該微處理器14選用愛特梅爾(Atmel 095111390 表單編號A0101 第5頁/共10頁 1003422232-0 1362590 _. 100年.11月16日修正替換頁. )公司的AT89C51晶片’該鎖存器16選用美國德州儀器 (TI )公司的74ACT 1 1 373晶片,該快閃記憶體晶片1 8選 用意法半導體(ST)公司的NAND256R3A晶片。 [0009] 該 IEEE1394 連接器 10 的引腳 TPA+、TPA-、TPB+、TPB-分別與該介面控制器1 2的引腳TPA1P、TPA1N ' TPB1P、 TPB1N連接,該IEEE1394連接器1〇的引腳GND接地》該 IEEE1 394連接器10的引腳PWR與第一電壓轉換器20的引 腳Vin連接’該第一電壓轉換器20的引腳Vcc與該介面控 制器12的引腳VCC連接,來提供+ 3.3V電源》該 IEEE 13 94連接器10的引腳PWR與第二電壓轉換器22的引 腳Vin連接’該第二電壓轉換器22的引腳Vcc分別與該鎖 存器16及該微處理器14的引腳VCC連接,分別提供+ 5. 0V ' 電源。該IEEE1394連接器1〇的引腳pWR與第三電壓轉換 器24的引腳Vin連接’該第三電壓轉換器24的引腳Vcc與 該快閃記憶體晶片18的引腳vcc連接,來提供+ 1. 8V電源 〇 [0010] 該介面控制器 12的引腳XCS、XINT、XRD、XWR、XWai t 、DA[7:0]分別與該微處理器14的引腳p3. 0、P3. 1、 卩3.2、?3,3、?3.4、?1[7:〇]連接。該介面控制器12 的引腳DA[15:8]與該鎖存器16的引腳Q[7:〇]相連接, 該介面控制器12的引腳M8M16、MuxMode、GND接地。 該鎖存器16的引腳D[7:〇]、le、/〇E分別與該微處理器 14的引腳Pl[7:〇]、P3. 5、P3. 6連接,該鎖存器16的引 腳GND接地。 [0011] 該微處理器 14的引腳P0. 〇、P0 1、p〇 2、p〇 3、 095111390 表單编號A0101 第6頁/共10頁 1003422232-0 1362590 100年.11月16日修正替^頁 P0.4、P2[7:0]、P0.5、P0.6分別與該快閃記憶體晶 片 18的引腳/E、/R、/W、CL、AL、I/〇[7:〇]、/WP、 R-/B連接,該微處理器14的引腳GND接地,該快閃記憶 體晶片18的引腳GND接地。同時,該第三電壓轉換器24的 電源引腳VCC透過電阻R1與該微處理器14的引腳p〇. 6及 該快閃記憶體晶片18的引腳R-/B相連接。 [0012] 應用時’該IEEE1394連接器10可與主機板的IEEE1394 介面連接。該微處理器14配合韌體執行資料轉換工作,· 當從主機板硬碟寫入訊號至該IEEE1394存儲裝置時,該 訊號透過該IEEE 1394連接器1〇傳輸至該介面控制器12, 該微處理器14可將該介面控制器12傳輸的訊號轉換成快 閃記憶體訊號,並儲存在該快閃記憶體晶片18中。當讀 出時,該微處理器14將該快閃記憶體訊號轉換成該介面 控制器12可識別的訊號,最後透過該IEEE1394連接器1〇 傳出至主機板硬碟。在該微處理器14與該介面控制器12 通仏時,該微處理器14的引腳pi [7:〇]將位.址訊號鎖存 在該鎖存器16中,該微處理器14的引腳ρι[7:〇]與該介 面控制器12相互傳送資料訊號。 [0013] 該IEEE1394存儲裝置可存儲主機板硬碟中的資料,亦可 將存儲的資料轉存於主機板硬碟中。該^肫1394存儲裝 置符合IEEE1394介面協定,採用半導體㈣記憶體晶片 ,穩定性咼,它可以取代習知的IEEE1394外置硬碟即 使在撞擊、震動、干擾等情況下,也不會損壞所存儲的 資料。 [0014] 09511139ο ‘上所述’本發日績合發明專利要件,爰依法提出專利 1003422232-0 表單編號A_ 第7頁/共1()頁 1362590 [0015] [0016] [0017] [0018] [0019] [0020] [0021] [0022] [0023] [0024] . 100年11月16日按正替換頁 申請。惟,以上所述者僅為本發明之較佳實施例,舉凡 ♦ 熟悉本案技藝之人士,在爰依本發明精神所作之等效修 飾或變化,皆應包含於以下之申請專剎範園内。 【圖式簡單說明】 圖1係本發明IEEE1394存儲裴置的较住實施方式的電路 圖。 【主要元件符號說明】 IEEE1 394連接器:1〇 介面控制器:12 微處理·器:14 鎖存器:16 快閃記憶體晶片:18 第一電壓轉換器:20 第二電壓轉換器:22 第三電壓轉換器:24 電阻:R1 095111390 表單编號A0101 第8頁/共 頁 1003422232-01362590 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a storage device, and more particularly to a highly stable 1 ££1394 storage device that can be connected to a computer interface. [Prior Art] [0002] The IEEE1394 interface is a data transmission bus interface standard developed by the Institute of Electrical and Electronic Engineers (IEEE). The IEEEI394 has two standard interfaces: the IEEE1394a interface and the IEEE1394b interface. The IEEE1394a interface supports data transfer speeds of 100 Mbps, 200 Mbps, and 400 Mbps, and is hot swappable. IEEE1 394b is a high-speed transmission bus interface standard that extends the transmission speed of IEEE1 394a. The IEEE1394b interface supports data transmission rates of 800 Mbps. Currently, the IEEE 1394a/b interface is an important output peripheral for desktop computers, notebook computers, servers, workstations, and consumer electronics, enabling instant data transfer for multimedia applications. [0003] At present, an external hard disk with an IEEE1394 interface is often used in a storage device of a computer, and data is read or written through an IEEE1394a/b interface connected to a computer, and an IEEE1394 external hard disk is expensive, and the driver is driven. The mechanism is a mechanical structure, and the large volume of the sound is difficult to reduce. In the case of impact, vibration, interference, etc., it is easy to cause data damage. SUMMARY OF THE INVENTION [0004] In view of the above, it is necessary to provide a high stability IEEE 1394 memory. 095111390 Form No. A0101 Page 4 / Total 10 Page 1003422232-0 1362590 November 16, 1100 Revision [0005] An IEEE1394 storage device including an IEEE1 394 connector, an interface controller connected to the IEEE 1394 connector, and the like a microprocessor connected to the interface controller, a flash memory chip connected to the microprocessor, and a latch connected between the interface controller and the microprocessor, when writing a signal to the IEEE 1394 storage device The microprocessor can convert the signal received by the interface controller from the IEEE1394 connector into a signal recognizable by the flash memory chip and store it in the flash memory chip. The processor converts the signal stored in the flash memory chip into a signal recognizable by the interface controller, and transmits the signal through the IEEE1394 connector, when the microprocessor communicates with the interface control, the microprocessor The address signal is latched in the latch to transmit a data signal to the interface controller. Compared with the prior art, the IEEE 1394 memory device conforms to the IEEE 1394 interface protocol, and uses a semiconductor flash memory chip with high stability, which can replace the conventional IEEE 1394 external hard disk, even in impact, vibration, interference, etc. In this case, the stored data is not damaged. [Embodiment] Referring to FIG. 1, a preferred embodiment of an IEEE1 394 storage device includes an IEEE1394 connector 10 and interface control connected to the IEEE1394 connector 10. 12, a microprocessor 14 connected to the interface controller 12, a latch 16 connected between the interface controller 12 and the microprocessor 14, and a flash memory chip connected to the microprocessor 14. 18. [0008] The IEEE1 394 connector 10 is a connector of the IEEE1394b-2000 interface standard, and the interface controller 12 is selected from the TSB43AA82 chip of Texas Instruments, which uses Atmel 095111390 form. No. A0101 Page 5 / Total 10 pages 1003422232-0 1362590 _. 100 years. November 16th revised replacement page.) The company's AT89C51 chip 'The latch 16 uses Texas Instruments (TI) 74ACT 1 1 373 The wafer, the flash memory chip 18 is selected from the NAND256R3A chip of STMicroelectronics. [0009] The pins TPA+, TPA-, TPB+, and TPB- of the IEEE1394 connector 10 are respectively connected to the pins TPA1P, TPA1N'TPB1P, and TPB1N of the interface controller 12, and the pin GND of the IEEE1394 connector 1〇 Grounding: The pin PWR of the IEEE1 394 connector 10 is connected to the pin Vin of the first voltage converter 20. The pin Vcc of the first voltage converter 20 is connected to the pin VCC of the interface controller 12 to provide + 3.3V power supply" The pin PWR of the IEEE 13 94 connector 10 is connected to the pin Vin of the second voltage converter 22 'the pin Vcc of the second voltage converter 22 is respectively associated with the latch 16 and the micro The pin 14 of the processor 14 is connected to provide a + 5. 0V 'power supply. The pin pWR of the IEEE1394 connector is connected to the pin Vin of the third voltage converter 24, and the pin Vcc of the third voltage converter 24 is connected to the pin vcc of the flash memory chip 18 to provide + 1. 8V power supply [0010] The pins XCS, XINT, XRD, XWR, XWai, and DA[7:0] of the interface controller 12 are respectively connected to the pins p3. 0, P3 of the microprocessor 14. 1, 卩 3.2,? 3,3,? 3.4,? 1[7:〇] connection. The pin DA[15:8] of the interface controller 12 is connected to the pin Q[7:〇] of the latch 16, and the pins M8M16, MuxMode, and GND of the interface controller 12 are grounded. The pins D[7:〇], le, /〇E of the latch 16 are respectively connected to the pins P1[7:〇], P3. 5, P3.6 of the microprocessor 14, and the latches are connected. Pin 16 of GND is grounded. [0011] The pins P0. P, P0 1, p 〇 2, p 〇 3, 095111390 of the microprocessor 14 Form No. A0101 Page 6 / Total 10 pages 1003422232-0 1362590 100 years. November 16 correction For the pages P0.4, P2[7:0], P0.5, and P0.6, respectively, the pins /E, /R, /W, CL, AL, I/〇 of the flash memory chip 18 [ 7: 〇], /WP, R-/B connection, the pin GND of the microprocessor 14 is grounded, and the pin GND of the flash memory chip 18 is grounded. At the same time, the power pin VCC of the third voltage converter 24 is connected to the pin p 〇 6 of the microprocessor 14 and the pin R-/B of the flash memory chip 18 through the resistor R1. [0012] When applied, the IEEE1394 connector 10 can be connected to the IEEE 1394 interface of the motherboard. The microprocessor 14 performs a data conversion operation with the firmware. When a signal is written from the motherboard hard disk to the IEEE1394 storage device, the signal is transmitted to the interface controller 12 through the IEEE 1394 connector. The processor 14 can convert the signal transmitted by the interface controller 12 into a flash memory signal and store it in the flash memory chip 18. When read, the microprocessor 14 converts the flash memory signal into a signal identifiable by the interface controller 12, and finally transmits the signal to the motherboard hard disk through the IEEE 1394 connector. When the microprocessor 14 is in communication with the interface controller 12, the pin pi [7: 〇] of the microprocessor 14 latches the bit address signal in the latch 16, the microprocessor 14 The pin ρι[7:〇] and the interface controller 12 transmit data signals to each other. [0013] The IEEE 1394 storage device can store data in the hard disk of the motherboard, and can also transfer the stored data to the hard disk of the motherboard. The 1394 storage device conforms to the IEEE 1394 interface protocol, and adopts a semiconductor (four) memory chip, which is stable, and can replace the conventional IEEE 1394 external hard disk without damaging the storage even in the case of impact, vibration, interference, and the like. data of. [0014] 09511139ο 'The above-mentioned 'the present day's performance and invention patent requirements, 爰 patents 1003422232-0 Form No. A_ Page 7 / Total 1 () Page 1362590 [0016] [0017] [0018] [0024] [0024] [0024] [0024] On November 16, 100, the application is replaced by the replacement page. However, the above description is only the preferred embodiment of the present invention, and those skilled in the art will be included in the following application for the equivalent modification or variation in accordance with the spirit of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram of a preferred embodiment of an IEEE 1394 memory device of the present invention. [Main component symbol description] IEEE1 394 connector: 1〇 interface controller: 12 microprocessors: 14 latches: 16 flash memory chips: 18 first voltage converter: 20 second voltage converter: 22 Third voltage converter: 24 Resistor: R1 095111390 Form number A0101 Page 8 / Total page 1003422232-0

Claims (1)

1362590 100年11月1β曰修正_頁 七、申請專利範圍:’ 1 . 一種ΙΕΕΕ1394存儲裝置,包括ΙΕΕΕ1 394連接器及與該 ΙΕΕΕ1 394連接器連接的介面控制器,其改良在於:該 IEEE 1 394存儲裝置還包括與該介面控制器連接的微處理 器、與該微處理器連接的快閃記憶體晶片及連接在該介面 控制器與該微處理器之間的鎖存器,當寫入訊號至該 IEEE1 394存健裝置時,該微處理器將該介面控制器從該 IEEE1 394連接器接收的訊號轉換成該快閃記憶體晶片所 能識別的訊號,並儲存在該快閃記憶體晶片中,讀出時, 該微處理器將儲存在該快閃記憶體晶片的訊號轉換成該介 面控制器可識別的訊號,並透過該IEEE1394連接器傳出 ,在該微處理器與該介面控制進行通訊時,該微處理器將 位址訊號鎖存在該鎖存器中,以秦該介面控制器相互傳送 資料訊號。 2 .如申請專利範圍第1項所述之ΙΕΕΕ1394存儲裝置,進一步 還包括複數電壓轉換器,該等電壓轉換器分別連接在該 IΕΕΕ1 394連接器與該介面控制器、鎖存器、微處理器及 快閃記憶體晶片之間,該ΙΕΕΕ1394連接器透過該等電壓 轉換器分別爲該介面控制器、鎖存器、微處理器及快閃記 憶體晶片提供工作電源》 095111390 表單编號Α0Ι01 第9頁/共10頁 1003422232-01362590 November 2001 1β曰 Revision_Page VII, Patent Application Range: '1. A ΙΕΕΕ1394 storage device comprising a ΙΕΕΕ1 394 connector and an interface controller connected to the ΙΕΕΕ1 394 connector, the improvement being: the IEEE 1 394 The storage device further includes a microprocessor connected to the interface controller, a flash memory chip connected to the microprocessor, and a latch connected between the interface controller and the microprocessor, when the signal is written When the IEEE1 394 storage device is used, the microprocessor converts the signal received by the interface controller from the IEEE1 394 connector into a signal recognizable by the flash memory chip, and stores the signal in the flash memory chip. During reading, the microprocessor converts the signal stored in the flash memory chip into a signal recognizable by the interface controller, and transmits the signal through the IEEE1394 connector, and controls the microprocessor and the interface. When communicating, the microprocessor latches the address signal in the latch, and the interface controller transmits data signals to each other. 2. The 1394 storage device according to claim 1, further comprising a plurality of voltage converters respectively connected to the I ΕΕΕ 1 394 connector and the interface controller, the latch, and the microprocessor And between the flash memory chips, the ΙΕΕΕ 1394 connector provides operating power for the interface controller, the latch, the microprocessor, and the flash memory chip through the voltage converters respectively. 095111390 Form No. Α0Ι01 9th Page / Total 10 pages 1003422232-0
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