CN109542815A - A kind of high-speed d/a system and working method based on USB3.0 interface - Google Patents
A kind of high-speed d/a system and working method based on USB3.0 interface Download PDFInfo
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- CN109542815A CN109542815A CN201811138480.2A CN201811138480A CN109542815A CN 109542815 A CN109542815 A CN 109542815A CN 201811138480 A CN201811138480 A CN 201811138480A CN 109542815 A CN109542815 A CN 109542815A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
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- Computer Hardware Design (AREA)
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- General Physics & Mathematics (AREA)
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Abstract
A kind of high-speed d/a system based on USB3.0 interface turns PCIe bridge piece module, FPGA Gate Array module, DDR3 module, high-speed d/a control module and high speed amplifier module composition by USB；Its working method includes initialization, data transmission, storage, conversion, data output；By using DDRIP core, DDR data read-write control is realized, it is final to realize the function that D/A output is controlled by USB.
Description
Technical field
The present invention relates to the technical field of communication protocol converter, specifically a kind of high speed D/ based on USB3.0 interface
A(Digital to Analog, digital quantity is to analog quantity) system and working method.
Background technique
USB(Universal Serial Bus, universal serial bus) it is an external bus standard, it is used for specification computer
With being connected and communicate with for external equipment, applied in PC(Personal Computer, personal computer) the interface skill in field
Art, the plug and play and warm connection function of interface holding equipment.USB 3.0 is connected with PC or audio/high-frequency apparatus
Various equipment provide a standard interface.While USB 3.0 keeps the compatibility with USB 2.0, biography is also greatly improved
Defeated bandwidth (theory is up to 5Gbps full duplex), and new agreement makes the more efficient of data processing.For example, one is adopted
The data of 1GB can be transferred to a host at 15 seconds with the flash drive of USB 3.0, and USB 2.0 then needs 43
Second.
PXIe(PCI extensions for Instrumentation express, the PCI extension towards instrument system
Bus) it is based on Compact PCI standard, clock and synchronous Trigger Bus are increased on its basis.PXIe is with respect to PXI(PCI
Extensions for Instrumentation, the PCI extension towards instrument system) most significant improvement and advantage be that
It incorporates PCI Express(Peripheral component interconnect express, and high speed serialization computer expands
Open up bus) the characteristics of, using serial transmission, the bus topolopy of point-to-point.Using PCI Express technology, PXIe is by PXI
In available bandwidth improve more than 45 times, i.e., be increased to 6GB/s from 132MB/s；At the same time, it can also maintain and PXI module
Between software, hardware compatibility.
D/A conversion can be used as the use of high speed signal source, can produce the electric test signal of special parameter needed for circuit-under-test.Mould
Pumping signal in quasi- real work, for testing, studying or adjusting some electric parameters of electronic circuit.High-speed d/a mould at present
Block product is larger, needs individual power supply system, modular structure is complicated and not portable enough.
Summary of the invention
The purpose of the present invention is to provide a kind of high-speed d/a system and working method based on USB3.0 interface, it can be with
Overcome the deficiencies in the prior art is that a kind of structure is simple, circuit structure easy to accomplish and method.
Technical solution of the invention: a kind of high-speed d/a system based on USB3.0 interface, it is characterised in that it is wrapped
Include: USB turns PCIe bridge piece module, FPGA Gate Array module, DDR3(Double Data Rate SDRAM, and Double Data Rate is synchronous
Dynamic RAM) module, high-speed d/a control module and high speed amplifier module；Wherein, the USB turns PCIe bridge piece module
Realize that FPGA Gate Array module is connected with the bi-directional data of external USB interface；The FPGA Gate Array module and DDR3 module it
Between in being bi-directionally connected；The high-speed d/a control module is connect with FPGA Gate Array module, and output end connects high speed amplifier module
Input terminal；The output end of the high speed amplifier module is connect by external connector with external equipment.
The USB turns the PCIe bus IP(intellectual for the offer that PCIe bridge piece module is Xilinx company
Property, intellectual property, IP kernel are ip module) core, usb bus is converted into PCIe bus.
The USB turns the JMS583 that PCIe bridge piece module uses the production of Jmicron company；The JMS583 is the whole world first
A USB bridging chip for PCIe design, is a built-in USB3.1 Gen2 (10Gbps) and PCIe Gen3 x2
Bridging chip, continuously reading and writing average speed may be up to 1000MB/s, is 10 times of the external HDD of tradition, is also external SATA
The 2 times or more of SSD.
The FPGA Gate Array module is Xilinx Kintex7 Series FPGA gate array XC7K325TFFG676, in FPGA
PXIe bus protocol is realized in gate array.
The DDR3 module uses the DDR3 chip MT41K128M16JT-125IT of MICRON company.
The high-speed d/a control module uses the DAC5672 chip of TI company production；The DAC5672A device is a
Monolithic, binary channels, 14 high-speed DAC chips with on-chip voltage reference；The DAC5672A can be in up to 275MSPS
Turnover rate under run, there are outstanding dynamic property, stringent gain and offset matching properties, therefore be highly suitable for I/Q base
Band or directly IF communications applications.
The high speed amplifier module uses the THS3217 chip of TI company；It is complementary that the THS3217 chip incorporates connection
Electric current exports key signal chain component required when digital analog converter.This great flexibility of two-stage amplifier system, can answer extensively
Difference for providing low distortion, dc-couple in sorts of systems turns single-ended signal processing.
The high speed amplifier module is made of two pieces of THS3217 chips.
A kind of working method of the high-speed d/a system based on USB3.0 interface, it is characterised in that it the following steps are included:
(1) system starts enter wait state after completing initialization；
(2) when FPGA Gate Array module can receive the data for needing to carry out D/A conversion being passed to by USB interface, then
FPGA Gate Array module can be first by the storage of this communication data into DDR3 module；If data are not written for USB interface, it is
System such as is still at the data mode to be written；
(3) when USB interface receives the control signal of data output, FPGA Gate Array module is then according to control signal behavior needs
The data of high-speed d/a control module are output to, and transfer data to high-speed d/a control module, to control the output of its data；If
When being not received by the instruction for sending data, the data modes to be sent such as system is still within.
Of the invention to be advantageous in that: structure is simple, easy to accomplish；By using DDRIP core, the reading of DDR data is realized
Control is write, to realize the function of controlling D/A output by USB.
Detailed description of the invention
Fig. 1 is a kind of overall structure diagram of the high-speed d/a system based on USB3.0 interface involved by the present invention.
Fig. 2 is a kind of working principle flow diagram of the high-speed d/a system based on USB3.0 interface involved by the present invention.
Specific embodiment
Embodiment；A kind of high-speed d/a system based on USB3.0 interface, as shown in Figure 1, it is characterised in that it includes: USB
Turn PCIe bridge piece module, FPGA Gate Array module, DDR3(Double Data Rate SDRAM, Double Data Rate synchronous dynamic with
Machine memory) module, high-speed d/a control module and high speed amplifier module；Wherein, the USB turns the realization of PCIe bridge piece module
FPGA Gate Array module is connected with the bi-directional data of external USB interface；It is between the FPGA Gate Array module and DDR3 module
It is bi-directionally connected；The high-speed d/a control module is connect with FPGA Gate Array module, and output end connects the defeated of high speed amplifier module
Enter end；The output end of the high speed amplifier module is connect by external connector with external equipment.
The USB turns the PCIe bus IP Core that PCIe bridge piece module is the offer of Xilinx company, and usb bus is converted
PCIe bus, as shown in Figure 1.
The USB turns the JMS583 that PCIe bridge piece module uses the production of Jmicron company, as shown in Figure 1；The JMS583
It is USB bridging chip of first, the whole world for PCIe design, is a built-in USB3.1 Gen2 (10Gbps) and PCIe
The bridging chip of Gen3 x2, continuously reading and writing average speed may be up to 1000MB/s, be 10 times of the external HDD of tradition, also for
The 2 times or more of external SATA SSD.
The FPGA Gate Array module is Xilinx Kintex7 Series FPGA gate array XC7K325TFFG676, in FPGA
PXIe bus protocol is realized in gate array.
The DDR3 module uses the DDR3 chip MT41K128M16JT-125IT of MICRON company, as shown in Figure 1.
The high-speed d/a control module uses the DAC5672 chip of TI company production, as shown in Figure 1；The DAC5672A
Device is a monolithic with on-chip voltage reference, binary channels, 14 high-speed DAC chips；The DAC5672A can be in height
It is run under up to the turnover rate of 275MSPS, there are outstanding dynamic property, stringent gain and offset matching properties, therefore very suitable
For I/Q base band or direct IF communications applications.
The high speed amplifier module uses the THS3217 chip of TI formula, as shown in Figure 1；The THS3217 chip integration
Required key signal chain component when connection complementary current output digital analog converter.This two-stage amplifier system is great flexibly
Property, it can be widely applied in sorts of systems turn single-ended signal processing to provide the difference of low distortion, dc-couple.
The high speed amplifier module is made of two pieces of THS3217 chips, as shown in Figure 1.
A kind of working method of the high-speed d/a system based on USB3.0 interface, as shown in Figure 2, it is characterised in that it includes
Following steps:
(1) system starts enter wait state after completing initialization；
(2) when FPGA Gate Array module can receive the data for needing to carry out D/A conversion being passed to by USB interface, then
FPGA Gate Array module can be first by the storage of this communication data into DDR3 module；If data are not written for USB interface, it is
System such as is still at the data mode to be written；
(3) when USB interface receives the control signal of data output, FPGA Gate Array module is then according to control signal behavior needs
The data of high-speed d/a control module are output to, and transfer data to high-speed d/a control module, to control the output of its data；If
When being not received by the instruction for sending data, the data modes to be sent such as system is still within.
Below with reference to embodiment and its attached drawing, the present invention is described in more detail.
A kind of structural block diagram for high-speed d/a system based on USB3.0 interface that the present invention designs is as shown in Figure 1, equipment master
It to include that USB turns PCIe bridge piece module, Xilinx Kintex7 Series FPGA Gate Array module, DDR3 module, high-speed d/a control
Module and high speed amplifier module.
Module by USB interface access bridge piece JMS583 USB interface in, as Fig. 1 1. shown in.Module is real using JMS583
Showed be by usb bus protocol conversion PCIe bus protocol function, by by the same gate array of the PCIe interface of JMS583
The GTX interface of XC7K325TFFG676 is attached, and the transmission of PCIe bus data may be implemented.Use the DDR IP of gate array
Core, module by USB be passed to need to carry out D/A conversion data store into DDR, as Fig. 1 2. shown in.Module passes through
Usb bus is converted to PCIe bus and introduces gate array XC7K325TFFG676 by JMS583, i.e., believes the control of usb bus input
Number, the digital quantity that need to carry out D/A conversion be converted to PCIe bus signal transmission into gate array.Gate array is exported according to usb bus
The control signal to come over, stores data into DDR, and needs to be output to the number of D/A control module according to control signal behavior
According to.The connection of gate array and DAC5672 use the common I/O interface of FPGA, will need to export according to the read-write sequence of DAC5672
Data be written in two ALT-CH alternate channels of D/A control module, the output after D/A control module converts is directly accessed height
The input terminal of fast amplifier THS3217, to improve the fan-out capability of module, as Fig. 1 3. shown in.
Above embodiments are only to a kind of concrete application example of the high-speed d/a control system based on USB3.0 interface of the present invention
Son not, limits the claim of this application.All modifications and non-intrinsically safe carried out in the claim of this application technical solution change
Into, within the claim of this application protection scope.The present invention does not address place and is suitable for the prior art.
Claims (9)
1. a kind of high-speed d/a system based on USB3.0 interface, it is characterised in that it includes: that USB turns PCIe bridge piece module, FPGA
Gate Array module, DDR3 module, high-speed d/a control module and high speed amplifier module；Wherein, the USB turns PCIe bridge piece module
Realize that FPGA Gate Array module is connected with the bi-directional data of external USB interface；The FPGA Gate Array module and DDR3 module it
Between in being bi-directionally connected；The high-speed d/a control module is connect with FPGA Gate Array module, and output end connects high speed amplifier module
Input terminal；The output end of the high speed amplifier module is connect by external connector with external equipment.
2. a kind of high-speed d/a system based on USB3.0 interface according to claim 1, it is characterised in that the USB turns
PCIe bridge piece module is the PCIe bus IP Core of the offer of Xilinx company, for usb bus to be converted PCIe bus.
3. a kind of high-speed d/a system based on USB3.0 interface according to claim 2, it is characterised in that the USB turns
PCIe bridge piece module uses the JMS583 of Jmicron company production.
4. a kind of high-speed d/a system based on USB3.0 interface according to claim 1, it is characterised in that the FPGA gate array
Column module is Xilinx Kintex7 Series FPGA gate array XC7K325TFFG676, and it is total to realize PXIe in FPGA gate array
Wire protocol.
5. a kind of high-speed d/a system based on USB3.0 interface according to claim 1, it is characterised in that the DDR3 module
Using the DDR3 chip MT41K128M16JT-125IT of MICRON company.
6. a kind of high-speed d/a system based on USB3.0 interface according to claim 1, it is characterised in that the high-speed d/a
Control module uses the DAC5672 chip of TI company production.
7. a kind of high-speed d/a system based on USB3.0 interface according to claim 1, it is characterised in that the high speed amplifier
Module uses the THS3217 chip of TI company.
8. a kind of high-speed d/a system based on USB3.0 interface according to claim 7, it is characterised in that the high speed amplifier
Module is made of two pieces of THS3217 chips.
9. a kind of working method of the high-speed d/a system based on USB3.0 interface, it is characterised in that it the following steps are included:
(1) system starts enter wait state after completing initialization；
(2) when FPGA Gate Array module can receive the data for needing to carry out D/A conversion being passed to by USB interface, then
FPGA Gate Array module can be first by the storage of this communication data into DDR3 module；If data are not written for USB interface, it is
System such as is still at the data mode to be written；
(3) when USB interface receives the control signal of data output, FPGA Gate Array module is then according to control signal behavior needs
The data of high-speed d/a control module are output to, and transfer data to high-speed d/a control module, to control the output of its data；If
When being not received by the instruction for sending data, the data modes to be sent such as system is still within.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811138480.2A CN109542815A (en) | 2018-09-28 | 2018-09-28 | A kind of high-speed d/a system and working method based on USB3.0 interface |
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| CN201811138480.2A CN109542815A (en) | 2018-09-28 | 2018-09-28 | A kind of high-speed d/a system and working method based on USB3.0 interface |
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Cited By (2)
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| CN110460912A (en) * | 2019-07-23 | 2019-11-15 | 天津市英贝特航天科技有限公司 | The ten thousand mbit ethernet modules based on FMC standard interface |
| CN112084736A (en) * | 2020-08-17 | 2020-12-15 | 武汉汇迪森信息技术有限公司 | USB3.0 physical layer transceiver based on FPGA |
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