TWI342547B - Liquid crystal display and driving method thereof - Google Patents

Description

1342547 Modified replacement page on December 30, 099 Description of the Invention: [Technical Field] [0001] The present invention relates to a liquid crystal display device and a driving method thereof. [Prior Art] [0002] Due to its advantages of lightness, thinness, shortness, and low power consumption, the liquid crystal display device has been widely used in modern information equipment such as notebook computers, mobile phones, and personal digital assistants. [0003] 1, a schematic diagram of a prior art liquid crystal display device. The liquid crystal display device 100 includes a liquid crystal surface switch 1 , a gate actuator 103 for controlling the liquid crystal panel 101 , a gate driver 102 and a device 104 , and a circuit for the liquid crystal panel 1 . 105.

Timing control P common voltage power [0004] The liquid crystal panel ιοί includes a plurality of gate lines 11 of parallel parallel equidistance

The plurality of parallel lines are parallel to the gate line 110, and the line is 13 〇, the plurality of lines are insulated from the gate line 11 垂直, and the vertical line is set. The line, the 〇 and the plurality are connected to the gate line 110 and the data line. 120 intersection boundary: Dingzhi pixel unit 14 (wherein, the gate line 110 is connected to the gate driver 1〇2, the data line 12〇 is connected to the source driver 103, and the common line 130 is connected to the common voltage The circuit unit 140 includes a thin film transistor hi, a pixel electrode M2 and a common electrode 143. The thin film transistor 141 includes a gate, a source and a drain, which are respectively connected to The gate line 11 (), the data line 12 〇 and the pixel electrode 142. The pixel electrode 142, the common electrode 143 and the clip 096122554 between the liquid crystal layers form a liquid crystal capacitor 147, and the pixel electrode 142 No. A0101 Page 4 of 26 5 0993470282-0 1342547 After the December 30, 099 replacement page, the common line 130 and the insulating layer between them constitute a storage capacitor 148. [0006] When the liquid crystal display device 100 displays At the Nth frame, the common voltage circuit 105 generates a common electric motor and applies The common line 13A and the common electrode 143. The gate driver 1〇2 generates a scan signal under the control of the timing signal generated by the timing controller 1〇4, and sequentially applies to the gate line ιι〇, The gate line 1 1 〇 is connected to one of the thin film transistors 丨 4 丨. At the same time, the source driver 103 applies the data voltage generated by the source driver 103 to the data line 12 under the control of the timing signal generated by the timing controller 1〇4. And applying the data voltage to the pixel electrode 142 by the thin film transistor 141, and charging the liquid crystal capacitor 147 and the storage capacitor 148. When the liquid crystal display device 100 displays the Nth frame, the storage capacitor 148, the liquid crystal capacitor 147 is maintained at a stable gray scale voltage until the N+u贞 screen scanning signal arrives. The liquid crystal molecules between the common electrode 143 and the pixel electrode 142 are deflected by the gray scale voltage, and the control is performed. The light energy of the liquid crystal panel 丨〇1 is further displayed on the screen β. [0007] The pixel unit 140 uses the storage capacitor 148 to maintain the grayscale voltage of the Nth frame, and the liquid crystal display device 1〇〇 still exists. a large amount of parasitic capacitance, such as the gate capacitance between the gate and the source of the thin film transistor 141, the gate capacitance between the gate and the drain, and the source parasitic capacitance between the source and the drain. When the picture of the pixel unit 140 is switched from the Nth frame to the N+1 frame, the potential of the common electrode 143 is shifted by the capacitive coupling signal. [0008] Please refer to FIG. 2, which is shown in FIG. A driving waveform diagram of the pixel unit 140 in the device 1 . Where 'curve 2 〇 1 indicates the common voltage of the common 096122554 common electrode 143 v form number A0101 CQm, curve 202 indicates the pixel electrode 笫 5 pages / total 26 pages 0993470282-0 1342547 [0009] [0010] 096122554 099 On December 30 of the year, according to the data voltage accepted by the replacement page 142, the curve 2〇3 indicates the common voltage of the common electrode 143. In the case of the N-1th frame, the data voltage is ^, the common voltage of the common electrode 143 is V1 equal to the common voltage, and the grayscale voltage of the N-1th frame & υ]-ν丨. The data voltage of the second frame is U2, and the value is smaller than the data voltage υ丨, the common voltage is 乂2, and the gray level voltage of the Nth frame is 11242, because the pixel electrode 142 and the common electrode 143 form the liquid crystal capacitor 147 and The influence of the aforementioned parasitic capacitance 'the gray scale voltage does not change. Therefore, the N-if 灰 gray scale voltage

Uj-Vi is equal to the gray scale voltage U_V of the Nth frame, that is, U -V = U -V , which can be obtained from 2 2 11 2 2 to obtain the common voltage of the Nth frame is V yoke-U), that is, V = v_'+(VV, and the voltage u2, ie (10)'', causes the initial phase of (4) to be pulled down and then restored to the common voltage v, :,. Its waveform is shown as conb:i as a spike. The common voltage of +1 frame is V material voltage is U *3. 3 According to the above method, the common voltage v3 = vc of the shoot N + 1 frame can be obtained. / + (ϋ3 - υ 2) Shu electric: 嗓X乂 is the data voltage U2, that is, U3-U2>0, V2>Vc〇in, causing the common voltage ν3 to be pulled up at the initial stage of the +1st frame, and then restored to the public The voltage ν , and its com ' waveform diagram also appears as a sharp peak. The common voltage corresponding to each pixel unit 40 in the liquid crystal display device 100 is different due to the adjacent two frame data voltages, and is coupled by the capacitance. The voltage is inaccurate, and the liquid crystal display device 1 has crosstalk, which affects the display effect. [Invention] In view of this, a crosstalk is provided, and the display is low. If the preferred form of the liquid crystal display A0101 Page number 6/26 Total

0993470282-0 [0011] 1342547 _ December 30, 099, it is necessary to amend the replacement page. [〇〇12] In addition, it is necessary to provide a driving method of a liquid crystal display device having a low crosstalk and a better display effect. [0013] A liquid crystal display device includes a liquid crystal panel and a polarity rearrangement circuit and an analysis unit connected to the polarity rearrangement circuit. The liquid crystal panel receives the reference voltage and signal of the external circuit. The polarity rearrangement circuit receives the Nth (N=2, 3, 4...) frame display signal, and adjusts the polarity of the Nth frame display signal so that the voltage corresponding to the Nth frame and the adjusted Nth frame display signal The difference is not greater than the voltage difference before the adjustment, and the N-th frame display signal is outputted, and the analysis unit receives the dice frame and the N-th frame display signal for the N_i frame and the Nth frame of each pixel. Displaying the voltage difference corresponding to the signal, and then performing polarity inversion on the voltage corresponding to the Nth frame display signal of each pixel with respect to the reference voltage, and calculating the difference between the voltage corresponding to the display signal of the second frame. Comparing 'the voltage polarity positive and negative signals corresponding to the fourth (fourth) display signal of the smaller difference and the Nth frame display signal are output to the polarity rearrangement circuit. [0014] A driving method of a liquid crystal display device includes the following steps: Step 1 'receives the Nth (N = 2 ' 3 ' 4...) display signal and polarity positive and negative signals, and step 2, adjusts the Nth frame display signal The difference between the voltage corresponding to the N-1 frame and the adjusted Nth frame display signal is not greater than the voltage difference before the adjustment; in step 3, the adjusted Nth frame display signal is output. _5] Yanhai LCD display device and its driving method adjust the display signal so that the difference between the voltage corresponding to the Nth frame display signal and the first frame display signal after the adjustment is less than the voltage difference before the adjustment, thereby Liquid crystal display device 096122554 Form No. A0101 Page 7 / Total 26 Page 0993470282-0 1342547 The reference voltage of the modified replacement page on December 30, 099 is less affected by the voltage of the N-frame display signal pin, and the reference voltage is smaller. Accurately, and thus the crosstalk of the LCD Gu Meng ~ page device is effectively controlled. [Embodiment] [0017] Referring to Figure 3, there is shown a schematic view of a structure of a preferred embodiment of a liquid crystal display device of the present invention. The liquid crystal display I set includes a liquid crystal panel 3〇1, a gate driver 302, a source driver for the benefit 3, a common voltage circuit 305, a memory 306, and a timing control called the timing controller. Including - the _ end called 4, a second port (10), - analysis unit 334, - Kui ^ ^ - _ rearrangement circuit 354. The first port 314 accepts the second port 324 connected to the gate driver 30 to provide timing signals. The hard part of the lookup table stores the data voltage value corresponding to the signal. This memory allows the memory to read the Zheng Erlai signal. The end of the analyzing unit 334 is connected to the lookup table 344 to analyze the data voltage value corresponding to the signal of the phase of the phase, and the unit 334 is also connected to the polarity rearranging circuit. 354 is connected to provide an analysis result and a display signal to the polarity rearrangement circuit 354. The polarity rearrangement circuit 354 accepts the analysis result of the analysis unit 334 'organizes the display signal' and supplies a data signal to the source driver 303. [0018] The gate driver 302 and the source driver 303 are connected to the timing controller 304 to 'accept the signal of the output' and respectively provide the scanning signal and the data voltage to the liquid crystal panel 3 (H). The common voltage circuit 3〇 5, the common voltage is supplied to the liquid crystal panel 301. 096122554 Form No. A0101 Page 8 of 26 0993470282-0 1342547 December 30, 2010, the shuttle replacement page [0019]

[0020] _ L0021J [0022] The liquid crystal panel 301 includes a plurality of parallel spaced gate lines 31 〇, a plurality of common lines 33 平行 parallel to the gate line 310 and spaced apart, and a plurality of gate lines 310 The insulated vertical data line 3 2 〇 and the plurality of pixel units defined by the data line 320 and the gate line 310 are separated by a gate unit 310. The gate line 310 is connected to the gate driver 3〇2 for receiving the The scan signal of the gate driver 302. The data line 32 is connected to the source driver 303 for receiving the data voltage of the source driver 3〇3. The common line 330 is connected to the 6-thin common voltage circuit 3〇5 The pixel unit 340 includes a thin film transistor 341, a pixel electrode 342, and a common electrode 343. The gate, the source, and the drain of the thin film transistor 341 are respectively connected. The corresponding gate line 31A, the data line 32A, and the pixel electrode 342. The common electrode 343 is connected to the common line 33. The pixel electrode 342 'the common electrode 343 and the liquid crystal layer sandwiched therebetween - Liquid crystal capacitor 347 ^ the pixel electrode 3 42. The common line 33〇 and the insulating layer sandwiched therebetween constitute a storage capacitor 348. The liquid crystal display device 3 (the basic working principle of the device is as follows: the timing controller 3 of the liquid crystal display device 30) The 接收4 receives the external display signal ‘the analysis unit 334 in the timing controller 304 searches the lookup table 344 for the data voltage value corresponding to the adjacent two frame display signals, and is adjacent to each pixel unit 340. The data voltage value of the frame is used to calculate a difference. Then, the analyzing unit 334 calculates a data voltage value of 096122554' after the polarity of the data voltage of the display signal of the next frame of each pixel unit 340 is reversed with respect to the common voltage, and each pixel unit The data voltage value after the 340 inversion is compared with the value of the previous frame data. Next, the analysis unit 334 will twice determine the difference form number A0101 page 9 / 26 pages 0993470282-0 1342547 099 year 12 On the 30th of the month, the correction is replaced by π for comparison. The data voltage value corresponding to the smaller difference is used as the value of the data voltage of the pixel unit, and the polarity of the data voltage relative to the common voltage is judged to be positive or negative. The polarity of the voltage is positive and negative. Finally, the analyzing unit 334 transmits the polarity positive and negative signals of the data voltage and the display signal to the polarity rearranging circuit 354. The polarity rearranging circuit 354 performs the signal display by the signal output by the analyzing unit 304. The adjustment is as follows: a polarity control bit is added to the display signal to fully indicate the positive and negative signals of the display signal and the corresponding data voltage with respect to the common voltage. wherein the adjusted data signal corresponding to the signal is displayed with the previous frame display

The signal corresponds to the voltage of the set of Tan Jiesheng's difference before the adjustment of the cold year m number. Then, the polarity rearranged power signal is transmitted as a data signal to the source driving circuit 303 to convert the data signal into the pixel electrode 342 of the data ΛRi ϊ unit 340. [0023] The liquid crystal display device 300 is connected to the pixel unit of the X#P$, _330. Ϊ f--·· y \ !J-I. 340 is taken as an example for detailed description: ^ [0024] When the liquid crystal display The device 300 displays: the Nth ek=2, 3, 4...) frame picture ··. -- · The timing controller 304 generates a timing signal and applies it to the gate driver 302. [0025] The gate driver 302 generates a plurality of scan signals and sequentially applies to the gate lines 310 under the action of the timing signals. When the scan signal is applied to the Xth gate line 310, the Xth column thin film transistor 341 connected to the gate line 310 is turned on. [0026] The timing controller 304 receives the Xth column pixel unit 096122554 by its first port 314. Form No. A0101 Page 10/Total 26 Page 0993470282-0 1342.547 December 30, 1999 Nuclear Replacement Page 340 N Frame per pixel unit 34

The display signals D, D, . . . D 1 2 u, 'are stored in the memory 306, and the display signals D, D, ... 1 2 ... ' Dn are transmitted to the analysis unit 334. [0027] The analyzing unit 334 searches the lookup table 344 for the data voltage values U, U corresponding to the display signals d, D2\,

1 . . . V This I ' U2........\ is the source driver 303 that converts the display! D2........1^ correspondingly applied to the corresponding pixel The voltage value of the pixel electrode 342 of the unit 340. At the same time, the analyzing unit 334 reads out the X-th column pixel unit 340 from the memory 306 at the N-1th frame.

Data voltage value U

The display signal D, the D, ........D of the signal D pixel unit 340, and the display signal D,, D9'........D, corresponding to the voltage value U , , U , , 1 ί η 1 2 .......Un' is found from the lookup table. The analyzing unit 334 sets the Nth frame data voltage value U!, U2........Un of each pixel unit and the N-1th frame data voltage value U/, ϋ2'. And ϋη' subtraction, respectively, the difference between the data block and the NU贞 of each data voltage Uf U/, U2- U2, ....... ' U - U, 〇η n

[0028] The analyzing unit 334 further inverts the polarity of the data voltage of the Nth frame with respect to the common voltage VcQm of the common electrode 343, and obtains a data voltage value of the inverted polarity ϋ 2 u, that is, η U -V =Vcom - 1 com

=v com com u

U n 2

U. In this case, the absolute value of the difference between the common voltage vc〇m and the voltage of the material is unchanged, and the liquid crystal molecule 096122554 is transmitted through the liquid crystal capacitor 347. Form No. A0101 Page 11/26 pages 0993470282-0 1342547 099 On December 30th, the corrected light transmittance of the replacement page is unchanged, so the display effect can be guaranteed. Then, the analyzing unit 334 reverses the data voltage value of the polarity inversion.

U and the N-th贞 data voltage value 11/, U2' ϋ ' phase η η are subtracted, respectively, and the difference υ _

-LV u ·- u. 2 ---U ', and the difference is the difference between the Nth frame and the Nl η un frame of the data voltage value U, - U /, ν · ···0. - u 'Compare separately, take the smaller difference corresponding to U, 'less than U, - U /, take

When U, ' is greater than U, - U,', the data voltage needs to be reversed; when U-cnrji;Γ'^ com

Taking U as the data voltage value, determining that the clearing also hones the polarity of the corresponding common voltage V. [0029] After the display signal is processed by the analyzing unit 334, some of the pixel units 340 display the data voltage corresponding to the signal to be polar. Inverted, the remaining pixel unit 340 displays the data voltage value of the signal without polarity reversal. The analyzing unit 334 transmits the display signal of each pixel unit 340 and the information of the polarity of the data voltage corresponding to the display signal to the polarity rearranging circuit 354. Typically, the data signal is an 8-digit bit signal that corresponds to 256 grayscale data voltages. However, the analysis signal 096122554 after the analysis unit 334 is processed, the form number A0101, the 12th page, the total of 26 pages, 0993470282-0, 1342547, the revised replacement page contains the information about the positive and negative polarity of the data voltage relative to the common electrode V. The polarity com rearrangement circuit 354 adjusts the display signal to add a polarity control bit, that is, the 9-bit bit signal is used to represent the data signal, corresponding to 256 gray scale data voltages, for example, when the 8-digit bit signal displays 173 gray scale When the data voltage is 1 〇1 〇11 〇1, and the data voltage corresponding to the display signal is positive with respect to the common voltage V polarity, the polarity rearrangement circuit com converts it to 101011011, and the last bit is 1 As the polarity control bit, it represents the polarity of the data voltage corresponding to the data signal corresponding to the common electrode V.

Positive; when the display signal corresponds to the data voltage relative to the common voltage V com

When the polarity is negative, the polarity rearranging circuit 354 converts it to 101011010, and the last bit 0 also serves as a polarity control bit, indicating that the data voltage corresponding to the converted data signal is negative with respect to the polarity of the common electrode V. [0030] The data signal adjusted by the polarity rearranging circuit 354 of the timing controller 304 is transmitted to the source driver 303, and the source driver 303 converts the data signal into a data voltage, and applies the data voltage. To the multiple data line 320. At the same time, the X-th film transistor 341 is turned on by the scan signal of the gate driver 302. The data voltage is applied to the pixel electrode 342 of the pixel unit 340 by the complex data line 320 and the thin film transistor 341. . [0031] A difference between a data voltage of the pixel electrode 342 and a common voltage of the common electrode 343 is a gray scale voltage. The liquid crystal molecules of the liquid crystal layer between the pixel electrode 342 and the common electrode 343 are deflected by the gray scale voltage, and the light energy passing through the liquid crystal layer is controlled to cause the liquid crystal display device 300 to display the image. Compared with the prior art, the liquid crystal display device 300 of the present invention displays the Nth frame 096122554, the form number A0101, the 13th page, the 26th page, the 0993470282-0 B42547, the December 30, 30, 99, the replacement of the data voltage corresponding to the page signal. The polarity of the data is adjusted so that the data voltage corresponding to the Nth frame display signal and the data voltage corresponding to the N-1 frame display signal after the adjustment of each pixel unit 340 of the liquid crystal display device 300 is smaller than the difference before the adjustment, thereby The sum of the data voltage differences of the adjacent two frames of all the pixel units 340 of the liquid crystal display device is relatively small, and finally the voltage of the common electrode 343 is relatively pulled by the data of the Nth frame of the pixel electrode 342 due to the coupling effect of the liquid crystal capacitor, that is, the common electrode The potential is more accurate and the crosstalk is effectively controlled.

The liquid crystal display device 300 of the present invention is not limited to the above embodiment. For example, the polarity rearranging circuit 354 can also add a display signal to the polarity control bit, and the analysis unit 334 can be combined with the same. The timing controller 304 is stored in the liquid crystal display device (10). Please refer to FIG. 4, which is a flow chart of a driving method of the liquid crystal display device 300 of the present invention. The driving method includes the following defects, .., v:

[0035] Step 510: Receive an Nth frame display signal and store the Nth frame display signal. [0036] The timing controller 304 receives the Xth column pixel unit 340 of the liquid crystal display device 300 by the first port 314. The frame display signal transmits the display signal to the analyzing unit 334, and simultaneously stores the display signal into the memory 306 ° [0037] Step 502, reading the N-1 frame display signal, and the data voltage thereof and the Nth The frame display signal is analyzed; [0038] The timing controller 304 reads the N-1th frame display signal 096122554 from the memory 306. Form No. A0101 Page 14/26 pages 0993470282-0 1342547 December 30, 2017 The replacement page 'the analysis unit 343 finds the data voltage value of each corresponding pixel unit 340 from the lookup table 344. Then, the analyzing unit 334 searches the lookup table 344 for the data voltage value corresponding to the Nth frame display signal. The analyzing unit 334 compares the data voltage value of the Nth frame with the data voltage value of the N-1th frame. Next, the analyzing unit 334 performs polarity inversion on the data voltage of the Nth frame with respect to the voltage value of the common electrode 343, and compares the data voltage value after the polarity inversion with the data voltage of the N-1th frame. The value "the analysis unit 334 compares the two differences, takes the display signal of the smaller difference corresponding to the data voltage value, and obtains the polarity of the data voltage corresponding to the display signal relative to the common voltage Vcom. The analyzing unit 334 transmits the selected display signal and the positive and negative polarity information to the polarity rearranging circuit 354. [0039] Step 503, according to the analysis result, performing polarity rearrangement on the display signal; [0040] the polarity rearranging circuit 345 receives the display signal and the polarity positive and negative information transmitted by the analyzing unit 3 34, and The display signal is adjusted so that the difference between the signal corresponding to the data signal of the Nth frame after the adjustment and the data voltage corresponding to the display signal of the N-1th frame is smaller than the difference before the adjustment. The display signal is a digital signal. • The polarity rearrangement circuit 354 adds the polarity control bit to the display signal according to the polarity inversion or not. The polarity control bit is the last bit of the display signal. The polarity rearranging circuit 354 transmits the polarity rearranged display signal as a data signal to the source controller 303. [0041] Step 504 'outputs the data voltage according to the polarity rearranged display signal; [0042] the source The pole controller 303 receives the display signal after the polarity rearrangement outputted by the polarity rearranging circuit 354, and outputs its corresponding data voltage to the data line 320 according to the display signal. Connected to the data line 320 and turned on 096122554 Form No. A0101 Page 15 / Total 26 Page 0993470282-0 1342547 The thin film transistor 341 which corrects the replacement page state on December 30, 099 receives the data voltage and applies it to the pixel unit a pixel electrode 342 of 340. There is a voltage difference between the data voltage of the pixel electrode 342 and the common voltage, and the voltage difference is a gray scale voltage. The liquid crystal molecules of the pixel unit 340 are deflected by the gray scale voltage, and the light energy transmitted through the liquid crystal layer is controlled to realize the display function of the liquid crystal display device 300. [0043]

Compared with the prior art, the driving method of the liquid crystal display device 300 of the present invention adjusts the polarity of the display signal so that the data voltage of the Nth frame of each pixel unit of the liquid crystal display device 300 and the Nth frame data voltage The difference is relatively small, so that the sum of the data voltage difference between the adjacent two frames of the liquid crystal display attacking surface #_素 unit 340 is greater than the coupling of the liquid crystal capacitance 347 by the data thunder pressure ^BReJH&ss^ The pulling is relatively small, that is, the potential of the common electrode 343 is relatively accurate, and the crosstalk is effectively controlled. [0044] The liquid crystal display device 300 of the present invention is not limited to the above embodiment, wherein the polarity rearrangement power 354. may also increase the display signal by a / / bit as a polarity control bit. [0045] In summary, the present invention complies with the requirements of the invention patent, and submits a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and those skilled in the art will be equivalently modified or changed in accordance with the spirit of the invention. All should be included in the scope of the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS [0046] FIG. 1 is a schematic structural view of a prior art liquid crystal display device. 096122554 Form No. Α0101 Page 16 of 26 0993470282-0 1342547 December 30, 2010 Remanufacturing page [0047] FIG. 2 is a driving waveform diagram of a pixel unit in the liquid crystal display device shown in FIG. 1. 3 is a schematic structural view of a liquid crystal display device according to a preferred embodiment of the present invention. [0049] FIG. 4 is a flow chart showing a driving method of a liquid crystal display device of the present invention. [Main component symbol description] [0050] Liquid crystal display device: 100, 300 [0051] Gate line: 110, 310 [0052] Data line: 120, 320 [0053] Common line: 130, 330 [0054] Pixel unit: 140, 340 [0055] Thin Film Transistor: H1, 341 [0056] Pixel Electrode: 142, 342 [0057] Common Electrode: 143, 343 [0058] Liquid Crystal Capacitor: 147 · 347 [0059] Storage Capacitance: 148, 348 [ 0060] Gate Driver: 102, 302 [0061] Source Driver: 103, 303 [0062] Timing Controller: 104, 304 [0063] First Port: 3 1 4 [0064] Second Port: 324 096122554 Form Number A0101 Page 17 of 26 0993470282-0 1342547 December 30, 2017 Correction Replacement Page [0065] Analysis Unit: 334 [0066] Lookup Table: 344 [0067] Polar Rearrangement Circuit: 354 [0068] Common Voltage Circuit : 105 , 305 [0069] Memory: 306

096122554 Form Number A0101 Page 18 of 26 0993470282-0

Claims (1)

December 30, 099, the replacement of the nuclear page VII, the scope of application for patents: 1. A liquid crystal display device, comprising: '- liquid crystal panel, which receives the reference voltage and signal of the external circuit; • - polarity rearrangement circuit, Receiving the Nth (N:2, 3, 4...) display signal, and adjusting the polarity of the Nth frame display signal, so that the voltage corresponding to the Nth frame display signal after adjustment and the voltage corresponding to the N_i frame display signal The difference is less than the difference before the adjustment, and outputs the sequenced Nth frame display signal; and ♦ an analysis unit connected to the polarity rearrangement circuit, which receives the N-1th and Nth frame display signals, The pixel corresponding to the Nth frame display signal is deciphered by the voltage corresponding to the Nth frame display signal, and then the voltage corresponding to the Nth frame display signal of each pixel is reversed with respect to the reference voltage, and then corresponds to the N1 frame display signal. The voltage difference is obtained, and the two differences are compared, and the voltage polarity positive and negative signals corresponding to the Nth frame display signal of the smaller difference and the Nth frame display signal are output to the polarity rearrangement circuit. 2. The liquid crystal display device according to claim 1, wherein the polarity rearrangement circuit adjusts the polarity of the display signal, and the voltage corresponding to the display signal of the Nth frame is relative to the reference voltage. The polarity changes. 3. The liquid crystal display device of claim 2, wherein the polarity of the voltage corresponding to the nth frame display signal relative to the reference voltage is changed, and a polarity control bit is added for the first or last bit of the display signal. And determining that the voltage corresponding to the display signal of the Nth frame is positive or negative with respect to the polarity of the reference voltage. 4. The liquid crystal display device of claim 2, wherein the polar rearrangement circuit receives the polarity positive and negative signals output by the analysis unit, and adjusts the polarity of the Nth frame display signal according to the polarity positive and negative signals. 096122554 Form No. · A0101 Page 9 of 26 0993470282-0 ,.^ [December 30, 1999, according to the replacement page • A/month patent range, item 4, liquid crystal display device, further package / (4) e ' The analysis unit and the secret weight (four) way are set in the (4) (four) part to provide timing signals to the liquid crystal panel. The liquid crystal display device of the fifth aspect of the present invention, wherein the upper controller further includes a search for the corresponding voltage value of the internal setting display signal, which is connected to the analysis unit, and is the analysis The unit provides the voltage value corresponding to the display signal. The liquid crystal display device of claim 4, wherein the liquid helium display device comprises - connected to the timing controller between the pole (four) device and the timing control 11 and the liquid crystal ___ line Connected and receives the number. The liquid is stored. The Nth frame displays the 6th number and the nth frame displays the signal: first memory, and provides the N-1th frame display signal to the analyzing unit. The aluminum device according to claim 1, wherein the liquid crystal display device comprises a source driver that is responsive to the polarity, and the N_. Li signal is converted to the Nth frame The timing signal of the timing controller, as described in claim 1, the crystal display device further includes a and the information Device The voltage corresponding to the signal is applied to the liquid crystal panel. A driving method of a liquid crystal display device, comprising the following steps: Step 1: receiving a Nth (N = 2, 3, 4...) frame display signal and a polarity positive and negative signal; 096122554 Step 2: adjusting an Nth frame display signal The difference between the voltage corresponding to the N-1 frame and the adjusted nth frame display signal is less than the voltage difference before the adjustment; Step 3 'outputs the adjusted Nth frame display signal. 11. The driving method of the liquid crystal display device according to claim 10, the form number A0101, page 20 of 26, 0993470282-0 1213 14 15 17 096!22554 I December 30, 099, the child is replacing page I / in step 1 'adjustment' (the function of the display signal is the polarity of the voltage corresponding to the (4) display code relative to the internal common voltage of the liquid crystal display device The method for driving a liquid crystal display device according to claim 10, wherein the step of providing - the polarity rearrangement circuit receives the Nth duck display signal and the polarity positive and negative signals. The driving method of the liquid wire display device, wherein the step includes: providing an analyzing unit to receive the _th display signal, and analyzing the fourth (fourth) display signal and the N_th 贞 display signal to output an Nth 贞 display signal And the polar positive and negative signal to the polarity rearrangement circuit. The driving method of the linear crystal display device according to Item 13 of the application, wherein, in the first step, a storage unit is provided to store the Nth frame and the Nith frame display signal The driving method of the liquid crystal display device according to claim 13, wherein the 'step one t' analysis of the display signal by the analyzing unit is as follows: The voltage values corresponding to the Nth frame and the N-1th frame display signal are compared, and then the polarity of the voltage corresponding to the Nth frame display signal is reversed, and the voltage value after the polarity is inverted corresponds to the display signal of the first frame. The difference between the voltage values and the difference between the two differences will result in a voltage difference positive and negative signal corresponding to the signal of the first difference of the ^^ frame display signal and the output signal of the ^^ frame is output to the polarity rearrangement circuit. The driving method of the liquid crystal display device according to Item 15, wherein a lookup table is provided, and the voltage value corresponding to the display signal of the first frame and the N-th frame is provided for the analysis unit. The driving method of the liquid crystal display device, Form No. A0101, page 21 / 26 pages, 0993470282-0 1342547, December 30, 2010, the correction replacement page, wherein the second step further includes: providing the polarity rearrangement circuit to display the Nth frame The first or last bit of the signal provides a polarity control bit to complete the adjustment of the display signal of the Nth frame. 18. The driving method of the liquid crystal display device according to the first aspect of the invention, wherein the step Further comprising: providing a source driver of the N-frame display of the reception signal after the adjustment, the display signal processing, the output signal corresponding to the electrical apparatus it is set to the liquid crystal display of the liquid crystal panel 096,122,554. Form No. A0101 Page 22 of 26 0993470282-0