KR101657023B1 - Display device and method for driving same - Google Patents

Abstract

Provided is a display device capable of suppressing a change in luminance that can occur during image update when idle drive is performed. The display control circuit 20 includes a frame memory 101, a forced refresh determination section 104, a refresh circuit 105, and an undershoot circuit 106. The forced refresh determination unit 104 outputs an active forced refresh signal and an active correction instruction signal when it is determined that the image has been updated. The refresh circuit 105 outputs an active output control signal when it receives the active forced refresh signal. The frame memory 101 outputs image data upon receiving an active output control signal. The undershoot circuit 106 corrects the image data received from the frame memory 101 by performing a subtraction process and outputs the corrected image data when receiving an active correction instruction signal.

Description

[0001] DISPLAY DEVICE AND METHOD FOR DRIVING SAME [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to a display device, and more particularly, to a display device that performs idle drive and a driving method thereof.

BACKGROUND ART [0002] In recent years, electronic devices having small size and light weight have been actively developed. A liquid crystal display device mounted in such an electronic device is required to have low power consumption. As one of the most promising techniques for reducing the power consumption of a liquid crystal display device, idle driving has been proposed. A liquid crystal display device that performs hibernation driving includes a driving period for refreshing a screen by scanning a scanning line to write a data voltage and a dormant period for stopping writing of a data voltage with all the scanning lines in a non- Repeat alternately. In the idle period, the voltage applied to the liquid crystal layer in the pixel formation portion (hereinafter referred to as " liquid crystal applied voltage ") is maintained in the immediately preceding driving period, so that the display of the image is also maintained. As a result, the operation of the gate driver and / or the source driver can be stopped during the idle period, thereby reducing power consumption. Such a liquid crystal display device that performs hibernation driving is disclosed in, for example, Patent Document 1. [

In a liquid crystal panel used in a liquid crystal display device, a liquid crystal layer is sandwiched between two electrodes. When a voltage is applied to the liquid crystal layer for the dielectric anisotropy of the liquid crystal, the alignment direction (long axis direction) of the liquid crystal molecules in the liquid crystal layer changes. When the alignment direction of the liquid crystal molecules is changed, the polarization direction of the light passing through the liquid crystal layer is changed. This makes it possible to control the amount of light transmitted through the liquid crystal layer in accordance with the voltage applied to the liquid crystal layer. Thereby, the luminance of each pixel forming portion can be set to a desired gradation luminance, and an image can be displayed on the liquid crystal panel. In addition, a data voltage is applied to the pixel electrode, which is one electrode between which the liquid crystal layer is sandwiched, through a thin film transistor (TFT), and a common electrode, which is the other electrode sandwiching the liquid crystal layer, A common voltage that is common to all of the transistors is applied. The common voltage is a voltage that is a reference of the liquid crystal applied voltage in the liquid crystal display device.

Japanese Patent Application Laid-Open No. 2001-312253

For example, in the case of the idle driving in which the screen is refreshed at the refresh rate of 1 Hz, the refresh is performed only once for one second. Therefore, when the image is updated during the idle period, the updated image may be discarded and not displayed. Therefore, it is conceivable that the screen is forcibly refreshed when the image is updated during the idle period. In the present specification, refresh performed at predetermined cycles is referred to as " counter refresh ", and forced refresh when the image is updated during the idle period is referred to as forced refresh. A period from the start of the drive period in which the counter refresh is performed to the start of the drive period in which the next counter refresh is performed is referred to as a " idle drive period ".

Incidentally, in the liquid crystal display device, when a voltage of the same polarity is continuously applied to the liquid crystal layer, burn-in occurs and the liquid crystal layer is deteriorated. Therefore, in the liquid crystal display device, in order to prevent deterioration of the liquid crystal layer, AC driving is performed to balance the polarity of the applied voltage of the liquid crystal. Here, a case is considered in which a liquid crystal display device for performing idle drive by AC driving is performed. Fig. 15 is a diagram for explaining idle driving by AC driving performed by a conventional liquid crystal display device. Here, in the liquid crystal display device, one pixel (which is referred to as a single pixel in the case of a color image, hereinafter referred to as " one pixel " regardless of whether it is a monochrome image or a color image) I will explain it in detail. In the present specification, one pixel which is noted in this manner is referred to as " attention pixel " for convenience. In Fig. 15, the vertical axis and the horizontal axis represent data voltages and time, respectively. As shown in Fig. 15, in order to balance the polarity of the liquid crystal applied voltage, the polarity of the data voltage is inverted every time the counter is refreshed, and the polarity of the data voltage at the time of forced refresh is the same as the polarity of the data voltage at the immediately previous counter refresh . More specifically, at the time of counter-refresh of the first to fourth idle driving periods, data voltages of positive polarity, negative polarity, positive polarity, and negative polarity are written in the pixel forming portion. As a result, during the counter refresh of the first to fourth idle driving periods, the liquid crystal layer is applied with liquid crystal applied voltages of positive polarity, negative polarity, positive polarity and negative polarity.

In the third idle drive period, the forced refresh is performed during the idle period, and the positive data voltage is written in the same manner as the counter refresh of the third idle drive period. Here, in the image updating of the third idle period, it is assumed that the tone value of the pixel of interest is not changed but the tone value of the other pixel is changed. In the present specification, a pixel (a sub-pixel in the case of a color image) having no change in tone value due to image updating is referred to as a "constant pixel", and a pixel whose tone value is changed by image updating is referred to as a "change pixel". The pixel of interest in Fig. 15 is a constant pixel. Thus, at the time of forced refresh of the third idle driving period, a data voltage of the same magnitude as that at the time of the counter refresh of the third idle driving period is written to the pixel forming portion. Therefore, at the time of the forced refresh of the third idle driving period, a liquid crystal applied voltage having the same magnitude as that of the counter refresh of the third idle driving period is applied to the liquid crystal layer. As described above, at the forced refresh of the third idle driving period, the data voltage of the same polarity and the same magnitude as the data voltage written at the time of the counter refresh of the third idle driving period is written to the pixel forming portion.

Fig. 16 is a diagram showing changes in liquid crystal applied voltage (cut-off value) and luminance in the idle driving shown in Fig. Here, it is assumed that a normally black type liquid crystal panel is employed. The period from the second counter-refresh from the left in Fig. 16 to the third counter-refresh from the left corresponds to the third idle drive period in Fig. As shown in Fig. 16, the liquid crystal applied voltage decreases with elapse of time during the idle period after the data voltage is written to the pixel forming section at the time of refreshing and enlarged. This is because the dielectric constant is changed by the response of the liquid crystal. In this specification, " the liquid crystal applied voltage becomes larger or smaller " means " the absolute value of the liquid crystal applied voltage becomes larger or smaller ". When the image is not updated, the change in the liquid crystal applied voltage in the idle driving period is almost the same as that in the other idle driving period, so that the effective value of the liquid crystal applied voltage is almost the same. As a result, when the image is not updated, the luminance becomes almost constant in each idle driving period. On the other hand, when the image is updated (the tone value of the pixel of interest is not changed, as described above), the data voltage is written at the time of the counter refresh so that the liquid crystal applied voltage becomes larger, Forcible refresh is performed while decreasing along with the elapse of time. When the forced refresh is performed, the data voltage of the same polarity and the same magnitude as that of the counter refresh is written, and the liquid crystal applied voltage again becomes larger. Therefore, in the idle driving period in which the image is updated, the effective value of the liquid crystal applied voltage becomes larger than the idle driving period in which the image is not updated, by a value corresponding to the portion indicated by hatching in Fig. As a result, an unintended luminance change occurs. Concretely, as shown in Fig. 16, an unintended luminance rise occurs. Further, when a normally white type liquid crystal panel is employed, the luminance change with respect to the liquid crystal applied voltage is reversed, and unintended luminance degradation occurs.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a display device and a driving method thereof capable of suppressing a luminance change that may occur during image updating when idle driving is performed.

According to a first aspect of the present invention, there is provided a display device including a display section including a pixel forming section, a driving period for refreshing a screen of the display section by writing a data voltage based on image data received from the outside into the pixel forming section, And a rest period for stopping the writing of the data voltage to the address electrode,

A driving unit for writing the data voltage to the pixel forming unit,

A display for controlling the driving unit to set the driving period at a predetermined timing and to forcibly set the driving period by stopping the idle period when an image represented by image data received from outside is updated during the idle period Further comprising a control unit,

The display control unit

A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,

 Wherein the data voltage to be written in the pixel forming section in the forcibly set driving period is a reference to a data voltage written in the pixel forming section in the immediately preceding driving period A gradation correction unit for outputting at least a part of the image data in which the gradation value of the pixel having no change in the gradation value is corrected by updating the image in the pixels constituting the image updated during the idle period so as to become a value close to the common voltage Including,

And the drive unit writes a data voltage based on at least a part of the image data whose gradation value is corrected by the gradation correction unit in the pixel formation unit in the forcibly set driving period.

According to a second aspect of the present invention, in the first aspect of the present invention,

Wherein the data voltage to be written to the pixel forming section in the forcibly set driving period is a common voltage that is higher than the data voltage written in the pixel forming section in the immediately preceding driving period Outputting the image data obtained by correcting the tone value of the pixel having no change in the tone value by updating the image in the pixels constituting the image updated during the idle period,

And the drive unit writes a data voltage based on the image data whose tone value is corrected by the tone correction unit to the pixel forming unit in the forcibly set driving period.

According to a third aspect of the present invention, in the second aspect of the present invention,

The display control unit

An image data storage unit for storing image data of one frame received from the outside,

A first refresh control section for outputting an active first refresh signal and an active polarity inversion signal at the predetermined timing,

Further comprising a refresh unit for outputting the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,

Wherein the gradation correction section outputs the image data output from the image data storage section based on the first refresh signal that is active without correcting the gradation value,

And the polarity indicating section inverts the polarity of the data voltage to the driving section on the basis of the active polarity inversion signal.

According to a fourth aspect of the present invention, in the third aspect of the present invention,

Wherein the display control unit further includes a second refresh control unit for outputting an active second refresh signal and an active correction instruction signal when an image represented by image data received from outside is updated during the idle period,

The refresh unit outputs the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the active second refresh signal,

And the tone correction section corrects the tone value of the image data received from the image data storage section based on the active correction instruction signal.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention,

The display control unit

An image information acquisition unit that acquires information of an image represented by image data of one frame received from the outside and outputs information of the acquired image;

Further comprising an image information storage section for storing the information of the image obtained by the image information acquiring section,

The second refresh control unit compares the information of the image of the current frame acquired by the image information acquisition unit with the information of the image of the previous frame stored in the image information storage unit, And outputs the active second refresh signal when the information of the image of the previous frame is different.

According to a sixth aspect of the present invention, in the fifth aspect of the present invention,

The image information acquiring section is characterized in that a sum of tone values of image data of one frame received from the outside is used as information of the image.

According to a seventh aspect of the present invention, in the fifth aspect of the present invention,

The image information acquiring section is characterized by using a histogram of tone values of image data of one frame received from the outside as information of the image.

According to an eighth aspect of the present invention, in the fifth aspect of the present invention,

And the image information acquiring section is characterized by using image data of one frame received from the outside as information of the image.

According to a ninth aspect of the present invention, in the third aspect of the present invention,

And the first refresh control section determines the predetermined timing based on a synchronization signal received from the outside.

According to a tenth aspect of the present invention, in the third aspect of the present invention,

And the display control section receives the image data externally only at the time of updating the image.

An eleventh aspect of the present invention provides, in a tenth aspect of the present invention,

The first refresh control unit generates a clock signal in the first refresh control unit and determines the predetermined timing based on the clock signal.

According to a twelfth aspect of the present invention, in the third aspect of the present invention,

And the tone correction section receives the image data from the outside in a forced driving period.

In a thirteenth aspect of the present invention, in the first aspect of the present invention,

Wherein the display control unit stops the idle period and forcibly sets the driving period in the update area including the updated part when a part of the image represented by the image data received from the outside is updated during the idle period Controls the driving unit,

Wherein the gradation correction section receives the data corresponding to the update area in the image data, and the data voltage to be written to the pixel formation section in the forcibly set driving period is the pixel data of the pixel formation section And outputs the data corresponding to the update area in which the grayscale value of the pixel having no change in the grayscale value by the image updating among the pixels included in the update area is corrected so as to become a value closer to the common voltage than the data voltage written in the update area and,

The drive unit writes a data voltage based on data corresponding to the update area in which the gradation value is corrected by the gradation correction unit, in the pixel formation unit in the forcibly set drive period.

In a fourteenth aspect of the present invention, in the thirteenth aspect of the present invention,

The display control unit

An image data storage unit for storing image data of one frame received from the outside,

A first refresh controller for outputting a first refresh signal that is active at the predetermined timing,

Further comprising a refresh unit for outputting the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,

Wherein the gradation correction section outputs the image data output from the image data storage section based on the first refresh signal that is active without correcting the gradation value,

And the polarity indicating section inverts the polarity of the data voltage to the driving section on the basis of the active polarity inversion signal.

In a fifteenth aspect of the present invention, in the fourteenth aspect of the present invention,

Wherein the display control unit further includes a second refresh control unit for outputting an active second refresh signal and an active correction instruction signal when the part of the image represented by the image data received from the outside is updated during the idle period,

The refresh unit outputs data corresponding to the update area in the image data stored in the image data storage unit from the image data storage unit to the tone correction unit based on the active second refresh signal,

The gradation correction section corrects the gradation value of data corresponding to the update area received from the image data storage section based on the active correction instruction signal.

A sixteenth aspect of the present invention is a liquid crystal display device comprising a display section including a pixel forming section and including a driving period for refreshing a screen of the display section by writing a data voltage based on image data received from the outside into the pixel forming section, And a rest period for alternately repeating the writing of the data voltage to the address electrode,

Setting the drive period at a predetermined timing and forcibly setting the drive period by stopping the idle period when the image represented by the image data received from the outside is updated during the idle period, A writing step of writing the data voltage to the pixel defining unit in such a manner that the polarity of the data voltage in the driving period is the same as the polarity of the data voltage in the immediately preceding driving period;

Wherein the data voltage to be written in the pixel forming section in the forcibly set driving period is a reference to a data voltage written in the pixel forming section in the immediately preceding driving period A gradation correction step of outputting at least a part of the image data in which a gradation value of a pixel having no change in gradation value is corrected by updating an image in a pixel constituting an image updated during the idle period so as to become a value close to a common voltage, And,

The data voltage based on at least a part of the image data whose tone value is corrected in the tone correction step is forcibly written in the pixel formation unit in the forcibly set driving period in the writing step.

According to the first aspect of the present invention, in a display device for performing idle drive, in a pixel forming portion for forming a pixel having no change in tone value by image updating, in a driving period forcibly set, A data voltage having the same polarity as the data voltage and a value close to the common voltage than the data voltage is written. As a result, the increase in the applied voltage of the pixel forming portion in the driving period forcibly set (the liquid crystal applied voltage in the case of the liquid crystal display device) is suppressed, so that the increase in the effective value of the applied voltage in the pixel forming portion is also suppressed. This makes it possible to suppress a change in luminance that may occur during image updating.

According to the second aspect of the present invention, a driving period and a rest period are uniformly set in the screen, and the same effect as the first aspect of the present invention is exhibited.

According to the third aspect of the present invention, based on the first refresh signal, refresh can be performed by writing the data voltage based on the image data stored in the frame memory in the pixel formation section in the driving period set at a predetermined timing. Thus, the applied voltage of the pixel forming portion, which changes with the lapse of time during the rest period, can be returned to the original state regularly. Thereby, the image displayed on the screen can be maintained. In addition, by determining the polarity of the data voltage every drive period set at a predetermined timing based on the polarity inversion signal, the polarity balance can be reliably obtained.

According to the fourth aspect of the present invention, the tone correction section reads the image data stored in the image data storage section in the forcibly set driving period based on the second refresh signal. In this way, in the driving period forcibly set, the applied voltage of the pixel forming portion can be made smaller than the driving period immediately before.

According to the fifth aspect of the present invention, it is possible to determine whether image updating has been performed by comparing the information of the image represented by the image data for one frame with the current frame in the previous frame.

According to the sixth aspect of the present invention, the sum of the tone values of the image data of one frame received from the outside is stored in the image information storage section as image information. The data size of the sum of the tone values of the image data for one frame received from the outside is relatively small, so that the memory capacity of the image information storage section can be made comparatively small.

According to the seventh aspect of the present invention, since the histogram of the tone value of the image data of one frame received from the outside is stored in the image information storage section as the image information, the accuracy of image update determination by the second refresh control section It can be higher than the sixth aspect of the invention.

According to the eighth aspect of the present invention, since the image data for one frame received from the outside is stored in the image information storage section as image information, the accuracy of determination of image update by the second refresh control section is reduced to the seventh aspect The calculation accuracy can be increased.

According to the ninth aspect of the present invention, a driving period can be set at a predetermined timing based on a synchronization signal received from the outside.

According to the tenth aspect of the present invention, since image data for one frame is written in the image data storage section only at the time of image updating, power consumption can be reduced.

According to the eleventh aspect of the present invention, by generating the clock signal in the first refresh control unit, the driving period can be set at a predetermined timing without receiving the synchronization signal from the outside.

According to the twelfth aspect of the present invention, since image data from outside is directly given to the gradation correction section during the forced driving period, at the time of image updating, the writing of the data voltage based on the image data corrected by the gradation correction section Can be performed immediately.

According to the thirteenth aspect of the present invention, it is possible to forcibly set the driving period only for the update area in the screen, and continue the pause period for another area in the screen. As a result, the power consumption can be reduced. In the pixel forming section for forming a pixel in which the gradation value is not changed by the image updating in the pixels included in the update area, in the driving period forcibly set, similarly to the first aspect of the present invention, the data written in the immediately preceding driving period A data voltage having the same polarity as the voltage and a value closer to the common voltage than the data voltage is written in the pixel forming section. As a result, since the increase in the voltage applied to the pixel forming portion in the driving period forcibly set is suppressed for the pixel forming portion for forming the pixel having no change in gray scale value by the image updating in the pixels included in the update region, The increase of the effective value of the negative applied voltage is also suppressed. Therefore, since the luminance change that may occur at the time of image updating in the update area is suppressed, the luminance difference between the update area and the other area can be suppressed.

According to the fourteenth aspect of the present invention, there is provided a method for setting a driving period for only an update area in a screen at the time of updating an image, and continuing a pause period for another area in the screen, The same effect can be obtained.

According to the fifteenth aspect of the present invention, in the image updating mode, the driving period is forcibly set only for the update area in the screen, and the pause period is continued for the other area in the screen. The same effect can be obtained.

According to the sixteenth aspect of the present invention, in the method of driving a display device, the same effects as those of the first aspect of the present invention are exhibited.

1 is a block diagram for explaining a configuration of a liquid crystal display device according to a first embodiment of the present invention.
2 is an equivalent circuit diagram of a pixel forming portion included in the liquid crystal panel shown in Fig.
3 is a block diagram for explaining a configuration of the display control circuit shown in Fig.
4 is a diagram for explaining idle drive in the first embodiment;
Fig. 5 is a diagram showing changes in liquid crystal applied voltage and luminance in the idle driving according to the first embodiment; Fig.
6 is a diagram showing an example of a gradation histogram in the first modification of the first embodiment;
7 is a block diagram for explaining a configuration of a display control circuit according to a third modification of the first embodiment;
8 is a block diagram for explaining a configuration of a display control circuit according to a fourth modification of the first embodiment;
Fig. 9 is a block diagram for explaining a configuration of a display control circuit according to a fifth modification of the first embodiment; Fig.
10 is a view for explaining partial idle drive;
11 is a diagram for explaining a case where conventional idle drive is applied to partial idle drive.
12 is a block diagram for explaining a configuration of a display control circuit according to a second embodiment of the present invention;
Fig. 13 is a diagram for explaining partial idle drive according to the second embodiment; Fig.
14 is a view for explaining idle drive in a third embodiment of the present invention.
15 is a diagram for explaining a conventional idle drive;
16 is a diagram showing a change in each of a liquid crystal applied voltage and a luminance in a conventional dormant drive.

 Hereinafter, the first to third embodiments of the present invention will be described with reference to the accompanying drawings. Hereinafter, when a component that outputs an active signal is not outputting an active signal, the component may output an inactive signal, or may stop outputting a signal. In the following description, the drawing direction of the data line is the column direction, and the drawing direction of the scanning line is the row direction. The constituent elements arranged in the column direction may be referred to as " columns ", and the constituent elements arranged in the row direction may be referred to as " rows ".

<1. First Embodiment>

<1.1 Configuration>

Fig. 1 is a block diagram for explaining a configuration of a liquid crystal display device 100 according to a first embodiment of the present invention. The liquid crystal display device 100 includes a liquid crystal panel 10, a display control circuit 20, a source driver 30, a gate driver 40, and a Vcom driver 50. The display control circuit 20 corresponds to the display control section. The source driver 30 corresponds to a data line driving circuit. The gate driver 40 corresponds to the scanning line driving circuit. The Vcom driver 50 corresponds to the common electrode drive circuit. In the present embodiment, the source driver 30, the gate driver 40, and the Vcom driver 50 constitute a driving unit. Either or both of the source driver 30 and the gate driver 40 may be integrally formed with the liquid crystal panel 10. [ On the outside of the liquid crystal display device 100, a host 110 mainly composed of a central processing unit (CPU) is provided.

In the liquid crystal panel 10, a plurality of pixel forming portions provided corresponding to the intersections of a plurality of data lines, a plurality of gate lines, and a plurality of data lines and a plurality of gate lines are formed. The plurality of pixel forming portions are arranged in a matrix. Each pixel forming portion is connected to a data line and a gate line passing through corresponding intersections. In the liquid crystal panel 10, a common electrode commonly provided in a plurality of pixel forming portions is formed. In the present embodiment, a normally black type liquid crystal panel is used as the liquid crystal panel 10.

 The display control circuit 20 receives image data and a synchronization signal from an external host 110. In this specification, it is assumed that the gradation of the image represented by the image data is 8-bit gradation (the number of gradations is 256). The display control circuit 20 generates and outputs various signals for controlling the source driver 30 and the gate driver 40 on the basis of the received image data and the synchronization signal. Further, the display control circuit 20 outputs the image data to the source driver 30 at the time of the counter refresh and the forced refresh. Further, the display control circuit 20 may generate and output various signals for controlling the Vcom driver 50. The display control circuit 20 also includes a driving period for writing a data voltage based on the image data received from the host 110 into the pixel forming portion to refresh the screen of the liquid crystal panel 10, The source driver 30 and the gate driver 40 are controlled so that the idle drive for alternately repeating the idle period for stopping the writing of the data voltage is performed by the AC drive. The display control circuit 20 sets the driving period at a predetermined timing and stops the idle period when the image represented by the image data received from the host 110 is updated during the idle period to forcibly set the driving period . That is, the display control circuit 20 performs counter refresh and forced refresh. In addition, the display control circuit 20 in this embodiment sets the driving period and the idle period uniformly in the screen. The display control circuit 20 drives data lines and scanning lines to the source driver 30 and the gate driver 40 in the driving period and supplies the data line and the scanning line to the source driver 30 and the gate driver 40 respectively in the idle period The driving of the data line and the scanning line is stopped.

 In the driving period, the source driver 30 generates a data voltage based on various signals and image data received from the display control circuit 20, and applies the data voltage to the data line. The gate driver 40 sequentially selects the scanning lines on the basis of various signals received from the display control circuit 20 in the driving period. The Vcom driver 50 applies a common voltage to the common electrode. The data voltage is written in the pixel forming portion connected to the selected scanning line. In this way, the data voltage is written in each pixel forming portion, thereby refreshing the screen. In addition, since the data voltage is not written in the idle period, the refresh of the screen is not performed.

In this embodiment, it is assumed that the source driver 30 performs dot inversion driving, which is one of AC driving, based on control by the display control circuit 20. [ For this reason, the source driver 30 controls the polarity of the data voltage in the following manner. That is, the source driver 30 reverses the polarity of the data voltage for each data line and inverts the polarity every one selection period (one horizontal period) of one scanning line. That is, the polarity of the data voltage is inverted every one column and every one row. Thus, the pixel forming portion in which the positive polarity data voltage is written is surrounded by the pixel forming portion in which the negative polarity data voltage is written, and the pixel forming portion in which the negative polarity data voltage is written is the pixel forming portion in which the positive polarity data voltage is written, . Further, the source driver 30 inverts the polarity of the data voltage written to each pixel forming unit every time the counter is refreshed. As will be described in detail later, the source driver 30 sets the polarity of the data voltage written to each pixel forming portion at the time of forced refresh to be the same as the polarity of the data voltage written to the pixel forming portion at the immediately preceding counter refresh .

However, the source driver 30 may perform line inversion driving for inverting the polarity of the data voltage for every predetermined number of rows, or column inversion driving for inverting the polarity of the data voltage for every predetermined number of columns. The source driver 30 inverts the polarity of the data voltage written to each pixel forming portion every time the counter is refreshed, as in the case of the dot inversion driving, in any of the line inversion driving and the column inversion driving. The source driver 30 may also perform frame inversion driving that inverts the polarity of the data voltage written to each pixel forming portion every time the counter is refreshed, while writing the data voltage of the same polarity to the entire pixel forming portion.

&Lt; 1.2 Pixel forming section >

2 is an equivalent circuit diagram of the pixel forming section 11 included in the liquid crystal panel shown in Fig. The pixel forming section 11 is connected to a gate terminal as a control terminal to a scanning line GL passing through a corresponding intersection and to a TFT 12 to which a source terminal as a first conduction terminal is connected to a data line SL passing through the intersection, A pixel electrode 13 connected to a drain terminal serving as a second conduction terminal of the TFT 12, a common electrode 14 provided commonly to the plurality of pixel forming portions 11, a pixel electrode 13, And a liquid crystal layer sandwiched between the common electrodes 14 and formed in common to the plurality of pixel defining portions 11. [ The liquid crystal capacitance Clc formed by the pixel electrode 13 and the common electrode 14 constitutes a pixel capacitance. Further, in many cases, the auxiliary capacitance is provided in parallel to the liquid crystal capacitance Clc in order to reliably maintain the voltage in the pixel capacitance. However, for convenience of explanation, it is assumed that the pixel capacitance is composed of only the liquid crystal capacitance Clc. When the TFT 12 is in the ON state, the data voltage is written from the data line SL to the liquid crystal capacitance Clc. A common voltage is applied from the Vcom driver 50 to the common electrode 14, which is the other end of the liquid crystal capacitor Clc. Thus, the liquid crystal applied voltage, which is the voltage held by the liquid crystal capacitance Clc, is determined by the data voltage and the common voltage, and more specifically, the difference between the data voltage and the common voltage immediately after the refresh. However, the permittivity is changed by the response of the liquid crystal after the refresh, and the liquid crystal applied voltage becomes smaller than the difference between the data voltage and the common voltage.

The alignment method of the liquid crystal layer in the liquid crystal panel 10 is not particularly limited. For example, a vertical alignment (VA) method, a twisted nematic (TN) -domain Vertical Alignment (MVA) scheme or an in-plane switching (IPS) scheme.

As described above, in this embodiment, since the source driver 30 performs the dot inversion driving, the common voltage given to the common electrode 14 by the Vcom driver 50 is a fixed value. For this reason, in the present specification, "holding the data voltage" may be handled as an agreement with "holding the liquid crystal applied voltage". In reality, although the Vcom driver 50 may change the value of the common voltage according to the refresh rate or the like, the description thereof will be omitted here. When the source driver 30 performs the line inversion driving, the common voltage is shifted by (1) horizontal periods to the Vcom driver 50. When the source driver 30 performs the frame inversion driving, the Vcom driver 50 ), The common voltage may be shifted for each counter refresh. As a result, a sufficiently large liquid crystal applied voltage can be obtained while reducing the amplitude of the data voltage, so that the power consumption of the source driver 30 can be reduced.

The TFT 12 is turned on to write the data voltage in the liquid crystal capacitor Clc and functions as a switching element which is turned off to continuously maintain the written data voltage (in other words, the potential of the pixel electrode 13) do. As the TFT 12, for example, an oxide TFT in which a channel layer is formed by an oxide semiconductor is used. TFTs (hereinafter referred to as &quot; IGZO-TFTs &quot;) in which a channel layer is formed by InGaZnOx, which is an oxide semiconductor mainly containing indium (In), gallium (Ga), zinc (Zn) and oxygen (O) ). The IGZO-TFT has a very small off-leakage current as compared with a silicon-based TFT in which a channel layer is formed by amorphous silicon or the like. As a result, the data voltage written in the liquid crystal capacitor Clc can be maintained for a long time. As the oxide semiconductors other than InGaZnOx, indium, gallium, zinc, copper, silicon, tin, aluminum, calcium, germanium and lead Pb, the channel layer is formed by an oxide semiconductor containing at least one of them.

<1.3 Display Control Circuit>

3 is a block diagram for explaining the configuration of the display control circuit 20 shown in Fig. The display control circuit 20 includes a frame memory 101, an image information acquisition unit 102, an image information storage unit 103, a forced refresh determination unit 104, a refresh circuit 105, an undershoot circuit 106, A refresh counter 107, a polarity designation unit 108, and a timing generator 109. [ The frame memory 101 corresponds to an image data storage unit. The forced refresh determining section 104 corresponds to the second refresh control section. The refresh circuit 105 corresponds to the refresh portion. The undershoot circuit 106 corresponds to the tone corrector. The refresh counter 107 corresponds to the first refresh control unit.

The frame memory 101 receives image data of one frame (hereinafter sometimes simply referred to as &quot; image data &quot;) from the host 110, and stores image data of one frame. The one frame of the image data is short-circuited, for example, based on the synchronous signal output from the host 110, but the description thereof is omitted here. When the frame memory 101 receives an active output control signal to be described later from the refresh circuit 105, the frame memory 101 outputs the stored image data of one frame to the undershoot circuit 106.

The image information acquiring unit 102 receives one frame of image data from the host 110 in the same manner as the frame memory 101. [ The image information acquiring unit 102 acquires information (hereinafter referred to as &quot; image information &quot;) of the image represented by the received image data of one frame, and stores the image information in the image information storage unit 103 and the forced refresh And outputs it to the determination section 104. [ Specifically, the image-information obtaining unit 102 in the present embodiment obtains the sum of the tone values of the received image data for one frame, and sets it as image information. That is, the image information obtaining unit 102 obtains a check sum value of the tone values of the image data for one frame, and uses the check sum value as image information. The data size of this check sum value is relatively small.

The image information storage unit 103 receives image information from the image information acquisition unit 102 and stores the image information. The image information storage unit 103 outputs the stored image information to the forced refresh determination unit 104 in the next frame. The storage of the image information received from the image information acquisition unit 102 is performed after the already stored image information is output to the forced refresh determination unit 104. [

The forced refresh determination unit 104 receives the image information of the current frame and the image information of the previous frame from the image information acquisition unit 102 and the image information storage unit 103, respectively, and compares the image information thereof. When the image information of the current frame is different from the image information of the previous frame, the forced refresh determination unit 104 determines that the image represented by the image data has been updated and outputs the active forced refresh signal to the refresh circuit 105 Together, an active correction instruction signal is output to the undershoot circuit 106. If the image information of the current frame is slightly different from the image information of the previous frame, the forced refresh determination unit 104 may determine that the image represented by the image data is not updated. The forced refresh signal corresponds to the second refresh signal. In the present embodiment, the image information acquiring unit 102, the image information storing unit 103, and the forced-refresh determining unit 104 can designate timing for performing forced refresh.

The refresh circuit 105 receives an active forced refresh signal from the forced refresh determining section 104 or receives an active counter refresh signal to be described later from the refresh counter 107, (101). When the image is updated, the stored data in the frame memory 101 is rewritten, but the image data stored in the frame memory 101 is judged by the forced refresh judging section 104 that the image has been updated is sent to the undershoot circuit 106 , Image data representing the image before updating may be output to the undershoot circuit 106. [ For this reason, it is preferable that the refresh circuit 105 sets a period of, for example, about one frame until it receives an active forced refresh signal and then outputs an active output control signal to the frame memory 101 . Alternatively, instead of this, the output of the active forced refresh signal from the forced refresh judgment unit 104 may be delayed by about one frame.

The undershoot circuit 106 receives the image data stored in the frame memory 101. The undershoot circuit 106 performs subtraction processing on the image data received from the frame memory 101 and corrects it when receiving an active correction instruction signal from the forced refresh determination section 104, To the timing generator (109). Specifically, the undershoot circuit 106 reduces the gray-scale value of the image data received from the frame memory 101. [ A unit for changing the gradation value (hereinafter referred to as a &quot; gradation unit &quot;) is one gradation. For example, 128-gradation image data is corrected to 127-gradation image data by decreasing the gradation value by one gradation, and is corrected to 126-gradation image data by decreasing the gradation value by two gradations.

Here, when attention is paid to the constant pixel, the gradation value of the image data at the forced refresh is smaller than the gradation value of the image data at the immediately preceding counter refresh. As a result, the data voltage to be written in the liquid crystal capacitor Clc at the time of forced refresh is closer to the common voltage than the data voltage written in the liquid crystal capacitor Clc at the immediately preceding counter refresh. When the common voltage is 0 V, the positive data voltage is represented by a positive voltage, and the negative data voltage is represented by a negative voltage, "the data voltage becomes a value close to the common voltage" means that the absolute value of the data voltage is small It means to lose. As described above, since the normally black type liquid crystal panel is used as the liquid crystal panel 10, if the gray scale value becomes smaller due to the correction performed by the undershoot circuit 106, the liquid crystal capacitor Clc is written The absolute value of the data voltage to be applied becomes smaller than the original value. That is, the data voltage is undershooted.

However, in the undershoot circuit 106, only the gray level value of the constant pixel among the pixels of the updated image needs to be reduced, and the gray level value of the changing pixel need not be made small. However, since the entire pixel tone value of the updated image is made small, it is not necessary to distinguish between the constant pixel and the change pixel, so that the processing in the undershoot circuit 106 can be simplified. Therefore, the undershoot circuit 106 in the present embodiment is capable of outputting the image data received from the frame memory 101 to the entire pixel gradation of the image data when the active correction instruction signal is received from the forced- It is assumed that the value is reduced. However, the present invention is not limited to this, and the undershoot circuit 106 may discriminate between the constant pixel and the change pixel so that only the gradation value of the constant pixel is made small. The undershoot circuit 106 does not need to make the amount of change of the tone value coincide with all the pixels when the entire pixel tone value of the image data received from the frame memory 101 is made small. By contrast, when the undershoot circuit 106 reduces the total pixel tone value of the image data received from the frame memory 101, the change amount of the tone value is matched in all the pixels, thereby performing the processing in the undershoot circuit 106 This can be done more easily.

The refresh counter 107 receives the synchronization signal from the host 110 and, based on the synchronization signal, increments the count value for each frame to determine the timing for counter refresh. When the count value reaches a predetermined value, the refresh counter 107 outputs an active counter refresh signal to the refresh circuit 105, and outputs an active polarity inversion signal for inverting the polarity of the data voltage to the polarity designation unit 108. [ . The counter refresh signal corresponds to the first refresh signal. The refresh counter 107 resets the count value after the count value reaches a predetermined value. The setting of the count value shown here is merely an example, and other setting methods may be employed.

The polarity designation unit 108 outputs a polarity signal indicating the polarity of the data voltage to the source driver 30. [ The polarity instructing unit 108 inverts the polarity indicated by the polarity signal when receiving the active polarity inversion signal from the refresh counter 107. [ As a result, the polarity of the data voltage is inverted every time the counter is refreshed. In addition, at the time of forced refresh, the polarity designation unit 108 does not receive an active polarity inversion signal, so that the polarity of the data voltage is not inverted.

The timing generator 109 receives the synchronization signal from the host 110 regardless of whether it is a driving period or a pause period and receives the image data from the undershoot circuit 106 during the driving period. The image data received by the timing generator 109 in the forced refresh mode is image data after correction by the undershoot circuit 106. [ In the counter refresh operation, the undershoot circuit 106 does not receive an active correction instruction signal. Therefore, the image data received from the frame memory 101 is not corrected, . The timing generator 109 generates a source control signal such as a source start pulse signal and a source clock signal based on the received synchronization signal and outputs the source control signal to the source driver 30 to output a gate start pulse signal and a gate clock signal And outputs the gate control signal to the gate driver 40. When receiving the image data, the timing generator 109 adjusts the output timing based on the synchronization signal and outputs the image data to the source driver 30. [

The timing generator 109 stops the driving of the data line and the scanning line to the source driver 30 and the gate driver 40, respectively, when the image data is not being received. For example, when the timing generator 109 is not receiving image data, the output of the gate control signal and the source control signal is stopped to cause the source driver 30 and the gate driver 40 to drive the data lines and the scanning lines, respectively Can be stopped. Alternatively, when the timing generator 109 is receiving image data, the source driver 30 and the gate driver 40 respectively supply an active enable signal for putting the data line and the scanning line in a state capable of driving the source driver 30 and the gate driver 40 and does not output such an active enable signal when the timing generator 109 is not receiving image data, the source driver 30 and the gate driver 40 The driving of the data lines and the scanning lines can be stopped. The active enable signal may be output to the source driver 30 and the gate driver 40 in place of the timing generator 109. [

&Lt; 1.4 &lt;

Fig. 4 is a diagram for explaining the idle drive of the present embodiment. Note that Fig. 4 is the same as Fig. 15 except for the data voltage at the time of forced refresh, so that a description common to Fig. 15 will be omitted. Here, it is assumed that the pixel of interest is a constant pixel. During the counter refresh of the first to fourth idle driving periods, data voltages of positive polarity, negative polarity, positive polarity, and negative polarity are written in the liquid crystal capacitor Clc. As a result, during the counter refresh of the first to fourth idle driving periods, the liquid crystal layer is applied with liquid crystal applied voltages of positive polarity, negative polarity, positive polarity and negative polarity. When the image is not updated, the liquid crystal applied voltage, which changes with the lapse of time during the idle period, can be returned to the original state by performing the counter refresh. As a result, the image displayed on the screen can be maintained.

In the third idle drive period, the forced refresh is performed during the idle period, and the positive data voltage is written in the same manner as the counter refresh of the third idle drive period. In the present embodiment, since the gradation value of the image data is corrected by the undershoot circuit 106 during the forced refresh, the data voltage to be written in the liquid crystal capacitance Clc is set to the liquid crystal capacitance Clc Which is closer to the common voltage than the data voltage written in. Therefore, at the time of forced refresh in the third idle driving period, a liquid crystal applied voltage smaller than the counter refresh time of the third idle driving period is applied to the liquid crystal layer. 15, in the forced refresh in the third idle driving period, the same polarity as the data voltage written in the counter refresh of the third idle driving period and the same polarity as that of the data voltage written in the second non- A data voltage having a value closer to the common voltage than the data voltage is written to the liquid crystal capacitance Clc.

Fig. 5 is a diagram showing changes in the liquid crystal applied voltage (cut-off value) and luminance in the idle driving shown in Fig. The period from the second counter-refresh from the left in Fig. 5 to the third counter-refresh from the left corresponds to the third idle drive period in Fig. As shown in Fig. 5, the liquid crystal applied voltage decreases with elapse of time after the data voltage is written into the liquid crystal capacitor Clc and increased at the time of refreshing. When the image is updated (note that the pixel of interest is a constant pixel as described above), the data voltage is written at the time of the counter refresh and the liquid crystal applied voltage is increased, and the liquid crystal applied voltage is decreasing with time Forced refresh is performed. In the present embodiment, unlike the example shown in Figs. 15 and 16, in the forced refresh, a data voltage having the same polarity as the data voltage written at the immediately previous counter refresh and a value closer to the common voltage than the data voltage, And is written into the capacity Clc. This suppresses an increase in the liquid crystal applied voltage at the time of forced refresh, so that an increase in the effective value of the liquid crystal applied voltage is also suppressed. As a result, as shown in Fig. 5, it is possible to suppress a change in luminance that may occur at the time of image updating.

5, the liquid crystal applied voltage at the time of forced refresh and the liquid crystal applied voltage immediately before the forced refresh are slightly different. However, in consideration of the change of the liquid crystal applied voltage after the counter refresh, Is corrected. That is, it is preferable to determine the change amount of the tone value in the undershoot circuit 106 so that the liquid crystal applied voltage at the forced refresh is matched with the liquid crystal applied voltage immediately before the forced refresh. However, in order to make the liquid crystal applied voltage at the forced refresh equal to the liquid crystal applied voltage at the immediately preceding refresh time, for example, in the case where it is necessary to make 128 tones smaller by 1.5 tones to make 126.5 tones, the unit of gradation is 1 , Such a correction can not be performed strictly. That is, 128 gradations are reduced by one gradation to 127 gradations, or the gradation value is reduced by two gradations to be corrected to 126 gradations, so that the liquid crystal applied voltage at the forced refresh is strictly matched with the liquid crystal applied voltage immediately before It is difficult.

Thus, for example, in the undershoot circuit 106, by converting image data of 8-bit gradation (image data of 256 gradations) into image data of 10-bit gradation (image data of 1024 gradations) It is considered that the image data is corrected by substantially 1/4. In the following, image data (gradation number of the image data ^X 2) of the X-bit gradation is referred to as "X-bit gray-scale image data." The concrete method is as follows. 8-bit gradation image data is converted into 10-bit gradation image data. For example, 128 gradations of 8-bit gradation representation are converted into 512 gradations of 10-bit gradation representation. 1 gradation of the 10-bit gradation representation corresponds to 0.25 gradation of the 8-bit gradation expression, and therefore, by converting from 8-bit gradation image data to 10-bit gradation image data, It is practically 1/4. For example, when 512 gradations of a 10-bit gradation representation are reduced by 6 gradations and corrected to 506 gradations, 126.5 gradations of an 8-bit gradation representation are obtained. Here, the 10-bit gradation image data after correction needs to be re-converted to 8-bit gradation image data. However, merely performing the re-conversion, the correction made by substantially reducing the gradation unit to 1/4 corresponds to the 8-bit gradation image data Not reflected. Therefore, it is desirable to re-convert the corrected 10-bit grayscale image data into 8-bit grayscale image data and perform known frame rate control (FRC) or known dithering. This makes it possible to reflect the correction content obtained by making the gradation unit substantially 1/4 into the 8-bit gradation image data. Further, FRC or dithering is performed, for example, by the undershoot circuit 106 and the timing generator 109. [

<1.5 Effect>

According to the present embodiment, in the liquid crystal display device 100 that performs the idle drive by the AC drive and uniformly sets the drive period and the idle period in the screen, in the pixel formation portion forming the constant pixel, , A data voltage having the same polarity as the data voltage written at the immediately preceding counter refresh and a value closer to the common voltage than the data voltage is written to the liquid crystal capacitor Clc. This suppresses an increase in the liquid crystal applied voltage at the time of forced refresh, so that an increase in the effective value of the liquid crystal applied voltage is also suppressed. This makes it possible to suppress a change in luminance that may occur during image updating.

Further, according to the present embodiment, the polarity of the data voltage is inverted every time the counter is refreshed based on the active polarity inversion signal, so that the polarity balance can be reliably obtained.

According to the present embodiment, the image information is compared with the current frame in the previous frame by using the image information acquisition unit 102, the image information storage unit 103, and the forced refresh determination unit 104, Can be determined.

Further, according to the present embodiment, the check sum value of the tone value of the image data for one frame is stored in the image information storage section 103 as image information. Since the data size of the check sum value is relatively small, the memory capacity of the image information storage unit 103 can be relatively small.

Further, according to the present embodiment, the IGZO-TFT is used for the TFT 12. Since the off-leakage current of the IGZO-TFT is very small, the fluctuation of the liquid crystal applied voltage is suppressed. This makes it possible to set the idle period to be long and reduce power consumption.

&Lt; 1.6 Modified Example 1 >

 The image information acquiring unit 102 in the first modification of the first embodiment stores a histogram of gradation values of image data of one frame received by the host 110 (hereinafter referred to as "gradation histogram"). And uses it as image information. 6 is a diagram showing an example of a gradation histogram in the present modification. The ordinate and abscissa represent frequency (also called frequency) and gradation, respectively.

 In the method of using the check sum value as the image information as in the first embodiment, for example, an image in which all the pixels are halftone gradations, an image in which the pixel in the left half is the white gradation and the image in which the pixel in the right half is the black gradation is the same It is judged. On the other hand, when the gradation histogram is used as the image information as in the present modified example, the determination is made based on the frequency at which each tone value appears. Therefore, as described above, It can be determined that the images are different from each other. As described above, according to the present modification, the accuracy of image update determination by the forced refresh determination unit 104 can be made higher than that of the first embodiment.

&Lt; 1.7 Modified Example 2 >

The image information acquiring unit 102 in the second modification of the first embodiment obtains the tone value of the image data of one frame received from the host 110 and uses it as image information. That is, the image information acquisition unit 102 takes image data of one frame received from the host 110 as image information. Thus, in this modification, the image information storage section 103 has the same configuration as the frame memory 101. [

According to the first modification of the first embodiment, the accuracy of determination of image update by the forced refresh determination unit 104 can be increased even with the first embodiment. However, when the image is a color image, for example, It is determined that all the pixels have the same gradation but the images having different colors are the same image. Also, for example, it is judged that the left half pixel is white gradation, the right half pixel is black gradation, the left half pixel is black gradation, and the right half pixel is white gradation pixel is the same image. On the other hand, in the present modification, since image information is image data for one frame, data of each color can be compared for each pixel. As a result, as described above, it is possible to judge that images judged to be the same image by mistake in the method of using the gradation histogram as image information are different from each other. As described above, according to the present modification, the accuracy of determination of image update by the forced refresh determination unit 104 can be made higher than that of the first modification of the first embodiment.

&Lt; 1.8 Modified Example 3 >

7 is a block diagram for explaining the configuration of the display control circuit 20 in the third modification of the first embodiment. In this modification, the image data and the synchronization signal are output from the host 110 only at the time of updating the image. Because of this, the refresh counter 107 in the present modification can not increment the count value based on the synchronizing signal, and therefore has an internal clock generating circuit 107a for generating an internal clock signal therein . The internal clock signal is a signal corresponding to the synchronous signal in the first embodiment.

The refresh counter 107 performs an operation similar to the operation based on the synchronization signal in the first embodiment on the basis of the internal clock signal. Since the timing generator 109 in this modification can not perform an operation based on the same synchronizing signal as the first embodiment, it receives the internal clock signal from the internal clock generating circuit 107a, The same operation as that of the embodiment is performed. The synchronous signal outputted from the host 110 only at the time of updating the image is used for judging the short circuit of one frame in the image data as described above. This synchronization signal may be given to the refresh counter 107 or the timing generator 109. [ As described above, according to the present modification, image data and a synchronization signal are output from the host 110 only at the time of image update, and image data is written in the frame memory 101, so that power consumption can be reduced.

<1.9 Fourth Modified Example>

8 is a block diagram for explaining the configuration of the display control circuit 20 in the fourth modification of the first embodiment. The display control circuit 20 of the modification has the image information acquisition unit 102, the image information storage unit 103, and the forced refresh determination unit 104 in the third modification of the first embodiment, . The image data acquisition section 102, the image information storage section 103, and the forced refresh determination section 104 are not provided, since the image data and the synchronization signal are output from the host 110 only at the time of image update , It is possible to designate the timing of performing the forced refresh. In this manner, according to the present modification, the circuit scale of the display control circuit 20 can be reduced by omitting the image information acquisition unit 102, the image information storage unit 103, and the forced refresh determination unit 104 have.

&Lt; 1.10 &lt;

9 is a block diagram for explaining the configuration of the display control circuit 20 in the fifth modification of the first embodiment. The display control circuit 20 of this modification is configured so that the image data output from the host 110 in the first embodiment is stored in the frame memory 101 and the image information obtaining section 102, And also to the shoot circuit 106.

The forced refresh determination unit 104 in this modification outputs an active correction instruction signal when it is determined that the image represented by the image data has been updated, but does not output the active forced refresh signal. Thus, in the present modification, the image data stored in the frame memory 101 is not output to the undershoot circuit 106 at the time of forced refresh. Since the undershoot circuit 106 receives the image data from the host 110, when the forced refresh is performed, the gradation value of the image data received from the host 110 is corrected, and the corrected image data is supplied to the timing generator 109. [ . The undershoot circuit 106 corrects and outputs the image data received from the host 110, or outputs the image data received from the host 110 as it is, except when the active correction signal is being received .

In the first embodiment, since the undershoot circuit 106 receives the image data stored in the frame memory 101 at the time of the forced refresh, as described above, the refresh circuit 105 receives the active forced refresh signal A period of about one frame is set until the active output control signal is outputted to the frame memory 101 or the output of the active forced refresh signal from the forcedrefresh determination section 104 is delayed by about one frame There is a need. In contrast, in this modification, the undershoot circuit 106 receives the image data output from the host 110 at the time of forced refresh. As a result, at the time of image update, the data voltage based on the image data corrected by the undershoot circuit 106 can be written immediately.

<2. Second Embodiment>

&Lt; 2.1 Partial idle drive >

When a part of the image is updated during the idle period, forced refresh is performed in a certain area (hereinafter referred to as &quot; update area &quot;) including the change pixels in the screen, (Hereinafter referred to as &quot; partly resting drive &quot;) in which the rest period is continued without performing the forced refresh. 10 is a diagram for explaining partial idle drive. The vertical direction in Fig. 10 is the column direction, and the horizontal direction is the row direction. Here, it is assumed that the screen 200 is divided into the update area 201 and two non-update areas 202a and 202b between the update area 201 in the column direction. As shown in Fig. 10, the update area 201 and the non-update areas 202a and 202b are determined on the leading edge. The image displayed on the screen 200 is updated so that the pointer figure 203 moves from the left side to the right side in Fig. According to the partial rest drive, since a part of the screen can be refreshed at the time of forced refresh, the power consumption can be reduced. The update area 201 is constituted by both the change pixel and the constant pixel, and the forced refresh is equivalent to the entire screen in the first embodiment. More specifically, the update region 201 is a region in which the scanning lines GL connected to the pixel forming portion 11 corresponding to the update region 201 are sequentially selected at the time of forced refresh. Also in this embodiment, it is assumed that the normally black type liquid crystal panel 10 is employed as in the first embodiment.

Here, in the partial rest period driving shown in Fig. 10, the conventional rest period driving shown in Figs. 15 and 16 is applied. Fig. 11 is a diagram for explaining a case where conventional idle drive shown in Figs. 15 and 16 is applied to the partial idle drive shown in Fig. The gradation value of each pixel of the image represented by the image data is constant except for the pixels constituting the pointer figure 203. [ Under this condition, when the forced refresh is performed in the update area 201, the liquid crystal capacitor Clc of the pixel forming part 11 forming the constant pixel in the update area 201 has the same polarity and the same polarity as the previous counter refresh Is written. As a result, the liquid crystal applied voltage again increases and the effective value of the liquid crystal applied voltage becomes large. 11, a change in brightness occurs in the constant pixels in the update area 201, and the constant pixels in the update area 201 are displayed brighter than the pixels in the non-update areas 202a and 202b . Thus, in the second embodiment of the present invention, the idle drive of the first embodiment is applied to the partial idle drive shown in Fig. Hereinafter, when the two non-update regions 202a and 202b are not distinguished, they are simply indicated by reference numeral 202. [

<2.2 Display Control Circuit>

12 is a block diagram for explaining the configuration of the display control circuit 20 in the second embodiment of the present invention. The same elements as those in the first embodiment are denoted by the same reference numerals, and a description thereof will be omitted as appropriate. The display control circuit 20 according to the present embodiment is basically the same as the first embodiment described above, but the image information storage section 103 is configured to store image information for each row. That is, as shown in Fig. 12, the image information storage unit 103 includes row-wise image information storage units 103a for storing image information of one row by the number of scanning lines GL. Since the operation in the counter refresh operation in this embodiment is the same as that in the first embodiment, the description will be omitted and the operation at the time of forced refresh will be described.

The forced refresh determination unit 104 compares the image information of the current frame received from the image information acquisition unit 102 and the image information of the previous frame received from the image information storage unit 103 on a row by row basis, If there is a different row, it is determined that the row is included in the update area 201. At this time, the forced refresh determining section 104 outputs the forced forced refresh signal to the refresh circuit 105 as in the case of the first embodiment, and outputs the active correct instruction signal to the undershoot circuit 106. In this way, it is determined whether or not a part of the image has been updated. Further, the forced refresh determination unit 104 determines that the row is included in the non-update area 202 for the row whose image information is the same in the current frame and the previous frame. The forced refresh determination unit 104 outputs to the timing generator 109, for example, an area signal indicating which row is included in the update area 201 and the non-update area 202. [ It is also preferable that the forced refresh determination section 104 also outputs the area signal to the refresh circuit 105 or the undershoot circuit 106.

The refresh circuit 105 receives an active forced refresh signal from the forced refresh determining section 104 and outputs an active output control signal to the frame memory 101. [ When the forced refresh determination section 104 outputs the area signal to the refresh circuit 105, the refresh circuit 105 sets the data corresponding to the update area 201 (hereinafter referred to as &quot; update area data &quot; ) To the frame memory 101 together with the active output control signal.

The frame memory 101 outputs the stored image data of one frame to the undershoot circuit 106 when only the active forced refresh signal is received from the refresh circuit 105. [ When receiving the active forced refresh signal and the area designation signal from the refresh circuit 105, the frame memory 101 outputs the update area data in the stored image data of one frame to the undershoot circuit 106 .

The undershoot circuit 106 preferably receives only the update area data from the frame memory 101 when receiving only the active correction instruction signal from the forced refresh determination section 104. [ Thereby, the tone value can be corrected only for the update area data. The undershoot circuit 106 may receive image data for one frame from the frame memory 101 when receiving the active correction instruction signal and area signal from the forced refresh determination section 104, Only data may be received. Thereby, the tone value can be corrected only for the update area data. The undershoot circuit 106 outputs the updated area data after correction to the timing generator 109. [ The undershoot circuit 106 may correct the tone values for all of the image data for one frame and output the corrected image data to the timing generator 109. [ In this case, however, the data corresponding to the non-updated area 202 of the image data after the correction does not contribute to the refresh.

The timing generator 109 instructs the gate driver 40 to scan the scanning line (scanning line corresponding to the update area 201) to be scanned based on the area signal received from the forced refresh determining part 104. [ For example, the timing generator 109 can instruct the gate driver 40 to scan the scanning line by outputting the above-described active enable signal to the gate driver 40 every row. Specifically, the gate driver 40 operates a buffer amplifier provided between each scanning line to be scanned and each stage of the shift register while operating an internal shift register, and stops the other buffer amplifier to scan a desired scanning line . Further, the method of scanning a desired scanning line is not limited to the example described herein, but other known methods may be employed. The operation of the timing generator 109 based on the update area data or image data received from the undershoot circuit 106 and the synchronization signal received from the host 110 is the same as the operation of the timing generator 106 in the first embodiment from the undershoot circuit 106 The operation is basically the same as the operation based on the image data to be received and the synchronization signal to be received from the host 110, and the description thereof will be omitted here. As described above, the forced refresh is performed only in the update area 201, and the idle period can be continued in the non-updated area 201. [

<2.3 Update Area>

13 is a diagram for explaining partial idle drive of the present embodiment. In the present embodiment, the same drive as in the first embodiment is applied to the update area 201 at the time of forced refresh. Therefore, when the forced refresh is performed in the update area 201, the data voltage written in the liquid crystal capacitor Clc of the pixel forming part 11 forming the constant pixel in the update area 201 is changed Is closer to the common voltage than the data voltage written in the capacitor Clc. Thereby, at the time of forced refresh, a liquid crystal application voltage smaller than that in the immediately preceding counter refresh is applied to the liquid crystal layer. In this way, since the increase of the liquid crystal applied voltage at the time of forced refresh is suppressed, the increase of the effective value of the liquid crystal applied voltage is also suppressed. Therefore, a change in luminance that can occur at the time of image updating in the update area 201 is suppressed.

<2.4 Effect>

According to the present embodiment, power consumption can be reduced as compared with the first embodiment by performing partial rest drive. Since the same drive as that of the first embodiment is applied to the update area 201 at the time of forced refresh, the luminance change that may occur at the time of image update in the update area 201, as in the first embodiment, Is suppressed. As a result, as shown in Fig. 13, the luminance difference between the update area 201 and the non-update area 202 can be suppressed.

<3. Third Embodiment>

&Lt; 3.1 Variation of brightness during polarity inversion >

It is known that when the polarity of the data voltage is reversed, the brightness suddenly changes immediately after writing of the data voltage. This phenomenon occurs because the alignment direction of the liquid crystal molecules can not follow the change when the polarity of the data voltage is reversed. Thus, in the third embodiment of the present invention, the data voltage is overshooted at the time of the above-mentioned counter refresh which inverts the polarity. This embodiment can be applied to both the drive for setting the drive period and the idle period uniformly in the screen as in the first embodiment and the partial idle drive as in the second embodiment. In the present embodiment, it is assumed that the normally black type liquid crystal panel 10 is employed as in the first and second embodiments.

<3.2 Stopping drive>

Fig. 14 is a diagram for explaining the idle drive of the present embodiment. The operation at the time of the forced refresh is the same as that of the first embodiment or the second embodiment, and therefore, the description is omitted. In the present embodiment, the driving period at the time of the counter refresh includes a plurality of driving frames, and more specifically, includes two driving frames. The first drive frame is an overshoot drive frame for writing an overshooted data voltage. The drive frame after the overshoot drive frame is a normal drive frame for writing a normal data voltage which is not overshooted. Further, the driving period at the time of the counter refresh may be composed of three or more driving frames, and the driving frame of two or more (less than the total driving frame number in the driving period at the time of the counter refresh) may be an overshoot driving frame. In this case, the voltage value may be different in each overshoot drive frame.

The tone value correction for performing overshoot can be realized as follows in the configuration of the first embodiment (Fig. 3) or the configuration of the second embodiment (Fig. 12). For example, the undershoot circuit 106 performs tone value correction for overshoot. In this case, the undershoot circuit 106 functions as an overshoot circuit in the overshoot drive frame, receives the image data output from the frame memory 101 based on the active output control signal, And outputs the corrected image data to the timing generator 109. The timing generator 109 outputs the corrected image data. Specifically, the undershoot circuit 106 increases the gray-scale value of the image data received from the frame memory 101. [ Thereby, the data voltage based on the corrected image data becomes a value far from the common voltage by the data voltage based on the image data received from the frame memory 101. [ Assuming that the common voltage is (0V), the positive data voltage is represented by a positive voltage, and the negative data voltage is represented by a negative voltage as described above, an absolute value of the data voltage based on the corrected image data is represented by a negative value, Is greater than the full value of the data voltage based on the image data. That is, the data voltage is overshooted. The undershoot circuit 106 outputs the received image data to the timing generator 109 without correcting the received image data in the normal driving frame. In this manner, driving as shown in Fig. 14 is realized.

The undershoot circuit 106 preferably receives a signal indicating whether the drive frame at the time of the counter refresh is an overshoot drive frame or a normal drive frame from the refresh circuit 105 or the refresh counter 103 or the like. An overshoot circuit may be provided separately from the undershoot circuit 106 to perform tone value correction for overshoot of the overshoot circuit. In this case, the undershoot circuit 106 and the overshoot circuit constitute a tone correction circuit.

<3.3 Effect>

According to the present embodiment, in the overshoot drive frame at the time of the counter refresh, the gradation value of the image data is corrected and the data voltage is overshooted. This makes it possible to suppress a change in luminance that may occur during counter refreshing in which the polarity is inverted.

<4. Other>

The present invention is not limited to the above-described embodiments, but may be modified in various ways without departing from the spirit of the present invention. For example, although it has been described that the forced refresh is performed only once during the idle period, the forced refresh may be performed a plurality of times during the idle period. In this case, the operation at the time of the first forced refresh is the same as that described above. As in the case of the first forced refresh, the polarity of the data voltage becomes the same polarity as that of the immediately preceding counter refresh, and the value of the data voltage is equal to the common voltage of the immediately preceding forced refresh Is set to the same value as that at the time of forced or immediately preceding forced refresh.

In the above embodiments, the liquid crystal panel 10 of the normally black type is employed. Therefore, in the forced refresh, the undershoot circuit 106 corrects the tone value to be small. However, When the liquid crystal panel 10 is employed, the undershoot circuit 106 may perform correction for increasing the gray scale value at the time of forced refresh. In addition, in the case of employing the normally white liquid crystal panel 10, in the third embodiment, in the undershoot drive circuit 106 (or the overshoot circuit) in the overshoot drive frame, correction for reducing the tone value .

In each of the above embodiments, an oxide TFT such as an IGZO-TFT is used as the TFT 12, but the present invention is not limited thereto. As the TFT 12, an amorphous silicon TFT, a microcrystalline silicon TFT, a continuous grain silicon TFT, a low temperature polysilicon TFT, or the like may be used.

The second and third embodiments may be combined with the modifications of the first embodiment.

Although the liquid crystal display device has been described as an example of the display device in each of the above embodiments, the present invention can also be applied to other display devices that can perform idle driving and stop each driver during idle periods.

<5. Bookkeeping>

<Annex 1>

A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating a rest period for resting the sleep period,

A driving unit for writing the data voltage to the pixel forming unit,

The drive period is set at a predetermined timing and when the part of the image indicated by the image data received from the outside is updated during the idle period, the idle period is stopped in the update area including the updated part And a display control unit for controlling the driving unit to forcibly set the driving period,

The display control unit

A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,

The data voltage to be written to the pixel forming unit in the forcibly set driving period is the data voltage to be written to the pixel forming unit in the immediately preceding driving period, Outputting data corresponding to the update area obtained by correcting the tone value of a pixel having no change in the tone value by image updating among pixels included in the update area so as to become a value close to a reference common voltage And a correction unit,

Wherein the drive unit writes a data voltage based on data corresponding to the update area whose gradation value is corrected by the gradation correction unit to the pixel formation unit in the forcibly set driving period,

The display unit further includes a scanning line connected to the pixel forming unit,

Wherein the update area is an area in which the scanning lines connected to the corresponding pixel forming part are sequentially selected in a batch.

According to the display device described in the Appendix 1, the update area in the screen (the area including a part of the updated image, more specifically, the scan line connected to the corresponding pixel forming part is sequentially selected in a lump) The driving period can be forcibly set and the pause period can be continued for another area in the screen. As a result, the power consumption can be reduced. In the pixel forming section for forming a pixel having no change in the gray level value by the image updating in the pixels included in the update area, in the driving period forcibly set, the same polarity as the data voltage written in the immediately preceding driving period, The data voltage having a value close to the common voltage is written to the pixel forming portion. As a result, since the increase in the voltage applied to the pixel forming portion in the driving period forcibly set is suppressed for the pixel forming portion for forming the pixel having no change in gray scale value by the image updating in the pixels included in the update region, The increase of the effective value of the negative applied voltage is also suppressed. Therefore, since the luminance change that may occur at the time of image updating in the update area is suppressed, the luminance difference between the update area and the other area can be suppressed.

<Note 2>

A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating a rest period for resting the sleep period,

A driving unit for writing the data voltage to the pixel forming unit,

A display for controlling the driving unit to set the driving period at a predetermined timing and to forcibly set the driving period by stopping the idle period when an image represented by image data received from outside is updated during the idle period Further comprising a control unit,

The display control unit

A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,

Wherein the data voltage to be written in the pixel forming section in the forcibly set driving period is a reference to a data voltage written in the pixel forming section in the immediately preceding driving period A gradation correction unit for outputting at least a part of the image data obtained by correcting the gradation value of the pixel having no change in the gradation value by the image updating among the pixels constituting the image updated during the idle period, Including,

Wherein the driving unit writes a data voltage based on at least a part of the image data whose gradation value is corrected by the gradation correction unit to the pixel forming unit in the forcibly set driving period,

Wherein the display unit further includes a data line and a scanning line connected to the pixel forming unit,

Wherein the pixel forming portion includes a control electrode connected to the scanning line, a first conduction terminal connected to the data line, a second conduction terminal connected to the pixel electrode to which the data voltage is to be applied, And a thin film transistor formed on the substrate.

According to the display device described in Note 2, in the display device performing the idle drive, in the pixel forming portion for forming the pixel having no change in gray scale value by the image update, in the driving period forcibly set, A data voltage having the same polarity as the data voltage to be written and a value close to the common voltage than the data voltage is written. As a result, the increase in the applied voltage of the pixel forming portion in the driving period forcibly set (the liquid crystal applied voltage in the case of the liquid crystal display device) is suppressed, so that the increase in the effective value of the applied voltage in the pixel forming portion is also suppressed. This makes it possible to suppress a change in luminance that may occur during image updating. Further, a thin film transistor in which a channel layer is formed by an oxide semiconductor is used. Since the off-leakage current of this thin film transistor is very small, the potential fluctuation of the pixel electrode is suppressed. As a result, the idle period can be set longer and the power consumption can be reduced.

<Annex 3>

The display device according to claim 2, wherein the oxide semiconductor comprises indium, gallium, zinc and oxygen as a main component.

According to the display device described in Annex 3, the same effect as in Note 2 can be obtained by using a thin film transistor in which a channel layer is formed by an oxide semiconductor containing indium, gallium, zinc and oxygen as main components.

<Annex 4>

A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating a rest period for resting the sleep period,

A driving unit for writing the data voltage to the pixel forming unit,

A display for controlling the driving unit to set the driving period at a predetermined timing and to forcibly set the driving period by stopping the idle period when an image represented by image data received from outside is updated during the idle period Further comprising a control unit,

The display control unit

A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,

The data voltage to be written in the pixel forming section in the forcibly set driving period is a value closer to the common voltage than the data voltage written in the pixel forming section in the immediately preceding driving period A gradation correcting unit for outputting image data obtained by correcting the gradation value of the pixel which has not changed in the gradation value by updating the image in the pixels constituting the image updated during the idle period,

An image data storage unit for storing image data of one frame received from the outside,

A first refresh control section for outputting an active first refresh signal and an active polarity inversion signal at the predetermined timing,

And a refresh unit that outputs image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,

Wherein the driving period set at the predetermined timing includes a plurality of driving frames,

Wherein the gradation correction section receives the image data output from the image data storage section on the basis of the first refresh signal that is active, Outputting image data in which the gradation value is corrected so that the data voltage to be written in the image data is a value farther from the common voltage than the data voltage based on the image data output from the image data storage section,

Wherein the polarity indication section inverts the polarity of the data voltage to the drive section based on an active polarity inversion signal,

Wherein the driving unit writes a data voltage based on the image data output from the tone corrector to the pixel forming unit.

According to the display device described in Appendix 4, in the display device for performing the idle drive by setting the driving period and the idle period uniformly in the screen, the pixel forming portion for forming the pixel with no change in the gray- , A data voltage having the same polarity as the data voltage written in the immediately preceding drive period and a value close to the common voltage than the data voltage is written in the forcibly set drive period. As a result, the increase in the applied voltage of the pixel forming portion in the driving period forcibly set (the liquid crystal applied voltage in the case of the liquid crystal display device) is suppressed, so that the increase in the effective value of the applied voltage in the pixel forming portion is also suppressed. This makes it possible to suppress a change in luminance that may occur during image updating. In addition, based on the first refresh signal, refresh can be performed by writing the data voltage based on the image data stored in the frame memory in the driving period set at the predetermined timing, to the pixel forming section. Thus, the applied voltage of the pixel forming portion, which changes with the lapse of time during the rest period, can be returned to the original state regularly. Thereby, the image displayed on the screen can be maintained. In addition, by determining the polarity of the data voltage every drive period set at a predetermined timing based on the polarity inversion signal, the polarity balance can be reliably obtained. In addition, it is preferable that, in at least the first drive frame in the driving period set at the predetermined timing, the data voltage to be written in the pixel forming portion is set to a value farther from the common voltage than the data voltage based on the image data output from the image data storing portion The value is corrected. This makes it possible to suppress a change in luminance that can occur in a driving period set at a predetermined timing.

<Annex 5>

A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating a rest period for resting the sleep period,

A driving unit for writing the data voltage to the pixel forming unit,

The drive period is set at a predetermined timing and when the part of the image indicated by the image data received from the outside is updated during the idle period, the idle period is stopped in the update area including the updated part And a display control unit for controlling the driving unit to forcibly set the driving period,

The display control unit

A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,

The data voltage to be written to the pixel forming unit in the forcibly set driving period is the data voltage to be written to the pixel forming unit in the immediately preceding driving period, Outputting data corresponding to the update area obtained by correcting the tone value of a pixel having no change in the tone value by image updating among pixels included in the update area so as to become a value close to a reference common voltage However,

An image data storage unit for storing image data of one frame received from the outside,

A first refresh controller for outputting a first refresh signal that is active at the predetermined timing,

And a refresh unit that outputs image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,

Wherein the driving unit applies the data voltage based on the data corresponding to the update area whose gradation value is corrected by the gradation correction unit to the pixel formation unit in the forcibly set driving period,

Wherein the driving period set at the predetermined timing includes a plurality of driving frames,

Wherein the gradation correction section receives the image data output from the image data storage section on the basis of the first refresh signal that is active, Outputting image data in which the gradation value is corrected so that the data voltage to be written in the image data is a value farther from the common voltage than the data voltage based on the image data output from the image data storage section,

Wherein the driving unit writes a data voltage based on image data output from the tone corrector or data corresponding to the update area to the pixel forming unit.

According to the display device described in (Note 5), in the image update mode, the drive period is forcibly set only for the update area in the screen, and the pause period is continued for the other areas in the screen. .

INDUSTRIAL APPLICABILITY The present invention can be applied to a display device that performs idle drive and a driving method thereof.

10 Liquid Crystal Panel (Display)
11-
12 TFT
13 pixel electrode
14 common electrode
20 Display control circuit (display control section)
30 source driver
40 gate driver
50 Vcom Driver
100 liquid crystal display
101 frame memory (image data storage unit)
102 Image information acquisition unit
103 image information storage unit
103a row-by-row image information storage unit
104 forced refresh determining section (second refresh control section)
105 refresh circuit (refresh section)
106 undershoot circuit (tone correction section)
107 refresh counter (first refresh control section)
107a internal clock generating circuit
108 polarity indication
109 Timing Generator
110 host
200 screen
201 update area
202a, 202b Non-update area
203 Pointer Shapes
Clc liquid crystal capacity
GL line
SL data line

Claims (16)

A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating a rest period for resting the sleep period,
A driving unit for writing the data voltage to the pixel forming unit,
A display for controlling the driving unit to set the driving period at a predetermined timing and to forcibly set the driving period by stopping the idle period when an image represented by image data received from outside is updated during the idle period Further comprising a control unit,
The display control unit
A polarity designating section for controlling the driving section so that the polarity of the data voltage in the forcibly set driving period becomes equal to the polarity of the data voltage in the immediately preceding driving period,
Wherein the data voltage to be written in the pixel forming section in the forcibly set driving period is a reference to a data voltage written in the pixel forming section in the immediately preceding driving period A gradation correction unit for outputting at least a part of the image data in which the gradation value of the pixel having no change in the gradation value is corrected by updating the image in the pixels constituting the image updated during the idle period so as to become a value close to the common voltage Including,
Wherein the drive unit writes a data voltage based on at least a part of the image data whose grayscale value is corrected by the grayscale correction unit in the forced driving period. The method according to claim 1,
Wherein the data voltage to be written to the pixel forming section in the forcibly set driving period is a common voltage that is higher than the data voltage written in the pixel forming section in the immediately preceding driving period Outputting the image data obtained by correcting the tone value of the pixel having no change in the tone value by the image updating among the pixels constituting the image updated during the idle period,
Wherein the driving unit writes a data voltage based on image data whose grayscale value is corrected by the grayscale correction unit to the pixel forming unit in the forcedly set driving period. 3. The method of claim 2,
The display control unit
An image data storage unit for storing image data of one frame received from the outside,
A first refresh control section for outputting an active first refresh signal and an active polarity inversion signal at the predetermined timing,
Further comprising a refresh unit for outputting the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,
Wherein the gradation correction section outputs the image data output from the image data storage section based on the first refresh signal that is active without correcting the gradation value,
Wherein the polarity indication section inverts the polarity of the data voltage to the drive section based on an active polarity inversion signal. The method of claim 3,
Wherein the display control unit further includes a second refresh control unit for outputting an active second refresh signal and an active correction instruction signal when an image represented by image data received from outside is updated during the idle period,
The refresh unit outputs the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the active second refresh signal,
Wherein the tone correction section corrects the tone value of the image data received from the image data storage section based on the active correction instruction signal. 5. The method of claim 4,
The display control unit
An image information acquisition unit that acquires information of an image represented by image data of one frame received from the outside and outputs information of the acquired image;
Further comprising an image information storage section for storing the information of the image obtained by the image information acquiring section,
The second refresh control unit compares the information of the image of the current frame acquired by the image information acquisition unit with the information of the image of the previous frame stored in the image information storage unit, And outputs the active second refresh signal when the information of the image of the previous frame is different. 6. The method of claim 5,
Wherein the image information obtaining section sets the sum of the tone values of the image data of one frame received from the outside as the information of the image. 6. The method of claim 5,
Wherein the image information obtaining section sets the histogram of the tone value of the image data of one frame received from the outside as the information of the image. 6. The method of claim 5,
Wherein the image information acquiring section uses image data of one frame received from the outside as information of the image. The method of claim 3,
Wherein the first refresh control section determines the predetermined timing based on a synchronization signal received from the outside. The method of claim 3,
Wherein the display control unit receives the image data externally only at the time of updating the image. 11. The method of claim 10,
Wherein the first refresh control unit generates a clock signal in the first refresh control unit and determines the predetermined timing based on the clock signal. The method of claim 3,
Wherein the tone correction unit receives the image data from the outside in the forcibly set driving period. The method according to claim 1,
Wherein the display control unit stops the idle period and forcibly sets the driving period in the update area including the updated part when a part of the image represented by the image data received from the outside is updated during the idle period Controls the driving unit,
Wherein the gradation correction section receives the data corresponding to the update area in the image data, and the data voltage to be written to the pixel formation section in the forcibly set driving period is the pixel data of the pixel formation section And outputs the data corresponding to the update area in which the grayscale value of the pixel having no change in the grayscale value by the image updating among the pixels included in the update area is corrected so as to become a value closer to the common voltage than the data voltage written in the update area and,
Wherein the drive unit writes a data voltage based on data corresponding to the update area in which the gradation value is corrected by the gradation correction unit in the pixel formation unit in the forcibly set driving period. 14. The method of claim 13,
The display control unit
An image data storage unit for storing image data of one frame received from the outside,
A first refresh controller for outputting a first refresh signal that is active at the predetermined timing,
Further comprising a refresh unit for outputting the image data stored in the image data storage unit to the gradation correction unit from the image data storage unit based on the first refresh signal that is active,
Wherein the gradation correction section outputs the image data output from the image data storage section based on the first refresh signal that is active without correcting the gradation value,
Wherein the polarity indication section inverts the polarity of the data voltage to the drive section based on an active polarity inversion signal. 15. The method of claim 14,
Wherein the display control unit further includes a second refresh control unit for outputting an active second refresh signal and an active correction instruction signal when the part of the image represented by the image data received from the outside is updated during the idle period,
The refresh unit outputs data corresponding to the update area in the image data stored in the image data storage unit from the image data storage unit to the tone correction unit based on the active second refresh signal,
Wherein the tone correction section corrects the tone value of data corresponding to the update area received from the image data storage section based on the active correction instruction signal. A driving period for refreshing a screen of the display unit by writing a data voltage based on image data received from the outside to the pixel forming unit and a writing period for writing the data voltage to the pixel forming unit And a rest period for alternately repeating the rest period for resting the rest period,
When the image represented by the image data received from the outside is updated during the idle period, the idle period is interrupted to forcibly set the driving period, and the forced driving period The data voltage is written in the pixel forming section in such a manner that the polarity of the data voltage in the previous driving period is the same as the polarity of the data voltage in the immediately preceding driving period,
Wherein the data voltage to be written in the pixel forming section in the forcibly set driving period is a reference to a data voltage written in the pixel forming section in the immediately preceding driving period A gradation correction step of outputting at least a part of the image data in which a gradation value of a pixel having no change in gradation value is corrected by updating an image in a pixel constituting an image updated during the idle period so as to become a value close to a common voltage, And,
Wherein in the writing step, a data voltage based on at least a part of the image data whose gradation value is corrected in the gradation correcting step in the forcibly set driving period is written to the pixel forming portion.

Images