TWI338279B - An image adjusting circuit, and interpolating circuit and a method thereof are provided - Google Patents

An image adjusting circuit, and interpolating circuit and a method thereof are provided Download PDF

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TWI338279B
TWI338279B TW96112914A TW96112914A TWI338279B TW I338279 B TWI338279 B TW I338279B TW 96112914 A TW96112914 A TW 96112914A TW 96112914 A TW96112914 A TW 96112914A TW I338279 B TWI338279 B TW I338279B
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circuit
interpolation
image
data
image adjustment
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TW96112914A
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TW200841321A (en
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Shih Hsiung Huang
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Au Optronics Corp
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九、發明說明: 【發明所屬之技術領域】 路及方法,特別是指一種影像調整 本發明係有關於一種影像調整之電 電路及其内插電路與内插方法。 【先前技術】 歐麵繼,一淑娜提升,而 复書°現今的触顯示器’如液晶顯示器、電聚顯示器等, 成的,這些光㈣減去彳.丨、顯^的畫面疋由衫光點所構 些像素的數旦:Jr而數位顯示器之解析度代表的就是這 般常說顯7F器的解析度為1024X768,意味著顯示 :畫面具有768條垂直線,每-條垂直線具機點水平 =素示器所顯示之畫面的總像素數即為购条垂直線與點水 度需:顯不畫面時,由於傳輸至數位顯示器之輸入影像的解析 ==位顯示器顯示影像之解析度,所讀位_大都會 ==:::度也=整輪·解析度,合繼 式,以放大或是縮小輪人雜。㈣像時’必用内插方 入巧二=人圖’其為f知影像放大的調整示意圓,·如圖所示,假設輸 人Ϊ 8傻+匕3的像素點總數為4點,當輸入影像A進行放大而欲產生包 雜B時,财要卿喃料魅雜素點而產生 輸^ ϊ A 時,必彡_算_素狀位置,之後再依據 <之點之__插法求出新像素點之值。習知技術之内 習或是虛擬距離參數進行内插,以產生所需的内插點。 m, J:'述方式產生這些嶋點’實際上需魏外的硬料算電路 n ❿增加數位影像顯示器的製作成本,且影響調整影像之效率。 寸338279 故’若能夠不需額外的硬體計算電路產生内插點,即可提昇調整号《像 的速率’更能減少數位影像顯示器的製作成本,因此可解決上述^問^。 【發明内容】 本發明之目的在於提供魏紐其_魏及方法,其藉 由提供_賴值,硫據嶋對照值對輸人影像進行内㈣算而產生輸 出影像,如此可使數位顯示ϋ不需餐的硬體計算電路即可決定内插點位 置,不但減少數位影像顯示器的製造成本,更提昇調整影像的速率,進而 提昇數位顯示器之效能。 本發明之影像調整電路包含-垂直内插電路與—水平内插電路,兩内 插電路皆包含複數資料移位循環電路、一控制器、一選擇單元與一運算電 路,每-資料移位循環電路皆儲存有複數資料旗標,當該些㈣移位循環 電路之-受控制器驅動時,齡依序循環輸出該些資料旗標;㈣器依據 -輸入影狀-原始賴度與-目標齡H崎度崎出相對應之一選擇 訊號與一驅動訊號,驅動訊號用於驅動該些資料移位循環電路之一,而選 擇訊號則發送至選擇單元,雜娜單元絲選擇罐對應_ —内插對 照值,内插對照值與受驅動之資料移位循環電路相對應;運算電路依序依 據資料旗標並對應内插對照值,而對輸入影像進行内插運算,而產生對應 目標顯示器解析度之一輸出影像。 本發明之影像調整電路之内插方法主要包括:依據一輸入影像之一原 始解析度與一目標顯示器解析度,選擇相對應之一内插對照值與複數資料 旗標;以及依序依據該些資料旗標並對應該内插對照值,而對該輸入影像 進行内插運算,產生對應該目標顯示器解析度之一輸出影像。 【實施方式】 請參閱第二圓,其為本發明之影像調整電路之方塊圖。如圖所示,影 像調整電路10包含有一偵測電路12,其用以偵測一輸入影像,以得知輸入 6 1338279 影像之-原始解析度並傳輸至-垂直内插電路14與―水平内 後再藉由影像調整電路1G之#直_電路14與水平嶋電路π,依據= 入影像之原轉析度與欲齡影像之—目標齡轉析度,而對輸入= 做内插運算,以產生符合目標顯示器解析度之—輸㈣彡像,: 示單元18以顯示影像。 4 垂直内插電路14會纽據輸人影像之原始解析度的垂直解析度與目^ 顯示器解析度之妓崎麟輸人歸之垂直晝素㈣進行_運算而^ 生新畫«料。之後’垂直内插電路14會把新畫素資料傳輸至水平内插電 路16,讓水平内插電路16依據目標顯示器解析度之水平解析度對新晝素資 料之水平畫«料進行_運算,而產生符合目標顯示轉析度之輸出 像。 由於現今一般所使用之影像解析度大都為特定幾種解析度,例如水平 解析度為640、720、800、1024、1152、1280與1440等,而垂直解析度為 350、400、480、600、768、864,900與1024等,所以本發明係依據此幾 種解析度而預先建立複數内插對照值,以供垂直内插電路14與水平内插電 路16對照相對應之内插對照值進行内插運算,如此只需對照内插對照值即 可得知内插點之位置而不需再另外計算,故可解決習用技術所遭遇的問題。 如下表一所示,其為本發明之一較佳實施例之内插對照值。 1338279 原始解析度1024- 目標顯示器解析度12809. Description of the Invention: [Technical Field of the Invention] The method and method, particularly an image adjustment, relates to an image-adjusting electric circuit, an interpolating circuit and an interpolating method thereof. [Prior Art] After the European side, one Shuna enhances, and the book is now the touch display 'such as liquid crystal display, electric display, etc., these light (four) minus the picture of 彳.丨, display ^ 疋 shirt The number of pixels of the light spot is several: the resolution of the Jr and the digital display represents that the resolution of the 7F device is 1024X768, which means that the display has 768 vertical lines, each vertical line has Machine level = the total number of pixels of the screen displayed by the display is the vertical line and point water required for the purchase: when the screen is not displayed, the analysis of the input image transmitted to the digital display == display of the display image of the display Degree, read position _ metropolis ==::: degree also = full round · resolution, succession, to enlarge or reduce the round of people. (4) When the image is used, the image must be inserted into the image of the image. When input image A is enlarged and wants to generate inclusion B, when the rich man wants to input the ^ ϊ A, it must be _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The method finds the value of the new pixel point. Ordinary techniques or virtual distance parameters are interpolated to produce the desired interpolation points. m, J: 'The method of generating these defects' actually requires the hard-wired circuit of the Wei n to increase the manufacturing cost of the digital image display and affect the efficiency of adjusting the image. Inch 338279 Therefore, if you can create an interpolation point without additional hardware calculation circuit, you can increase the adjustment number "speed of image" to reduce the production cost of the digital image display, so you can solve the above problem. SUMMARY OF THE INVENTION The object of the present invention is to provide a method for generating a output image by performing an internal (four) calculation on an input image by providing a value of _, a value of sulphur, and a sulphur value according to a comparison value. The hardware calculation circuit without the meal can determine the position of the interpolation point, which not only reduces the manufacturing cost of the digital image display, but also improves the speed of the image adjustment, thereby improving the performance of the digital display. The image adjustment circuit of the present invention comprises a vertical interpolation circuit and a horizontal interpolation circuit, wherein the two interpolation circuits each comprise a plurality of data shift cycle circuits, a controller, a selection unit and an operation circuit, and each data shift cycle The circuit stores a plurality of data flags. When the (four) shift cycle circuits are driven by the controller, the data is sequentially outputted by the controllers; (4) the device is based on the input image-original dependence and the target The age H is saturated with one of the selection signals and a driving signal, the driving signal is used to drive one of the data shifting loop circuits, and the selection signal is sent to the selection unit, and the hybrid unit selection tank corresponds to _ Interpolating the control value, the interpolation control value corresponds to the driven data shifting loop circuit; the arithmetic circuit sequentially interpolates the input image according to the data flag and corresponding to the interpolation control value, and generates a corresponding target display One of the resolutions outputs the image. The method for interpolating the image adjustment circuit of the present invention mainly comprises: selecting one of the corresponding interpolation values and the plurality of data flags according to an original resolution of an input image and a target display resolution; and sequentially according to the The data flag and the interpolation value should be interpolated, and the input image is interpolated to generate an output image corresponding to one of the target display resolutions. [Embodiment] Please refer to the second circle, which is a block diagram of the image adjustment circuit of the present invention. As shown, the image adjustment circuit 10 includes a detection circuit 12 for detecting an input image to know the original resolution of the input 6 1338279 image and transmitting it to the - vertical interpolation circuit 14 and the horizontal Then, by using the image adjustment circuit 1G's #直_circuit 14 and the horizontal 嶋 circuit π, according to the original resolution of the image into the image and the target age resolution, the interpolation operation is performed on the input = To produce a (four) key image that conforms to the resolution of the target display, the display unit 18 displays the image. 4 The vertical interpolation circuit 14 will calculate the vertical resolution of the original resolution of the input image and the vertical resolution of the target resolution (the fourth). Then, the vertical interpolation circuit 14 transmits the new pixel data to the horizontal interpolation circuit 16, and causes the horizontal interpolation circuit 16 to perform _ calculation on the horizontal level of the new data according to the horizontal resolution of the target display resolution. And produce an output image that matches the target display resolution. Since the image resolution generally used today is mostly a certain degree of resolution, for example, the horizontal resolution is 640, 720, 800, 1024, 1152, 1280, and 1440, and the vertical resolution is 350, 400, 480, 600, 768, 864, 900 and 1024, etc., so the present invention pre-establishes complex interpolation control values according to the several resolutions, so that the vertical interpolation circuit 14 and the horizontal interpolation circuit 16 compare the corresponding interpolation values. Interpolation operation, so that the position of the interpolation point can be known by comparing the interpolation control value without further calculation, so that the problems encountered by the conventional technology can be solved. As shown in Table 1 below, it is an interpolated control value of a preferred embodiment of the present invention. 1338279 original resolution 1024- target display resolution 1280

10 原始點資訊 内插點個數 點資訊 取樣點資訊 貢料旗標資 訊 輸出點資tfl 運算點資訊 10 1010 Original point information Number of interpolation points Point information Sampling point information Dividend flag standard information Output point tfl Operation point information 10 10

3 4 23 4 2

表一 10 7 3 5 4,5 以下係以調整原始水平解析度為1〇24之影像為128〇作為例子而對 本發明進行詳魏明。如表—所*,此内麟紐絲财平崎度為 而欲調整為之_對紐。本發明之_對赚包含有-原始點資 Λ、-内插點個數資訊、—預測點資訊、一取樣點資訊、一資料旗標資訊、 一輸出點資訊以及一運算點資訊。 本發明之内插對照值是藉由第一比例因子與第二比例因子所建立成。 原始解析度與第-_因子之乘積會等於目魏示器解析度與第二比例因 子之乘積。第-比例因子與第二_因子分縣内插對照值中之内插點個 數資Λ與取樣點間隔資訊(表—未示)。表__之内插對照值之第—比例因子 與第-比例因子分別為1〇與8,也就是皿侧等於·χ8。所謂内插點 個數,訊就是輸人影像之每資料必_整之數量。以表—之内插對照值為 例,母原始水平像素點必須調整擴大為丨〇點像素點。 上述所謂取樣間隔資訊為取樣前述調整後之像素點的間隔數;以第三 圖之内插對照值為例’由於内插點_資訊為8,也就是每間隔8則取樣一 點。如表一之内插對照值之取樣點資訊與輸出點資訊所示, 第1輸出點也 1338279 就是第1個取樣點’其錄樣赃第丨原始像素點後之像素點的第丄點; 第2輸出點也就是第2個取樣點,其係取樣調整第i原始像麵後之像素 點的第9點,第1取樣點與第2取獅__ 8,也就是為取制隔資訊; 第3輸出點也就是第3個取樣點,其係取樣調整第2原始像素點後之像素 點的第3點’町取無係·^推。本發明之鳩 p 訊係與輸出點資訊相賴" ^_感雜貝 由於本發明之_對照值之第一_因子料二比_子之比為整數 比’於此實施例來說也就是1(): 8,所以每當間隔8個内插像素點之後,即 取樣第9個像素點,而取樣之像素點對應之糊資訊侧於此第9個像素 點。此實關於進仙插運算時,係―次跳過8 __測倾進行資料 循環,即-次跳過8 _整後之像素點,而依據查表_運算得到輸出點 後再接續跳過8個内插預測資料,上次最後—個資料為接續内插之第i個 起始資料,也就是會以此次所取樣哺料為接續内插之第i個起始資料。 此外,内插龍值巾之酬點資制祕表称_整原始像素點後之像 素點所剩餘的像素點。 當獲知取樣點位置後,即依據對應之運算點資訊進行内插運算,以得 知取樣點之餘《>_來說1丨讎樣狀值即依據㈣紅運算點資 «Λ (1)進仙插運算所得之值,由於第i個取樣點制之運算點資訊為1, 也就是表示第1取樣點之值料第丨壯像麵之值。第2個取樣點所對 應之運算點資tflg 1,2,也就是說第2個取樣齡料丨絲像素點與第2 原始像素點之間’所以第2個取獅之值必織據第丨壯像素點與第2 原始像素點之值進行内插運算而得知。 此外,在進行内插運算時,係必須獲知取樣點所對應之權重值方可 利用内插方程絲得取樣點之值。本發卿依據取樣师訊賴—權重對 照圖,以得知㈣應之—權重值,喊人内插絲錢而運算得知取樣點 之值不同内插法所相對應之權重對照圖係不相同,一般常用之内插法有 線性插補法(Lineai* interpolation)、正弦函數插補法⑸叱 9 1338279Table 1 10 7 3 5 4, 5 The following is a detailed description of the present invention by adjusting the original horizontal resolution of 1 to 24 as an example. As the table - the *, this Nei Linsi is flat and wants to adjust to it. The _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The interpolation control value of the present invention is established by the first scale factor and the second scale factor. The product of the original resolution and the -th factor is equal to the product of the visualizer resolution and the second proportional factor. The first-scale factor and the second-factor are interpolated in the interpolated control values, and the number of resources and the sampling point interval information (table - not shown). The first-scale factor and the first-scale factor of the interpolation control value of the table __ are 1〇 and 8, respectively, that is, the dish side is equal to χ8. The number of interpolated points, the number of information is the number of data per input. Taking the table-input control value as an example, the mother's original horizontal pixel point must be adjusted to expand to the pixel point. The so-called sampling interval information is the number of intervals for sampling the adjusted pixel points; the interpolation value of the third figure is taken as an example. Since the interpolation point_information is 8, that is, a point is sampled every 8 intervals. As shown in the sampling point information and output point information of the interpolated control value in Table 1, the first output point is also 1338279, which is the first point of the pixel point after the first sampling point of the first sampling point; The second output point is also the second sampling point, which is the 9th point of the pixel after the adjustment of the i-th original image plane, the first sampling point and the second lion __8, that is, the separation information The third output point is also the third sampling point, which is the third point of the pixel after the second original pixel is sampled and adjusted. The 鸠p signal of the present invention is related to the output point information " ^ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ That is, 1(): 8, so every time after 8 interpolated pixels, the 9th pixel is sampled, and the pixel corresponding to the sampled pixel is on the 9th pixel. In this case, when it is inserted into the fairy insertion operation, the system skips 8 __ to detect the data loop, that is, skips the pixel after 8 _, and then obtains the output point according to the table _ operation and then skips. Eight interpolated prediction data, the last last data is the i-th starting data of the subsequent interpolation, that is, the i-th starting data of the subsequent sampling is taken as the feeding material. In addition, the recurring point of the dragon value towel is called _ the pixel remaining after the original pixel point. After the sampling point position is known, the interpolation operation is performed according to the corresponding operation point information, so as to know that the sampling point is ">_, the value of the sample is based on (4) the red operation point resource «Λ (1) The value obtained by the interpolation operation is that the operation point information of the i-th sampling point is 1, that is, the value of the first sample point is the value of the image. The operation point corresponding to the second sampling point is tflg 1,2, which means that the second sampling age between the pixel and the second original pixel is 'the second value of the lion will be woven. It is known that the value of the strong pixel and the second original pixel are interpolated. In addition, when performing the interpolation operation, the weight value corresponding to the sampling point must be known to obtain the value of the sampling point using the interpolation equation. According to the sampler's information-weight comparison chart, Benfa Qing knows (4) the weight value, and calls the person to insert the money to calculate the value of the sampling point. The weighting method corresponding to the interpolation method is not The same, commonly used interpolation method has linear interpolation method (Lineai* interpolation), sine function interpolation method (5) 叱 9 1338279

Interpolation)以及一立方迴旋插補法& c〇nv〇iuti〇nInterpolation) and a cubic convolution interpolation & c〇nv〇iuti〇n

Interpolation) 0 «月參閱第二圖’其為本發明進行内插運算所用之權重對照圖之實施例 之第—圖所示之權重對照圖為線性插補法所對應之權重對照圖。假設 本發明運轉性插槪進行嶋運算秘知輸出點之值。當_運算第i 輸出點時’鎌第1輸出點所職之取樣點資訊⑴而對歸重對照圖即 可得知相對應之權重值為1,·内插運算第2輪心時,藏據第2輸出點所 對應之取樣點資訊⑻而對照權重對照_可得知相對應之權重值為 〇. 11;同理,運算其餘輸出點時,皆可依據所對應之取樣點f訊而對照權 重對照圖表即可得知對應之權重值。 由於本發明之_對照值是藉由第_比_子鮮二比_子所建立 成,而原始解析度與第-比例因子之_會等於目標顯示器解析度與第二 比例因子之_,所以本發明之_對職可魏龍。以第三圖之實施 例來說,_鄉5練獅後,健、酬點魏所示齡辭7個調整 後之像素點,又進行6次取樣時會以第5個取樣點為接續内插之第i個起 始像素點,所關隔8個像餘後所取_之第6辣樣像餘會是第5 個原始像素點,故第5個絲像素點即可作為接續内_算之第丨個原始 像素點,而依照此内插對照值接續進行内插運算。上述之内插對照值的^ 環起始點會隨♦騎度之不同而有所不同,也就是不同比姻子會有不同 之循環起始點。·Η 本發明由於預先提供複數内插對照值,所以於進行内插運算時,可立 即對照内插對照值而得知相對應的資訊,以方便内插運算輸入影像而i生 輸出影像,所以可簡化用於調整影像之調整電路,而降低計算電7路的成本, 並可提高調整影像之效率,且可循環對照進行内插運算。另外,由於本發 明之内插對照值中的資訊皆為整數,所以於進行内插運算時可簡化運算: 如此可不需使用複雜之運算電路即可進行内插運算,以達增進^整费^之Interpolation) 0 «Monthly Referring to the Second Diagram' The weight comparison diagram shown in the first embodiment of the weighting map for the interpolation operation of the present invention is a weight comparison diagram corresponding to the linear interpolation method. It is assumed that the operational interpolation of the present invention performs the 秘 operation to know the value of the output point. When _ computing the i-th output point, '镰 the first sampling point of the sampling point information (1) and the weighting comparison chart can be found that the corresponding weight value is 1, · interpolating the second round of the heart, hiding According to the sampling point information corresponding to the second output point (8) and the weight comparison _ can be found that the corresponding weight value is 〇. 11; similarly, when calculating the remaining output points, according to the corresponding sampling point f The corresponding weight value can be known by comparing the weights with the chart. Since the _ control value of the present invention is established by the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The invention of the present invention can be Wei Long. In the example of the third figure, after the _ xiang 5 lion training, the health and reward points are shown in the 7th adjusted pixel, and the 6th sampling point is used as the continuation. Insert the i-th starting pixel point, and the 6th sample of the remaining image will be the 5th original pixel point, so the 5th silk pixel point can be used as the connection. Calculate the first original pixel point, and then perform the interpolation operation according to the interpolation control value. The starting point of the ring of the above-mentioned interpolated control values will vary with the ♦ riding degree, that is, the starting point of the cycle will be different. · In the present invention, since the complex interpolation control value is provided in advance, when the interpolation operation is performed, the corresponding information can be immediately compared with the interpolation control value, so that the input image can be interpolated and the image is output. The adjustment circuit for adjusting the image can be simplified, the cost of calculating the electric circuit can be reduced, and the efficiency of adjusting the image can be improved, and the interpolation operation can be performed by cyclic comparison. In addition, since the information in the interpolation control value of the present invention is an integer, the operation can be simplified when performing the interpolation operation: thus, the interpolation operation can be performed without using a complicated operation circuit, so as to increase the total cost ^ It

請參閱第四圖,其A 圖所示之《魏電狀擁實蘭财《。第四 16。如圖所示,掉明之:於第二圖之垂直_電路14與水平内插電路 位循環電賴、-;^=路2G,其,齡單元3G、複數資料移 娜與-影像線;6〇、-運算電路70、-時脈產 同之内插龍值分別紙料70 3G贱儲存複數内姆照值,不 -組資料旗標,知該些龍移位循環電路扣各儲存有 資料旗標料含有複數^^有差異崎應於不對雌,每組 資料移位《魏™麵標。該些 資料旗標。 任X控制器5〇驅動時,將會依序循環輸出該等 度,目標顯™嫩細路12峨之原始解析 &而刀幻發出相對應之—選擇 料移位循縣路4Q 叙轉料60與該些資 30之內奸他伯s 選擇早凡60會依據選擇訊號趣擇輸出儲存單元 該等資料移位循環電運路 =1°:=^ =於選擇單元6。所輪出之_照值。時==二 步脈波訊餘傳社_ f料胸路4()與運算電路Μ。 根至料移,環電路40會依據同步脈波訊號依序輸出資料旗 器90所赵/· &而運异電路7〇會依據同步脈波訊號内插運算影像線暫存 m ί像,雜。運«路7Q於_運算輸入 幹出之內3+序根據貝料移位循環電路4〇所輸出之資料旗標與選擇單元6〇 r 崎綱__之影像 。舉例來說,當運算電路7G接收的f料旗標為丨時,即依據資料 =公所對應之内插對照值進行内插運算;當運算電路7〇接收的資料旗 :B夺,即依據資料旗標為2所對應之内插對照值進行内插運算。本發 =運算電路7G依據-線性插補法(Linear In_iatiQn)、—正弦函數 ^法⑸此Interpolatuxi)以及—立方迴旋插補法((:耐Please refer to the fourth picture, which is shown in Figure A. Fourth. As shown in the figure, it is shown in the figure: the vertical_circuit 14 of the second figure and the horizontal interpolation circuit bit cycle, -; ^= road 2G, which is the age unit 3G, the complex data transfer and the image line; 〇, - arithmetic circuit 70, - clock production, interpolated dragon value, respectively, paper material 70 3G 贱 storage complex numeration value, no-group data flag, know that these dragon shift cycle circuit deduction each stored data The flag material contains a plurality of ^^ which is different from the female, and each group of data is shifted to the "WeiTM surface standard." These data flags. When the X controller is driven by 5〇, it will output the same degree in sequence, and the target will display the original resolution of the tender and fine road 12峨 and the corresponding corresponding to the knife--the material shift will follow the 4Q of the county road. Material 60 and the funds 30 of the traits of the sergeant s select the early 60 will be based on the selection signal interesting output storage unit such data shift cycle electric way = 1 °: = ^ = in the selection unit 6. The value of the turn taken. Time == two Steps Wave News Yu Chuan She _ f material chest 4 () and the arithmetic circuit Μ. The root-to-material shift, the loop circuit 40 outputs the data flag 90 in accordance with the synchronous pulse signal in sequence, and the transport circuit 7〇 temporarily stores the m ί image according to the synchronous pulse signal interpolation operation image line. miscellaneous.运«路7Q is the input of the data flag and the selection unit 6〇 r 崎纲__ according to the output of the material shifting circuit 4〇. For example, when the f-flag received by the arithmetic circuit 7G is 丨, the interpolation operation is performed according to the interpolation value corresponding to the data=public; when the data flag received by the operation circuit 7 is: B, the data is The flag is 2 interpolated control values for interpolation. The present invention = arithmetic circuit 7G is based on - linear interpolation method (Linear In_iatiQn), - sine function ^ method (5) This Interpolatuxi) and - cubic convolution interpolation method ((: resistant

Convolution 1338279Convolution 1338279

Interpolation)之其中之一進行内插運算。 第四圖實施例之内插電路20係運用於水平内插電路16(參閱第二圖》 所以影像線暫存器90所儲存的資料為垂直内減路14(參閱第二專送 之新晝素資料’而運算電路70所產生之影像資料即傳送至顯示單元18,進 而顯示。運用於垂直内插電路14之内插電路2〇,其影像線暫存器9〇所暫 存的影像㈣為傳送至顯示器欲顯示的輸人影料料,而運算電路刊所產 生之輸出影縣垂直晝素資料’且讀送至水平内插電路16而暫存於水平 内插電路16之影像線暫存器9〇。此外,垂直内插電路14之運算電路7〇於 ,行内插運算時’係依據輸人影像之原始解析度的垂直解析度與目標顯示 器解析度的垂直解析度而選擇對應之缝賴值與資料旗標,而水平内插 電路16之運算電路7G舰雜人鱗之原鱗析度的水平崎度與目標 顯不器解析度的水平解析度而選擇對應之内插制值與資龍標广’、' 請參閱第五圖’其為本發明較佳實施例之流程I如騎= 像調整之嶋方法,首先,如步驟SQ所示,提供複數内插對昭值 數複數組龍旗標’每組倾旗標皆包含有複數資料旗標,即複 數貝科移位顧電路4〇所儲存之龍旗標;之後,_電路12進行 ===入影像而得知輸入影像之原始解析度並傳送至控制器此隨ς, 撕步驟S2 ’依據輸人影像之原始騎度與目標顯示ϋ解析产’ ==目龍之麵訊_咖_聰單元60與鱗_位循又環 冤路40之一,以選擇相對應之内插對照值與複數資料旗標。 昭值電路7G進行步驟S3,依序依據該些龍旗標並對照内插對 值而對輪入影像進行内插運算’產生符合目標顯示器解析度 電路了避免該些倾移傾環電路40輸出轉旗標之時序盘運^ 電路70 _運算輸人影像之時序沒有畔,所以於運算電路 驟時,時脈產生II 8G會產生同步時脈訊號 二’ 輸出資_路4G即纽咖鱗脈訊號依序 輸出f_㈣算電路7G則會依據同步雜訊號同步根據轉旗標與= 12 1338279 插舰值,而運算輸人影像以產生輸出影像。 。。综上所述,本發明影像調整電路之内插電路及内插方法其 績據目標顯示器解析度與輸人影像之原靖析度發出相對應之 與驅動訊號至選擇料與複位循環電路,“ 照值與複數㈣旗標,讓運算電路依據依序 擇賴應之内插對 值,•影像進行内插=====内插 像,如此即可快速難影像,提高罐·之料。 &之輸出影 以上所述者,僅為本發明之較佳實施例而已, 範圍,舉凡依本發”請專利細所述之形狀、構椒=發明之 均等變化與修飾,均應包括於本發明之權利範圍内。祕及楕神所為之 【圖式簡單說明】 第一圖為習知影像放大的調整示意圖β 第二圖為本發明之影像調整電路之方塊圖。 第二圖為本發明之較佳實施例之權重對照圖。 第四圖為本發明之内插電路之較佳實施例的方塊圖。 第五圖為本發明之較佳實施例之流程圖。 【主要元件符號說明】 10 影像調整電路 12 偵測電路 14 垂直内插電路 16 水平内插電路 18 顯示單元 20 内插電路 30 儲存單元 40 資料移位循環電路 13 1338279 50 控制器 60 選擇單元 70 運算電路 80 時脈產生器 90 影像線暫存器One of the Interpolation) performs an interpolation operation. The interpolation circuit 20 of the fourth embodiment is applied to the horizontal interpolation circuit 16 (refer to the second figure). Therefore, the data stored in the image line register 90 is the vertical internal subtraction 14 (refer to the second special delivery). The image data generated by the arithmetic circuit 70 is transmitted to the display unit 18 and displayed. The interpolation circuit 2 used in the vertical interpolation circuit 14 and the image temporarily stored in the image line register 9 (4) The image line temporarily stored in the horizontal interpolation circuit 16 is sent to the horizontal interpolation circuit 16 and transmitted to the horizontal interpolation circuit 16 for transmission to the display object material to be displayed on the display. In addition, the arithmetic circuit 7 of the vertical interpolation circuit 14 is configured to select a corresponding slit according to the vertical resolution of the original resolution of the input image and the vertical resolution of the target display resolution. The value of the value and the data flag, and the level of the original scale of the horizontal interpolating circuit 16 and the level of resolution of the target display are selected to correspond to the interpolated value and资龙标广', ' See Figure 5 is a flow chart I of a preferred embodiment of the present invention, such as a ride-by-image adjustment method. First, as shown in step SQ, a complex interpolation is performed on a complex-valued complex array of dragon flags, each group of flags. All of them include a plurality of data flags, that is, a dragon flag stored in a plurality of Becco shift circuits; after that, the circuit 12 performs the === input image to know the original resolution of the input image and transmits it to the controller. The following step, the tearing step S2 'based on the original riding degree of the input image and the target display ϋ analytical production ' == 目龙的面讯_咖_聪 unit 60 and scale _ position and one of the ring road 40, to Selecting the corresponding interpolated control value and the complex data flag. The scanning circuit 7G performs step S3, sequentially interpolating the wheeled image according to the dragon flag and comparing the interpolated pair value to generate a conforming target display. The resolution circuit avoids the timing of the output of the panning and tilting circuit 40 to output the flag. The circuit 70 has no timing for calculating the input image, so when the circuit is generated, the clock generates II 8G to generate synchronization. Pulse signal two 'output _ road 4G, New Zealand squama signal output in order _ (4) The calculation circuit 7G synchronizes the input image according to the synchronization noise signal according to the flag and the = 12 1338279, and calculates the input image to generate the output image. In summary, the interpolation circuit of the image adjustment circuit of the present invention and The interpolation method is based on the resolution of the target display and the original resolution of the input image, and the driving signal to the selection material and the reset loop circuit, "the illuminating value and the complex number (four) flag, so that the arithmetic circuit is sequentially Selecting the value of the interpolated value, • Interpolating the image =====Interpolating the image, so that the image can be quickly and difficult to be imaged, and the material of the can is improved. The output image of the above is only the present invention. The preferred embodiment and the scope of the invention are all included in the scope of the present invention. The secret picture is a simple illustration of the figure. The first picture is the adjustment diagram of the conventional image magnification. The second figure is a block diagram of the image adjustment circuit of the present invention. The second figure is a weight comparison diagram of a preferred embodiment of the present invention. The fourth figure is a block diagram of a preferred embodiment of the interpolation circuit of the present invention. Figure 5 is a flow chart of a preferred embodiment of the present invention. [Main component symbol description] 10 Image adjustment circuit 12 Detection circuit 14 Vertical interpolation circuit 16 Horizontal interpolation circuit 18 Display unit 20 Interpolation circuit 30 Storage unit 40 Data shift cycle circuit 13 1338279 50 Controller 60 Selection unit 70 Operation Circuit 80 clock generator 90 video line register

Claims (1)

1338279 十、申請專利範圍: 1. 一種影像調整電路之内插電路,其包含: 複數資料移位循環電路,每一該資料移位循環電路皆儲存有複數資料 旗標,該些資料移位循環電路受驅動而依序循環輸出該些資料旗標; -控制器’其雜_輸人影像之_原始解析度與_目標齡器解析度 發出相對應之一選擇訊號與一驅動訊號,該驅動訊號對應於該些資料 移位循環電路之一,以驅動對應之該資料移位循環電路; 選擇單元,其依據該選擇訊號對應輸出一内插對照值,該内插對照 值與接收該驅動訊號之該資料移位循環電路相對應;以及 運舁電路,其接收該輸入影像,並依據該内插對照值與受驅動之該 資料移位猶環電路所依序輸出之該些資料旗標,對該輸入影像進行内 插運算而產生對應該目標顯示器解析度之一輸出影像。 2.如申凊專利範圍第1項所述之影像調整電路之内插電路,其中該影像調 整電路更包含一偵測電路,該摘測電路與該控制器麵接,該偵測電路用 於偵測該輸入影像得知該原始解析度並傳送至該控制器。 •如申凊專利範圍第1項所述之影像調整電路之内插電路,其另包含: —影像線暫存器,其練於該運算電路,該影像線暫存ϋ接收並暫存 該輸入.影像供該運算電路讀取。 ’如申凊專她ID第1項所述之影像調整電路之喃電路,其另包含: -時脈產生㈢’其產生—同步雜訊號並舰至該運算電路與該些資 料_循環電路’驅使該資料移位循環電路依序且循環輸出該些資料 旗標並驅使該運算電路運算該輸入影像。 、 5.如申請專利範圍第1項所述之影像調整電路之内插電路,其另包含: -儲存單元,其_於該選擇單元,該齡單元儲存概勒插對照 值0 申。f專她關1項所述之影像調整電路之喃電路,其巾該内插對 ’’’、值包含有-内插點個數資訊、—取樣點資韻及—運算點資訊。 15 7’如申請專利範圍第6項所述之影像調整電路之内插電路,其中該内插點 個數資訊 '該取樣點資訊以及該運算點資訊所包含之資訊的數值皆為整 數。 8‘如申請專利範圍第6項所述之影像調整電路之内插電路,其中該取樣點 資訊與該運算點資訊所包含之資訊係依序對應於該些資料旗標。“’ 9,如申請專利範圍第6項所述之影像調整電路之内插電路,其中該内插點 個數資訊與該原始解析度之乘積等於一取樣點間隔資訊與該目標顯示 器解析度之乘積。 瓜如申請專利範圍第9項所述之影像調整電路之内插電路,其中該取樣點 間隔資訊所包含之資訊的數值為整數β 11. 如申請專利範圍第i項所述之影像調整電路之内插電路,其中該内插對 照值包含-輸出點資訊,該輸出點資訊所包含之資訊係依序對應於該些 資料旗標。 12. 如申睛專利範圍第i項所述之影調整像電路之内插電路,其中該影像調 整電路之該内插電路為-水平内插電路或一垂直内插電路,該輸入影像 包含水平晝素資料與垂直畫素資料^ 13·如申請專利範圍第1項所述之影像調整電路之内插電路,其中該運算電 路依據-雜插概⑽伽加仰―)、—正㈣數插二法 ⑶nc㈣邮如⑻以及—立方迴旋插補法心阶c〇動Μ-Interpolation)之其中之一進行内插運算9 14. -種影像調整電路之内插方法,其包含下列步驟: ⑷依據-輸人影像之-原始解析度與—目標顯示器解析度,選擇對應 之-内插對照值與複數資料旗標,該内插對照值與該些資料旗標相對 ⑸依序依據該⑽料旗標輕辆__值,而對該輸人影像進行 内插運鼻,產生對應該目標顯示器解析度之—輸出影像。 15.如f請糊細第項所述之影像調整電路之_方法,立另包含: 16 於步驟(a)之前,偵測該輸入影像得知該原始解析度。 如申請專利範圍第14項所述之影像調整電路之内插方法,其另包含: 產生一同步時脈訊號,依據該同步時脈訊號依序輸出該些資料旗標且 運算該輸入影像。 如申請專利範圍第14項所述之影像調整電路之内插方法,其另包含: 提供複數内插對照值與相對應之複數組資料旗標,每組該資料旗標皆 包含有該些資料旗標。 如申請專利範圍第14項所述之影像調整電路之内插方法,其中該内插 對照值包含有一内插點個數資訊、一取樣點資訊以及一運算點資訊。 如申請專利範圍帛18項所述之影像調整電路之内插方法,其中該内插 點個數資訊、該取樣點資淑及該·點資靖包含之資輯數值皆為 整數。 ’ 如申請專利範圍第18項所述之影像調整電路之内插方法,其中該取樣 點資訊與該運算點資輯包含之纽係依序對應於該些資料旗標。 如申請專利範圍第18項所述之影像調整電路之内插方法,其中該内插 點個數資訊與該原始解析度之乘積等於—取樣關隔資訊與該目標顯 示器解析度之乘積。 如申請專利範圍第21項所述之影像調整電路之内插方法,其中該取樣 點間隔資訊所包含之資訊的數值為整數。 如申明專利範圍第14項所述之影像調整電路之内插方法,其中該内插 3值包含—輸出蹄訊’該輸出點資訊所包含之資訊係依序 些t料旗標。 Hr專利顏第14項所述之影像調整電路之内插方法,係運用於該 整電路之-水平内插電路或_垂直内插電路,該輸人影 千畫素資料與垂直晝素資料。 =申,專利範圍第14項所述之影像調整電路之嶋方法,其中於⑹步 驟’係依據-線性插補法(Linear Inte_ati〇n)、一正弦函數插補法 1338279 c Convolution (Sine Inten)〇lation)以及—古 士 .n — w T + , . N 立方迴旋插補法(Cubi Interpolation)之其令之—進行内插運算。 26. 一種影像調整電路,包含: -偵測電路’偵測-輸人影像得知該輸人影像之—朴 ;=電路複數第一内插一 $私組’母組該第-:雜旗標”包含有複數第—資料旗標,节 =直内插電路雜始解析额—目機㈣之直解 度,於該些第-内插對照值與該些第一資料旗標級中選擇對库;_析第 =插對黯與-第-資料旗標組,並依序依據所選擇之該第一資料 組的該些第-倾旗標與所選擇之該第_内插對照值對該輸入 衫像進仃内插運算’而產生對躺目標_器騎度之該垂直解析度 之一第一輸出影像;以及 一^平内插電路’儲存有複數第二_對照值與相對應之複數組第二 資料旗標組,每該第二資料旗標組皆包含有複數第二資料旗標,該水 平内插電紐獅原赌析度無目標齡贿·之水平解析 度’於該些第二内插對照值與該些第二龍旗標組中選擇對應之一第 二内插對難與-第二資料旗標組,並依序依據所選擇之該第二資料 旗I組的該些第二龍旗標與所轉之該第二嘯賴值對該第— 輸出影像進行_運算’而產生對應該目她示騎析度之該水平解 析度之一第二輸出影像。 27.如申n月專利範圍第26項所述之景多像調整電路,其中該垂直内插電路 包含: 複數資料移位循環電路,分別儲存該些第一資料旗標組,每該資料移 位循環電路係依序循環輸出該些第一資料旗標; 一控制器,其依據該輸入影像之該原始解析度與該目標顯示器解析度 之垂直解析度發出相對應之一選擇訊號與一驅動訊號,該驅動訊號對 應於該些資料移位循環電路之一,以驅動對應之該資料移位循環電 18 1338279 路; k擇單s ’其依據該選擇訊號職輪丨該第—内插對雌,該第一 一内插對照值與接㈣驅動喊之該資料移位循環電路相對應;以及 運算電路’其接收賴人影像,並依據制插對照值錢驅動之該 資料移位循環電路所依序輸出之該些第一資料旗標,對該輸入影像進 行内插運算而產生該第一輸出影像。 28. 如申請專利範圍第27項所述之影像調整電路,其中該垂直内插電路 包含: -時脈產生器,其產生—同步時脈訊號並傳送至該運算電路與該資料 移位循環電路,驅使該資料移位循環電路依序且循環輸出該些第一資 料旗標並驅使該運算電路運算該輸入影像。 ' 29. 如申請專利範圍第26項所述之影像調整電路,其中該水平内插電路另 包含: 複數資料移倾環魏,分別齡祕帛二資料旗標組,每該資料移 位循環電路係依序循環輸出該些第二資料旗標; -控制器,其依據該輸人影像之_始解析度與該目標顯示器解析度 之水平解析度發出相對應之-選擇訊號與一驅動訊號,該驅動訊號對 應於該些貧料移位循環電路之一,以驅動對應之該資料移位循環電 路; 一選擇單元,其依據該選擇訊號對應輸出該第二内插對照值,該第二 内插對照值與接收該驅動訊號之該資料移位循環電路相對應;以及 運算電路其接收該第-輸出影像,並依據該第二内插對照值與受 驅動之該資料移位循環電路所依序輸出之該些第二資料旗標,對該第 一輸出影像進行内插運算而產生該第二輸出影像。 / 30.如申請專利範圍第29項所述之影像調整電路,其中該水平内插電 包含: -時脈產生,其產生_同步時脈訊號並傳送线運算電路與該些資 19 1338279 料移位循環電路依序且循環輸出該些第二 y 運算該第—輸出影像。 31如申請專利範圍第26項所 、象 包含: 之以象§周整電路’針該垂直内插電路另 1雜暫抑,其魏並暫存雜入影像。 t請專利顧第26項所述之影像調整電路,其中該水平内插電路另 33 ^影t線暫棘,其接收並暫存該第―輸出影像。 t請範圍第%項所述之影像調整電路,其中該垂直内插電路另 i存單元,儲存該些第-_對照值。 34,如申請專利範圍第%項 包含: $权之〜像調整電路,其中該水平内插電路另 -儲存單元’館存該些第二内插對昭值。 35. 專:I:: %項所述之影像調整電路,其中該第一内插對照值 運插對照值皆包含有一内插點個數資訊'一取樣點資訊以及一 36. ==圍第35項所述之影像調整電路,其中該内插點個數資訊、 37 ΐΓίΓ及該運算點倾所包含之魏醜鮮為整數。 .Γ第==第值35項所述之影像調整電路,其中第-内插對照值與 該第一内插對照值之該取樣點資訊與該運算 別依序對應於該些第-資料旗標與該些第二資料旗把斤^之貝絲刀 38· 35項所述之影像調整電路,其中該第一内插對照值 數資訊與該原始解析度之垂直解析度的乘積等於一取樣 』間隔_貝錢該目標顯示器解析度之垂直解析度的乘積。 39.如申請專利範圍第35項所述之影_整電路,其中該第二内插對照值 之該内插點個數資訊與該原始解析度之水平解析度的乘積等於一取樣 20 1338279 點間隔資訊與該目標顯示器 仉如申請專利範圍第38或如广水平解析度的乘積。 資訊所包含之資訊的數值為整數。L之影像調整電路,其中該取樣點間隔 41.如申請專利範圍第26項所 包含-給屮赴巧他, 像整電路,其中該第—内插對照值 ^ ^點貝讯所包含之資訊係依序對應於該些第一 頁料棋標。 42.如申請專利範圍第26項所述之影像調整電路,其中該第二内插對照值 包含-輸出點資訊’該輸出點資訊所包含之資訊係依序對應於該些第二 資料旗標。 43.如申請專利範圍第26項所述之影像調整電路,其中該垂直内插電路與 s亥水平内插電路依據一線性插補法(Linear Interpolation)、一正弦函 數插補法(Sine Interpolation)以及一立方迴旋插補法(Cubic Convolution Interpolation)之其中之一進行内插運算。 211338279 X. Patent application scope: 1. An interpolation circuit of an image adjustment circuit, comprising: a plurality of data shift cycle circuits, each of the data shift cycle circuits storing a plurality of data flags, and the data shift cycles The circuit is driven to sequentially output the data flags in sequence; - the controller's original resolution of the _ input image and the _ target age resolution are corresponding to one of the selection signals and a driving signal, the driving The signal corresponds to one of the data shifting loop circuits to drive the corresponding data shifting loop circuit; the selecting unit outputs an interpolated control value corresponding to the selected signal, the interpolating control value and receiving the driving signal The data shifting loop circuit corresponds to; and the transport circuit receives the input image, and according to the interpolation control value and the driven data, the data flag is sequentially output by the loop circuit. The input image is interpolated to generate an output image corresponding to one of the resolutions of the target display. 2. The interpolating circuit of the image adjusting circuit of claim 1, wherein the image adjusting circuit further comprises a detecting circuit, the picking circuit is connected to the controller, and the detecting circuit is used for The input image is detected to know the original resolution and transmitted to the controller. The interpolating circuit of the image adjusting circuit according to claim 1, further comprising: an image line register, wherein the image line is temporarily stored, the image line is temporarily received, and the input is temporarily stored. The image is read by the arithmetic circuit. 'After applying the ID of the image adjustment circuit according to the first item of her ID, the other includes: - clock generation (3) 'the generation of - synchronization noise number and the ship to the operation circuit and the data_loop circuit' The data shifting loop circuit is driven to sequentially and cyclically output the data flags and drive the arithmetic circuit to calculate the input image. 5. The interpolation circuit of the image adjustment circuit of claim 1, further comprising: - a storage unit, wherein the selection unit stores the value of the comparison value 0. In particular, she shuts down the circuit of the image adjustment circuit described in item 1, and the interpolated pair ’’’, the value includes the information of the interpolated point, the sampling point, and the operation point information. 15 7' The interpolation circuit of the image adjustment circuit according to claim 6, wherein the interpolation point information 'the sampling point information and the information included in the operation point information are integers. 8' The interpolation circuit of the image adjustment circuit according to claim 6, wherein the sampling point information and the information included in the operation point information are sequentially corresponding to the data flags. [9] The interpolation circuit of the image adjustment circuit of claim 6, wherein the product of the interpolation point number information and the original resolution is equal to a sample point interval information and the target display resolution The interpolation circuit of the image adjustment circuit described in claim 9 wherein the value of the information included in the sampling interval information is an integer β. 11. Image adjustment as described in claim i The interpolating circuit of the circuit, wherein the interpolated control value comprises-output point information, and the information contained in the output point information is sequentially corresponding to the data flag. 12. According to the item i of the scope of claim The interpolation circuit of the image adjustment circuit, wherein the interpolation circuit of the image adjustment circuit is a horizontal interpolation circuit or a vertical interpolation circuit, and the input image includes horizontal pixel data and vertical pixel data. The interpolation circuit of the image adjustment circuit according to Item 1 of the patent scope, wherein the operation circuit is based on - (poly) interpolation (10) gamma addition -), - positive (four) number interpolation two method (3) nc (four) mail as (8) and - Interpolation operation of one of the square rotation interpolation method (Interpolation) 9 14. Interpolation method of image adjustment circuit, which comprises the following steps: (4) According to - input image - original analysis Degree and target display resolution, select corresponding - interpolated control value and complex data flag, the interpolated control value is opposite to the data flag (5) according to the (10) material flag light vehicle __ value, and The input image is interpolated and sent to produce an image corresponding to the resolution of the target display. 15. If the method of image adjustment circuit is as described in the above paragraph, the method further includes: 16 in the step ( The method for interpolating the image adjustment circuit according to claim 14, further comprising: generating a synchronous clock signal according to the synchronization clock The signal outputting the data flag in sequence and calculating the input image. The method for interpolating the image adjustment circuit according to claim 14 further includes: providing a plurality of interpolated control values and corresponding complex array data Flag, Each of the data flags includes the data flag. The method for interpolating the image adjustment circuit of claim 14, wherein the interpolation control value includes an interpolation point information, a sampling Point information and an operation point information. For example, the method of interpolating the image adjustment circuit described in claim 18, wherein the number of interpolation points, the sampling point, and the content of the point The numerical value is an integer. The interpolation method of the image adjustment circuit according to claim 18, wherein the sampling point information and the key point included in the operation point resource sequentially correspond to the data flags. The method for interpolating an image adjustment circuit according to claim 18, wherein a product of the number of interpolation points and the original resolution is equal to a product of the sampling interval information and the resolution of the target display. The method for interpolating an image adjustment circuit according to claim 21, wherein the value of the information included in the sampling interval information is an integer. The method for interpolating an image adjustment circuit according to claim 14, wherein the interpolated value includes - outputting the information, and the information contained in the output information is sequentially followed by a t-flag. The interpolation method of the image adjustment circuit described in Item 14 of the Hr patent is applied to the horizontal interpolation circuit or the vertical interpolation circuit of the entire circuit, and the input image and the vertical pixel data. = Shen, the method of image adjustment circuit according to item 14 of the patent scope, wherein (6) step 'based on linear interpolation method (Linear Inte_ati〇n), one sine function interpolation method 1338279 c Convolution (Sine Inten) 〇lation) and - Gus.n - w T + , . The N-Cubic Interpolation (Cubi Interpolation) makes it an interpolation operation. 26. An image adjustment circuit comprising: - a detection circuit 'detecting - inputting a human image to know the input image - a simple; = circuit plural first interpolating a $ private group 'mother group the first -: miscellaneous flag The standard "includes a complex number - data flag, section = direct interpolation circuit miscellaneous analysis amount - the direct resolution of the camera (4), and selects among the first-interpolated control values and the first data flag levels Pairing the library; _ analyzing the first pair and the - the first data flag group, and sequentially according to the selected first data flag of the first data group and the selected first _ interpolation value The input shirt image is subjected to an interpolation operation to generate a first output image of the vertical resolution of the lying target _ ride degree; and a flat interpolation circuit stores a plurality of second _ control values corresponding to The second data flag group of the complex array, each of the second data flag groups includes a plurality of second data flags, and the horizontal interpolation of the original gambling gambling analysis has no target age bribe. The second interpolated control value and the second one of the second dragon flag groups are selected to correspond to the second interpolating pair and the second data flag group, and According to the selected second flag of the second data flag group I and the second whistle value of the second data flag, the _ operation is performed on the first output image, and the corresponding display is generated. 27. The second output image of the horizontal resolution. 27. The multi-image adjustment circuit of claim 26, wherein the vertical interpolation circuit comprises: a plurality of data shifting loop circuits, respectively storing The first data flag group, each of the data shifting loop circuits sequentially outputs the first data flags; a controller, according to the original resolution of the input image and the target display resolution The vertical resolution sends a corresponding one of the selection signal and a driving signal, and the driving signal corresponds to one of the data shifting loop circuits to drive the corresponding data shifting cycle power 18 1338279; According to the selection signal, the first interpolated control value corresponds to the data shifting loop circuit of the (4) driving shout; and the arithmetic circuit 'receives the human image, and according to system The first data flag is sequentially outputted by the data shifting loop circuit in sequence, and the first output image is generated by interpolating the input image. 28. As described in claim 27 The image adjustment circuit, wherein the vertical interpolation circuit comprises: a clock generator that generates a synchronous clock signal and transmits the signal to the operation circuit and the data shift cycle circuit to drive the data shift cycle circuit sequentially The first data flag is cyclically outputted to drive the operation circuit to calculate the input image. The image adjustment circuit of claim 26, wherein the horizontal interpolation circuit further comprises: a plurality of data tilting rings Wei, the two-year-old secret data flag group, each of the data shifting loop circuits sequentially outputs the second data flag; - the controller, based on the initial resolution of the input image and the target The horizontal resolution of the display resolution sends a corresponding-selection signal and a driving signal, and the driving signal corresponds to one of the poor material shifting loop circuits to drive the corresponding a data shifting loop circuit; a selection unit corresponding to the second interpolation control value corresponding to the selection signal, the second interpolation control value corresponding to the data shifting loop circuit receiving the driving signal; and the operation circuit Receiving the first output image, and interpolating the first output image according to the second interpolation control value and the second data flags sequentially output by the driven data shifting loop circuit And generating the second output image. The image adjustment circuit of claim 29, wherein the horizontal interpolation comprises: - clock generation, which generates a _synchronous clock signal and transmits a line operation circuit with the resources 19 1338279 The bit loop circuit sequentially outputs the second y operations to sequentially output the first output image. 31 If the scope of the patent application is 26, the image contains: The § Zhou complete circuit 'pin' of the vertical interpolation circuit is another temporary suppression, and Wei Wei temporarily stores the intermixed image. The image adjustment circuit described in claim 26, wherein the horizontal interpolation circuit further receives and temporarily stores the first output image. Please select the image adjustment circuit according to the item of item %, wherein the vertical interpolation circuit stores another unit, and stores the first-_ control values. 34. If the patent application scope item 5% includes: $weight~ image adjustment circuit, wherein the horizontal interpolation circuit and the storage unit are stored in the second interpolation pair. 35. The image adjustment circuit of the I::% item, wherein the first interpolated control value interpolated control value includes an interpolated point number information 'a sampling point information and a 36. == circumference The image adjustment circuit of the above-mentioned item 35, wherein the number of interpolation points, 37 ΐΓίΓ, and the Wei ugly contained in the operation point are integers. The image adjustment circuit of item 35, wherein the first-interpolated control value and the first interpolation control value of the sampling point information and the operation sequence sequentially correspond to the first-data flag And an image adjustment circuit according to the second data flag, wherein the first interpolated control value information and the vertical resolution of the original resolution are equal to one sampling. 』Interval_Beiqian The product of the vertical resolution of the target display resolution. 39. The image-complete circuit of claim 35, wherein a product of the number of interpolated points of the second interpolated control value and a horizontal resolution of the original resolution is equal to a sample of 20 1338279 points. The interval information is the product of the target display, such as the patent application range 38 or the wide horizontal resolution. The value of the information contained in the information is an integer. L image adjustment circuit, wherein the sampling point interval 41. As included in the scope of claim 26 - give the 屮 to his skill, like the whole circuit, where the first - interpolated control value ^ ^ point information contained in the information The system sequentially corresponds to the first page of the game. The image adjustment circuit of claim 26, wherein the second interpolation control value includes - output point information, wherein the information included in the output point information sequentially corresponds to the second data flag . 43. The image adjustment circuit of claim 26, wherein the vertical interpolation circuit and the horizontal interpolation circuit are based on a linear interpolation method and a sine interpolation method (Sine Interpolation). And one of the Cubic Convolution Interpolation methods is used for the interpolation operation. twenty one
TW96112914A 2007-04-12 2007-04-12 An image adjusting circuit, and interpolating circuit and a method thereof are provided TWI338279B (en)

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