1323875 !8388twf.d〇c/y 九、發明說明： 【發明所屬之技術領域】 本發明是關於一種源極驅動器（source driver)的輸出電 壓補彳員裝置與方法，且特別是關於一種類比源極驅動器 (analog source driver)的輸出電壓補償裝置與方法。 【先前技術】 在中小尺寸類比液晶面板的系統設計上，必須同時整 合面板、驅動器以及信號走線於同一片基板中，以便提供 產品最大的彈性空間。圖1即為上述面板之架構，類比源 極驅動器（analog source driver)101〜103與閘極驅動器（gate driver) 104排列在面板1〇5周圍，透過直接佈局（][ay〇ut)在 基板上的 js 號走線 106 與 FPC ( flexible printed circuit)介面 110相連。在貫際面板系統的佈局(lay〇ut)設計與製作上， 如圖2所示，經由信號走線提供給類比源極驅動器ι〇1〜1〇3 的類比接地準位AVSS1〜AVSS3 ’會因信號走線寄生阻抗 艮、&與&的不同，進而在寄生阻抗兩端產生不同的壓 差，使得各個類比源極驅動器1〇1〜1〇3的類比接地準位 AVSS1 〜AVSS3 不同。 傳統類比源極驅動器之架構如圖3所示’包含輸出緩 衝器（output buffer) 301、類比取樣維持電路（analog sampling-and-hold circuit) 302、移位暫存器（shift register) 303以及位置解碼器（p0siti〇n decoder) 304。圖3的傳統類 比源極驅動器的輸出動作可等效為圖4A與圖4B的充放電 系統來看。圖4A與圖4B中區隔線401的左側為類比取樣 5 18388twf，d〇c/i 維持電路302之简_，六柄生& 續參照圖Μ與圖4B來看:輪出緩衝器301之簡圖。繼 信號CPH控制-統類比源極驅動器經由開關 取樣維持紅斥關s，當類比 料電塵VA倕p §)弟n條資料狀態時，類比資 則是依據取樣二 ==bCn充電，而充電量的大小 定，此日條之電容…則ί 開關si。4Α所不，當輸出致能信號0Ε控制外部 二 錢時，類比源極驅動器便開始對 輸出^條資料，此時第n+1條資料之電容Cn+1=充 電狀恕’如圖4B所示。 根據剛4關係可知，類比源極驅動器的類比接地準位 A'SS的飄移，會直接影響到傳統類比源極驅動器的輸出 電壓。因此，傳統類比源極驅動器在面對圖2中各個類比 源極驅動器的類比接地準位不同時，也就是AVssi关 AVSS2关AVSS3的情況下，傳統類比源極驅動器的輸出電 壓Vout將會如圖5所示，隨著類比接地準位Avss的提 昇而下降，進而在晝面顯示上產生區塊缺陷。也就是說， 即使k供同樣的類比資料，每一個源極驅動器所負責區塊 的灰度(grayscale)表現也會不—致。且當參考準位飄移量越 多時，相鄰區塊之間的品位灰度表現也就會有越大的落差。 【發明内容】 本發明的目的是在提供一種使用於類比源極驅動器的 輸出電壓補償裝置，無需修改類比源極驅動器以外的系 1323875 18388twf.doc/y 統，就可在原本驅動系統中改善區塊缺陷，提昇晝面品質。 本毛明的另-目的是在提供一種使用於類比源極驅動 器的輸出電壓補償方法，可消除因類比源極.驅動器的類比 接地準位不均而造成的輸出電壓變動。 為^上述及其他目的，本發明提出—種使用於類比 源極驅動/的輸出電壓補償裝置，其特徵在於包括一個電 J加，採用差值電壓補償類比源極驅動器的輸出電 二&的差值電壓為該類tb源極器的類比接地準位 與一參考準位的差值。 亡述之使用於類比源極驅動器的輸出電壓補償裝置’ 比幸包括差值比較益以及濾凌器。差值比較器 b較類比減準位與參考準位，輸出差值電駐電性 加成器，其中的參考準位為類比源極驅動器的 數位接地雜。錢器參轉位，麵 訊渡除後輸出至差值比較器。 4和的雜 驅，的輸峨補償方法，其特徵在於: 補乜一類比源極驅動器的輸出電壓， 广 極驅動器的類比接地準位與二 == 為麵t的產生+會先將參考準位的雜'除，且參考準位 為類比源極驅動器的數位接地準位。 成哭發明的較佳實施例所述，本發明是以-電麼加 成。。補仞類比源極驅動器的輪出電 器的差值簡經由比較類比接地準二準= 7 18388twf.doc/y ^動因此可以消除_比接地準位不均而造成的輸出電壓 以不^^ 2類比源極軸S内“電壓補償機制，所 原本驅動錢+改善區塊缺陷，提昇晝面品質。 H 其他目的 '特徵和優點能更明顯 =細本發明之較佳實施例’並配合所附圖式， 【實施方式】 力口爐Γί，本發明一實施例的類比液晶面板驅動系統 木構圖，包含减選擇器(parameter selee㈣611、鎖相迴 ^ t ^(phase locked loop) 612 . (vide〇 dec〇der) =，序控制器(timing制議⑽4、直流/直流轉換器 (DC/DC converter) 6! 6 ’以及帶有輸出電壓補償裝置乃的 類比源極驅動器62H23、_驅動器伽與面板奶的 面板模組615。視訊解碼器613用於輸人視㈣ 料解碼，並輸出-類比資料AD。時序控制器6i4產生類 比源極驅動器621〜623所需的源極控制信號⑶盥閘極驅 動器624所需的閘極控制錢CG。參數選擇器6^ 視訊解碼器613於不同視訊系統所需的解碼參數 迴 路電路犯提供時序控制器614所需的系統頻率^ 直流轉換器616提供整個系統以及類比液晶面板模組= 所需的工作電源。本發明在原本類比液晶面板驅動 改變之設計下’將輸出電_償裝置75應用在新設計的類 18388twf.d〇c/y 比源極驅動器621〜623上，使各個類比源極驅動器62丨〜623 旎自動補償類比接地準位的飄移，進而改善面板的區塊模 糊現象。 圖7A與圖7B為根據本發明一實施例的類比源極驅動 器輸出電壓補償裝置7 5的原理示意圖。圖7 A揭露了習知 技術中，傳統類比源極驅動器會隨著信號走線長短的影 響，而使傳統類比源極驅動器的類比接地準位呈現非相等 的準位。為了補償傳統類比源極驅動器因電路本身的類比 接地準位飄移而造成區塊灰度不均的現象，本實施例提出 了補償類比源極驅動器輸出電壓的原理’如圖所示。 睛據續參照圖7B來看，本實施例所提的原理是將類比源 極驅動器的類比接地準位與系統的類比接地準位相比，把 兩準，比較過後的差值電壓，加回到類比源極驅動器的輸 出電壓，使得面板模組在同樣的類比資料下，每一個源^ 驅動器所負責的區塊灰度表現—致。如後所述，本實=例 採用類比源極驅動器的數位接地準位作為系統類比接地準 =的近似值，主要是由於類比源極驅動器内部的數位電路 模組遠少於類比電路模組，因此在類比源極驅動哭的數位 ，地準位飄移現象彳Μ、崎況下，就可以把類^極驅動 盗的數位接地準位當做一參考準位。 β、圖8為根據本發明一實施例的類比源極驅動器輸出带 堅補彳負衣置75的架構圖。依據本發明的原理，在傳統的類 比，極驅動器中加入了輸入電壓補償裝置75，其中包含了 電壓加成器82卜差值比較器822與濾波器823。電壓2成 9 1323875 I8388twf.doc/y 器Ml連接於類比源極‘驅動器的類比取樣維持電路犯盥 輸出緩衝益812之間，而差信士齡哭们9也、占丄 ^ 左值比軚态822與濾波器823則 '依序電性連接至電麗加成器82卜電麗加成器821把差值 電壓加回到類比源極驅動器的輸出電壓上’而苴中的差 電壓是經由差值比較器822產生。在此差值比㈣奶是 稭由比較類比源極驅動器的類比接地準位(A v s s)與一參 考準位進而產生差值電麼並輸出至電星加成器821。 φ 為了得到-個更準麵參考準位，也可以在差值°比較器 822接收參考準位之前，先將類_極驅㈣的數位接地 準位(GND)經域波器823濾、除雜訊後，再輸出至差值比 較器822做為參考準位。 最後，由圖7Α與7Β的原理示意圖可以得知，只需在 類比源極驅動器輸出電壓之前，對類比源極驅動器的類比 接地準位的飄移進行補償就可以，因此電壓加成器821的 電=連接，還可以連接在類比資料(AD)的輸入端與位置解 碼益811之間，或是連接在位置解碼器811與類比取樣維 持電路813之間。 另一方面，本發明另外提出了一種類比源極驅動器輸 ，電壓的補償方法。補償方法與上述的實施例大致相同， 疋利用一差值電壓作為源極驅動器輸出電壓的補償，而差 值電壓的取得是經由比較類比源極驅動器的類比接地準位 與二參考準位而來。這個補償方法的細節已經包含於上一 個實施例中，在此就不多說明。 綜上所述，本發明之類比源極驅動器輸出電壓補償裝 1323875 1 83 88twf.doc/y 置與方法，是利用一差值電壓作為源極驅動器輸出電壓的 補償，而其中差值電壓是根據類比源極驅動器的類比接地 準位與一參考準位的差距計算而來，因此在消除因類比源 極驅動器的類比接地準位不均而造成的輸出電壓變動後， 可以改善面板的區塊缺陷。另一方面，本發明的輸出電壓 補償裝置是附加在類比源極驅動器内，因此可以在類比源 極驅動器以外的系統不作任何修改的情況下，就可在原本 類比驅動系統中提昇晝面的輸出品質。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内，當可作些許之更動與潤飾。 【圖式簡單說明】 圖1為先前技術的液晶面板整合設計之系統架構圖。 圖2為先前技術的類比液晶面板電源配置等效圖。 圖3為先前技術的類比源極驅動器之内部架構圖。 圖4 A與4 B為先前技術的類比源極驅動器之輸出動作 示意圖。 圖5為先前技術的類比源極驅動器的輸出電壓與類比 接地準位關係圖。 圖6為根據本發明一實施例的類比液晶面板驅動系統 架構圖。 圖7A與7B為根據本發明一實施例的類比源極驅動器 輸出電壓補償裝置之原理示意圖。 圖8為根據本發明一實施例的類比源極驅動器輪出電 1323875 18388twf.doc/y 壓補償裝置架構圖。 - 【主要元件符號說明】 . 75 :類比源極驅動器輸出電壓補償裝置 101〜103、621〜623 :類比源極驅動器 104、 624 :閘極驅動器 105、 625 .液晶面板 . 106:信號走線 110 : FPC 介面 • 301、812 :輸出緩衝器 302、 813 :類比取樣維持電路 303、 814 :移位暫存器 304、 811 :位置解碼器 4 01 .區隔線 611 :參數選擇器 612 :鎖相迴路電路 613 :視訊解碼器 614 :時序控制器 ® 615 :面板模組 616 :直流/直流轉換器 821 :電壓加成器 822 :差值比較器 823 :濾波器1323875 !8388twf.d〇c/y IX. Description of the Invention: [Technical Field] The present invention relates to an output voltage supplement device and method for a source driver, and more particularly to an analogy Output voltage compensation device and method of an analog source driver. [Prior Art] In the system design of the small and medium-sized analog liquid crystal panel, it is necessary to simultaneously integrate the panel, the driver, and the signal wiring in the same substrate to provide the maximum flexibility of the product. 1 is the structure of the above panel, analog source drivers 101 to 103 and gate driver 104 are arranged around the panel 1〇5, through the direct layout (][ay〇ut) on the substrate. The upper js trace 106 is connected to the FPC (flexible printed circuit) interface 110. In the design and fabrication of the layout of the continuous panel system, as shown in Figure 2, the analog grounding levels AVSS1~AVSS3 of the analog source drivers ι〇1~1〇3 are provided via signal traces. Due to the parasitic impedance 信号, & and & of the signal trace, different differential voltages are generated across the parasitic impedance, so that the analog grounding levels AVSS1 to AVSS3 of the analog driver 1〇1~1〇3 are different. . The architecture of a conventional analog source driver is shown in FIG. 3 as 'including an output buffer 301, an analog sampling-and-hold circuit 302, a shift register 303, and a position. Decoder (p0siti〇n decoder) 304. The output action of the conventional analog source driver of Figure 3 can be equivalent to the charge and discharge system of Figures 4A and 4B. 4A and 4B, the left side of the segment line 401 is analog sampling 5 18388 twf, d 〇 c / i maintain circuit 302 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Schematic diagram. Following the signal CPH control - the analog source driver maintains the red squirrel s via the switch sampling, when the analog material HV 倕 § §) the n data state, the analog capital is charged according to the sampling two == bCn charging The size of the quantity is fixed, the capacitance of this day... then ί switch si. 4ΑNo, when the output enable signal 0Ε controls the external two money, the analog source driver starts to output the data. At this time, the capacitance of the n+1th data Cn+1=charges the same as shown in Figure 4B. Show. According to the relationship of the just 4, the drift of the analog grounding level of the analog source driver A'SS directly affects the output voltage of the conventional analog source driver. Therefore, when the analog analog source driver is different from the analog grounding potential of each analog source driver in FIG. 2, that is, the AVssi is turned off by AVSS2, the output voltage Vout of the conventional analog source driver will be as shown in the figure. As shown in FIG. 5, as the analog grounding level Avss increases, a block defect occurs on the kneading surface display. That is to say, even if k is used for the same analog data, the grayscale performance of the block responsible for each source driver will not be. And when the reference level drifts more, the grade gray scale performance between adjacent blocks will have a larger drop. SUMMARY OF THE INVENTION It is an object of the present invention to provide an output voltage compensating apparatus for an analog source driver that can improve an area in an original driving system without modifying a system other than the analog source driver 1323875 18388 twf.doc/y. Block defects improve the quality of the dough. Another objective of the present invention is to provide an output voltage compensation method for analog source drivers that eliminates output voltage variations due to the analog ground potential misalignment of analog sources. For the above and other purposes, the present invention provides an output voltage compensating device for analog source driving, characterized in that it includes an electric J plus, using a differential voltage to compensate the output of the analog source driver. The difference voltage is the difference between the analog ground level of the tb source and a reference level. The output voltage compensation device used in the analog source driver is described as a comparison and a filter. The difference comparator b is compared with the analog reduction bit and the reference level, and outputs a difference electric resident additive, wherein the reference level is the digital grounding of the analog source driver. The money device is indexed, and the signal is output to the difference comparator. The hybrid transmission method of 4 and the miscellaneous drive is characterized in that: the output voltage of the analog-type source driver is increased, the analog grounding level of the wide-pole driver and the second-= generation of the surface t will be referenced first. The bit of the impurity is divided, and the reference level is the digital grounding level of the analog source driver. As described in the preferred embodiment of the crying invention, the invention is based on the addition of electricity. . The difference between the complement and the source driver's wheel-out electrical device is compared with the analog grounding quasi-quasi-b = 7 18388 twf.doc/y. Therefore, the output voltage caused by the unevenness of the grounding level can be eliminated. "Voltage compensation mechanism in the source axis S, which originally drives the money + improves the block defects and improves the quality of the kneading surface. H Other features' features and advantages can be more obvious = finer preferred embodiment of the invention' The embodiment of the present invention is an analogous liquid crystal panel driving system wood composition, including a parameter selee (4) 611, phase locked loop (612). (vide〇dec 〇der) =, sequence controller (timing protocol (10) 4, DC/DC converter 6! 6 ' and analog source driver 62H23 with output voltage compensation device, _ driver gamma and panel milk The panel module 615. The video decoder 613 is used for inputting (four) material decoding, and outputting - analog data AD. The timing controller 6i4 generates source control signals (3) required for the analog source drivers 621 to 623. 624 required brake The pole controller CG. The parameter selector 6^ The video decoder 613 provides the system frequency required by the timing controller 614 for the decoding parameter loop circuit required by different video systems. The DC converter 616 provides the entire system and the analog LCD panel module. = required operating power. The present invention applies the output power compensation device 75 to the newly designed class 18388 twf.d〇c/y over the source drivers 621 to 623 in a design similar to the analog LCD panel drive design. Each of the analog source drivers 62 丨 623 623 旎 automatically compensates for the drift of the analog ground level, thereby improving the block blurring of the panel. FIGS. 7A and 7B are analog source driver output voltage compensation devices 7 according to an embodiment of the invention. The schematic diagram of Fig. 7A discloses that in the prior art, the conventional analog source driver will have an unequal level of the analog grounding level of the conventional analog source driver as the signal length is affected. Compensating for the phenomenon that the traditional analog-to-source driver is uneven due to the drift of the analog grounding level of the circuit itself, this embodiment proposes a compensation analogy. The principle of the output voltage of the pole driver is as shown in Fig. 7B. The principle of the present embodiment is to compare the analog grounding level of the analog source driver with the analog grounding level of the system. Quasi, compare the difference voltage, add back to the output voltage of the analog source driver, so that the panel module under the same analog data, each source ^ driver is responsible for the block gray scale performance - such as As described, the actual example uses the digital grounding level of the analog source driver as the approximation of the system analog grounding ratio = mainly because the digital circuit module inside the analog source driver is much smaller than the analog circuit module, so the analog source The number of the driver's crying digits, the ground level drift phenomenon, and the state of the island can be used as a reference level for the digital grounding level of the class. β, FIG. 8 is a block diagram of an analog-to-source driver output with a stiffening device 75 according to an embodiment of the invention. In accordance with the principles of the present invention, in a conventional analog, pole driver, an input voltage compensation device 75 is incorporated which includes a voltage adder 82 and a difference comparator 822 and a filter 823. Voltage 2 to 9 1323875 I8388twf.doc / y Ml connected to the analog source 'driver's analog sampling maintenance circuit 盥 盥 output buffer benefit 812, and the difference between the letter and the age of the crying 9 also, 丄 ^ lvalue ratio 軚 state 822 and filter 823 are then sequentially electrically connected to the galvanic coupler 82. The galvanic coupler 821 adds the difference voltage back to the output voltage of the analog source driver, and the difference voltage in the 是 is via Difference comparator 822 is generated. In this case, the difference ratio (4) milk is calculated by comparing the analog grounding level (A v s s) of the analog source driver with a reference level and then outputting the difference to the electric star adder 821. φ In order to obtain a more calibrated reference level, the digital grounding level (GND) of the class _ pole drive (4) may be filtered by the domain waver 823 before the difference comparator 822 receives the reference level. After the noise, it is output to the difference comparator 822 as a reference level. Finally, it can be seen from the schematic diagrams of FIGS. 7Α and 7Β that it is only necessary to compensate the drift of the analog grounding potential of the analog source driver before the output voltage of the analog source driver, so the voltage of the voltage adder 821 The connection may also be connected between the input of the analog data (AD) and the position decoding benefit 811 or between the position decoder 811 and the analog sample maintenance circuit 813. On the other hand, the present invention additionally proposes a type of compensation method for the input and output voltages of the source driver. The compensation method is substantially the same as the above embodiment, 疋 using a difference voltage as the compensation of the output voltage of the source driver, and the difference voltage is obtained by comparing the analog ground level of the analog source driver with the two reference levels. . The details of this compensation method have been included in the previous embodiment and will not be described here. In summary, the analog source driver output voltage compensation device of the present invention is 1323875 1 83 88 twf. doc / y is a method of using a difference voltage as a source driver output voltage compensation, wherein the difference voltage is based on The difference between the analog grounding level of the analog source driver and a reference level is calculated. Therefore, the block defect of the panel can be improved after eliminating the variation of the output voltage caused by the uneven analog grounding level of the analog source driver. . On the other hand, the output voltage compensating device of the present invention is added to the analog source driver, so that the output of the kneading surface can be improved in the original analog driving system without any modification of the system other than the analog source driver. quality. While the invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and may be modified and modified by those skilled in the art without departing from the spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a system architecture diagram of a prior art liquid crystal panel integrated design. 2 is an equivalent diagram of a power supply configuration of an analog LCD panel of the prior art. 3 is an internal architecture diagram of a prior art analog source driver. 4A and 4B are schematic diagrams showing the output action of the prior art analog source driver. Figure 5 is a graph of output voltage versus analog ground level for prior art analog source drivers. 6 is a block diagram of an analog LCD panel driving system in accordance with an embodiment of the present invention. 7A and 7B are schematic diagrams showing the principle of an analog source driver output voltage compensating device according to an embodiment of the invention. FIG. 8 is a block diagram of an analog-to-source driver wheel power-off 1323875 18388 twf.doc/y pressure compensation device according to an embodiment of the invention. - [Major component symbol description] 75: Analog source driver output voltage compensation devices 101 to 103, 621 to 623: analog source driver 104, 624: gate driver 105, 625. Liquid crystal panel. 106: Signal trace 110 : FPC interface • 301, 812: output buffers 302, 813: analog sample hold circuits 303, 814: shift register 304, 811: position decoder 4 01. segment line 611: parameter selector 612: phase lock Loop circuit 613: video decoder 614: timing controller® 615: panel module 616: DC/DC converter 821: voltage adder 822: difference comparator 823: filter
Cn-1、Cn、Cn+Ι :電容 R!、R_2、R3 .電阻 S、S1 :開關 12Cn-1, Cn, Cn+Ι: Capacitance R!, R_2, R3. Resistance S, S1: Switch 12