TWI321028B - Circuit board and method for manufacturing the same - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a circuit board and a method of fabricating the same, and more particularly to a multilayer circuit board and a method of fabricating the same. [Prior Art] ▲Because the accumulation of electronic products is getting higher and higher, it is applied to the circuit board of electronic products with the same degree of integration. The circuit layer is also composed of single layer, 2 layers, and 6 layers, 8 layers, even to Above the 1Q layer, so that the electronic components can be more densely mounted on the printed circuit board. 1 The circuit board process includes the layer method (^animation process) and the layering method (buiM up Gongyi (^5). In the case of the layering method, the multilayer wiring layers are separately formed on the multilayer dielectric layer, and then the wiring layers, the dielectric layers and the bonding layers are aligned, and the bonding is completed. Conducting a conductive through via process to create a plurality of conductive vias for electrically connecting the circuit layers at different levels. #Lamination method for making circuit boards 'each circuit layer and each dielectric layer __ degree must depend on good control. Therefore, in the circuit board process, rivets are usually used to fix the high temperature and high voltage of each circuit layer and each dielectric layer m hot pressing process towel to make each circuit layer and each dielectric The layer rises _ and the layer is biased, resulting in inaccurate alignment of the circuit layers. During the rivet process and hot pressing process, the rivet may be deformed and lose its fixed work. Therefore, in the conventional circuit board, it is still necessary to select the rivet specification of the appropriate rivet, the rivet sleeve pin (four) with the substrate 1321028 22735twf.doc/ n 2 'with the optimized pressing parameters, can reduce the relative layer deviation and surface between the two patterned circuit layers, resulting in the problem of alignment offset. Usually the good substrate (four) is higher, adjust the process record Also poetry spends a lot of time and manpower to reduce the productivity, and finally can only improve the layer bias. [Invention] The present invention provides a method for manufacturing a circuit board, which can improve the layer bias and the shrinkage of the circuit layer when the substrate is pressed. The present invention provides a circuit board which has a high yield by using the above-described circuit board manufacturing method. To solve the above problems, the present invention provides a circuit board manufacturing method including the following steps. First, a first substrate and a second substrate are provided, wherein the first substrate has a first surface and the second substrate has a second surface, wherein the first substrate has a first pattern The road layer is disposed on the first surface and the second substrate has a second circuit layer and is disposed on the second surface. Next, at least one first-limit member is formed on the first surface, and Forming at least one second limiting member corresponding to the first limiting member on the two surfaces, and the first limiting member and the second limiting member are adapted to contact to restrict the between the first substrate and the second substrate The first substrate is bonded to the second substrate, wherein the first surface and the second surface are disposed. In the embodiment of the invention, the first substrate and the second substrate are dielectric substrates or metals. In one embodiment of the invention, the first limiting member is disposed on the frame of the first substrate and the second limiting member is disposed on the frame of the third substrate. 31321028 22735twf.doc/n. In an embodiment of the invention, the first limiting member is disposed in a circuit blank area of the first circuit layer, and the second limiting component is disposed in a circuit blank area of the second patterned circuit layer. In an embodiment of the invention, the first limiting member is disposed on the first and the circuitized layer, and the second limiting member is disposed on the second patterned wiring layer. In an embodiment of the invention, the first substrate and the second substrate are pressed as described below. First, a = dielectric film is disposed between the first surface and the second surface. Further, the dielectric film is formed in a secret manner between the first surface and the second surface, and the first substrate is bonded to the first dielectric layer. In one embodiment of the present invention, after the first substrate and the second substrate are pressed together, the method further includes removing the first substrate and the second substrate: a storm; two first patterned circuit layers and a second Pattern the circuit layer. In an embodiment of the present invention, after the pressing the first substrate and the second substrate, the second limiting member does not contact the second surface and the second patterned circuit layer, and the second limiting member does not contact the first a surface and a first patterned circuit layer. The present invention further provides a circuit board 'including a dielectric layer, a first patterned circuit layer, a second patterned circuit layer, at least one first limiting member, and at least one second limiting member. The first patterned circuit layer is buried in the dielectric layer and exposed to one side of the dielectric layer. The second patterned circuit layer is buried in the ^ layer and exposed to the other layer of the dielectric layer - the limiting member is buried in the 7 22735 twf.doc / n = electrical layer ' and the contact dielectric layer is buried - One side of the patterned circuit layer. The limiting member is embedded in the dielectric layer, and the contact dielectric layer is embedded with the second pattern=the other surface of the layer, wherein the first limiting member and the second limiting member are projected perpendicular to a plane of the circuit board At least partially overlap. In the embodiment of the present invention, the first limiting member is disposed on the frame of the first earth plate, and the second limiting member is disposed on the frame of the second substrate. In the embodiment of the invention, the first limiting member is disposed in the first blank area, and the second limiting member is disposed in the circuit blank area of the second patterned circuit layer. In the example of Tu'an, the first limiting member is arranged on the first = upper. Above the stomach' and the second limiting member is disposed on the second patterned circuit. Fortunately, the circuit board includes a first substrate, a first plate, a right flute, a limiting member, and a dielectric. Floor. The first substrate has an H surface. The first-patterned line is disposed on the first surface. The second = heart limiting member, the plate is disposed on the I wire; and the projections of the face and the second base, the layer and the second limiting member disposed on the second surface at least partially overlap. Between the vertical plate and the second surface of the second substrate, and the first case: in the consistent embodiment of the present invention, the first substrate and the second substrate are 1321028 22735 twf.doc/n dielectric Substrate or metal substrate. In an embodiment t of the present invention, the first limiting member is disposed on the frame of the first substrate, and the second limiting member is disposed on the frame of the second substrate. In an embodiment of the invention, the first limiting member is disposed in a circuit blank area of the first patterned circuit layer, and the second limiting member is disposed in a circuit blank area of the second patterned circuit layer. In an embodiment of the invention, the first limiting member is disposed on the first patterned circuit layer, and the second limiting member is disposed on the second patterned wiring layer. In an embodiment of the invention, the first limiting member does not contact the second surface and the second patterned circuit layer, and the second limiting member does not contact the first surface and the first patterned circuit layer. Based on the above, the first limiting member and the second limiting member are respectively disposed on the first substrate and the second substrate, so when the first substrate and the substrate are pressed together, the first limiting member and the first limiting member The second limiting member can limit the relative displacement between the first substrate and the substrate. In this way, it is possible to effectively reduce the layer deviation and the bathing of the first substrate and the first substrate during the pressing, and the problem of the alignment shift caused by the article further improves the product yield. The above described features and advantages of the invention will be apparent from the following description. 1A to 1D are cross-sectional views showing a process of fabricating a circuit board according to an embodiment of the present invention, and FIG. 2 is a first limiting member and a second limiting member in FIG. 1B. 9 1321028 22735twf.doc/n Schematic diagram of the arrangement. First, referring to FIG. 1A, a first substrate 11A and a second substrate 120 are provided. The first substrate 11() has a first surface 11a, and the second substrate 12 has a second surface 12. In the present embodiment, the first substrate 11A may be a circuit substrate having a first patterned circuit layer 112, and the second substrate 12A may have a second patterned circuit layer 122. Circuit board. The first substrate 11A and the second substrate 120 may be a dielectric substrate or a metal substrate, and the material thereof is, for example, resin, stainless steel, aluminum, or the like, and the first patterned circuit layer 112 and the second patterned circuit layer 122 are, for example, It is made by the name of the copper foil. Next, referring to FIG. 1B, a first limiting member 114 is formed on the first surface 11〇a, and a second limiting member 124 is formed on the second surface 12〇a, wherein the first limiting member 114 and the first Two limiting members 124 are shown as two examples. The second limiting member 124 and the first limiting member Π4 should be disposed opposite each other. In detail, when the subsequent step of pressing the first substrate 11 〇 and the second substrate 12 is performed, the first limiting member 114 and the first The second limiting member 124 should be contactable in the horizontal direction to limit the relative displacement between the first substrate 110 and the second substrate 12A. Referring to FIG. 2, in FIG. 2, the first limiting member Π4 and the second limiting member 124 are respectively disposed on the plate frame n〇b of the first substrate 11 and the plate frame 120b of the second substrate 12〇, and The first limiting member 114 and the second limiting member 124 are alternately arranged, and the first limiting member 114 and the second limiting member 124 respectively contact the first surface 110a and the second surface i20a. In this way, when the first substrate 11 and the second substrate 120 are subjected to the horizontal stress, the first limiting member 114 and the second limiting member 124 are brought into contact, and the first 10 1321028 22735 twf.doc is fixed in the horizontal direction. /n The substrate 110 and the second substrate 120 〇 The present invention does not limit the arrangement positions of the first limiting member 114 and the second limiting member 124, and the first limiting member H4 and the second can also be used by those skilled in the art. The limiting member 124 is configured in other manners, for example, the first limiting member 114 and the second limiting member 124 are respectively disposed on the line blank area 112a of the first-patterned circuit layer 112 and the line blank of the second patterned circuit layer 122. Area 122a.

The material of the first limiting member 114 and the second limiting member 124 may be metal, and the first limiting member 114 and the second limiting member 124 are respectively formed on the first surface 〇a and the first portion by electroplating. Two surfaces! However, the present invention is not limited thereto, and those skilled in the art (4) may form the first limiting member 1丨4 and the second limiting member 124 in other manners and other materials.

For example, the material of the first-limit member 114 and the second limiting member 124 is, for example, a polymer, a plastic, etc., but the invention is not limited thereto, as long as the glass-rubber transfer temperature (Tg) and The melting point (Tm) is higher than the temperature at which the first substrate 110 is pressed against the second substrate 12, and can withstand the pressure when the first substrate 11〇 and the second substrate 12 are pressed together. The first limit member 114 and the second limit member 124 are formed. In addition, the first limiting side cow 114 and the second limiting piece 124 can also be formed in other ways, such as electric pound, pasting, pressing, riveting, implanting, first opening and then implanting. After that, referring to FIG. 1B and FIG. 1c, the first substrate 11A and the second substrate 120 are pressed together, and when the pressing is performed, the first surface u〇a is disposed opposite to the second surface 120a, and the first substrate UG can be disposed. A dielectric film (10) is disposed between the second substrate and (see FIG. 1B), wherein the dielectric sheet 13 is, for example, a resin sheet. The pressing step of 丄22735twf.doc/n 萁it is, for example, pressing the first substrate 110, the j=J:X and the _13G by hot pressing, and pressing the same, the stomach is 〇, and the pressure is 5 The shawl will fill in the first - _ circuit layer ι ΐ 2 and the second pattern? Line layer! 22 line gaps ten Figure 1〇. The first-patterned wiring layer m and the second patterned via layer ii are in the electrical layer 13G, and the dielectric layer 13_ is combined with the first substrate 110 and the second substrate 120.

In the above-mentioned process, since the first and second limiting members ι 4 and the limiting member 124 are in contact with each other in the horizontal direction, the relative displacement of the first substrate 110 and the first substrate 12 in the horizontal direction can be restricted and the solid pattern can be fixed. The circuit layer 112 and the second patterned circuit layer 122 prevent the first patterned circuit layer m and the second patterned circuit layer 122 from being subjected to high temperature and high voltage during the pressing process of the first substrate no and the second substrate m. The displacement is generated, causing a problem of poor alignment.

Referring to FIG. 1D, in the embodiment, the first substrate 110 and the second substrate 12 are removed, and the first patterned circuit layer ι2 and the second undead layer 122 are exposed. At this point, the money is completed in the production of the semi-finished product 100 of the circuit board. Since the first limiting member 114 and the second limiting member 124 are respectively disposed on the first substrate 11G and the second wire 12G, the first limit is used when the first substrate 110 is pressed against the first substrate 120. The piece Η* and the first limiting member 124 can limit the relative displacement between the first substrate 11 〇 and the second substrate 12 。. Thus, the first patterned circuit layer 112 and the second patterned circuit layer 122 12 22735 twf.d〇c/n 22735 twf.d〇c/ can be effectively reduced when the first substrate 11 〇 and the second substrate 12 压 are pressed together. n

The layer is biased and the shrinkage causes the problem of the offset of the alignment, and the product yield is improved step by step. Referring to FIG. 1D, in the embodiment, the thickness 第一 of the first limiting member 114 and the second limiting member 124 may be smaller than the first surface u〇a and the first surface 12〇a. The distance between the two. In this way, the first limiting member 114 does not contact the second substrate 12G, and the second limiting member 124 does not contact the first base, and the 110' can be prevented from being subjected to the first limiting member n4 and the first step in the subsequent pressing step. The second stopper m affects the first substrate 11G and the second substrate 12 〇 from being properly pressed. In view of the above, the shapes and arrangement of the first limiting member and the second limiting member are not limited to the shapes and arrangements illustrated in FIG. The first limiting member and the second limiting member may also be a cylinder, a cone, etc., and the arrangement thereof may also be a linear arrangement, a curved arrangement, a circular arrangement or an irregular arrangement, as long as the first limit The first member and the second member can fix the first substrate and the second substrate in a horizontal direction, and the first limiting member and the second limiting member do not affect the specifications of the first substrate and the second substrate and the first patterned circuit The electrical properties of the layer and the second circuit layer may be used. FIG. 3 is a cross-sectional view showing the steps of the first limiting member and the second limiting member in the manufacturing method of the circuit board according to another embodiment of the present invention. Referring to FIG. 1 and FIG. 1 , the embodiment and the implementation of FIG. 2 The difference between the example is that the real expansion-limit member m and the third limiting member 124 are respectively formed on the second-dimension circuit layer 112 and the second patterned circuit layer 122, that is, the limit member 114 , not in contact with the first surface ma, and the second = 124 is not in contact with the first surface i20a. In the present embodiment, the first clamping member 13 1321028 22735twf.doc / n 114 and the brother - the limiting member 124' The forming method is, for example, first forming the opening of the process with the micro-view money, and then forming by electroplating. FIG. 4 is an arrangement of the first limiting member and the second limiting member in the manufacturing method of the circuit board according to still another embodiment of the present invention. Referring to FIG. 4, in the embodiment, the first limiting member 214 and the second limiting member 224 may be a columnar body whose horizontal surface is L-shaped, and the first limiting member 214 and the second limiting portion. The position member 224 may be arranged along the outer edge 21b of the first substrate 110 and the outer edge 220b of the second substrate 120 to form a moment. Figure 5 is a schematic view showing the arrangement of the first limiting member and the second limiting member in the manufacturing method of the circuit board according to another embodiment of the present invention. Referring to Figure 5, in the embodiment, there are two sets of different shapes. a limiting member and a second limiting member are respectively a first limiting member 314a and a second limiting member 324a, and a first limiting member 314b and a second limiting member 324b. The first limiting member 314a and The second limiting member 324a is respectively elongated and cylindrical, and the first limiting member 314b and the second limiting member 324b are respectively hollow cylindrical and cylindrical, and the first limiting member 324b is located at the first limit. Figure 6A to Figure 6C are flow cross-sectional views showing a method of fabricating a circuit board in accordance with still another embodiment of the present invention. In the embodiment, the same or similar components are used in the embodiment of Figures 1 to id. The reference numerals denote the same or similar elements, and the embodiment is substantially the same as the embodiment of FIG. 1A to FIG. 1D. The differences between the two embodiments will be described in detail below, and the same points will not be described again. First, please refer to the figure. 6Α, providing a first substrate 410 and a second substrate 420 A substrate 41 has a first surface 41〇a, and the second substrate 420 has a second surface 420a, and a first patterned line 14 22735twf.doc/n layer 430 is disposed on the first surface 41〇a. And a second patterned circuit layer 440 is disposed on the second surface 42A. In the present embodiment, the first substrate 41A and the first pattern are formed, and the road layer 430 is, for example, a single-layer circuit substrate. The second substrate 420 and the second patterned circuit layer 44 are also provided by a single-layer circuit substrate, but the invention is not limited thereto, and the first substrate 41 is first patterned. The circuit layer 430 and the second substrate 42 and the second patterned line layer 440 may also be provided in other manners, such as with a two-layer correction substrate (ie, a dual panel). In the present embodiment, the first substrate 410 and the second substrate 420 may be an electric substrate or a metal substrate, such as resin, stainless steel, aluminum, etc., and the first patterned circuit layer 43 and the second layer. The patterned wiring layer 44 is, for example, made of a copper box. Next, referring to FIG. 6B, a first limit is formed on the first surface 410a, 114, and a second surface is formed on the second surface 42A. The limiting member 124, | the first limiting member 114 and the second limiting member 124 are shown as two examples. The second limiting member 124 and the first limiting member 114 should be opposite each other. In detail, in the step of performing the subsequent first substrate 41〇 and the second substrate 42〇, the first limiting member 114 and the second limiting member 124 should be contactable in the horizontal direction to limit the first substrate 410. The relative displacement between the second limiting member 114 and the second limiting member 124. The arrangement of the first limiting member 114 and the second limiting member 124, the lifting/striping member, the forming method and the like have been disclosed in detail in the embodiment of FIGS. 1A to 1D. I will not repeat them here. 15 1321028 22735twf.doc/n Afterwards, please refer to Figure 6B and Figure 6C, which will be the first The plate 410 is pressed against the second substrate 420, and the first surface 41〇& is disposed opposite to the second surface 42〇& and can be disposed between the first substrate 41〇 and the second substrate 42〇. A dielectric film 130' (see FIG. 6B), wherein the dielectric film 130 is, for example, a resin sheet. The pressing step is performed by, for example, hot pressing to the first substrate 41, the second substrate 420, and the dielectric. The film is 13 〇, pressed, and the dielectric film is 13 〇,

During the lamination process, the first patterned wiring layer 43 and the second patterned wiring layer 44G are filled in the wiring gap to form a dielectric layer 13 (see Fig. 5C). The first patterned wiring layer 43 and the second patterned wiring layer 4 are buried in the dielectric layer 130, and the dielectric layer 13G is bonded to the first substrate and the second substrate 420.

According to the above, in the process of the pressing, since the first limiting member and the first limiting member 124 are in contact with each other in the horizontal direction, the relative displacement of the first substrate 410 and the second substrate 42 in the horizontal direction can be restricted. Further, the first-patterned wiring layer and the second patterned wiring layer 44 are fixed, so that the first-patterned wiring layer 43G and the second patterned wiring layer _ are not easily caused by the first, the board 410 and the second substrate 42 are smashed The high temperature and high displacement experienced during the process cause a problem of poor alignment. So far, the fabrication of the circuit board semi-finished product 400 has been substantially completed. In summary, in the present invention, when the first substrate and the second substrate are placed from the second recording member, and the (fourth) surface-substrate first substrate is pressed, the first limiting member and the second limiting member are The (four) displacement between the first substrate and the second substrate can be limited. In this way, the first 16 1321028 can be effectively reduced

22735twf.doc/n When the substrate and the second substrate are pressed, the layers of the first patterned circuit layer and the second circuit layer are biased and shrunk, and the alignment offset is caused: 22 improves the product yield. The present invention has been disclosed in the above embodiments in various embodiments. However, it is not intended to limit the invention, and any one of ordinary skill in the art is in the spirit and scope of the present invention. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1 are flow cross-sectional views showing a method of fabricating a circuit board according to an embodiment of the present invention. 2 is a schematic view showing the arrangement of the first limiting member and the second limiting member in FIG. 3 is a cross-sectional view showing the steps of forming a first limiting member and a second limiting member in a method of fabricating a circuit board according to another embodiment of the present invention. 4 is a schematic view showing the arrangement of a first limiting member and a second limiting member in a method of manufacturing a circuit board according to still another embodiment of the present invention. FIG. 5 is a schematic diagram showing the arrangement of a first limiting member and a second limiting member in a method of manufacturing a circuit board according to still another embodiment of the present invention. 6A to 6C are cross-sectional views showing the flow of a method of fabricating a circuit board in still another embodiment of the present invention. [Main component symbol description] 17 1321028 22735twf.doc/n 100, 400. Circuit board semi-finished products 110, 410: first substrate 110a, 410a: first surface 110b, 120b, 310b, 320b: plate frame 112, 430: first Patterned wiring layers 112a, 122a: line blank regions 114, 114': first limiting members 120, 420: second substrate 120a, 420a: second surface 122, 440: second patterned circuit layers 124, 124': Second limiting member 130': dielectric film 130: dielectric layer 210b, 220b: outer frame edge 214, 314a, 314b: first limiting member 224, 324a, 324b: second limiting member mountain, d2: Thickness d3: distance

Claims (1)

1321028 22735twf.doc/n X. Patent Application Range: κ A method for fabricating a circuit board, the steps comprising: a right-tr first substrate and a second substrate, wherein the first substrate has an m-plane and a first patterning a circuit layer, wherein the second substrate and the second patterned circuit layer, and the first patterning == the first surface, and the second patterned circuit layer is disposed on the first surface to form at least one first a limiting member, and forming at least one second limiting member corresponding to the first limiting member on the surface of the younger brother, and the first limiting member and the third limiting member are adapted to be in contact with each other And limiting a relative displacement between the first substrate and the second substrate; and pressing the first substrate with the second substrate, wherein the first surface is oppositely disposed. 2. The method of fabricating a circuit board according to claim 1, wherein the first substrate and the second substrate are dielectric substrates or metal substrates. The method of manufacturing the circuit board of the first aspect of the invention, wherein the first limiting member is disposed on the frame of the first substrate, and the second limiting member is disposed on the second substrate Board frame. The manufacturing unit t of the circuit board of claim 1, wherein the first limiting member is disposed in a circuit blank area of the first patterned circuit layer, and the second limiting member is configured. And a blank area of the second patterned circuit layer. The method of manufacturing the circuit board according to the first aspect of the invention, wherein the first limiting member is disposed on the first patterned circuit layer, 19 22735 twf.doc/n and the first p The clamping member is disposed on the second patterned circuit. The method for manufacturing a circuit board according to the first aspect of the invention, wherein the step of pressing the first substrate and the second substrate comprises: disposing a first surface between the first surface and the second surface a dielectric film; and the dielectric film is formed by heat-pressing between the first surface and the second surface = a dielectric layer, and the domain first substrate is bonded to the second substrate dielectric layer. 7. The method of fabricating a circuit board according to claim 6, wherein after the first substrate and the second substrate are pressed together, the method further includes removing the first substrate and the second substrate to expose The first patterned circuit layer and the second patterned circuit layer are formed. 8. The method of manufacturing a circuit board according to claim 1, wherein the first limiting member does not contact the second surface and the first surface after the first substrate and the second substrate are pressed together The second circuit layer is patterned, and the second limiting member does not contact the first surface and the first patterned circuit layer. 9. A circuit board comprising: a dielectric layer; a first patterned circuit layer embedded in the dielectric layer and exposed to one side of the dielectric layer; '- a second patterned circuit layer buried in The dielectric layer is exposed to the other side of the dielectric layer; 'at least one first limiting member is embedded in the dielectric layer and contacts the surface of the layer in which the first patterned circuit layer is buried; as well as