TWI320529B - Lane-to-lane deskewing method and ic device having lane-to-lane deskew capability for a serical point-to-point link, and system having a serial point-to-point link with lane-to-lane deskew capability - Google Patents
Lane-to-lane deskewing method and ic device having lane-to-lane deskew capability for a serical point-to-point link, and system having a serial point-to-point link with lane-to-lane deskew capabilityInfo
- Publication number
- TWI320529B TWI320529B TW093140768A TW93140768A TWI320529B TW I320529 B TWI320529 B TW I320529B TW 093140768 A TW093140768 A TW 093140768A TW 93140768 A TW93140768 A TW 93140768A TW I320529 B TWI320529 B TW I320529B
- Authority
- TW
- Taiwan
- Prior art keywords
- lane
- point
- capability
- deskew
- link
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Information Transfer Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/749,721 US7631118B2 (en) | 2003-12-31 | 2003-12-31 | Lane to lane deskewing via non-data symbol processing for a serial point to point link |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200532457A TW200532457A (en) | 2005-10-01 |
TWI320529B true TWI320529B (en) | 2010-02-11 |
Family
ID=34701088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093140768A TWI320529B (en) | 2003-12-31 | 2004-12-27 | Lane-to-lane deskewing method and ic device having lane-to-lane deskew capability for a serical point-to-point link, and system having a serial point-to-point link with lane-to-lane deskew capability |
Country Status (6)
Country | Link |
---|---|
US (3) | US7631118B2 (zh) |
CN (1) | CN1902613B (zh) |
DE (1) | DE112004002567T5 (zh) |
GB (1) | GB2423171B (zh) |
TW (1) | TWI320529B (zh) |
WO (1) | WO2005066816A1 (zh) |
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TWI249681B (en) * | 2003-07-02 | 2006-02-21 | Via Tech Inc | Circuit and method for aligning data transmitting timing of a plurality of lanes |
US7930377B2 (en) | 2004-04-23 | 2011-04-19 | Qlogic, Corporation | Method and system for using boot servers in networks |
US7669190B2 (en) | 2004-05-18 | 2010-02-23 | Qlogic, Corporation | Method and system for efficiently recording processor events in host bus adapters |
US7500131B2 (en) * | 2004-09-07 | 2009-03-03 | Intel Corporation | Training pattern based de-skew mechanism and frame alignment |
US7577772B2 (en) * | 2004-09-08 | 2009-08-18 | Qlogic, Corporation | Method and system for optimizing DMA channel selection |
US20060064531A1 (en) * | 2004-09-23 | 2006-03-23 | Alston Jerald K | Method and system for optimizing data transfer in networks |
US7676611B2 (en) * | 2004-10-01 | 2010-03-09 | Qlogic, Corporation | Method and system for processing out of orders frames |
US20060146967A1 (en) * | 2004-12-31 | 2006-07-06 | Adarsh Panikkar | Keep-out asynchronous clock alignment scheme |
KR20060081522A (ko) * | 2005-01-10 | 2006-07-13 | 삼성전자주식회사 | 피씨아이 익스프레스의 바이트 스큐 보상방법 및 이를위한 피씨아이 익스프레스 물리 계층 수신기 |
US7392437B2 (en) * | 2005-01-20 | 2008-06-24 | Qlogic, Corporation | Method and system for testing host bus adapters |
EP1856869B1 (en) * | 2005-01-20 | 2017-09-13 | Rambus Inc. | High-speed signaling systems with adaptable pre-emphasis and equalization |
US7281077B2 (en) * | 2005-04-06 | 2007-10-09 | Qlogic, Corporation | Elastic buffer module for PCI express devices |
US7929577B2 (en) * | 2005-10-13 | 2011-04-19 | Via Technologies, Inc. | Method and apparatus for packet error detection |
TWI290284B (en) * | 2005-10-13 | 2007-11-21 | Via Tech Inc | Method and electronic device of packet error detection on PCI express bus link |
CN101313505B (zh) * | 2005-11-22 | 2012-01-04 | Nxp股份有限公司 | 同步接收机 |
DE602007008582D1 (de) * | 2006-09-06 | 2010-09-30 | Thomson Licensing | Einrichtung zum verarbeiten eines stroms von datenwörtern |
US8199782B2 (en) * | 2009-02-20 | 2012-06-12 | Altera Canada Co. | Method of multiple lane distribution (MLD) deskew |
JP5266164B2 (ja) * | 2009-08-25 | 2013-08-21 | ルネサスエレクトロニクス株式会社 | データ受信装置 |
JP5426326B2 (ja) * | 2009-11-09 | 2014-02-26 | ルネサスエレクトロニクス株式会社 | データ受信装置、データ受信方法、及びプログラム |
US9531646B1 (en) * | 2009-12-07 | 2016-12-27 | Altera Corporation | Multi-protocol configurable transceiver including configurable deskew in an integrated circuit |
US8358658B2 (en) * | 2010-03-19 | 2013-01-22 | International Business Machines Corporation | Implementing ordered and reliable transfer of packets while spraying packets over multiple links |
TW201142613A (en) * | 2010-05-31 | 2011-12-01 | Jmicron Technology Corp | Timing aligning circuit and timing aligning method for aligning data transmitting timing of a plurality of lanes |
CN102270011A (zh) * | 2010-06-04 | 2011-12-07 | 智微科技股份有限公司 | 校准多个数据信道的数据传输时序的时序校准电路及时序校准方法 |
US20120030438A1 (en) * | 2010-07-29 | 2012-02-02 | Sarance Technologies Inc. | Method and Apparatus for Performing Skew Removal in the Receiver of a Multi-Lane Communication Link |
US8488729B1 (en) * | 2010-09-10 | 2013-07-16 | Altera Corporation | Deskew across high speed data lanes |
CN102111329A (zh) * | 2010-12-24 | 2011-06-29 | 合肥昊特信息科技有限公司 | 基于嵌入式高速收发器的校准逻辑系统 |
US8886856B1 (en) * | 2011-06-21 | 2014-11-11 | Altera Corporation | Methods and apparatus for communicating low-latency word category over multi-lane link |
KR101876418B1 (ko) * | 2012-04-05 | 2018-07-10 | 한국전자통신연구원 | Pci 익스프레스 디스큐 장치 및 그 방법 |
US8437343B1 (en) | 2012-05-22 | 2013-05-07 | Intel Corporation | Optimized link training and management mechanism |
US8446903B1 (en) * | 2012-05-22 | 2013-05-21 | Intel Corporation | Providing a load/store communication protocol with a low power physical unit |
US8549205B1 (en) | 2012-05-22 | 2013-10-01 | Intel Corporation | Providing a consolidated sideband communication channel between devices |
US8972640B2 (en) | 2012-06-27 | 2015-03-03 | Intel Corporation | Controlling a physical link of a first protocol using an extended capability structure of a second protocol |
US8913705B2 (en) * | 2012-08-27 | 2014-12-16 | Oracle International Corporation | Dynamic skew correction in a multi-lane communication link |
CN104380269B (zh) * | 2012-10-22 | 2018-01-30 | 英特尔公司 | 高性能互连相干协议 |
US9600431B2 (en) | 2012-10-22 | 2017-03-21 | Intel Corporation | High performance interconnect physical layer |
US10348821B2 (en) * | 2012-12-21 | 2019-07-09 | Dropbox, Inc. | Prioritizing structural operations and distributing changes in a synced online content management system |
US9261934B2 (en) | 2013-03-15 | 2016-02-16 | Intel Corporation | Dynamic response improvement of hybrid power boost technology |
US9118457B2 (en) | 2013-03-15 | 2015-08-25 | Qualcomm Incorporated | Multi-wire single-ended push-pull link with data symbol transition based clocking |
JP6221328B2 (ja) * | 2013-04-30 | 2017-11-01 | 富士通株式会社 | 受信装置、情報処理装置及びデータ受信方法 |
US10031547B2 (en) | 2013-12-18 | 2018-07-24 | Qualcomm Incorporated | CCIe receiver logic register write only with receiver clock |
US9426082B2 (en) | 2014-01-03 | 2016-08-23 | Qualcomm Incorporated | Low-voltage differential signaling or 2-wire differential link with symbol transition clocking |
US9612643B2 (en) | 2014-03-29 | 2017-04-04 | Intel Corporation | Controlling the CPU slew rates based on the battery state of charge |
US9331724B2 (en) * | 2014-09-15 | 2016-05-03 | Xilinx, Inc. | Lane-to-lane de-skew for transmitters |
US9710406B2 (en) | 2014-12-15 | 2017-07-18 | Intel Corporation | Data transmission using PCIe protocol via USB port |
US9946683B2 (en) * | 2014-12-24 | 2018-04-17 | Intel Corporation | Reducing precision timing measurement uncertainty |
US9720439B2 (en) | 2015-09-26 | 2017-08-01 | Intel Corporation | Methods, apparatuses, and systems for deskewing link splits |
CN105933244B (zh) * | 2016-04-14 | 2018-11-27 | 浪潮电子信息产业股份有限公司 | 一种通道对齐去偏斜的装置和方法 |
CN105955915B (zh) * | 2016-04-21 | 2018-10-26 | 浪潮电子信息产业股份有限公司 | 一种并行数据去偏斜的方法、装置及系统 |
US20180329855A1 (en) | 2017-05-12 | 2018-11-15 | Intel Corporation | Alternate protocol negotiation in a high performance interconnect |
US12040967B2 (en) | 2022-01-25 | 2024-07-16 | Bank Of America Corporation | System and method for splitting data elements for data communication based on transformation types implemented on the data elements at different devices |
US20240020255A1 (en) * | 2022-07-15 | 2024-01-18 | Nvidia Corporation | Dynamic skew realignment over multiple transmission lanes in integrated computing platforms |
Family Cites Families (10)
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US6009488A (en) * | 1997-11-07 | 1999-12-28 | Microlinc, Llc | Computer having packet-based interconnect channel |
JP3403076B2 (ja) * | 1998-06-30 | 2003-05-06 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6326667B1 (en) * | 1999-09-09 | 2001-12-04 | Kabushiki Kaisha Toshiba | Semiconductor devices and methods for producing semiconductor devices |
US6766464B2 (en) * | 2001-02-13 | 2004-07-20 | Sun Microsystems, Inc. | Method and apparatus for deskewing multiple incoming signals |
US6625675B2 (en) * | 2001-03-23 | 2003-09-23 | International Business Machines Corporation | Processor for determining physical lane skew order |
US6654824B1 (en) * | 2001-08-28 | 2003-11-25 | Crossroads Systems, Inc. | High-speed dynamic multi-lane deskewer |
US6985502B2 (en) * | 2001-11-19 | 2006-01-10 | Hewlett-Packard Development Company, L.P. | Time-division multiplexed link for use in a service area network |
US20030112827A1 (en) * | 2001-12-13 | 2003-06-19 | International Business Machines Corporation | Method and apparatus for deskewing parallel serial data channels using asynchronous elastic buffers |
TWI249681B (en) * | 2003-07-02 | 2006-02-21 | Via Tech Inc | Circuit and method for aligning data transmitting timing of a plurality of lanes |
US7295639B1 (en) * | 2003-07-18 | 2007-11-13 | Xilinx, Inc. | Distributed adaptive channel bonding control for improved tolerance of inter-channel skew |
-
2003
- 2003-12-31 US US10/749,721 patent/US7631118B2/en not_active Expired - Fee Related
-
2004
- 2004-12-22 GB GB0608721A patent/GB2423171B/en not_active Expired - Fee Related
- 2004-12-22 CN CN2004800392712A patent/CN1902613B/zh not_active Expired - Fee Related
- 2004-12-22 DE DE112004002567T patent/DE112004002567T5/de not_active Withdrawn
- 2004-12-22 WO PCT/US2004/043526 patent/WO2005066816A1/en active Application Filing
- 2004-12-27 TW TW093140768A patent/TWI320529B/zh not_active IP Right Cessation
-
2009
- 2009-08-19 US US12/544,178 patent/US7913001B2/en not_active Expired - Fee Related
-
2010
- 2010-11-17 US US12/948,103 patent/US7979608B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1902613A (zh) | 2007-01-24 |
US7913001B2 (en) | 2011-03-22 |
US7631118B2 (en) | 2009-12-08 |
TW200532457A (en) | 2005-10-01 |
GB0608721D0 (en) | 2006-06-14 |
CN1902613B (zh) | 2011-03-09 |
DE112004002567T5 (de) | 2006-12-14 |
US7979608B2 (en) | 2011-07-12 |
GB2423171A (en) | 2006-08-16 |
US20090307394A1 (en) | 2009-12-10 |
WO2005066816A1 (en) | 2005-07-21 |
GB2423171B (en) | 2007-07-25 |
US20050141661A1 (en) | 2005-06-30 |
US20110066771A1 (en) | 2011-03-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |