1313436 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種微剞 至姆指寬度尤指—種可縮小尺寸 甚至扎甲寬度之記憶卡。 【先前技術】 "二:市等面上广記憶卡大致有扣'隱，、. 尺寸 ：:::：相較於傳統的儲存媒體，在體積 ，容量可：=了的發展’小小薄薄-片的記憶卡 气功 促使廷些記憶卡在體積及容量上屢建 Γ:Γ臣之一莫過於消費性數位化產品的曰益普 及如數位攝影機、數位相機、多功能 等等，都g f β θ ^数伹播放 都而要M可觀但體積小巧的儲存媒體。因此 使：面上的記憶卡體積已堪稱小巧，但業者仍爭相開發更 小的記憶卡，例如SD之下尚有_ISD，_C^ = RS-MMC。 人I'向有 骖方！t述可知：“容量及縮小尺寸是記憶卡不變的開 s ° ’但如要進一步提升’必須突破既有元件尺寸及紝 構上的限制’彳能在記憶卡的容量與體積上出現革命性： 發展。 ^ 【發明内容】 因此，本發明主要目的在提供一種可突破既有元件尺 寸限制’而縮小尺寸至姆指寬度、甚至指甲宽度之記憶卡1313436 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to a micro-to-mute width, especially a memory card that can be downsized or even stenciled. [Prior Art] "Second: The city's wide-area memory card has a deduction of 'hidden,'. Size::::: Compared with the traditional storage media, the volume and capacity can be: = the development of 'small small The thin-film memory card qigong has prompted the memory cards of the Ting to be built in terms of volume and capacity. One of the ministers is the popularity of consumer digital products such as digital cameras, digital cameras, multi-functions, etc. Gf β θ ^ number 伹 Plays a large but small storage medium. Therefore, the memory card on the surface is small, but the industry is still vying to develop a smaller memory card. For example, SD has _ISD, _C^ = RS-MMC. People I've got a chance! t can be said: "Capacity and downsizing is the same as the memory card's open s ° 'but to further improve 'must break the existing component size and structural constraints', can revolutionize the capacity and volume of the memory card Sex: Development. [Invention] Therefore, the main object of the present invention is to provide a memory card that can break through the size limitation of existing components and reduce the size to the width of the thumb or even the width of the nail.
1313436 為達成前述目的所採取的主要技術手段係令一記憶卡 包括有： .第基板’其具備適當厚度’並在一表面處形成有 - 一内陷的鏤空部； —第二基板’係與第一基板匹配並相互疊合，其内側 面於相對第一基板上鏤空部的位置設有記憶卡相關電子元 件； 複數的介面接點’係設於前述第一或第二基板的外表 面上並與第一基板上的電子元件連接； 則述第一/第二基板經疊合後，至少在具有介面接點 的一端之尺寸係符合特定通信協定之標準規格，以便插接 至對應的介面連接埠；再者，在任何基板上安裝電子元件 均會突出一相當高度，此為造成記憶卡在縮小尺寸上無法 突破的原因之-’而本發明在重疊基板夾層處形成鏤空空 間，使相關的電子元件安裝在對應位置上，如此—來，即 可解決元件突出於基板表面佔用空間而無法進—步縮小尺 寸之問題。利用前述設計，記憶卡除厚度上可以符合介面 協定，其長寬尺寸則縮小至姆指寬度，甚至指甲寬度。 【實施方式】 有關本發明之一較佳實施例，請參閱第一、二圖所示 ，其係令一第一基板（：[〇 )與一第二基板（2 〇 )相互 疊合後所構成；其中： 5 1313436 該第一基板（1 〇 )具備適當厚度/寬度（本實施例 中分別為0.8mm，12.4mm ,其長度則可視需求有所不同， 例如32mm，24mrr^ 16mm等，本實施例中其長度為24咖 )，並在適當位置形成有一貫穿内外表面的鏤空部（工工 );又第-基在其外表面上進一步形成有複數 的烊墊接，點（圖中未示），供安裝一記憶體元件（1 3 ) ，於本實施例中，該記憶體元件（i 3 )係一 TS〇p封裝 兀件’其封裝厚度在1.27 mm以下。而該記憶體元件（丄 3)外並覆設有一保護層（14)，以構成防護，該保護 層（1 4 )約為0.1mm。再者，第—基板（工◦)—端形 成有-與該端短邊平行的狹長穿槽（15)，供使用者以 指甲勾扣，作為抽取記憶卡施力之用。 該第二基板（20)之尺寸大致與第一基板（1〇) 匹配’於本實施例中’言玄第二基板（2 〇 )長度略短於第 一基板（10) ’使第-基板（10)-端的穿槽（15 )得以露出；又第二基板（20)在相對於第一基板（1 0)的外表面上設有複數的介面接點（2丄），於本實施 例中’該介面接點（21)係符合USB介面標準者，該第 二基板（2 0 )内表面在相對第—基(丄〇 )上的鏤* 部d "位置設有-控制器（22)(請參閱第三圖所 -)，或進-步設有電感/電阻〜等被動元件，該控 制器（22)係'設於第二基板（20)的内表面上，且對 應位於第-基板（10)的鏤空#(11)内，其充分運 用了既有結構的可用空㈤，使該等元件的安裝，不致因突 6 1313436 板表面而增加了記憶卡的厚度；又第二基板（2 〇 ”有線路（圖中未示）’供連接前述控制！（ 2 2 ) 始表面上的介面接點（2 1 )，而第二基板（2 〇 )上的 路並透過一層間導通手段（如導通孔、穿孔 第—基板（icn上的焊塾接點連接。 而前述控制器（2 2)及被動元件係 被同時製作在第-其刼广0 n、 人表私中 板（2 〇 )上，所謂的-次製程，在 兀丨面係採用晶片式被動元件’因此’該被動元件 I在安裝控制器（22)晶片時，在同一製程中被安裝完 成’例如「梦曰 厂J· /A r* 、曰日」、打線」及「封裝」等步驟， 又另種可行的—次製程則如以下所述： •連晶片與晶片式被動元件之一表面上具有相同 包連接特性的丨/〇焊塾； 令控制器晶片及晶月式被動元件之|/0谭塾朝上而固 疋於第二基板（20)上；1313436 The main technical means for achieving the above objectives is to include a memory card comprising: a substrate 'having an appropriate thickness' and having a recessed portion at one surface; a second substrate' The first substrate is matched and overlapped with each other, and the inner side surface thereof is provided with memory card related electronic components at a position opposite to the hollow portion on the first substrate; a plurality of interface contacts are disposed on the outer surface of the first or second substrate And connecting with the electronic component on the first substrate; after the first/second substrate is superposed, at least the size of the end having the interface contact conforms to the standard specification of the specific communication protocol, so as to be plugged into the corresponding interface. In addition, the mounting of electronic components on any substrate will highlight a considerable height, which is why the memory card cannot be broken in size reduction - and the present invention forms a hollow space at the overlapping substrate interlayer, thereby making the correlation The electronic components are mounted at corresponding positions, so that the problem that the components protrude from the surface of the substrate and cannot be further reduced in size can be solved. With the aforementioned design, the memory card can conform to the interface agreement in thickness, and its length and width are reduced to the width of the thumb and even the width of the nail. [Embodiment] Referring to a first embodiment and a second embodiment of the present invention, a first substrate (: [〇] and a second substrate (2 〇) are superposed on each other. Composition; wherein: 5 1313436 The first substrate (1 〇) has an appropriate thickness/width (0.8 mm, 12.4 mm in the present embodiment, respectively, and the length may vary depending on requirements, such as 32 mm, 24 mrr ^ 16 mm, etc. In the embodiment, the length is 24 coffee), and a hollow portion (worker) penetrating through the inner and outer surfaces is formed at an appropriate position; and the base-base is further formed with a plurality of mats on the outer surface thereof, the point (not shown) In the present embodiment, the memory element (i 3 ) is a TS〇p package element having a package thickness of 1.27 mm or less. The memory element (丄 3) is additionally covered with a protective layer (14) to form a shield, and the protective layer (14) is about 0.1 mm. Further, the first substrate (worker) has an elongated slot (15) parallel to the short side of the end for the user to hook with the nail as a force for extracting the memory card. The size of the second substrate (20) is substantially matched with the first substrate (1). In the present embodiment, the length of the second substrate (2 〇) is slightly shorter than the first substrate (10) 'the first substrate The (10)-end slot (15) is exposed; and the second substrate (20) is provided with a plurality of interface contacts (2丄) on the outer surface of the first substrate (10), in this embodiment. The interface connector (21) conforms to the USB interface standard, and the inner surface of the second substrate (20) is provided with a controller at the position of the 镂* portion d " on the opposite base (丄〇) 22) (please refer to the third figure -), or step-by-step with passive components such as inductors/resistors~, the controller (22) is disposed on the inner surface of the second substrate (20) and correspondingly located In the hollow space #(11) of the first substrate (10), it fully utilizes the available space (5) of the existing structure, so that the installation of the components does not increase the thickness of the memory card due to the surface of the plate 13 1313436; The second substrate (2 〇" has a line (not shown) for connecting the aforementioned control! ( 2 2 ) the interface contact (2 1 ) on the starting surface, and the path on the second substrate (2 〇) And through a layer of conduction means (such as vias, perforations - substrates (weld joints on the icn joints. The aforementioned controller (2 2) and passive components are simultaneously produced in the first - 刼 广 0 n, people On the private board (2 〇), the so-called - secondary process, the wafer type passive component is used in the 兀丨 surface. Therefore, the passive component I is installed in the same process when the controller (22) wafer is mounted. 'For example, "Mengyi Factory J. /A r*, 曰日", 线线" and "Packaging" steps, and another feasible - secondary process is as follows: • One of the chip and wafer passive components a 丨/〇 soldering pad having the same package connection characteristics on the surface; the controller chip and the crystal moon passive component are mounted on the second substrate (20);
製作金屬線路以連接晶月與晶片式被動元件的|/〇焊 墊，具體作法可採取鑛膜方達成，鐘膜技術即可採取基鑛 或電鐘方式’·其可先在第二基板及其上的控制器晶片、晶 月式被動π件表面覆設一光阻’又轉移線路圖案至光阻上 ，接著進行蝕刻’使晶片與晶片式被動元件上㈣〇焊墊 露出，接著進行錢膜’在光阻的㈣區域以蒸錢或電鑛方 式鑛上金屬膜而形成線路，利用這些線路連接晶片與晶片 式被動元件上對應的I/O焊墊； 控制器晶片、被動 經完成前述步驟後，在第二基板、 7 1313436 兀件及其上的線路表面形成絕緣層，隨即完成封裝。 利用前述技術所構成的記憶卡，在第一/第二基板（ 1 〇) / (2〇)疊合後，至少在具有介面接點（2丄） 的-端之尺寸係符合USB介面協定之標準規格，以便插接 至對應的介面連接埠；由於傳統技術中，在任何基板上安 裝電子元件均會突出一相當高度，造成記憶卡無法進一步 的縮小尺寸，而本發明係在相疊合第一/第二基板（丄〇 )/( 2 〇 )夾層處形成鏤空空間，使相關的電子元件安 :在對應位置’如此即可解決元件突出於基板表面佔用 門而無法進一步縮小尺寸之問題，從而有助於縮小記憶 卡尺寸。於本實施例中，前述記憶卡的長，寬，厚度分別 為24mm/i2.4mm/2 4隨，大致僅為姆指寬度。 又請參閱第四〜六圖所*，係本發明又一較佳實施例 丄：可進-步將記憶卡尺寸縮小至指曱寬度大小，主要係 令-第-基板（3 0 ) #-第二基板（4 〇 )相 所構成；其中： 該第―純（3 0 )具備適當厚度/寬度（本實施例 分別為1.8mm，12.4mm，其長度則為16圆，並在内側 表面上形成有一内陷的鏤空部（31)(請配合參閱第五 圖所示）。 酉該第二基板（4 0 )之尺寸係與第—基板（3 〇 )匹 八缒形成有一與泫端短邊平行的狹長穿槽（4 4 ) :供使用者以指甲勾扣’作為抽取記憶卡施力之用；又第 一基板（4 〇 )在相對於第-基板（3 〇 )的外表面上設 8 1313436 :複數的介面接點（41)(請參閱第五圖所示），於本 貝=例中’該介面接點（4 i )係符纟介面標準者， :!二基板（4 0)内表面在相對第-基才反（3 〇)上鏤 ::(3 1 )的位置至少設有一控制器（4 2 )及一記憶 心曰片（43)(請參閱第六圖所示），或進一步設有電 感/電阻/電容等被動元#，該控制器，（4 2 )及記憶體 晶片（4 3 )係設於第二基板（4 〇 )的内表面上，且對 應位於第一基板（3 0 )的鏤空部（3 1 )内；再者，第 二^板（4G)上具有線路（圖中未示），供連接前述控 ，為（4 2 )外表面上的介面接點（4丄）。另前述控制 為（4 2 )、記憶體晶片（4 3 )甚至晶片式被動元件係 可在-次製程中被同時製作在第二基板（4 Q )上，其可 利用的製程技術已如前述實施例所述，容不進—步贊述。 而利用該等技術構成的記憶卡約只有指甲面積大小。 /如第七至九圖所示，係本發明再一較佳實施例，其仍Making metal lines to connect the crystal/chip passive components of the |/〇 solder pads, the specific method can be achieved by the mineral film, the clock technology can take the base mine or electric clock method'· it can be on the second substrate and The controller chip and the crystal passive passive π component are coated with a photoresist and the transfer line pattern is transferred to the photoresist, and then etched to expose the wafer and the passive component on the wafer type (four) solder pad, and then carry out the money. The film 'in the (four) region of the photoresist is formed by a metal film on the surface of the vapor or electric ore, and the wires are used to connect the corresponding I/O pads on the wafer and the chip passive component; the controller wafer and the passive pass are completed. After the step, an insulating layer is formed on the surface of the second substrate, the 7 1313436 element, and the wiring on the surface, and then the package is completed. With the memory card constructed by the foregoing technology, after the first/second substrate (1 〇) / (2 〇) is superposed, at least the size of the - terminal having the interface contact (2 丄) conforms to the USB interface protocol. Standard specifications for plugging into the corresponding interface port; due to the conventional technology, mounting electronic components on any substrate will highlight a considerable height, resulting in the memory card being unable to be further reduced in size, and the present invention is in a superposition A hollow space is formed at the interlayer of the first/second substrate (丄〇)/( 2 〇), so that the related electronic components are mounted: at the corresponding position, the problem that the component protrudes from the surface of the substrate and the size can not be further reduced can be solved. This helps to reduce the size of the memory card. In the embodiment, the length, width and thickness of the memory card are 24 mm/i 2.4 mm/2, respectively, which is substantially only the width of the thumb. Please refer to the fourth to sixth figures, which is another preferred embodiment of the present invention. The size of the memory card can be reduced to the width of the fingerprint, and the main system is - the first substrate (3 0 ) #- a second substrate (4 〇) phase; wherein: the first pure (30) has an appropriate thickness/width (1.8 mm, 12.4 mm in this embodiment, and 16 circles in length, and on the inner side surface) Forming a recessed hollow portion (31) (please refer to the fifth figure). The size of the second substrate (40) and the first substrate (3 〇) are formed with a short end and a rear end. a parallel long narrow slot (4 4 ): for the user to use the nail hook 'as a wicking memory card; and the first substrate (4 〇) on the outer surface relative to the first substrate (3 〇) Let 8 1313436: a plurality of interface contacts (41) (please refer to the fifth figure), in the case of this example = 'the interface contact (4 i ) is the standard interface, :! two substrates (4 0) The inner surface is at least one controller (4 2 ) and one memory cardia (43) at the position opposite to the base-base (3 〇): (3 1 ) (please refer to the sixth figure) Shown, or further provided with a passive element such as an inductor/resistor/capacitor, the controller, (4 2 ) and the memory chip (43) are disposed on the inner surface of the second substrate (4 ,), and corresponding Located in the hollow portion (3 1 ) of the first substrate (30); further, the second board (4G) has a line (not shown) for connecting the control to the outer surface of (4 2 ) The interface contact (4丄). The other control (4 2 ), the memory chip (43), or even the chip passive component can be simultaneously fabricated on the second substrate (4 Q ) in the - process. The process technology that can be utilized has been described in the foregoing embodiments, and can not be further described. The memory card constructed by using these technologies has only about the size of the nail area. / As shown in the seventh to ninth drawings, the present invention is Still another preferred embodiment, which is still
係由帛基板（5〇)與一第二基板（6〇)相互疊合 後所構成；其中： 该第一基板（5 0 )係於相對第二基板（6 0 )的内 側面上形成有一内陷的鏤空部（51)，其外側面上則設 有複數的介面接點（5 2 ) · 該第二基板（6 0 )在相對第一基板（5 ◦)的外表 面上進-步形成有線路及複數的焊墊接點（圖中未示）， 供安裝-記憶體元件（61)，該記憶體元件（6 ”外 並覆設有-保護層（62)，以構成防護。該第二基板（ 9 1313436 (51 )，或 等元件 件（6 2 )電 )的内 5 1) 件的安 ) 成鏤空 件安裝 地縮小 60)内表面在相對第一基板（5〇)上的鏤空部 )位置設有一控制器（β 3 )(請參閱第九圖所示 進一步設有電感/電阻/電容等被動元件，連接該 的線路並透過層間導通技術與外表面上的記憶體元 1 )及第-基板（5 i )外表面上的介面接點（5 連接。而該控制器（6 3 )係設於第二基板（6 〇 表面上，且對應位於第一基板（5 〇 )的鏤空部（ 内，其充分運用了既有結構的可用空間，使該等元 裝’不致因大出於基板表面而增加了記憶卡的厚度 综上所述，本發明利用疊合電路板在夾層二 部’以創造出安裝電子元件的可用空間，使電子元 後，不因突出於基板表面而增加其厚度，故可有效 記憶卡尺寸，以符合市場需求。 【圖式簡單說明】 々圖係本备明第一較佳實施例的外觀圖。 ，第：圖係本發明第一較佳實施例的分解圖。 :一圖係本發明第一較佳實施例的剖視圖。 第四圖係本發明第二較、^ ^ ^ Λ 1土只轭例的上視角度分解圖。 弟圖係本發明第-φΑ ^ —軟仑貫施例的俯視角度分解圖。 乐八圖係本發明楚_心，， ^ 弟一較佳實施例的剖視圖。 第八C明第三較佳實施例的上視角度分解圖。 第九：：發明第四較佳實施例的俯視角度分解圖。 圖係本發明第五較佳實關的剖視圖。 10 1313436 【主要元件符號說明】 ( 1 0 ) ( 3 0 ) (50)第一基板 (11) (31) ( 5 1 )鏤空部 (13) ( 6 1 )記憶體元件 (1 4 )保護層 （1 5 )穿槽 ( 2 0 ) ( 4 0 ) (60)第二基板 (21) (41) ( 5 2 )介面接點-( 2 2 ) ( 4 2 ) ( 6 3 )控制器 (4 3 )記憶體晶片 （4 4 )穿槽The substrate (5〇) and the second substrate (6〇) are superposed on each other; wherein: the first substrate (50) is formed on an inner side surface of the second substrate (60) The recessed hollow portion (51) is provided with a plurality of interface contacts (5 2 ) on the outer side surface thereof. The second substrate (60) is advanced on the outer surface of the first substrate (5 ◦). A wiring pad and a plurality of pad contacts (not shown) are formed for mounting-memory components (61), and the memory component (6" is covered with a protective layer (62) to form a shield. The inner surface of the second substrate (9 1313436 (51), or the like (6 2 ) is electrically) is reduced in size by the hollow member 60) the inner surface is on the opposite first substrate (5 〇) There is a controller (β 3 ) at the position of the hollowed out part (please refer to the ninth figure to further provide passive components such as inductors/resistors/capacitors, connect the lines and pass the interlayer conduction technology and the memory elements on the outer surface. 1) and a interface contact on the outer surface of the first substrate (5 i ) (5 is connected. The controller (6 3 ) is attached to the second substrate (6 〇 surface) And corresponding to the hollow portion of the first substrate (5 〇) (which fully utilizes the available space of the existing structure, so that the element is installed without increasing the thickness of the memory card due to the large surface of the substrate) According to the present invention, the laminated circuit board is used in the two layers of the interlayer to create a usable space for mounting electronic components, so that the thickness of the electronic component is not increased after protruding from the surface of the substrate, so that the memory card size can be effectively matched. BRIEF DESCRIPTION OF THE DRAWINGS [Brief Description of the Drawings] The drawings are an external view of the first preferred embodiment. The first drawing is an exploded view of the first preferred embodiment of the present invention. A cross-sectional view of a preferred embodiment of the present invention. The fourth figure is an exploded view of the second yoke of the second comparative example of the present invention. The drawing is a top view of the first embodiment of the present invention. An exploded view of the angle. A diagram of a preferred embodiment of the present invention is shown in the accompanying drawings. The eighth embodiment shows a top view exploded view of the third preferred embodiment. A top view exploded view of a preferred embodiment. Fig. 10 1313436 [Description of main component symbols] (1 0 ) (3 0 ) (50) First substrate (11) (31) ( 5 1 ) Hollow (13) (6 1 ) memory Component (1 4 ) protective layer ( 15 ) through slot ( 2 0 ) ( 4 0 ) (60) second substrate (21) (41) ( 5 2 ) interface contact - ( 2 2 ) ( 4 2 ) ( 6 3) controller (4 3 ) memory chip (4 4 ) through slot
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