1295113 ’九、發明說明： 【發明所屬之技術領域】 本發明係關於一種記憶f元件構裝$ &，尤# _種可 將晶片與被動元件在一次製程完成封裝之記憶卡元件構裝 【先前技術】 • Φ於許多消費性電子產品高度數位化的結果，使記憶 卡成為重要的資料儲存媒體，與一般電子產品相同，小型 化亦為消費性電子產品開發上必須堅持的不變方向。此一 f求連帶的促使記憶卡必須配合此種需求，而記憶卡欲符 此種而求’除了 s己憶卡本身在開發時即必須考量此一趨 勢之外，更需要其他技術的配合’例如「構裝」就是重要 的一環。 兩基本上’電子構裝產業原即必須支援電子產品開發之 •，，以便使速度不斷提升之積體電路能夠有效而充分地 ^揮其功此，並使不斷推出的電子產品能符合輕薄短小之 I勢由於筆5己型電腦、個人數位助理（pDA)、個人 無線通信系統及記憶卡等薄型電子產品的普及，使得所採 用的半導體兀件，不得不採用薄型封裝，因此引腳插入型 封裝逐漸被高度在1_27mm以下的塑膠封裝所取代， 、 叙而吕’針對裸晶片（Chip)進行封裝以構成電子元 • 的製&稱為第—層次的構袭，藉由打線（Wire Bonding) 是日日接e (Flip Chip)、或捲帶接合（丁ape Automatic 3 1295113 :Βοη_;簡稱彻）等技術，使其|/0由封裝體的線 伸出來。 至於第二層次的構裝，則是針對將構裝完成的積體電 •路黏著到印刷電路板上的過程而言，其黏著方式有導通孔 (PTH)及表面黏著技術陳)，目前表面黏著技術已成為此 領域之主流。而第一層級與第二層級的分野亦隨著構裝技 術的不斷進步而日趨模糊，例如所謂的DcA(Di「ect Chip φ Attach)技術即是將裸晶片直接黏著在印刷電路板上（例如 如COB)，然後再以封膠保護晶片，如此一來，即可以省 去了第一層級的構裝。 目前記憶卡的構裝即是採取此—作法，將裸晶片直接 黏著在基板上，再以封膠密封後而完成構裝。然而，有些 。己隐卡基板上構裝的元件並不僅僅止於記憶體、控制器等 ㈣電路而已’尚且包含少數的被動元件，例如電阻 '電 容及電！等’而這些被動元件的構裝係如前揭所述，採用 _表面黏著技術安裝在記憶卡基板上，其意味著記憶卡必須 採用兩種完全不同的技術，分別以DCA技術安裝裸晶片 ，以SMT安裝被動元件，始能完成構裝，因此不論就效 率或成本而言都是非常不經濟的。 【發明内容】 .由上述可知，既有記憶卡的構裝，就積體電路而言， 雖可採用薄型封裝以縮小尺寸及厚度，並可將裸晶片直接 黏著在基板上以有效整合第一/第二層次的封裝，但為了 4 1295113 著技術來達成 安裝少數的被動元件仍然必須透過另一黏 而影響了製程效率與成本。 立因此，本發明主要目的在提供一種記憶卡的封裝方法 效提升效率及降低成本。 農從而有 為達成前述目的採取的主要技術手段 法包括下料驟·· ^封裝方 +提供-基板’並使該基板上製作有線路、輸出 及複數的晶片（chip)焊墊； ” 二提供至少一晶片及一個以上的晶片式被動元件，並 前述基板上執行裝晶（die bond)步驟； 執行曰曰片接合，使晶片、晶片式被動元件分虚 上的焊墊及線路接合； 〃&板 在晶片及被動元件外形成封膠層； 在前述封裝方法中，由於採用了晶片式被動元件 被動兀件可以基板上構裝晶片的同時，即同步完成安裝， 因而可在一次製程中完成晶片與被動元件的安裝，I須 為安裝少數被動元件而進行另一元件黏著技術。〜 前述的晶片接合步驟係以打線（wire bonding)方式 成。 前述的晶片式被動元件係指電阻、電容及電感等元件 【實施方式】 5 1295113 有關本發明之一較佳實施例，其具體 第一圖所示： 首先提供一基板f ^ / 1 1 0)，该基板（1 〇)上預先製 作有線路、輸出人;^在里上< I & 别》入接點（本圖中未示）及複數的焊墊（工 • ( 1 2 ),其中輸出入接點係符合記憶卡的協定樣準 f1295113 'Nine, invention description: [Technical field of the invention] The present invention relates to a memory f-element assembly $ &, a special memory card component that can package a wafer and a passive component in one process [ Prior Art] • Φ is the result of high digitization of many consumer electronic products, making memory cards an important data storage medium. Like general electronic products, miniaturization is also the constant direction that must be adhered to in the development of consumer electronic products. This f seeks to bring the memory card to match this demand, and the memory card wants to do this. In addition to the suffix card itself must be considered in the development of this trend, it needs more cooperation with the technology' For example, "construction" is an important part. The two basics of the electronic assembly industry must support the development of electronic products, so that the speed of the integrated circuit can effectively and fully control its efforts, and the continuous introduction of electronic products can meet the light and short Because of the popularity of thin electronic products such as pen-type computers, personal digital assistants (pDA), personal wireless communication systems, and memory cards, the semiconductor components used have to be packaged in a thin package, so the pin-inserted type The package is gradually replaced by a plastic package with a height of 1_27mm or less. The package is designed for the chip to form an electronic component. The system is called the first level of the structure, and the wire bonding is done by wire bonding. ) It is a technology such as Flip Chip or tape bonding (Ding Ape Automatic 3 1295113 : Βοη_; abbreviated as abbreviated), such that |/0 is extended from the line of the package. As for the second level of the assembly, it is directed to the process of attaching the assembled integrated circuit to the printed circuit board, and the bonding method has a via hole (PTH) and surface adhesion technology), the current surface Adhesive technology has become the mainstream in this field. The difference between the first level and the second level is also blurred with the continuous advancement of the mounting technology. For example, the so-called DcA (Di "ect Chip φ Attach" technology is to directly bond the bare wafer to the printed circuit board (for example) Such as COB), and then protect the wafer with sealant, so that the first level of assembly can be omitted. At present, the memory card is configured to adhere the bare wafer directly to the substrate. After sealing with the sealant, the assembly is completed. However, some components on the hidden card substrate do not only end up in the memory, controller, etc. (4) circuit but also contain a few passive components, such as resistors And the construction of these passive components, as mentioned before, is mounted on the memory card substrate using _ surface adhesion technology, which means that the memory card must be installed in two different technologies using DCA technology. The bare chip, the passive component is mounted by SMT, can be completed, so it is very uneconomical in terms of efficiency or cost. [Invention] It can be seen from the above that there is a memory card. As for the integrated circuit, although a thin package can be used to reduce the size and thickness, and the bare wafer can be directly adhered to the substrate to effectively integrate the first/second level package, but for the technology of 4 1295113 The installation of a small number of passive components still has to affect the process efficiency and cost through another adhesive. Therefore, the main purpose of the present invention is to provide a memory card packaging method to improve the efficiency and reduce the cost. The main technical means includes a blanking step, a package side, a substrate, and a chip, and an output chip and a plurality of chip pads are formed on the substrate; ” providing at least one wafer and one or more wafers. Passive component, and performing a die bond step on the substrate; performing die bonding to bond pads and lines on the wafer and the chip passive component; the 〃& plate is formed outside the chip and the passive component Sealing layer; in the foregoing packaging method, since the wafer type passive component passive component is used, the wafer can be mounted on the substrate, that is, the same The installation is complete, the wafer and thus complete the installation of the passive element in a manufacturing process, the I few passive components shall be installed to perform another element mount technology. ~ The aforementioned wafer bonding step is performed by wire bonding. The above-mentioned chip-type passive component refers to a component such as a resistor, a capacitor, and an inductor. [Embodiment] 5 1295113 A preferred embodiment of the present invention, which is specifically shown in the first figure: First, a substrate f ^ / 1 1 0) is provided. The substrate (1 〇) is pre-fabricated with a line and an output person; ^ is in the upper < I & 》 》 ing contact point (not shown in the figure) and a plurality of pads (worker (1 2), The input and output contacts are in accordance with the agreement of the memory card.
又睛參閱第：圖所示，完成前述基板製作後，即提供 至）-晶片（2 0 )及-個以上的被動元件（3 〇 )，其 中，5亥晶片（2 0 )係為記憶體、控制器等元彳，被動元 件（3 〇 )則可為電阻、電容、電感#，惟均為晶片形式 (c^ (die bond)步驟； 曰接著執行晶片接合步驟，就—般積體電路構裝技術中 的日日片接合技術至少有打線（wjre b〇nding)、捲帶式（丁AB) 及覆晶接合⑼P Chip)等方式，就記憶卡之特性可使用打線 方式將晶W 2 G )及晶片式被動元件（3 板（…上的焊塾（…（12)接合；於本實施： 中，係採用打線（wire bonding)方式，因此在晶片（2 〇 )的表面及被動元#( 3 〇 )在電氣特性上所定義的兩端 處分別製作有焊塾（21)(31)，再利用打線方式令 金線或鋁線的一端接合在晶“ 2 〇 )、被動元件（3 〇 )上的焊墊（2 1 ) ( 3 1 )，另端則接合在基板（χ 〇 )上的焊# ( 1 1 ) ( 1 2 )或線路。 值知·特別一提的是，本發明係令電阻、電感、電容等 6 1295113 ：，皮動元件為一晶片形式’其具有與裸晶片相同的電連接特 .性’意即被動元件（3㈧兩端設有焊塾（31)= • 財線方式與基板（10)上的焊塾（12)接合，由； &含裸晶片、被動兀件等所有的元件都是在—次封 中完成’無須因安裝少量被動元件而進行另-製程：故： 製造效率而言可大幅提升。 “曰曰片（2 〇 )及被動元件（3 0 )在基板（丄Q ) 上元成晶片接合後，該晶 设4日日片（2 〇 )及被動元件（ 即已完成與基板（1 0、 μ π < ； 、 ）上所狄線路、輸出入接點的一切 電連接關係，在此之後卽士笛一 m h ^ 圖所示，即進一步在晶片 (2〇)及被動元件 干〈3 〇 )上形成封膠層（4 〇 )，隨 即完成記憶卡基板的構震。 如弟四圖所示，福命 揭路有一 SD記憶卡的基板（5 〇 ) ，其一端製作有線敗、认 ) 4a ^ + 路輪出入接點（5 1 )，並已利用前In addition, as shown in the figure: after the preparation of the substrate is completed, the wafer is provided to the --wafer (20) and more than one passive component (3), wherein the 5-well wafer (20) is a memory. , controller and other elements, passive components (3 〇) can be resistors, capacitors, inductors #, but in the form of a wafer (c ^ (die bond) step; 曰 then perform the wafer bonding step, as in the integrated circuit The bonding technology of the Japanese and Japanese wafers in the packaging technology has at least a wire bonding method, a tape winding type (D) and a flip chip bonding (9) P chip. The characteristics of the memory card can be used to wire the crystal W 2 . G) and wafer-type passive components (three-piece (... solder joints on... (12) joints; in this implementation, the use of wire bonding, so on the surface of the wafer (2 〇) and passive elements #( 3 〇) A soldering iron (21) (31) is formed at both ends defined by electrical characteristics, and one end of the gold wire or the aluminum wire is bonded to the crystal "2 〇" and the passive component by wire bonding. 3 〇) solder pad (2 1 ) ( 3 1 ), the other end is soldered to the substrate (χ 1) solder # ( 1 1 ) ( 1 2 Or the circuit. In particular, the present invention is to make resistors, inductors, capacitors, etc. 6 1295113 :, the skin-moving component is in the form of a wafer which has the same electrical connection characteristics as the bare wafer. Passive components (3 (8) are provided with soldering dies (31) at both ends = • The financial line is bonded to the soldering iron (12) on the substrate (10), and all components such as bare wafers, passive components, etc. are in - Completed in the second seal 'No need to install a small number of passive components for another process: Therefore: The manufacturing efficiency can be greatly improved. "The cymbal (2 〇) and the passive component (30) are on the substrate (丄Q) After the wafer is bonded, the crystal is placed on the 4th day (2 〇) and the passive component (that is, all electrical connections to the substrate, the input and output contacts on the substrate (10, μ π <; , ) have been completed. The relationship, after which the gentleman's flute is shown in the figure, further forms a sealant layer (4 〇) on the wafer (2〇) and the passive component dry (3 〇), and then the structure of the memory card substrate is completed. As shown in the fourth picture of the brother, Fu Ming Jie Road has a SD memory card substrate (5 〇), one end of which is made Line failure, recognize) 4a ^ + road wheel out of contact (51), and has been used before
揭方法完成晶片（5 9、 ， J用月J 0 . Z )(快閃記憶體）、被動元件（5 3 )及控制器（5 4、 ϋ、b 馨 -τ 的構裝，在完成前述構裝製程後， 可進一步進行模造掣 仗 衣红以完成該記憶卡的外殼，隨即完成 一記憶卡的製作。 返丨凡成 又本發明的另一知# — 罕乂佳貫施例，則包括下列步驟： 提供至少一晶片 —、 、 個以上的晶片式被動元件，該晶 片與晶片式被動元# 丨/〇焊墊； 卞之一表面上具有栢同電連接特性的 令前述晶片及日y a - ^ 曰曰月式被動元件之丨/〇焊墊朝上而固定 於一基板上； & 7 l295ll3The method of completing the wafer (5 9, J, J 0 . Z ) (flash memory), passive component ( 5 3 ), and controller (5 4, ϋ, b 馨-τ) After the manufacturing process, the blistering red can be further molded to complete the outer casing of the memory card, and then a memory card is completed. 丨 丨 凡 凡 又 另一 又 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一 另一The method comprises the steps of: providing at least one wafer—and more than one wafer type passive component, the wafer and the wafer type passive element 丨/〇 solder pad; and the surface of the crucible having the same electrical connection characteristic on the surface of the wafer and the day Ya - ^ 曰曰月式 passive component 丨 / 〇 solder pad facing up and fixed on a substrate; & 7 l295ll3
製作金屬線路以連接晶片與晶片式被動元件的|/〇焊 墊，具體作法可採取鍍膜方達成，鍍膜技術即可採取墓鍍 或電鑛方式可先在基板及其上的晶片、晶片式被動： 件表面覆設一光阻，又轉移線路圖案至光阻上，接著進行 蝕刻，使晶片與晶片式被動元件上的丨/〇焊墊露出，接= 進行鍍臈，在絲的㈣區域或錢方式鍍上全屬 膜而形成線路，這些線路將連接晶片與晶片式被動元件上 對應的|/0焊塾，藉此取代傳統封裝製程中的打線步驟. 而前述鍍膜步驟可視實際需要重複實施，直至晶片虚晶片 式被動元件上的丨/〇焊墊全部完成電連接； /、曰曰 經完成前述步驟後，在基板、晶片、被動元件及其上 的線路表面形成絕緣層，隨即完成封裝。 在前述實施例中，該含有被動元件的記憶卡元件亦θ 在無塵室中的一次封裝製程中完成封裝。 疋 如第五圖所示’係根據前述方法所構成記 造的-可行實施例，晶片（20)與晶片式被動元件The metal circuit is used to connect the wafer and the chip-type passive component |/〇 solder pad. The specific method can be achieved by coating. The coating technology can adopt the tomb plating or the electric ore method, and the wafer and the wafer type passive on the substrate and the substrate. : The surface of the device is covered with a photoresist, and the line pattern is transferred to the photoresist, and then etched to expose the 丨/〇 pads on the wafer and the chip-type passive component, and then galvanized, in the (four) region of the wire or The money method is plated with all the membranes to form a line, which will connect the corresponding |/0 soldering pad on the wafer and the chip passive component, thereby replacing the wire bonding step in the conventional packaging process. The above coating step can be repeatedly implemented according to actual needs. Until the 丨/〇 pads on the dummy chip passive components of the wafer are all electrically connected; /, after completing the foregoing steps, forming an insulating layer on the substrate, the wafer, the passive component and the surface of the wiring thereon, and then completing the packaging . In the foregoing embodiment, the memory card component containing the passive component is also packaged in a one-pack process in the clean room.疋 As shown in the fifth figure, a feasible embodiment, a wafer (20) and a chip passive component, which are constructed according to the foregoing method.
1/0焊塾（21) (3U朝上的方式被固定J 2右ϋ )上’晶片（2 〇 )與被動元件（3 0 )間主 ^⑸層（6 1)，相對應的晶片（2 0 )與被動元 )的焊塾（21) (31)上形成有蒸錢線路( 元件的=互電連接’藉此亦可在一次製程中完成記料 由上述可知，本發 同一製程完成被動元件 明主要係在基板上構裝晶片時，以 的安裝，該晶片與被動元件的構裝 8 1295113 ‘： 可在同一製程中完成，主要在於採用晶片式被動元件，由 於被動元件為晶片形式’其具有與晶片相同性質的電連接 ： 介面，因而使其構裝流程可與晶片完全同步，亦即在晶片 構裝製程完成後，亦已同時完成被動元件的安裝，而無須 透過另一黏者技術來達成’精此，不僅製程效率得以提古 ，亦可相對地降低生產成本。 • 【圖式簡單說明】 第一圖··係用以揭示本發明一較佳實施例步驟中使用 的基板示意圖。 第二圖··係揭示前述實施例在基板上進行裝晶步驟的 示意圖。 第三圖：係揭示前述實施例在基板上進行晶片接合的 示意圖。 第四圖··係利用本發明一實施例完成晶片及被動元件 • 構襞的SD記憶卡基板平面圖。 第五圖·係利用本發明又一實施例完成晶片及被動元 件構裝的記憶卡基板剖視圖。 【主要元件符號說明】 (1 〇)基板 （1 1 ) ( 1 2 )焊墊 (2〇)晶片 （21)(31)蟬墊 (3〇)被動元件 （40)封膠 (5 〇 )基板 （5 1 )輸出入接點 (5 2 )晶片 （5 3 )被動元件 1295113 (5 4 )控制器 （6 Ο )基板 (6 1 )絕緣層 （6 2 )蒸鍍線路1/0 soldering iron (21) (3U upwards is fixed J 2 right ϋ) on the wafer (2 〇) and the passive component (30) between the main ^ (5) layer (6 1), the corresponding wafer ( 2 0 ) and the passive element) of the soldering shovel (21) (31) is formed with a steaming circuit (component = mutual electrical connection), thereby also completing the recording in one process. As can be seen from the above, the same process is completed. The passive component is mainly installed when the wafer is mounted on the substrate, and the structure of the wafer and the passive component is 8 1295113 ': can be completed in the same process, mainly in the form of a chip passive component, since the passive component is in the form of a wafer 'It has the same electrical connection as the wafer: the interface, so that its assembly process can be completely synchronized with the wafer, that is, after the wafer fabrication process is completed, the passive component is also installed at the same time without passing through another paste. Technology to achieve 'excellent, not only process efficiency can be improved, but also relatively reduce production costs. · [Simplified schematic] The first figure is used to reveal the steps used in a preferred embodiment of the present invention. Schematic diagram of the substrate. A schematic diagram showing the steps of performing the seeding step on the substrate in the foregoing embodiment. The third drawing is a schematic diagram showing the wafer bonding of the foregoing embodiment on the substrate. The fourth figure is to complete the wafer and the passive component by using an embodiment of the present invention. • A plan view of a structured SD memory card substrate. Fig. 5 is a cross-sectional view of a memory card substrate in which a wafer and a passive component are constructed by another embodiment of the present invention. [Main component symbol description] (1 〇) substrate (1 1 ) (1 2) Solder pad (2〇) wafer (21) (31) 蝉 pad (3 〇) passive component (40) sealant (5 〇) substrate (5 1 ) output contact (5 2 ) wafer (5 3) Passive component 1295113 (5 4 ) controller (6 Ο ) substrate (6 1 ) insulation layer (6 2 ) evaporation line
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