TWI312927B - Method for setting power management status of device and power-saving method of the same - Google Patents
Method for setting power management status of device and power-saving method of the same Download PDFInfo
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1312927 • 九、發明說明: * 【發明所屬之技術頜域】 本發明一般涉及電腦系統中的裝置電源管理狀態設 定方法及其功耗節省方法’更具體地,涉及一種在符合高 級配置與電源介面(ACPI)電源管理標準的電腦系統中 ‘ 根據處理器和裝置控制器之間的關係來設定設備低功率 P 狀態的方法以及設備的功耗節省方法。 【先别技術】 _ 電腦系統是現代資訊社會最重要的硬體基礎設施之 一。除了對效能的追求之外,現代化的電腦系統還要講究 耗能的降低。故現代的電腦廠商也將減少耗能視為電腦系 統研發的重點之一。 • 南級配置與電源介面(Advanced Configuration and1312927 • Nine, invention description: * [Technical jaw region to which the invention belongs] The present invention generally relates to a device power management state setting method in a computer system and a power consumption saving method thereof. More specifically, it relates to an advanced configuration and power supply interface. (ACPI) Power Management Standard Computer System 'Method of setting the low power P state of the device according to the relationship between the processor and the device controller and the power saving method of the device. [First Technology] _ Computer system is one of the most important hardware infrastructures in the modern information society. In addition to the pursuit of performance, modern computer systems must also pay attention to the reduction of energy consumption. Therefore, modern computer manufacturers have also reduced energy consumption as one of the focuses of computer system development. • Southern configuration and power interface (Advanced Configuration and
Power interface , ACPI)是央代爾、微軟和東芝共同開發 的種電源管理標準,其意圖是讓系統而不是BI〇s來全 面控制電㈣理並料設源消耗進行按需分配,使系 統更加省電。 作為BIOS與作業系統間橋樑的Acpi設定了針對不 同物件的多種不同的功耗/性能狀態,如針對所有系統的 : 全部系統狀態GX、針對全局睡眠狀態G1的睡眠狀態 1312927 SX、針對在GO ;}大態下中央處理器(c 狀態CX、以及針對裝置的敗狀態。其中乂為數字原f理 2 ’ 3等,代表不同的功耗/性能狀態,當 ,0 1 ’ 常工作狀態。 $,指正 其中ACPI將在全部系統狀態⑼下的處理 =欠態CX定義為啟動狀態(執行指令)或睡眠口 =令::CX 包括 C0、cl、C2、C3...CnQC(^ 、把理☆執仃指令的啟動功耗狀態,即清醒狀離。Cl 到C η是處理器不同層級的睡眠狀態,節能 _ C1、C2、C3、C4 ,曰疗狄此曰^ 曰丨貝序為 恶疋C4。當處理器處於睡眠狀態時,處理器不執行任何 指令。每一種處理器睡眠狀態具有進入和退出相應狀態的 延遲時間’通常具有較長的進入/離開延遲時間的睡眠狀 態的功率節省程度較大。另外,在C0狀態,ACn還通 過所疋我的郎流狀態(throttling state )’’ COt以及通過轉 、交到多種性能狀態(P狀態)來改變處理器的性能。Power interface (ACPI) is a kind of power management standard jointly developed by Yangdale, Microsoft and Toshiba. Its intention is to let the system, not BI〇s, fully control the electricity. Power saving. As a bridge between the BIOS and the operating system, the Acpi sets a number of different power/performance states for different objects, such as for all systems: all system states GX, sleep state 1312927 SX for global sleep state G1, for GO; } In the large state of the central processing unit (c state CX, and the state of failure for the device. Where 乂 is the number of the original original 2 '3, etc., representing different power / performance states, when, 0 1 'normal working state. , correcting the processing in which ACPI will be in all system states (9) = under-state CX is defined as the startup state (execution instruction) or sleep port = order::CX includes C0, cl, C2, C3...CnQC (^, rational ☆ The power-on state of the execution command is awake. Cl to C η is the sleep state of different levels of the processor, energy saving _ C1, C2, C3, C4, 曰 狄 曰 曰丨 曰丨 曰丨 序 序疋C4. The processor does not execute any instructions while the processor is in a sleep state. Each processor sleep state has a delay time to enter and exit the corresponding state 'power saving for a sleep state that typically has a long entry/exit delay time Cheng It is large. Further, in the C0 state, but also through the ACn Cloth I Lang flow state (throttling state) '' COt and by turn, find a plurality of performance states (P state) to change the performance of the processor.
AcpI將裝置節能狀態定義為do、Dl、D2、D3。其 中DO是襄置接通電源、運行狀態,D3狀態下裝置的電 源完全被移出,所以下次電源再一次被供應時需要作業系 統重新再對這個裝置作一次設定。D1和D2是節能狀態, 且D2狀態的節能程度大於pi狀態。D1和D2狀態由襄 置本身所決定,且有些裝置不能進入D1及D2狀態,但 是所有裝置都可以進入d3狀態。(以上内容可參閱ACPI 技術規範)。 1312927 通常,當處理器進入睡眠狀態時,裝置處於正常運行 狀態且可以獨立完成其工作。然而,在大多數情形下周邊 裝置沒有工作可處理而是等待處理器醒來’這無疑增加了 電腦系統的耗能。 因此,我們希望提供一種當處理器進入休眠狀態後, 裝置在完成其工作之後也能進入睡眠狀態或節流狀能 (throttling state )的機制以進一步節省電腦系統的電; 耗。 〜均 【發明内容】 本电月的目的在於提供一種根據處理器和裴置控 器之間的關係來設定裝置電源管理狀態的方法以及^ 的功耗節省方法,其㈣使在符合高級配置與電源· (Advanced Configuration and Power Interface ; ACPl^ ^ =管理標準的電腦系統在正作狀態時減少電源的: 根據本發明的-個方面,提供—種裝置_管 設定的方法,應用於具有電源f理單元(pM ^ 電腦系統,其包括步驟:提供-PMU模組,該二: 組可獲得電腦系統處理器所處於的多種不同的電 狀態,及在PMU模組中根據所獲得的處理 "、吕 源管理狀態設定裝置的相應的電源管理狀態的 根據本發明的-個方面,提供一種裝置功耗 8 1312927AcpI defines the device power saving state as do, Dl, D2, and D3. The DO is the power-on and running state of the device. The power of the device is completely removed in the D3 state. Therefore, the next time the power is supplied again, the operating system needs to be set again. D1 and D2 are energy-saving states, and the D2 state is more energy-efficient than the pi state. The D1 and D2 states are determined by the device itself, and some devices cannot enter the D1 and D2 states, but all devices can enter the d3 state. (The above can be found in the ACPI Technical Specifications). 1312927 Typically, when the processor goes to sleep, the device is in normal operation and can perform its work independently. However, in most cases the peripherals have no work to handle but wait for the processor to wake up', which undoubtedly increases the energy consumption of the computer system. Therefore, we wish to provide a mechanism for the device to enter a sleep state or a throttling state after the processor has entered a sleep state to further save power in the computer system. ~All [Invention] The purpose of this month is to provide a method for setting the power management status of the device according to the relationship between the processor and the controller, and a power saving method for the power consumption, which (4) is in compliance with the advanced configuration and (Advanced Configuration and Power Interface; ACPl^^ = management standard computer system reduces power during normal state: According to an aspect of the invention, a method for providing a device_tube setting is applied to have a power supply f Unit (pM ^ computer system, which includes the steps of: providing -PMU module, the second: the group can obtain a plurality of different electrical states of the computer system processor, and according to the obtained processing in the PMU module" According to an aspect of the present invention, the power management state of the Lvyuan management state setting device provides a device power consumption 8 1312927
法,應用於具有電源管理單元(PMU)模組的電 其包括步驟:雜-PMU触1 pMU 獲得的電腦系統處理器所處於的多種不同的電源管理狀 態,相應於處理器的不同的電源管理狀態設定裝置的相應 的電源管理狀態的·錢,及提供―裝置控_,檢查 是否有電源f理狀態的識難號,若有,則控制裝置進入 相應的裝置電源管理狀態。 根據本發明的另-個方面,提供—種裝置功耗節省方 法’應用於符合ACPI規範的電腦系、統,其包括步驟:識 另J處理裔的也源管理狀態,及根據所識別的電源管理狀 恶’控制裝置進人與處理||的電源管理狀態相對應的電源 管理狀態。 通過上述方法,電腦系統的裝置可以根據檢測到的 PMU模組相應於處理器的不同的電源管理狀態設置的識 別仏號自主進入相應的電源管理狀態,從而降低電腦系統 正常工作時的電源消耗。 【實施方式】 根據(Advanced Configuration and Power interface ; ACPI)技術規範’令央處理器(cpu)的電源管理狀態 包括有:正常運行狀態C〇及休眠狀態ci、C2、C3和C4。 當CPU的溫度過高時,CPU可以進入節流(Throttling) 狀態COt以減少CPU的能耗。ACP][還定義有裝置的電源 1312927 吕理狀態D〇、d卜D2及D3,其中D0盔 D3 、TD〇為正常運作狀態, 態而4:HD1*D2_可自定義的省電狀 办成p>4—⑽或休眠狀態時,裝置在 兀成,、工作之後只能等待CPU醒 管理標準的電腦系統平台中,通常付s ACPI電源 CPTT 在南橋晶片組中設有與The method is applied to a power management unit (PMU) module. The method includes the following steps: the hetero-PMU touches the pMU to obtain a plurality of different power management states of the computer system processor, corresponding to different power management of the processor. The state of the corresponding power management state of the state setting device, and the provision of "device control", check whether there is a power failure status, and if so, the control device enters the corresponding device power management state. According to another aspect of the present invention, a method for saving power consumption of a device is applied to a computer system conforming to the ACPI specification, which includes the steps of: identifying the source management state of the J-resource, and according to the identified power source. The management management state is the power management state corresponding to the power management state of the control device. Through the above method, the device of the computer system can automatically enter the corresponding power management state according to the identified identification number of the PMU module corresponding to the different power management state settings of the processor, thereby reducing the power consumption of the computer system during normal operation. [Embodiment] According to the (Advanced Configuration and Power Interface; ACPI) technical specification, the power management state of the CPU (Cpu) includes: a normal operating state C〇 and sleep states ci, C2, C3, and C4. When the CPU temperature is too high, the CPU can enter the Throttling state COt to reduce the power consumption of the CPU. ACP][The power supply 1312927 is also defined as the device status D〇, d Bu D2 and D3, where D0 helmet D3 and TD〇 are in normal operation state, and 4: HD1*D2_ can be customized. In the case of p>4—(10) or in the sleep state, the device is in the computer system platform that can only wait for the CPU to wake up to the management standard after working. Usually, the ACPI power supply CPTT is provided in the south bridge chipset.
及衣此制器電路通連的電源管理單元(Pa power management unit that is connected to the circuit of the device (P
tfMU知道哪進场了 α狀態之外的 :他笔源管理狀態,即co、C0t、C2、cuc4狀態。 1用本發明方法的電㈣統的裝置可以根據PMU模組設 置的相胁CPU所在的不同電源管理狀態的信號也進入 相應的省魏態,即D1及D2狀態,從而進—步減少電 腦系統的整體耗能。 以下,參照附圖來詳細說明本發明的實施例。 請參見第一圖,其係為根據本發明—個實施例的用於 電腦系統的南橋晶片或南北橋一體晶片的PMU模組的設 定裝置電源管理狀態方法的示意圖。 PMU模組首先判斷cpu是否處於正常運行的c〇狀 悲’若否’則開始執行本發明的設定裝置電源管理狀態方 法。在PMU模組中,在步驟S10,檢查cpu是否處於 COt狀態’若是,則執行步驟S5〇,設置PMU_D〇t信號 以使裝置控制器控制裝置進入第一電源狀態,若否,則進 入步驟S20 °在本發明中,定義裝置的第一電源狀態為 ACPI技術規範定義的DOt狀態。請參見步驟S501及 S502 ’在設置PMUj)〇t信號之後,當檢測到CPU轉入 10 1312927 正系運作的C0狀態時,PMU模組將清除PMU—DOt信號 從而使得裝置控制器控制裝置退出第-電源狀態,否則-^處於特㈣。通常,當CPU的溫麟❹卜設定值 % ’ CPU將由節流狀態CGt狀態轉人正常運作狀態c〇。 <、在步驟S20中,pMU模組檢查CPU是否處於C2狀 恶或C3狀態。如果cpu處於C2狀態或c3狀態中的一 . 種,士則在步驟S60中設置mu模組的PMUJ)1信號,以 • 1 吏衣置控制器控制裝置進入第二電源狀態。在本發明中, 裝,的第二電源狀態為ACH技術規範㈣的D1狀態。 =’進入步驟S90,pMU模組判斷cpu是否將要離開 :月;』的C2或C3狀態’若是’則執行步驟S120,將PMU_D1 - 錢清除以使裝置控制器控制裝置退出m狀態,否則處 =等待狀態。若在步,驟S2〇中的結果是不處於任何一種狀 態,則進入步驟S30。 在步驟S30中’卩廳模組檢查cpu是否處於C4狀 • 態,若是,則在步驟S7〇中設置PMU模組的PMU D2 信號,以使裝置控制器控制裳置進入第2電源狀態。在本 發明中,定/裝置的第三電源狀態為ACPI技術規範定義 的D2狀態。接著’進入步驟sl〇〇,判斷咖是否將要 伙C4狀恶喚醒,若是,則執行步驟§13〇,將抑仍—d2 信號清除並結束,否則處於等待狀態。裝置控制器在檢查 到PMU—D2信號被清除後,將控制裝置退出D2狀態。若 • PMU模組檢查到CPU不處於以狀態,則執行步驟⑽, 清除PMU模組的pMU—D〇t、pMU—m、pMu—信號並 11 1312927 結束。 —其中,在步驟S60和S70中設置了 pMu_m、p_瓜 信號之後,只有在將CPU從C2、c -tfMU knows where to enter the alpha state: his pen source management state, ie co, C0t, C2, cuc4 state. 1 The device of the electric (four) system using the method of the invention can also enter the corresponding provincial state, that is, the D1 and D2 states according to the signals of different power management states in which the CPU of the PMU module is located, thereby further reducing the computer system. The overall energy consumption. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Referring to the first figure, it is a schematic diagram of a power management state method for a setting device of a PMU module for a south bridge wafer or a north-south bridge integrated chip of a computer system according to an embodiment of the present invention. The PMU module first determines whether the CPU is in a normal operation, and if it is not, then the power management state method of the setting device of the present invention is started. In the PMU module, in step S10, it is checked whether the CPU is in the COt state. If yes, step S5 is performed to set the PMU_D〇t signal to cause the device controller to control the device to enter the first power state. If not, proceed to step S20. In the present invention, the first power state of the device is defined as the DOt state defined by the ACPI specification. Referring to steps S501 and S502 'after setting PMUj' 〇t signal, when detecting that the CPU is transferred to the C0 state of 10 1312927 active operation, the PMU module will clear the PMU_DOt signal and cause the device controller to control the device to exit. - Power status, otherwise -^ is in special (four). Normally, when the CPU's Wenlin's setting value %' CPU will be transferred from the throttle state CGt state to the normal operating state c〇. < In step S20, the pMU module checks if the CPU is in the C2 state or the C3 state. If the CPU is in the C2 state or the c3 state, the PMUJ)1 signal of the mu module is set in step S60 to enter the second power state by the device control device. In the present invention, the second power state of the device is the D1 state of the ACH specification (4). = 'Go to step S90, the pMU module determines whether the cpu is about to leave: month; 』C2 or C3 state 'if ', then step S120 is executed to clear PMU_D1 - money to cause the device controller control device to exit the m state, otherwise = Waiting state. If the result in step S2 is not in any of the states, the process proceeds to step S30. In step S30, the hall module checks whether the cpu is in the C4 state, and if so, sets the PMU D2 signal of the PMU module in step S7, so that the device controller controls the skirt to enter the second power state. In the present invention, the third power state of the device/device is the D2 state defined by the ACPI specification. Then, the process proceeds to step sl, and it is judged whether the coffee is awakened by the C4, and if so, the step §13〇 is executed, and the signal of the still-d2 is cleared and ended, otherwise it is in a waiting state. The device controller exits the D2 state after checking that the PMU-D2 signal is cleared. If the PMU module detects that the CPU is not in the state, then perform step (10) to clear the pMU-D〇t, pMU-m, pMu-signals of the PMU module and 11 1312927 ends. - wherein, after the pMu_m, p_ melon signals are set in steps S60 and S70, only the CPU is taken from C2, c -
株㈣狀恶喚醒的事 件出現%,才分別將PMU模組的PMU—m、PMU 號清除,_處於特狀態。這樣,可以通過喚醒哪 的處理事件將CPU和裝置控糖—起喚醒,進而使 退出當前的電源管理狀態。 ^ ❸見第―® ’其係為根據本發明―個實施例的用於 電腦系統的裝置控制器的裝置功耗節省方法的示竟圖。、 當裝置在步驟S1_完成其工作之後,進 S100。 在裝置控制器中,在步驟S200,裝置控制器檢查應U 模組是否設置了簡_D0t信號,若是,則執行步驟S500, 使裝置控制器控制裝置進入⑽狀態。裂置控制器控制裝 置進入DOt狀態時,裝置中的動作計時器(behavi〇r 以-較大的設定值_工作。當動作計時器處於計數狀態 時,周邊裝置不工作,而當動作計時器超時,周邊裝置工 作-預定的時間’並重新復位動作計時器,使其處料數 狀態。即在D 01狀態中,裝置控制器控制裴置以間歇的節 流狀態(throttling state)進行工作,從而減少裝置的工作 時間。然後’進行到步驟S510,等待PMU—D(^信號的清 除。當在步驟S510中得知PMU—D〇t信號被清除時,則 執行步驟S520,使裝置控制器控制裝置退出膽狀態迷 結束。若沒有設置PMU—D〇t信號,則進入步驟S3〇〇。 12 1312927 Τ P=:若 =檢查_模組是否設置 人m㈣二二、執订步驟S600,控制褒置進 睡眠大r种,在裝置控彻、控姆置進入m 之後,裝置控制器停止裝置的計時器,並停Μ 相減少裝置的電源消耗,且裝置在m狀離的 ==小於其在膽狀態的電源消耗。在If the occurrence of the (4) awakening event occurs, the PMU-m and PMU numbers of the PMU module are cleared, and the _ is in a special state. In this way, the CPU and the device can be controlled to wake up by waking up which processing event to wake up, thereby exiting the current power management state. ^ See the "-" as a representation of a device power saving method for a device controller of a computer system in accordance with an embodiment of the present invention. When the device completes its work in step S1_, it proceeds to S100. In the device controller, in step S200, the device controller checks whether the U-module is set to the UI_D0t signal, and if so, executes step S500 to cause the device controller to control the device to enter the (10) state. When the split controller control device enters the DOt state, the action timer in the device (behavi〇r operates with a larger set value _. When the action timer is in the count state, the peripheral device does not work, and when the action timer Timeout, the peripheral device works - the predetermined time 'and resets the action timer to the state of the material. In the D 01 state, the device controller controls the device to operate in an intermittent throttling state. , thereby reducing the working time of the device. Then 'go to step S510, waiting for the PMU-D (clearing of the signal). When it is known in step S510 that the PMU_D〇t signal is cleared, step S520 is performed to enable the device to control If the PMU-D〇t signal is not set, the process proceeds to step S3. 12 1312927 Τ P=: If the = check_module is set to the person m (four) 22, the binding step S600, The control device is placed into a large sleep type. After the device is controlled and the control device is set to enter m, the device controller stops the timer of the device, and stops the power consumption of the device, and the device is in the form of m== less than Power consumption in the state of bile in
,信號是否被清除,若是,則執 入f置控制器沒有™信號,則進 在步驟漏中,檢查PMU模組是否設置了咖〇2 ’右疋」則執行步驟S700,使裝置控制器控制裝置 狀恶。特別地,在本發明中,當裝置控制器控制 f置進^ D2睡眠狀態時,裝置控制器停止裝置的計時 厂’亚+止全告Μ寺脈信號或裝置中的pLL (Phased制 L〇〇P)鎖相環電路。顯然,裝置在见狀態的電源消耗小 於其在D1狀態的電源消耗。紐,進行到步驟議,裝 置控制器靖mu—D2信號是賴清除,若是,則執行 V驟S72G’使裝置控制器控制裝置退出D2睡眠狀態並結 束’否則處於等待狀態。若沒有設置pMU—D2信號,則 結束並正常進行其他的工作。 在步驟S500、S600、S700中的DOt、D卜D2狀態的 具體設置只是舉例說明,每個裝置可以參照 PMU—DX 信 遽’亦即根據CPU的魏管理狀態來定義其自己的與上 13 1312927 述不同的具體的DOt、D1、D2狀態。在裝置完成正常工 作之後’裝置控制器根據PMU模組的相應信號控制裝置 停止其部分或全部的時脈信號或停止其PLL電路的工 作’並監視PMU_D0t、PMU—Dl、PMU一D2信號的清除。 而上述系統中所說的裝置可以是以USB、SATA、 IDE、PCIE等匯流排進行連接的周邊裝置。Whether the signal is cleared, if yes, if the controller is not equipped with the TM signal, then the step is leaked, and it is checked whether the PMU module has set the curry 2 'Right 疋", then step S700 is executed to enable the device controller to control Device-like evil. In particular, in the present invention, when the device controller controls the f-set sleep state, the device controller stops the timing factory of the device, and the pLL in the device (Phased system L〇) 〇P) Phase-locked loop circuit. Obviously, the power consumption of the device in the see state is less than the power consumption in the D1 state. In the case of the step, the device controller mu-D2 signal is cleared, and if so, the CPU step S72G' is executed to cause the device controller control device to exit the D2 sleep state and end 'otherwise' or otherwise wait. If the pMU-D2 signal is not set, it ends and performs other work normally. The specific settings of the DOt and Db D2 states in steps S500, S600, and S700 are merely examples, and each device can refer to the PMU-DX signal, that is, according to the management state of the CPU, its own and upper 13 1312927 are defined. Different specific DOt, D1, D2 states are described. After the device completes normal operation, the device controller controls the device to stop some or all of its clock signals or stop the operation of its PLL circuit according to the corresponding signal of the PMU module and monitors the clearing of the PMU_D0t, PMU-D1, and PMU-D2 signals. . The device described in the above system may be a peripheral device connected by a bus, such as USB, SATA, IDE, or PCIE.
通過本發明上述兩個實施例所示出的方法,由於pMu 模組可以識別CPU所處的電源管理狀態並且可以根據所 獲得的CPU的不同的電源管理狀態設置裳置的相應的電 源管理狀態的識別信號,f CPU進入睡眠或節㈣大= 時’裝置控制器在完成其工作之後可以根據PMU模組所 給出的識別信號控制裝置進入相應的睡眠或節流狀態。並 且可以通過喚醒CPU的處理事件將cpu和裝置控制^器— 起喚醒,進而使裝置退出當前的電源管理狀態。可 以根據CPU不__或節錄態’來設絲置 的睡眠或節流的深淺程度。這樣的結果就能夠在系:正; 處於不同程度的睡眠狀態或節流狀態以減 ν衣置的功耗,同時進—步降低系統正常工作時的功耗。 本發明雖以優選實施例披露如上,然其並 本發明的範圍,本領域的枯桁人昌户 限疋 和範圍的前提下離本發明的精神 保護範_本發日侧要求絲。叫柄明的 【圖式簡單說明】 14 1312927 本案得藉由下列圖式及詳細說明,俾得一更深入之瞭 解: 第一圖,其係為根據本發明一個實施例的用於電腦系 統的電源管理單元(PMU)模組的設定裝置電源管理狀 態方法的示意圖; 第二圖,其係為根據本發明一個實施例的用於電腦系 統的裝置控制器的裝置功耗節省方法的示意圖。 【主要元件符號說明】According to the method shown in the above two embodiments of the present invention, since the pMu module can recognize the power management state in which the CPU is located and can set the corresponding power management state of the skirt according to the different power management states of the obtained CPU. The identification signal, f CPU enters sleep or section (four) large = when the device controller can complete the operation, the device can control the device to enter the corresponding sleep or throttle state according to the identification signal given by the PMU module. And the CPU and the device control device can be woken up by waking up the processing event of the CPU, thereby causing the device to exit the current power management state. The degree of sleep or throttling of the silk can be set according to whether the CPU is not __ or the recording state. Such a result can be: positive; at different levels of sleep or throttling to reduce the power consumption of the device, while further reducing the power consumption of the system during normal operation. The present invention has been disclosed in the preferred embodiments as described above, and it is intended that the scope of the present invention, the scope of the present invention, and the scope of the present invention are within the scope of the scope of the present invention. [Simplified description of the description] 14 1312927 This case can be further understood by the following drawings and detailed description: The first figure is a computer system according to an embodiment of the present invention. FIG. 2 is a schematic diagram of a device power consumption saving method for a device controller of a computer system according to an embodiment of the present invention. FIG. [Main component symbol description]
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