TWI311360B - Flip chip package with high performance of heat dissipation - Google Patents

Flip chip package with high performance of heat dissipation Download PDF

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Publication number
TWI311360B
TWI311360B TW093139832A TW93139832A TWI311360B TW I311360 B TWI311360 B TW I311360B TW 093139832 A TW093139832 A TW 093139832A TW 93139832 A TW93139832 A TW 93139832A TW I311360 B TWI311360 B TW I311360B
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TW
Taiwan
Prior art keywords
flip chip
substrate
heat sink
chip package
micro
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Application number
TW093139832A
Other languages
Chinese (zh)
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TW200623361A (en
Inventor
Ming-Hsiang Cheng
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Advanced Semiconductor Eng
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Priority to TW093139832A priority Critical patent/TWI311360B/en
Publication of TW200623361A publication Critical patent/TW200623361A/en
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Publication of TWI311360B publication Critical patent/TWI311360B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

1311360 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於覆晶封裝構造,特別係有關於一種高 散熱效能覆晶封裝構造。 【先前技術】 在先進的封裝技術中’覆晶接合將取代打線連接,其 係將晶片翻轉接合至基板,而不需要以習知打線形成之銲 線(bonding wire)電性連接晶片與基板,不但可以縮短電 性傳遞路徑更可以減少封裝的尺寸,故習知能高速運算或 南頻率的晶片係以覆晶接合方式接合在一基板上。但由於 晶片在高速運算時會產生大量的熱量,因此習知之覆晶封 裝構造(flip chip package)係需設置適當之散熱機構, 以利晶片之散熱。 請參閱第1圖’習知覆晶封裝構造係主要包含有一基 板1 0、一覆晶晶片2 0以及一散熱片3 〇,該覆晶晶片2 〇係以 複數個凸塊21接合至該基板10之一上表面,通常在該基板 1〇之一上表面會設置一加強環4〇(stiffener ring),其係 利用一黏膠層41黏著於該基板1〇之該上表面,以防止該基 板1 〇之翹曲變形。在接合該覆晶晶片20之後,通常會在提 供一底部填充膠50在該覆晶晶片20與該基板10之間,以密 封保護該些凸塊21及該覆晶晶片20之主動面並且避免應力 集中現象而造成該些凸塊21斷裂(crack)。而該散熱片 係以另一黏膠層31黏設於該加強環40上並遮蓋該覆晶晶片 20。並且在該散熱片30與該覆晶晶片20間係形成有_ ^導 介面物質60(Thermal Interface Material, TIM),以熱TECHNICAL FIELD OF THE INVENTION The present invention relates to a flip chip package structure, and more particularly to a high heat dissipation performance flip chip package structure. [Prior Art] In the advanced packaging technology, the flip-chip bonding will replace the wire bonding, which is to flip-bond the wafer to the substrate without electrically connecting the wafer and the substrate with a bonding wire formed by conventional wire bonding. Not only can the electrical transmission path be shortened, but also the size of the package can be reduced. Therefore, it is known that a high-speed operation or a south frequency wafer is bonded to a substrate by flip chip bonding. However, since the wafer generates a large amount of heat during high-speed operation, the conventional flip chip package requires an appropriate heat dissipation mechanism to facilitate heat dissipation of the wafer. Referring to FIG. 1 , a conventional flip-chip package structure mainly includes a substrate 10 , a flip chip 20 , and a heat sink 3 . The flip chip 2 is bonded to the substrate by a plurality of bumps 21 . An upper surface of a substrate is generally provided with a stiffener ring on one of the upper surfaces of the substrate 1A, which is adhered to the upper surface of the substrate 1 by an adhesive layer 41 to prevent the upper surface. The warpage of the substrate 1 is warped. After bonding the flip chip 20, an underfill 50 is usually provided between the flip chip 20 and the substrate 10 to seal and protect the active surfaces of the bumps 21 and the flip chip 20 and to avoid The stress concentration phenomenon causes the bumps 21 to crack. The heat sink is adhered to the reinforcing ring 40 by another adhesive layer 31 and covers the flip chip 20. And a thermal interface material (TIM) is formed between the heat sink 30 and the flip chip 20 to heat

1311360 五、發明說明(2) 耦。該覆晶晶片20與該散熱片3〇,使得該覆晶晶片2〇能藉 由該散熱片30散熱。另,該基板1〇之下表面係設置有複數 個銲球70,以供對外電性導接。 由於該覆晶晶片20係被氣閉密封在一由該基板丨〇、該 加強環40與該散熱片30所構成之密封空間,該覆晶晶片2〇 所產生之熱量係聚集在該覆晶封裝構造内部,其内部傳熱 效果並不均勻,並且會使該覆晶晶片2〇處於一高壓環境 因此容易造成該覆晶封裝構造内部元件損壞。此外,為了 更加增進該覆晶封裝構造之散熱效果,係會在該散熱片 之一外表面32再額外加裝一散熱鰭片與一散熱風扇(圖未 繪出),習知散熱片上加裝有散熱鰭片之覆晶 揭露於美國專利第6, 61 7,683號,習知散熱片上加裝有散 熱風扇之覆晶封裝構造已揭露於我國專利公告第47872〇 號。當一散熱風扇設置於散熱片上時,會使得該覆晶封 構造總體厚度變厚,不利組裝於薄形化之電子產品,此外 該散熱風扇缺乏保護,並且風扇運轉時與組裝不良發出之 風扇噪音係無法被排除。此外,散熱風扇係需以外加之排 線導接’導致增加纏線及配線之困擾。 【發明内容】 播、生本Γΐΐί要目的在於提供一種高散熱效能覆晶封裝 構仏丄主要包3有一基板、一接合在該基板上之覆晶晶 片、7微型散熱風扇以及一散熱片’該微型散熱風 =基J用以接合該覆晶晶片之同一表面並且被該散熱J 罩蓋,達到保護該微型散熱風扇、減少風扇噪音以及降低1311360 V. Description of the invention (2) Coupling. The flip chip 20 and the heat sink 3 are so that the flip chip 2 can be dissipated by the heat sink 30. In addition, a plurality of solder balls 70 are disposed on the lower surface of the substrate 1 for external electrical conduction. Since the flip chip 20 is hermetically sealed in a sealed space formed by the substrate 丨〇, the reinforcing ring 40 and the heat sink 30, the heat generated by the flip chip 2 聚集 is concentrated on the flip chip. Inside the package structure, the internal heat transfer effect is not uniform, and the flip chip 2 is placed in a high voltage environment, so that the internal components of the flip chip package structure are easily damaged. In addition, in order to further enhance the heat dissipation effect of the flip chip package structure, an additional heat sink fin and a heat dissipation fan (not shown) are additionally disposed on one outer surface 32 of the heat sink, and the heat sink is additionally mounted. A flip chip having a heat dissipating fin is disclosed in U.S. Patent No. 6,617,683. A conventional flip chip package having a heat dissipating fan is disclosed in the Chinese Patent Publication No. 47872. When a heat dissipating fan is disposed on the heat sink, the overall thickness of the flip chip structure is thickened, which is disadvantageously assembled in the thinned electronic product, and the fan of the heat dissipating fan lacks protection, and the fan noise generated when the fan is running and assembled poorly Cannot be excluded. In addition, the cooling fan is required to be additionally wired to lead to increase the entanglement and wiring. SUMMARY OF THE INVENTION The purpose of the present invention is to provide a high heat dissipation performance of a flip chip package. The main package 3 has a substrate, a flip chip bonded to the substrate, a 7 micro heat sink fan, and a heat sink. Micro heat dissipation wind = base J is used to join the same surface of the flip chip and is covered by the heat sink J to protect the micro heat sink fan, reduce fan noise and reduce

第7頁 1311360 五、發明說明(4) 板、一覆晶晶片、至少一微型散熱風扇以及一散熱片,其 中,該基板係具有一第一表面以及—對應之第二表面,該 覆晶晶片係接合至該基板之該第—表面,該微型散熱風扇 係設置於該基板之該第一表面,該散熱片係設置於該基板 之該第一表面上並罩蓋該覆晶晶片與該微型散熱風扇。 【實施方式】 请參閱所附圖式’本發明將列舉以下之實施例說明: 在本發明之第一具體實施例中,揭示一種高散熱效能 覆晶封裝構造100。請參閱第2圖,該覆晶封裝構造100主 要包含有一基板110、一覆晶晶片、至少一微型散熱風 扇130以及一散熱片14〇,其中,該基板11〇係具有一第一 表面111以及一對應之第二表面112,在本實施例中,該基 板110係為包含有BT樹脂的多層電路基板。該覆晶晶片12〇 係覆晶接合至該基板11〇之該第一表面ln。而該微型散熱 風扇130係設置於該基板110之該第一表面1U。該散熱片 140係設置於該基板no之該第一表面上並遮蓋該覆晶 晶片120與該微型散熱風扇13〇。較佳地,在該散熱片14〇 與該基板110間之空間係氣體連通至該散熱片14〇外部,以 利高溫氣體之快速排放,以防止熱量聚集在該覆晶封裝構 造100之内部並且能避免該覆晶晶片12〇處於高壓環境。 該覆晶晶片1 2 0係具有一主動面1 2 1以及一對應之背面1 2 2 並且包含有複數個在該主動面丨21上之凸塊丨23,該些凸塊 123係可為錫錯凸塊、無錯凸塊或是金凸塊,該些凸塊eg 係以直接銲接、銲料接合或異方性導電膜(Anis〇tr〇picPage 7 1311360 5. Invention Description (4) A board, a flip chip, at least one micro heat sink fan and a heat sink, wherein the substrate has a first surface and a corresponding second surface, the flip chip Bonding to the first surface of the substrate, the micro cooling fan is disposed on the first surface of the substrate, the heat sink is disposed on the first surface of the substrate and covers the flip chip and the micro Cooling fan. [Embodiment] The present invention will be described with reference to the following embodiments. In the first embodiment of the present invention, a high heat dissipation performance flip chip package structure 100 is disclosed. Referring to FIG. 2 , the flip chip package structure 100 mainly includes a substrate 110 , a flip chip, at least one micro heat dissipation fan 130 , and a heat sink 14 , wherein the substrate 11 has a first surface 111 and A corresponding second surface 112, in the present embodiment, the substrate 110 is a multilayer circuit substrate including a BT resin. The flip chip 12 is flip-chip bonded to the first surface ln of the substrate 11A. The micro heat dissipation fan 130 is disposed on the first surface 1U of the substrate 110. The heat sink 140 is disposed on the first surface of the substrate no and covers the flip chip 120 and the micro heat dissipation fan 13A. Preferably, the space between the heat sink 14 〇 and the substrate 110 is in gas communication with the heat sink 14 〇 to facilitate rapid discharge of high temperature gas to prevent heat from collecting inside the flip chip package 100 and The flip chip 12 can be prevented from being in a high voltage environment. The flip chip 120 has an active surface 1 2 1 and a corresponding back surface 1 2 2 and includes a plurality of bumps 23 on the active surface 21, the bumps 123 being tin Wrong bumps, error-free bumps or gold bumps, which are directly soldered, solder bonded or anisotropic conductive films (Anis〇tr〇pic

第9頁 1311360Page 9 1311360

Conductive Film, ACF)接合等等電性連接至該基板n〇。 通常可在該覆晶晶片120與該基板iio之間形成一底部填充 膠150 ’以避免應力集中現象產生。 ' 請特別參閱第3圖,在本實施例中,該微型散熱風扇 130係為一種表面接合型微型散熱風扇,利用複數個導接 端134表面接合至該基板11〇之一線路層(圖未繪出),以使 其電源藉由該基板110傳導至該微型散熱風扇13〇,較佳 地,該微型散熱風扇130係藉由該基板no電性連接至其中 至少一在該基板110第二表面112上之複數個銲球,以 取代習知用以連接散熱風扇之外露排線,減少纏線及配線 之困擾。該微型散熱風扇130係具有複數個葉片131,並以® 一微型馬達132驅動該些葉片131旋轉。較佳地,該微型散 熱風扇130内更設置有一熱敏開關133,當該基板11〇對應 在該覆晶晶片120下方的區域或其它容易積熱部位過熱 時’該熱敏開關133將導通使該微型馬達132作動,進行散 熱;相對地,當該基板1 1 〇對應在該覆晶晶片丨2 〇下方的區 域或其它容易積熱部位溫度降低至一預定值時,該熱敏開 關1 3 3將停止該微型馬達1 3 2之作動,達到省電之效果。除 了此一具體型態之微型散熱風扇130之外,其它習知任意 形狀或無動力之微型散熱風扇均可為本發明之微型散熱風 _ 扇130而設置在該基板110之第一表面ini。 請再參閱第2圖,該散熱片140係具有一内表面141以 及一外表面1 42,該散熱片1 40係同時遮蓋該覆晶晶片j 2〇 與該微型散熱風扇130,以使該微型散熱風扇13〇與該覆晶Conductive Film, ACF) is electrically connected to the substrate. An underfill 150' can typically be formed between the flip chip 120 and the substrate iio to avoid stress concentration. Please refer to FIG. 3 in particular. In the embodiment, the micro-cooling fan 130 is a surface-bonding type micro-cooling fan, and is bonded to a circuit layer of the substrate 11 by using a plurality of guiding ends 134. The micro heat dissipation fan 130 is electrically connected to the micro heat dissipation fan 13 by the substrate 110. Preferably, the micro heat dissipation fan 130 is electrically connected to the substrate through at least one of the substrates 110. A plurality of solder balls on the surface 112 are used in place of the conventional heat-dissipating fan to reduce the entanglement and wiring. The micro cooling fan 130 has a plurality of blades 131 and drives the blades 131 to rotate by a micro motor 132. Preferably, the thermal fan 130 is further provided with a thermal switch 133. When the substrate 11 〇 corresponds to a region under the flip chip 120 or other heat accumulating portion, the thermal switch 133 will be turned on. The micro motor 132 is actuated to dissipate heat; in contrast, when the temperature of the substrate 1 1 〇 corresponding to the area under the flip chip 或 2 或 or other heat accumulating portion is lowered to a predetermined value, the thermal switch 13 3 will stop the operation of the micro motor 1 3 2 to achieve the effect of power saving. In addition to the micro-heating fan 130 of this specific type, other conventional micro-dissipating fans of any shape or power can be disposed on the first surface ini of the substrate 110 for the micro-heating fan 130 of the present invention. Referring to FIG. 2 again, the heat sink 140 has an inner surface 141 and an outer surface 142. The heat sink 140 covers the flip chip j 2 〇 and the micro heat dissipation fan 130 to make the micro Cooling fan 13〇 and the flip chip

第10頁 1311360 五、發明說明(6) 晶片120 —同被内藏設置於該散熱片之該内表面hi與該基 板110之該第一表面111間之空間’受到保護並可以減少風 扇運轉發出之噪音,更具有降低總體封裝厚度之功效。通 常在結合該散熱片140與該基板110之後,在該散熱片i 4〇 之該内表面141與該基板11〇之背面122之間係形成有一具 有優良導熱效率之熱導介面物質160 (Thermal Interface Material,TIM),以使該覆晶晶片120之該背面熱122耦合 該散熱片140,該覆晶晶片1 20在運算時發出之熱量係能被 傳遞到該散熱片14 0。在本實施例中,該散熱片14 〇係形成 有在該内表面之複數個鰭片143,以利導熱。該些鰭片143 係可設置於該散熱片140内表面之周圍,以形成一容置該 覆晶晶片120之空間,並且藉由在該些鰭片143之間的氣體 流通槽道’或者是氣孔(vent hole)的設計,將可使在該 散熱片1 40與該基板11 〇間之空間係氣體連通至該散熱片 1 40外部’以利高溫氣體之快速排放。此外,可在該基板 110之該第二表面112設置有複數個銲球170或其它對外導 接元件,其中至少一銲球170係以電性連接至該微型散熱 風扇130為較佳。 本發明並不局限在基板上散熱片之型態與形狀,如本 發明揭示的第二具體實施例,請參閱第4圖,另一種覆晶 封裝構造200係主要包含一基板210、一覆晶晶片22 0、至 少一微型散熱風扇230以及一散熱片240,其中,該基板 210、該覆晶晶片220與該微型散熱風扇230係與第一具體 實施例之基板11 0、覆晶晶片1 2 0與微型散熱風扇1 3 0雷同Page 10 1311360 V. Description of the Invention (6) The wafer 120 is protected from the space between the inner surface hi of the heat sink and the first surface 111 of the substrate 110 and can reduce fan operation. The noise has the effect of reducing the overall package thickness. Generally, after the heat sink 140 and the substrate 110 are bonded, a thermal conductive interface material 160 having excellent thermal conductivity is formed between the inner surface 141 of the heat sink i 4 and the back surface 122 of the substrate 11 (Thermal) The interface material (TIM) is such that the back surface heat 122 of the flip chip 120 is coupled to the heat sink 140, and the heat generated by the flip chip 120 can be transferred to the heat sink 140. In this embodiment, the heat sink 14 is formed with a plurality of fins 143 on the inner surface for heat conduction. The fins 143 may be disposed around the inner surface of the heat sink 140 to form a space for accommodating the flip chip 120, and by a gas flow channel between the fins 143' or The vent hole is designed to allow gas in the space between the heat sink 140 and the substrate 11 to be externally connected to the heat sink 140 to facilitate rapid discharge of high temperature gas. In addition, a plurality of solder balls 170 or other external guiding elements may be disposed on the second surface 112 of the substrate 110. Preferably, at least one solder ball 170 is electrically connected to the micro heat dissipating fan 130. The present invention is not limited to the shape and shape of the heat sink on the substrate. For the second embodiment of the present invention, please refer to FIG. 4 , and another flip chip package structure 200 mainly includes a substrate 210 and a flip chip. The substrate 22, the at least one micro heat dissipation fan 230, and the heat sink 240, wherein the substrate 210, the flip chip 220 and the micro heat dissipation fan 230 are combined with the substrate 110 of the first embodiment, and the flip chip 12 0 is the same as the micro cooling fan 1 3 0

第11頁 1311360 五、發明說明(7)Page 11 1311360 V. Description of invention (7)

相似,在此不再贅述,該基板21 0係具有一第一表面211以 及一對應之第二表面212。較佳地,該基板210之該第一表 面211上係設置有一加強環213(stiffener ring),以加強 該基板21 0抗撓強度,以使得該基板21 0在封裝過程或使用 中不會產生翹曲。通常該加強環213係以一黏膠層214黏貼 至該基板21 0。該覆晶晶片2 2 0係以複數個凸塊2 21接合至 該基板210之該第一表面211,此外,該微型散熱風扇230 亦設置於該基板210之該第一表面211,並以鄰近該覆晶晶 片220等發熱源為較佳。在該覆晶晶片220與該基板210之 間可以形成有一底部填充膠150。在該散熱片240與該覆晶 晶片220之間可以形成有一熱導介面物質260。而該散熱片 240係具有一内表面241以及一外表面242,可利用另一黏 膠層243將該散熱片240設置於該加強環213上,使得該散 熱片24 0位於該基板210之該第一表面2U上並罩遮蓋該覆 晶晶片220與該微型散熱風扇23〇。此外,在該基板21〇之 該第二表面2 12上係可設置有複數個銲球270。Similarly, the substrate 20 0 has a first surface 211 and a corresponding second surface 212. Preferably, the first surface 211 of the substrate 210 is provided with a stiffener ring 213 to enhance the flexural strength of the substrate 210 so that the substrate 20 0 does not generate during the packaging process or use. Warping. Typically, the reinforcing ring 213 is adhered to the substrate 210 by an adhesive layer 214. The flip chip 250 is bonded to the first surface 211 of the substrate 210 by a plurality of bumps 2 21 , and the micro heat dissipation fan 230 is also disposed on the first surface 211 of the substrate 210 and adjacent thereto. A heat source such as the flip chip 220 is preferable. An underfill 150 may be formed between the flip chip 220 and the substrate 210. A thermally conductive interface material 260 may be formed between the heat sink 240 and the flip chip 220. The heat sink 240 has an inner surface 241 and an outer surface 242. The heat sink 240 is disposed on the reinforcing ring 213 by using another adhesive layer 243, so that the heat sink 240 is located on the substrate 210. The flip chip 220 and the micro cooling fan 23 are covered by the cover on the first surface 2U. Further, a plurality of solder balls 270 may be disposed on the second surface 2 12 of the substrate 21A.

因此,該覆晶晶片220與該微型散熱風扇23〇係設於在 該散熱片240之該内表面241與該基板21〇之該第一表面211 間之空間,達到良好之保護與隱蔽,並且可以解決習知覆 晶晶片封裝構造内部積熱問題。較佳地,該加強環213或 該散熱片240係可具有複數個氣孔215,以使在該散熱片 240與>該基板210間之空間氣體連通至該散熱片24〇外部, 以利南溫氣體之排出,達到良好之散熱效果。 本發明之保護範圍當視後附之申請專利範圍所界定者Therefore, the flip chip 220 and the micro heat dissipation fan 23 are disposed in a space between the inner surface 241 of the heat sink 240 and the first surface 211 of the substrate 21 to achieve good protection and concealment, and The problem of heat accumulation inside the conventional flip chip package structure can be solved. Preferably, the reinforcing ring 213 or the heat sink 240 may have a plurality of air holes 215 for gas communication between the heat sink 240 and the substrate 210 to the outside of the heat sink 24, to the south. The discharge of warm gas achieves a good heat dissipation effect. The scope of protection of the present invention is defined by the scope of the appended patent application.

第12頁 1311360 五、發明說明(8) 為準,任何熟知此項技藝者,在不脫離本發明之精神和範 圍内所作之任何變化與修改,均屬於本發明之保護範圍。 ΐϋϊ 第13頁 1311360 圖式簡單說明 【圖式簡單說明】 第1圖:習知覆晶封裴構造之截面示意圖; 第2圖:依據本發明之第一具體實施例,一種高散熱效能 覆晶封裝構造之戴面示意圖; 第3圖:依據本發明之第一具體實施例,該高散熱效能覆 晶封裝構造之微型散熱風扇之截面示意圖;及 第4圖:依據本發明之第二具體實施例,另一種高散熱效 能覆晶封裝構造之截面示意圖。 元件符號簡單說明 10 基板 30 散熱片 4〇 加強環 60 熱導介面物質 1〇〇覆晶封裝構造 110基板 120覆晶晶片 123凸塊 130微型散熱風扇 133熱敏開關 140散熱片 143鰭片 160熱導介面物質 2 〇 〇覆晶封裝構造 2 〇 覆晶晶片 黏膠層 41 黏膠層 70 銲球 111第一表面 121主動面 131葉片 134導接端 141内表面 150底部填充膠 1 7 0鲜球 21 凸塊 32 外表面 50 底部填充膠 11 2第二表面 122背面 132微型馬達 1 4 2外表面</ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Ϊ́ϋϊ page 13 1311360 Brief description of the drawing [Simplified description of the drawing] Fig. 1 is a schematic cross-sectional view of a conventional flip chip sealing structure; Fig. 2 is a high heat dissipation performance flip chip according to the first embodiment of the present invention Schematic diagram of the wearing structure of the package structure; FIG. 3 is a schematic cross-sectional view of the micro heat dissipation fan of the high heat dissipation performance flip chip package structure according to the first embodiment of the present invention; and FIG. 4: second embodiment according to the present invention For example, a schematic cross-sectional view of another high heat dissipation performance flip chip package structure. Brief description of component symbol 10 substrate 30 heat sink 4 〇 reinforcement ring 60 thermal interface material 1 〇〇 flip chip package structure 110 substrate 120 flip chip 123 bump 130 micro heat sink fan 133 thermal switch 140 heat sink 143 fin 160 heat Leading interface material 2 〇〇 flip chip package structure 2 〇 flip chip wafer adhesive layer 41 adhesive layer 70 solder ball 111 first surface 121 active surface 131 blade 134 guiding end 141 inner surface 150 bottom filling glue 1 7 0 fresh ball 21 Bump 32 Outer surface 50 Underfill rubber 11 2 Second surface 122 Back side 132 Micro motor 1 4 2 Outer surface

1311360 圖式簡單說明 210基板 21 3加強環 2 2 0覆晶晶片 230微型散熱風扇 240散熱片 243黏膠層 250底部填充膠 211第一表面 214黏膠層 221 凸塊 2 41 内表面 212第二表面 21 5 氣孔 2 4 2 外表面 260熱導介面物質270銲球1311360 Schematic description 210 substrate 21 3 reinforcement ring 2 2 0 flip chip 230 micro cooling fan 240 heat sink 243 adhesive layer 250 underfill 211 first surface 214 adhesive layer 221 bump 2 41 inner surface 212 second Surface 21 5 vent 2 4 2 outer surface 260 thermal interface material 270 solder balls

第15頁Page 15

Claims (1)

13113601311360 六、申請專利範圍 【申請專利範圍】 1、 一種覆晶封裝構造,包含: 面;-基板,其係具有—第—表面以及—對應之第二表 一覆晶晶片,其係接合至該基板之該第—表面 面;=少-微型散熱風扇,其係設置於該基板之該第—表 二ΐϊΐ,其係設置於該基板之該第―表面上並遮蓋 該覆晶晶片與該微型散熱風扇。 史盖 2、 如申請專利範圍第丨項所述之覆晶封裝構造,其 微型散熱風扇係包含有一熱敏開關。 、μ 3、 :申請專利範圍⑼制述之覆晶封裝構造,亥 微里散熱風扇係表面接合至該基板之一線路 二範圍第1項所述之覆晶封裝構造,其中該 散熱片係熱耦合該覆晶晶片之一背面。 二項所述之覆晶封襄構造,其中在 =散熱片與该覆晶晶片之間係形成有一熱導介面物質 (Thermal Interface Material) 〇 中請㈣範圍第i $所述之覆晶封裝構造,其另包 一加強環(Stiffener ring),其係連接該基板與該散 熱片。 =申凊專利範圍第1項所述之覆晶封裝構造,其中該 朝向該基板之一表面係形成有複數個錄片。 8、如申請專利範圍第7項所述之覆晶封裝構造,其中該Sixth, the scope of application for patents [Scope of application for patents] 1. A flip chip package structure comprising: a surface; a substrate having a first surface and a corresponding second surface flip chip, which is bonded to the substrate The first surface surface; the finite-micro heat dissipation fan is disposed on the first surface of the substrate, and is disposed on the first surface of the substrate and covers the flip chip and the micro heat dissipation fan. Sergei 2. The flip-chip package structure as described in the scope of claim 2, wherein the micro-cooling fan comprises a thermal switch. , μ 3, : the patented range (9) described in the flip chip package structure, the surface of the heat sink fan is bonded to the flip chip package structure of the first item of the second line of the substrate, wherein the heat sink is hot Coupling one of the back sides of the flip chip. The flip-chip sealing structure according to the above aspect, wherein a thermal interface material is formed between the heat sink and the flip chip, and the flip chip package structure according to the range (i) It also includes a stiffener ring that connects the substrate to the heat sink. The flip chip package structure of claim 1, wherein the plurality of recording sheets are formed on a surface of the substrate. 8. The flip chip package structure of claim 7, wherein the
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