TWI307259B - Manufacturing method of copper clad laminate for via on pad - Google Patents

Manufacturing method of copper clad laminate for via on pad Download PDF

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Publication number
TWI307259B
TWI307259B TW095134539A TW95134539A TWI307259B TW I307259 B TWI307259 B TW I307259B TW 095134539 A TW095134539 A TW 095134539A TW 95134539 A TW95134539 A TW 95134539A TW I307259 B TWI307259 B TW I307259B
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TW
Taiwan
Prior art keywords
layer
copper
copper foil
protective layer
substrate
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TW095134539A
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Chinese (zh)
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TW200816896A (en
Inventor
Jong Jin Lee
Young Hwan Shin
Jae Min Choi
Chang Yul Oh
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Samsung Electro Mech
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Publication of TW200816896A publication Critical patent/TW200816896A/en
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Publication of TWI307259B publication Critical patent/TWI307259B/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

1307259 九、發明說明: 【發明所屬之技術領域】 方法m於一種用於谭墊上盲孔之銅嶋的製造 法,盆允適用於焊墊上盲孔之銅落基板的製造方 / /、允口午了銅兔基板之制、iL甘+ '十 銅猪層上。 1板〜其中-盲孔係形成於-超薄1307259 IX. Description of the invention: [Technical field to which the invention pertains] The method m is a manufacturing method for a copper crucible for a blind hole on a tan pad, and the pot is allowed to be applied to a copper drop substrate of a blind hole on a solder pad. In the afternoon, the system of copper rabbit substrate, iL Gan + 'ten copper pig layer. 1 plate ~ where - blind hole system is formed in - ultra-thin

10 15 【先前技術】 =子產業的數位化與網路化,印刷電路板(p⑶ 發展中。隨著各公司對於高頻帶與高速信號 度規格㈣求,使得超薄金屬㈣微電路的新進階 技術的设計是有需要的。制_ &、, 厚产均W Μ㈣^線寬與層間 子mwoG _。然而近來的電路線寬與層間厚度均降 低到等於或小於_障的厚度,進而相關產業進入奈米時 弋尤-夕種新科技如微盲孔與增層技術受到很大的注 目’,時用以達成高積集度與超薄封裝基板及機動終端基 板的高附加價值技術也受到注目。 對雙面PCB而言,用以形成通孔之一電鑛導通孔技術 、(PTH)以及接著進行無電極電鑛與f解質銅電鑛於上述 通孔之技術已被使用。,然而’近來隨著封裝的尺寸逐漸縮 小’在每-PCB上的有限空間内要裝設的晶片妻文目急速增 加。亦即,一球柵陣列(BGA)型雙面pCB ,在每一pc = 的有限空間内需要較大數目的焊球數才能夠裝設晶片。為 了達成此項要求,焊球的尺寸以及在焊球間的距離係逐漸 20 1307259 縮小。亦即’焊球間距變小了。為了實施此等細微的焊球 間距,使用焊墊上盲孔(V〇P)技術取代鍍通孔技術已越 來越常見。利用鍍通孔技術所形成的盲孔的功能,僅係實 現層間連接’而利用V〇p技術所形成的盲孔則可提供一焊 球墊供裝設焊球,同時又能提供層間連接。因此,V〇p技 術的優點在於可以大幅縮小焊球間距。 請參見至圖1A至1F,以下係詳述一種供V0p應用的製 造銅箔基板的習知方法。 10 15 百先,一銅箔基板4係由安排銅箔層2與2,於—絕緣層工 之兩側排列而成,如圖1A所示,並將各元件組合成薄板而 形成’如圖1B所示。 匕例中 保濩層3或3 ’係形成於每一銅箔層2戍2, 之上’保護層係在運送或層化繼用以保護銅㈣或2, 的表面。 此外,每-銅箱層2與2,的形成係使得其厚度大於ι〇 μηι,因為在後續雷射製程中會產生熱量。 、 w之後,如圖⑴所示,形成於銅羯層2或2,之上的保错# 3或3 ’係被移除。 ’、口又台 f者如圖⑴所示,上鋼荡層2的部分係利用蝕刻等方 式而被移除,進而將絕緣層㈤一部份外露。 J寻方 之後如圖1E所示,絕緣以的外露部分係 而私除,進而形成一盲孔5,盲孔 田射-釭 2,。 幻下較低的銅箔層 最後’如圖1F所示,用以提供導電性的電_形成 20 1307259 於目孔5之内’進而形成一用於VOP之銅箔基板。 、上述的先前技術中用於V0P之銅箔基板的問題在於, 為了避免銅箔層2,在雷射製程(雷射製程係用以形成盲孔 5)中被所產生的熱量所傷害,銅箔層2與2,的厚度必須維 持在一特定厚度之上。 、、10 15 [Prior Art] = Digitalization and networking of sub-industries, printed circuit boards (p(3) are under development. With the high-band and high-speed signal specifications (4), companies are making new advances in ultra-thin metal (four) microcircuits. The design of the step technology is necessary. The system _ &,, the thick product is W Μ (four) ^ line width and interlayer mwoG _. However, the recent circuit line width and interlayer thickness are reduced to equal to or less than the thickness of the barrier, In addition, when the related industries enter the nanometer, Chiyou-Xi's new technologies such as micro-blind hole and layer-adding technology have attracted great attention, which is used to achieve high added value of high-accumulation and ultra-thin package substrates and mobile terminal substrates. The technology is also attracting attention. For double-sided PCBs, the technique of forming a via hole electro-porous via technology, (PTH) and then performing electrodeless electrominening and f-solvent copper electro- ore in the above-mentioned through-hole has been Use. However, 'the size of the package has been gradually reduced recently'. The number of wafers to be installed in the limited space on each PCB has increased rapidly. That is, a ball grid array (BGA) type double-sided pCB A larger number is required in each limited space of pc = In order to achieve this requirement, the size of the solder balls and the distance between the solder balls are gradually reduced by 20 1307259. That is, the solder ball pitch is reduced. In order to implement such fine soldering. Ball spacing, using the blind hole (V〇P) technology on the pad instead of plated through hole technology has become more and more common. The function of the blind hole formed by the plated through hole technology is only to realize the interlayer connection' and use V〇p technology. The formed blind vias provide a solder ball pad for solder balls while providing interlayer connections. Therefore, the V〇p technology has the advantage of greatly reducing the solder ball pitch. See Figures 1A through 1F below. DETAILED DESCRIPTION OF THE INVENTION A conventional method for manufacturing a copper foil substrate for V0p application is described. 10 15 a first copper foil substrate 4 is arranged by arranging copper foil layers 2 and 2 on both sides of the insulating layer, such as 1A, and the components are combined into a thin plate to form 'as shown in FIG. 1B. In the example, the protective layer 3 or 3' is formed on each copper foil layer 2戍2, and the 'protective layer is attached to Transport or stratification is used to protect the surface of copper (4) or 2. In addition, each - copper box layer 2 Forming with 2, the thickness is greater than ι〇μηι, because heat is generated in the subsequent laser process. After w, as shown in Figure (1), formed on the copper layer 2 or 2, above the fault # 3 or 3 ' is removed. ', and the mouth is also shown as shown in Figure (1). The part of the upper steel layer 2 is removed by etching or the like, and the insulating layer (5) is partially exposed. After the locating, as shown in Fig. 1E, the exposed portion of the insulation is privately separated, thereby forming a blind hole 5, blind hole field-釭2, phantom lower copper foil layer finally 'as shown in Fig. 1F The electric-providing electrode 20 is formed in the mesh hole 5 to form a copper foil substrate for VOP. The above-mentioned prior art copper foil substrate for VOP has a problem in that copper is avoided. The foil layer 2 is damaged by the heat generated in the laser process (the laser process is used to form the blind holes 5), and the thickness of the copper foil layers 2 and 2 must be maintained above a certain thickness. ,

10 1510 15

20 _圖2係為一用於VOP之銅箔基板的剖面圊,其係利用先 =技術中絲製造—VQp^mi基板的技術所形成,而銅 >白層2與2,的厚度分別等於或少於5微米。參照到此圖示, 將詳細討論上述的問題。 外士圖2所示,其中為了形成一細微的電路圖案,每一銅 ’白層2142的厚度係少於5微米,並進行雷射製程,由一雷 射束所產生的熱量並不能充分散失,因此 且一針孔轉係、生成於下㈣層2,之中。 #、因此,由於每—銅箱層2與2,的厚度必須大於-特定厚 =防止上述問題發生,因此產生了很難製造—種用於 p 能利用習知製造術mi基板的方 法貝轭細微的電路等問題。 L毅、明内容】 P明:此’本發明係用以解決上述習知技術之問題,且本 iir㈣❹以提供—種製造-術㈣基板的方 施。η形成目孔於一鋼箔層上,使得細微電路能夠實 為了達成上述目的,本發明係提供一種用以製造一銅 7 13〇7259 洎基扳 …' 阡蛩内百孔,包括 下列步驟:(A)提供-第一銅箱層與一第二銅箱層,每— 該二銅fl層之-表面上係形成-保護層;(B) ^放置二 組第-銅猪層、-絕緣層與一第二銅箱層於—黏附層之: 與之下;(C)移除該保護層,該保護層係分別形成ς唁第 二銅箔層’及部分第二銅ϋ層之上;(D雷射製程而20 _ Fig. 2 is a cross-section 圊 of a copper foil substrate for VOP, which is formed by a technique of manufacturing a VQp^mi substrate by a prior art, and the thickness of the copper > white layers 2 and 2, respectively Equal to or less than 5 microns. Referring to this illustration, the above problems will be discussed in detail. Figure 2 shows that in order to form a fine circuit pattern, each copper 'white layer 2142 has a thickness of less than 5 microns and is subjected to a laser process. The heat generated by a laser beam cannot be sufficiently lost. Therefore, a pinhole is transferred and formed in the lower (four) layer 2, among them. #, Therefore, since the thickness of each of the copper box layers 2 and 2 must be greater than - specific thickness = to prevent the above problems from occurring, it is difficult to manufacture - a method for p capable of utilizing a conventional manufacturing process mi substrate Subtle circuit and other issues. L Yi, Ming content] P Ming: This invention is used to solve the above problems of the prior art, and this iir (four) ❹ to provide a manufacturing - surgery (four) substrate. η forms a mesh hole on a steel foil layer, so that the micro circuit can achieve the above purpose. The present invention provides a copper 7 13 〇 7259 洎 扳 ' ' ' ' ' ' , , , , , , , , , , , , , , , , , , , , , , , , , (A) providing - a first copper box layer and a second copper box layer, each - the two copper fl layers - forming a protective layer on the surface; (B) ^ placing two sets of - copper layer, - insulation a layer and a second copper box layer on the - adhesion layer: and below; (C) removing the protective layer, the protective layer is formed on the second copper foil layer and a portion of the second copper layer (D laser process

移除該絕緣層之部分以形成盲孔,該些盲孔係穿透該些第 二銅箱層先前被移除之部分;以及⑻藉由移除該保護層 而形成二銅箔基板,該些保護層係分別形成於一銅箔層之 —表面上以及一剩餘第一銅箔層之一表面上,以及該黏附 層之上。 l〇 在此方法中,保護層可為一金屬層。 在此方法中,每一第一銅箔層與每一第二銅箔層的厚 度係等於或小於5微米。 15 20 在此方法中’黏附層可由具有高導熱性的材料所構成。 在此方法中’步驟(C)中的每一第二銅箱層可利用一蝕 刻製程而移除。 此方法可在步驟(E )之後更包括步驟(F)而分別在銅 '冶基板上形成電鑛層。 此方法可在步驟(E)之後更包括步驟(G)而以導電膏充 填該盲孔。 【實施方式】 接著請參見圖示’需要注意的是,在各圖中所使用的 8 1307259 相同標號,係指稱相同或類似的元件。 圖3係為—流程圖’㈣本發明用以製造VQP銅箱基板Removing a portion of the insulating layer to form a blind via that penetrates a portion of the second copper box layer that was previously removed; and (8) forming a copper foil substrate by removing the protective layer, The protective layers are respectively formed on the surface of a copper foil layer and on the surface of one of the remaining first copper foil layers, and on the adhesion layer. L〇 In this method, the protective layer can be a metal layer. In this method, each of the first copper foil layers and each of the second copper foil layers has a thickness of 5 μm or less. 15 20 In this method, the adhesive layer may be composed of a material having high thermal conductivity. In this method, each of the second copper tank layers in step (C) can be removed using an etching process. The method may further comprise the step (F) after the step (E) to form an electric ore layer on the copper substrate. This method may further include the step (G) after the step (E) to fill the blind via with a conductive paste. [Embodiment] Referring now to the drawings, it is to be noted that the same reference numerals are used to refer to the same or similar elements. Figure 3 is a flow chart. (IV) The present invention is used to manufacture a VQP copper box substrate.

奶!^ ’圖4八至41係為製程圖’纷示本發明用以製造VOP 銅洎基板的方法。 首先請參照圖3,本發明V0P銅落基板係如下所述。 在y U100之中,係提供一第—銅謂層與一第二銅箱 曰,二銅箱層之表面上則形成有保護層。 由於在搬運或儲存過程中,第—銅箱層與第二銅箱層 10 15 =面有可能受到損傷,因此第一與第二銅㈣的一表面 5別會形成有保護層。 此—保護層較佳係為金屬層,其係由如銅、錄或銘所 稱成。 因此’二組由第-銅荡層、-絕緣層與一第二㈣層 >成之結構’係在步驟s之中,分別置於 上與之下。 第-2例中H形成於第—與第二層之表面上的 納、弟—保4層’其排列方式係使得此二保護層不會接 觸到絕緣層’且其各元件係層化在一起。 半熟化的預浸材(prepreg)可以用作為黏附層。尤其, 勺h況係使用具有高導熱性的材料作為黏附層。 2 ’在步驟S300中’分別形成於第二銅箱層上的保 叹“被移除,同時第二銅箔層的部分也被移除。 在步驟S400中係使用雷射製程,將被移除之第 白層部分的絕緣層移除,以形成盲孔(via)。 20 1307259Milk!^' Fig. 4-8 to 41 are process diagrams'. The method of the present invention for manufacturing a VOP copper matte substrate. First, referring to Fig. 3, the VOP copper drop substrate of the present invention is as follows. In y U100, a first copper layer and a second copper box are provided, and a protective layer is formed on the surface of the copper layer. Since the first copper case layer and the second copper case layer 10 15 = face may be damaged during handling or storage, a surface 5 of the first and second copper (four) may be formed with a protective layer. Preferably, the protective layer is a metal layer which is referred to as copper, recorded or inscribed. Therefore, the two groups consist of a -copper layer, an insulating layer and a second (four) layer > structure in the step s, respectively placed above and below. In the second example, H is formed on the surface of the first and second layers, and the arrangement is such that the two protective layers do not contact the insulating layer and the elements thereof are layered. together. A semi-precured prepreg can be used as the adhesion layer. In particular, the scoop condition uses a material having high thermal conductivity as an adhesion layer. 2 'The sighs formed on the second copper box layer respectively in step S300 are removed while the portion of the second copper foil layer is also removed. In step S400, the laser process is used and will be moved. The insulating layer of the first white layer portion is removed to form a via. 20 1307259

Bp ) ΐΠΓ ρ ί rf 1 m j八 M利用蝕刻而將保護層已被移除的第二銅箔 層卩刀私除,亚利用雷射製程將第二銅箔層已被移除的區 域移除並貫穿,㈣成盲孔。 斤在此例中,雷射製程中所產生的熱量可以輕易地傳導 ,第一銅箔層之—面上所形成之保護層而散失,盲孔可以 n由僅移除絕緣層而不傷及第—銅箱層的情況下形成,即 使第—銅箔層的厚度不及5微米。 10 15 卜之後,在步驟S500中,二銅箔基板係藉由移除保護層 與黏附層而形成’保護層係分別形成於第一銅箱層之一表 面上與另一銅箔層之一表面上。 ^亦# ’藉著移除保護I (保護層係分別形成於第一銅 泊層之-表面上與另一銅箔層之_表面上)與黏附層,則 可提銅箱基板,每一銅箔基板上則分別形成有一盲孔。 /後纟/ ^ S6〇〇中’係在銅箱基板上形成電鑛層而 形成銅箔基板。 亦即’為了在盲孔中提供導電性’電鍍層可形成於銅 ::基板上。在此例中’根據此實施例,可以在盲孔中填入 導電貪而提供導電性。 以下將詳述本發明用以製造VOP銅 請參照圖4A至41 20 箔層板之方法。 十 ,"白增i〇〇m —第二 :護層130’第一銅辖層100的-表面係形成有-第一保護 二。’…保護層130的-表面則形成有第二銅猪層 10 1307259 由衣在運达或儲存時,第一銅落層_與第 二銅此分別在第-銅咖。與第 a的表上’形成第-保護層110與第一仵嗜声 130’以保護此二銅荡屌n Μ 。弟一保濩層 5 10 15 盥第_ 日 务明之第一保護層U 0 :=職有在雷射製程中增進熱量散失的功能。 全厂,弟—保護層110與第二保護層"。較佳係為 &屬層,其厚度係介於 徊^ 倣木至35媛未之間,並且係由如 銅錄、或銘等金屬所構成。此外Α^ ^ 笙 ΛΠ ^ „ 此外為了在一連績製程中將 弟一銅泪層100及第二銅箱層120 與第二銅箱層12。,第—保〜110;::於"_〇〇 、, ’、口又g ηο可形成於第一銅箔層100 „ 、並在二者之間插設有分隔材料(未示),且 弟二保護層130可形成於坌_如Α昆 一 成於弟—銅洎層120之一表面上、並在 一者之間插設有分隔材料(未示)。 斤一在本例中,為了實現—係為電路圖案,較佳地’每- 層⑽與第二銅箱層12。係由一厚度等於或小於5 铽水之銅箔所形成。 =藉由在—黏附層150之上與之下分別安排二組 二二弟—㈣層1⑽、絕緣層140與-第二銅箱層120, 4n 層板16G’如圖4C所示,並將各元件層板化,如圖 4D所示。 说一在,例#,分別形成於第-銅箱層1GG之-表面上以及 、5备s 120之—表面上的第一保護層與第二保護層 13G’其安排方式必須使得上述二者不會接觸到絕緣層 140,之後才將各元件層板化。 20 1307259 半熟化之預浸材可用做為黏附層i5〇。詳細地說,較佳 』附層15G係由具有高導熱性的黏附材料所構成。 在黏附層15G僅有—側具有第—銅落層⑽、絕緣層 ^二㈣層12㈣實财,其缺點在於,此層版可能會彎 /折斷$ 了避免上述的缺點,係藉由在黏附層15〇之上 =下分別设置一組第-銅箔層100、、絕緣層140以及第二 銅落層’而形成具有對稱結構的層板160。 之後’如圖4E所示’第二保護層130 (其係形成於第二 ^層120之—表面上,並係置於層板160之最外侧)係被 一由於分隔材料係施加於一對第二保護層13〇與一第二 :备層120之間,因此第二保護層13〇可輕易地利用物理方 式而移除。 之後,如圖4F所示,每一第二銅箔層12〇的部分係被移 八亦即,第二銅箔層12〇之中對應至將形成一盲孔的部 刀立係利用蝕刻等技術而移除,進而外露出每一絕緣層14〇 :Ρ刀。舉例而言,此蝕刻製程係包括使用光敏感材料形 光阻圖案,利用氣化鐵、二氣化銅、以及 20 液與一含护醅钻右丨、产 J ^ 3 ‘敲蝕刻液而移除一銅箔,接著將一蝕刻光阻剝 之後’如圖4G所示’係利用雷射製程而形成一盲孔 〇此盲孔係穿透第二銅箔層120已被移除的部分。 目孔170 (其中每一絕緣層14〇的部分已被移除)係利 12 1307259 2 —二氧化碳(叫雷射而穿透每—絕緣層14q Ή些區域中第二銅羯層12〇已經被移除且外露。刀-此一氧化碳雷射具有高能量因為在一二 二—了一特定紅外綠,且其效氧二二子的 在::中,由於二氧化碳雷射製程所產生的熱 ^經由弟—保護層11〇(其係形成於每—第-铜 =。广因此盲孔可在厚度等於或小於5微米的第曰-銅Bp ) ΐΠΓ ρ ί rf 1 mj 八 M etched the second copper foil layer with the protective layer removed by etching, and the region where the second copper foil layer has been removed is removed by a laser process And through, (four) into a blind hole. In this example, the heat generated in the laser process can be easily conducted, and the protective layer formed on the surface of the first copper foil layer is lost, and the blind hole can be removed by only removing the insulating layer. In the case of the first copper box layer, even if the thickness of the first copper foil layer is less than 5 micrometers. After the step S500, in the step S500, the two copper foil substrates are formed by removing the protective layer and the adhesion layer, and the 'protective layer is formed on one surface of the first copper box layer and one of the other copper foil layers respectively. On the surface. ^也# 'By removing the protective I (the protective layer is formed on the surface of the first copper plating layer and the surface of the other copper foil layer respectively) and the adhesion layer, the copper box substrate can be lifted, each A blind hole is formed on the copper foil substrate. / After 纟 / ^ S6 〇〇 Medium' forms an electric ore layer on the copper box substrate to form a copper foil substrate. That is, 'to provide conductivity in the blind vias' plating layer can be formed on the copper :: substrate. In this case, according to this embodiment, the conductive holes can be filled in the blind holes to provide electrical conductivity. The method of the present invention for manufacturing VOP copper will be described in detail below with reference to Figs. 4A to 41 20 foil laminate. X. "White Plus i〇〇m - Second: The protective layer 130' is formed by the first surface of the first copper layer 100. The surface of the protective layer 130 is formed with a second copper pig layer. 10 1307259 When the clothes are shipped or stored, the first copper falling layer _ and the second copper are respectively in the first copper coffee. The first protective layer 110 and the first first softening 130' are formed on the table a of the first to protect the two copper waves n Μ . Brother's first layer of protection 5 10 15 盥 _ _ The first protective layer U 0 : = has the function of promoting heat loss in the laser process. The whole factory, brother - protective layer 110 and the second protective layer ". Preferably, it is a & genus layer, the thickness of which is between 徊^ imitation wood and 35 Yuan, and is composed of metal such as bronze or ming. In addition, Α^ ^ 笙ΛΠ ^ „ In addition, in order to process the brothers a tear layer 100 and the second copper box layer 120 and the second copper box layer 12 in a succession process, the first -1 to 110;:: in "_ 〇〇,, ', mouth and g ηο may be formed on the first copper foil layer 100 „ with a separator material (not shown) interposed therebetween, and the second protective layer 130 may be formed on the 坌_如Α On the surface of one of the copper enamel layers 120, a layer of separator material (not shown) is interposed between the two. In this example, in order to achieve - a circuit pattern, preferably 'per-layer (10) and second copper box layer 12. It is formed of a copper foil having a thickness equal to or less than 5 铽 water. = by arranging two sets of two-two brothers - (four) layer 1 (10), insulating layer 140 and - second copper box layer 120, 4n layer 16G' above and below the adhesion layer 150, as shown in Fig. 4C, and Each component is layered as shown in Figure 4D. The first protective layer and the second protective layer 13G' respectively formed on the surface of the first copper case layer 1GG and the surface of the second protective layer 13G must be arranged such that the above two The insulating layer 140 is not touched, and then the components are layered. 20 1307259 Semi-cured prepreg can be used as adhesion layer i5〇. In detail, the preferred "attachment layer 15G" is composed of an adhesive material having high thermal conductivity. On the only side of the adhesive layer 15G, there are a first copper-thick layer (10) and an insulating layer two (four) layer 12 (four). The disadvantage is that the layer may be bent/broken to avoid the above disadvantages by adhering A layer of the first copper foil layer 100, the insulating layer 140, and the second copper falling layer ' are respectively disposed above the layer 15 = = lower to form a layer 160 having a symmetrical structure. Then 'as shown in FIG. 4E', the second protective layer 130 (which is formed on the surface of the second layer 120 and placed on the outermost side of the layer 160) is applied to the pair by a spacer material system. The second protective layer 13 is separated from the second: the backup layer 120, so that the second protective layer 13 can be easily removed by physical means. Thereafter, as shown in FIG. 4F, the portion of each of the second copper foil layers 12 is shifted, that is, the portion of the second copper foil layer 12 corresponding to the portion of the blade that will form a blind hole is etched or the like. The technology is removed, thereby exposing each of the insulating layers 14: a file. For example, the etching process includes using a light-sensitive material-shaped photoresist pattern, using gasified iron, two-copper copper, and 20 liquid and a ruthenium-containing right-handed, J ^ 3 'knocking etching solution. In addition to a copper foil, an etched photoresist is then stripped and 'as shown in FIG. 4G' is formed by a laser process to form a blind via which penetrates the portion of the second copper foil layer 120 that has been removed. Eye hole 170 (where the portion of each insulating layer 14 has been removed) is 12 12307259 2 - carbon dioxide (called laser penetrates each of the insulating layer 14q) and the second copper layer 12 of the region has been Removed and exposed. Knife - This carbon monoxide laser has high energy because it is a specific infrared green, and its oxygen is two: in the::, due to the heat generated by the carbon dioxide laser process ^ via the brother - The protective layer 11 〇 (which is formed in each - the first copper = wide. Therefore, the blind hole can be in the thickness of the third or the thickness of the second - copper

泊層100之上形成。 不31J 10 15 20 亦即’在先前技術的製造方法中,即便可控制晴 :所產生的熱量僅穿過絕緣層140而不穿過第一銅箔声 ⑽,第-㈣層⑽仍然很容易受到熱量的影響,^ K於5微米的第一銅嶋生如微孔等缺陷。然而,根: 本电明之-貫施例,由於厚度介於呢叫敬米的第—保護 層係形成於每一第一銅箱層1〇〇之上,在雷射製程中所產生 的熱量可以輕易地散失,因此可形成盲孔! 第一銅箔層100。 甸。 之後,如圖4H所示’係藉由移除第一保護層11〇盘黏 附層15〇(第—保護層110係分別形成於-第-銅箱層⑽之 一侧與另—第—㈣層1⑼的—側之上),而形成二銅箱基 板 1 8 0 〇 由於:隔犲料係插設於第-保護層110與第一銅箔層 100之η間,乐-保護層11〇與黏附層15〇可以輕易地被移除。 取後’如圖41所示,藉由在每-銅箔基板180之上形成 -電鍍層190,而形成每—ν〇ρ鋼隸板。 13 1307259 ^ 係用以%連接電路圖案,電路圖案係分別形成 於第銅名層100與第二銅箱層12〇之上。藉由在f孔之 上形成電鍍層190,則可以提供導電性。 在本例中,由於盲孔17〇的形成係穿透絕緣層丨4〇,因 此電鍍層19〇可利用銅化學鍍或銅電鍍而形成。 根據此只;例,係藉由以導電膏(未示)填充此盲孔 17 0而提供導電性。Formed above the berth layer 100. No. 31J 10 15 20 That is, in the prior art manufacturing method, even if the controllable heat is generated: the generated heat passes only through the insulating layer 140 without passing through the first copper foil sound (10), the -(four) layer (10) is still easy. Affected by heat, the first copper of 5 micrometers is defective such as micropores. However, the root: the embodiment of the present invention, because the thickness of the first layer - called the protective layer is formed on each of the first copper box layer 1 ,, the heat generated in the laser process It can be easily lost, so blind holes can be formed! The first copper foil layer 100. Dean. Thereafter, as shown in FIG. 4H, 'by removing the first protective layer 11 from the disk adhesion layer 15 〇 (the first protective layer 110 is formed on one side of the -th copper box layer (10) and the other - (four) The layer 2 (9) is formed on the side of the layer 1 (9) to form a two-copper case substrate 1 800 because the barrier material is interposed between the first protective layer 110 and the first copper foil layer 100, and the Le-protective layer 11〇 The adhesive layer 15 can be easily removed. After the removal, as shown in Fig. 41, each of the -v〇ρ steel plates is formed by forming a plating layer 190 on each of the copper foil substrates 180. 13 1307259 ^ is used to connect the circuit patterns to %, and the circuit patterns are respectively formed on the copper name layer 100 and the second copper box layer 12A. Conductivity can be provided by forming the plating layer 190 on the f-hole. In this example, since the formation of the blind via 17 turns through the insulating layer 4, the plating layer 19 can be formed by copper electroless plating or copper plating. According to this, the conductivity is provided by filling the blind hole 17 0 with a conductive paste (not shown).

10 15 20 使用本發明實施例中用以製造- V Ο P銅箱基板的方法 中—在銅v白層上形成盲孔17〇時用卩協助散熱的散熱層,並 非藉由使用獨立的加強材料或H程㈣成,而是利 用保。蒦層11G與13G (與第—銅箱層i⑽及第二銅笛層12〇形 成在起)做為散熱層’因而形成銅结基板而不需要使用 頭外的製私與額外的成本’並在銅羯基板中形成盲孔。 、如上所述,根據本發明用以製造一 V0P銅箔基板的方 f ’用以在雷射製程中散熱的散熱層並非獨立地製造,而 疋利用舁第—及第二銅箔層一起形成的保護層做為散熱 層因此可以不需要額外的製程與成本即可製造銅箔美 板,並在銅落基板中形成盲孔。 土 此外’根據本發明用以製造VOP銅箱基板的方法,如 微孔等缺陷並不會在—銅落層上形成f孔時發生,因此可 以製造用以形成細微電路圖案之VOP銅箔基板。 上述實施例僅係為了方便說明而舉例而已,本發明所 主張之權利範圍自應以中請專利範圍所述為準,而非僅限 於上述實施例。 义 14 1307259 【圖式簡單說明】 ㈣先前技術中用以製造—v〇p㈣基板之方法。 圖2係一卿㈣基板的剖面圖,其_10 15 20 In the method for manufacturing a -V Ο P copper box substrate in the embodiment of the invention - the heat dissipation layer for assisting heat dissipation when forming the blind hole 17 铜 on the copper v white layer is not by using independent reinforcement Material or H (4) into, but use insurance. The germanium layers 11G and 13G (formed with the first copper box layer i (10) and the second copper flute layer 12) serve as a heat dissipating layer' thus forming a copper clad substrate without the need for extra-head and extra cost. A blind hole is formed in the copper matte substrate. As described above, the heat dissipation layer for fabricating a VOP copper foil substrate according to the present invention for heat dissipation in a laser process is not independently manufactured, and the first and second copper foil layers are formed together. The protective layer acts as a heat dissipation layer so that the copper foil can be fabricated without additional processes and costs, and blind holes can be formed in the copper drop substrate. In addition, in the method for manufacturing a VOP copper box substrate according to the present invention, defects such as micropores do not occur when an n-hole is formed on the copper falling layer, so that a VOP copper foil substrate for forming a fine circuit pattern can be manufactured. . The above-described embodiments are merely examples for the convenience of the description, and the scope of the claims is intended to be limited to the above-mentioned embodiments. Yi 14 1307259 [Simple description of the diagram] (d) The method used in the prior art to manufacture a v〇p (four) substrate. Figure 2 is a cross-sectional view of a (four) substrate, which

鋼嶋之技術所製造,其中每-銅猪層的厚度I; 於或小於5微米。 圖3係本發明用以製造一 VOP銅箔基板的 流程圖。 圖4A至41係本發明用以製造一 v〇P銅箔基板之方法製程 圖0 10 【主要元件符號說明】 1 絕緣層 2, 2, 銅箔層 3, 3, 保護層 15 5 盲孑L 6 電鍍層 100 第一銅箔層 110 弟一保護層 120 第二銅箔層 20 130 第二保護層 140 絕緣層 150 黏附層 160 層板 170 盲孔 15 1307259 180 銅猪基板 電鍍層 190Manufactured by the steel shovel technique, wherein each copper layer has a thickness I; at or less than 5 microns. Figure 3 is a flow chart of the invention for fabricating a VOP copper foil substrate. 4A to 41 are diagrams of a method for manufacturing a v〇P copper foil substrate according to the present invention. FIG. 10 [Description of main components] 1 Insulation layer 2, 2, copper foil layer 3, 3, protective layer 15 5 blind 孑L 6 Electroplated layer 100 First copper foil layer 110 First protective layer 120 Second copper foil layer 20 130 Second protective layer 140 Insulating layer 150 Adhesive layer 160 Laminate 170 Blind hole 15 1307259 180 Copper pig substrate plating layer 190

Claims (1)

1307259 十、申請專利範圍: 1. 一種用於在銅箔基板中焊墊上盲孔(v〇p)之製造方 法,包括下列步驟: (A) 提供一第一銅箔層與一第二銅箔層,每一該二銅 箔層之一表面上係形成一保護層;1307259 X. Patent Application Range: 1. A manufacturing method for a blind hole (v〇p) on a solder pad in a copper foil substrate, comprising the following steps: (A) providing a first copper foil layer and a second copper foil a layer, a protective layer is formed on one surface of each of the two copper foil layers; 1010 20 (B) 分別放置二組第一銅箔層、一絕緣層與一第二銅 箔層於一黏附層之上與之下; (C) 移除該保護層,該保護層係分別形成於該第二銅 箔層之上,及部分第二銅箔層之上; (D) 利用田射製私而移除該絕緣層之部分以形成盲 ^忒-盲孔係穿透該些第二銅箱層先前被移除之部分; 以及 (E)藉由移除該保護層而形忐_ 紅地〜 办成—銅箔基板,該些保護 層係为別形成於一第一銅箔層之一 4F1炫思—± 表面上以及一剩餘第一 銅泊層之一表面上,以及該黏附層之上。 其中該保護層 2·如申請專利範圍第丨項所述之 係為一金屬層。 / 3.如申請專利範圍第丨項所述之 鋼箔層蛊备一坌-柄A ja 万去’其中每一第 β畀母一弟一銅泊層之厚度 ^ 度係痒於或小於5微米。 4·如申請專利範圍第i項所述 、 係由具有高導熱性之材料所構成。彳法’其中該黏附層 17 1307259 之每一第 5.如申請專利範圍第1項所述之方法, 鋼猪層之該部分係 其中步驟(C)中 6 .如申凊專利範圍第1項所述之古土 後包括·_ 貝螂这之方法,更在步驟(E)之 (F) 分別形成電鍍層於各銅箔基板之上。 10 7.如申請專利範圍第丨項所述 後包括: 乃忠灵在步驟(E)之 (G) 以一導電膏填充該些盲孔。 1820 (B) respectively placing two sets of first copper foil layers, an insulating layer and a second copper foil layer above and below an adhesion layer; (C) removing the protective layer, the protective layer is formed separately Above the second copper foil layer and over a portion of the second copper foil layer; (D) removing portions of the insulating layer by using field shots to form a blind hole-blind hole system penetrating the second portions a portion of the copper box layer that has been previously removed; and (E) forming a copper foil substrate by removing the protective layer, the protective layer is formed on a first copper foil layer One of the 4F1 sensation-± is on the surface and on the surface of one of the remaining first copper berth layers, and above the adhesion layer. Wherein the protective layer 2 is a metal layer as described in the scope of the patent application. / 3. As described in the scope of the patent application, the steel foil layer is prepared as a 坌-handle A ja Wan to 'the thickness of each of the β 畀 mother and the younger one copper berth layer ^ degree is itching or less than 5 Micron. 4. As described in item i of the patent application, it consists of a material with high thermal conductivity.彳法' wherein each of the adhesive layers 17 1307259 is as described in claim 1, the portion of the steel pig layer is in the step (C) of 6. In the claim 1 The ancient soil includes a method of _Bei, and a plating layer is formed on each copper foil substrate in step (E). 10 7. As described in the scope of the patent application, the following includes: Nai Zhongling in step (E) (G) Fill the blind holes with a conductive paste. 18
TW095134539A 2005-09-12 2006-09-19 Manufacturing method of copper clad laminate for via on pad TWI307259B (en)

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