TWI298140B - Ic card with non-contact and contact interface and manufacture method thereof - Google Patents

Ic card with non-contact and contact interface and manufacture method thereof Download PDF

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TWI298140B
TWI298140B TW94128961A TW94128961A TWI298140B TW I298140 B TWI298140 B TW I298140B TW 94128961 A TW94128961 A TW 94128961A TW 94128961 A TW94128961 A TW 94128961A TW I298140 B TWI298140 B TW I298140B
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hole
carrier
wafer
antenna
groove
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TW94128961A
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Chinese (zh)
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TW200709068A (en
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ying pu Chen
Liang Wei Lai
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Gd Teco
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1298140 九、發明說明: 【發明所屬之技術領域】 本發明係提供一種整合非接觸式感應功能和接觸式感 應功能之晶片卡及其製造方法,尤指一種利用一溝槽洩溢 由一天線銑洞所流出之導電接合物之整合非接觸式感應功 能和接觸式感應功能之晶片卡。 【先前技術】 隨著電子科技的進步,現代人的身上大多攜帶有多張 的電子卡片,如信用卡、金融卡、悠遊卡等,即為一般所 稱之塑膠貨幣,以取代現金之使用,然而基於安全性以及 功能整合性之考量,智慧卡之技術便應運而生。智慧卡是 一張嵌入微晶片(包括一顆微處理器與記憶體)的塑膠卡 片。如果以智慧卡與讀卡機的溝通方式來區分,智慧卡可 分為「接觸式」與「非接觸式」智慧卡,「接觸式」的智慧 卡是透過智慧卡表面的金屬接點與讀卡機内部的接點相互 接觸,以讀取或寫入資料;「非接觸式」智慧卡則是透過隱 藏在内部的天線以無線電波與讀卡機進行資料讀寫。而智 慧卡之所以優於磁卡,能被廣泛地應用於各種領域,主要 是智慧卡具有如下之優點:資料安全與身份識別、服務整 合、使用便利、防磁功能等。因此智慧卡不論是在資料保 密、服務整合,以及使用便利性等方面都優於塑膠磁卡。 5 1298140 而智慧卡的應用範圍從最早的電話智慧卡擴展到銀行金 融、醫療保險、交通運輸、人員管理、網路安全、網路交 易與娛樂等方面,未來更可望整合所有功能於一張智慧卡 上,相信一卡在手,使用無限的生活,應該即將來到。 請參閱第1圖與第2圖,第1圖為習知一晶片卡10之 外觀示意圖,第2圖為習知晶片卡10之立體分解圖。晶片 卡10包含有一載體12,其係由非導電材質所構成,例如 塑膠等材質,載體12成扁平之卡片狀,其上設有一淺凹空 間14,一凹槽16,一第一破孔18,以及一第二破孔20。 晶片卡10另包含有一天線22,被夾钳於載體12之中,晶 片卡10可透過隱藏在内部的天線22以無線電波與外部之 讀卡機進行資料讀寫,天線之兩端則分別設置於載體12之 第一破孔18以及第二破孔20下方。晶片卡10另包含有一 晶片24,其包含有一晶片電路板26,其上設有一金屬接觸 層28,以用來與一晶片讀取設備進行接觸式感應之資料讀 寫,晶片電路板26之下表面設有一第一接點P1以及一第 二接點P2,用來分別電連接於天線20之兩端,以及一晶 粒(die)30,封裝於晶片電路板26之下方。其中晶片24係 嵌設於淺凹空間14之中,而晶片24之晶粒30係嵌設於凹 槽16之中,此外,於第一破孔18與第二破孔20中會分別 注入導電接合物,如此一來便可分別導通天線22之兩端與 晶片電路板26之第一接點P1以及第二接點P2,而該導電 6 1298140 接合物係可為銀膠、彈性導電膠等材質。然而由於注入第 一破孔18與第二破孔20之導電接合物的劑量難以定量控 制,若注入導電接合物太少則無法有效地導通天線22與晶 片電路板26,若注入導電接合物太多則於具有背膠之晶片 24與載體12熱壓之過程中,會造成導電接合物洩溢出第 一破孔18或第二破孔20而流至晶片電路板26之上方,如 此一來便可能造成電路短路,而使得晶片卡10失效。因此 習知晶片卡10植入晶片24之結構設計會有導電接合物洩 溢而造成製作良率不佳之問題,且為了因應此問題於製作 過程中必須以人工判斷是否有導電接合物洩溢之情況發 生,如此一來便增加了人力支出,也造成了晶片卡10之製 作無法完全自動化之缺憾。 【發明内容】 本發明係提供一種利用一溝槽洩溢由一天線銑洞所流 出之導電接合物之整合非接觸式感應功能和接觸式感應功 能之晶片卡,以解決上述之問題。 本發明之申請專利範圍係揭露一種整合非接觸式感應 功能和接觸式感應功能之晶片卡,其包含有一載體,其上 係形成有一第一破孔,一凹槽,以及一第一溝槽,連接於 該第一破孔以及該凹槽。該晶片卡另包含有一天線,其一 端係設於該第一破孔之下方,以及一晶片,其包含有一晶 7 1298140 一, 2 ^有#一接‘點,用來電連接於該天線之 一私’以及-晶粒’封裝於該晶片電路板之下方、 係安裝於該載體之該凹槽中。 ,該晶粒 本發明之申請專利範圍係揭露一種 式感應功能和接觸式感應功能之晶片至二非接觸 包含有下列步驟:(a)於該載體之表㈣成_第=法’其 孔下方破壞—天線之絕緣層;⑷於該载:之^ 面上由該弟-破孔延伸形成1 载體之表 面形成-凹槽;⑷將-導電接合物注載體之表 (f)將該晶片結合於該載體之凹槽内。⑻破孔;以及 本發明之晶片卡與其製作方法 排出天線端和晶片電路_多餘提供一溝槽 便可避免導電接合物⑽出天線銳洞而流來 下方,造成電路短路錢得晶片卡失 ,路板之 有效提升晶片卡製作之良率。此外, Θ况發生,而可 人工判斷是否有導電接合物戌溢 恭,衣長中無須以 相關之人力支出,也可促成晶片卡製x目而可節省 表作之自動化。 【實施方式】 明…w圃興弟4圖,弟3圖為本發明一 之外觀示意圖,第4圖為本發明晶片本 日日卡f 片卡50之立體分解圖 1298140 晶片卡50包含有一載體52,其係由非導電材質所構成, 例如塑膠等材質,載體52成扁平之卡片狀,其上設有一淺 凹空間54,一凹槽56,一第一破孔58,一第二破孔60, 一第一溝槽62,以及一第二溝槽64。晶片卡50另包含有 一天線66,被夾鉗於載體52之中,晶片卡50可透過隱藏 在内部的天線66以無線電波與外部之晶片讀取設備進行 資料讀寫,天線之兩端則分別設置於載體52之第一破孔 58以及第二破孔60下方。晶片卡50另包含有一晶片68, 其係為一整合非接觸式感應功能和接觸式感應功能之處理 器晶片,晶片68包含有一晶片電路板70,其上設有一金 屬接觸層72,以用來與一晶片讀取設備進行接觸式感應之 資料讀寫,晶片電路板70之下表面設有一第一接點P1以 及一第二接點P2,用來分別電連接於天線66之兩端,以 及一晶粒(die)74,封裝於晶片電路板70之下方。其中晶片 68係嵌設於淺凹空間54之中,而晶片68之晶粒74係嵌 設於凹槽56之中,晶片68可藉由晶片電路板70以背膠黏 貼之方式黏貼於載體52之淺凹空間54的表面上。此外, 於第一破孔58與第二破孔60中會分別注入導電接合物, 如此一來便可分別導通天線66之兩端與晶片電路板70之 第一接點P1以及第二接點P2,而該導電接合物係可為銀 膠、彈性導電膠等材質。 而本發明之特點在於於載體52上形成第一溝槽62以 9 1298140 及第二溝槽64,其中第一溝槽62係連接於第一破孔58與 凹槽56,第二溝槽64係連接於第二破孔60與凹槽56,其 用意是在當注入第一破孔58或第二破孔60之導電接合物 的劑量太多時,於具有背膠之晶片68與載體52進行熱壓 之過程中,可將過多之導電接合物分別由第一破孔58或第 二破孔60洩溢至第一溝槽62或第二溝槽64,甚或經由第 一溝槽62或第二溝槽64洩溢至凹槽56,以避免導電接合 物洩溢至晶片電路板70,而造成電路短路,進而使得晶片 卡50失效。 請參閱第5圖,第5圖為本發明自動化植入晶片68至 載體52之流程圖,該方法係包含下列步驟: 步驟100 :開始。 步驟102 :檢查載體52之厚度與圖像位置。 步驟104 :利用銑刀將載體52銑出第一破孔58。 步驟106 :於第一破孔58下方利用電容感應原理下銑至破 壞天線66之一端之絕緣層。 步驟108 :由第一破孔58延伸銑出第一溝槽62。 步驟110 :將載體52銑出第二溝槽64。 步驟112 :由第二溝槽64延伸銑出第二破孔60。 步驟114 :將載體52銑出凹槽56。 步驟116 :將載體52銑出淺凹空間54。 1298140 步驟118 :利用空氣吸入流動方式(vacuum suction method) 清潔第一破孔58、第一溝槽62、凹槽56、第二 溝槽64、第二破孔60,以及淺凹空間54。 步驟120 :量測淺凹空間54之深度以及天線66之電阻是 否介於一預定範圍内,若是則執行步驟122,若 否則跳至步驟126。 步驟122 :將該導電接合物注入第一破孔58以及第二破孔 60 〇 步驟124 :植入上有背膠之晶片68,在適當壓力、溫度、 時間之條件下將晶片68與載體52熱壓成一體。 步驟126 :結束。 於此對上述步驟做一詳細說明,於自動化的過程中首 先先將晶片卡50之卡體自動投入,接著便自動檢查載體 52之厚度與圖像位置,若載體52之厚度介於預定範圍之 内且卡體所置入之方位正確時,則繼續進行銑晶片槽之動 作。而銑晶片槽之順序為第一破孔58、第一溝槽62、第二 溝槽64、第二破孔60、凹槽56,以及淺凹空間54,然銑 晶片槽之順序亦可不侷限於如上所述,端視製程規劃而 定。當使用銑刀進行第一破孔58與第二破孔60之銑槽動 作時,必需破壞天線66兩端之絕緣層,如此一來才能有效 地讓所注入之該導電接合物分別導通天線66與晶片電路 板70之第一接點P1以及第二接點P2,故可利用電容感應 11 1298140 原理下銑到天線66之銅線並破壞其絕緣層,但並不破壞到 銅線本身之導體。於銑晶片槽之程序過後,由於晶片槽内 會殘留卡體之碎屑,故可利用空氣吸入流動方式將第一破 孔58、第一溝槽62、凹槽56、第二溝槽64、第二破孔60, 以及淺凹空間54内之異物清潔乾淨再進行植入晶片68之 程序。而在進行植入晶片68之程序前,為了確保晶片卡 50之良率,必須先量測淺凹空間54之深度以及天線66之 電阻是否介於一預定範圍内,若是方能繼續進行植入晶片 68之程序;舉例來說,當量測到天線66之電阻過大時, 則代表於進行第一破孔58或第二破孔60之銑槽動作時, 天線66兩端之絕緣層並未被完全破壞,若繼續進行後續之 程序則有可能造成天線66接觸不良之情況發生;若是量測 到天線66之電阻過小時,則有可能為先前之程序造成天線 66短路,而使得天線66無法使用。接下來便可將該導電 接合物注入第一破孔58以及第二破孔60内,而該導電接 合物係可為銀膠、彈性導電膠等材質,最後便植入上有背 膠之晶片68至載體52上,其可於適當壓力、溫度、時間 之條件下將晶片68與載體52熱壓成一體,便完成整體自 動化植入晶片68至載體52之流程,而晶片卡50在完成之 後可進行自動電氣特性測試,以測試晶片卡50是否能正確 使用。 而於步驟124當晶片68與載體52熱壓成型時,若注 12 1298140 入第一破孔58或第二破孔60之導電接合物的劑量太多 時,過多之導電接合物可分別由第一破孔58或第二破孔 60 溢至苐一溝槽62或第二溝槽64,甚或經由第一溝槽 62或第二溝槽64洩溢至凹槽56 ,以避免導電接合物洩溢 至晶片電路板70 ,而造成電路短路,進而使得晶片卡5〇 失效。 相較於習知之晶片卡與其製作方法,本發明之特點在 於提供一溝槽排出天線端和晶片電路板間多餘之導電接合 物,如此一來便可避免導電接合物洩溢出天線銑洞而流至 晶片電路板,造成電路短路而使得晶片卡失效之情況發 生,而可有效地提升晶片卡製作之良率。且本發明由於改 善了會有導電接合物洩溢而造成製作良率不佳之問題,如 此一來於晶片卡之製作過程中便無須以人工判斷是否有導 電接合物洩溢之情況發生,因而可節省相關之人力支出, 也可改善晶片卡之製作無法完全自動化之缺憾。 以上所述僅為本發明之較佳實施例,凡依本發明申請 專利範圍所做之均等變化與修飾,皆應屬本發明專利之涵蓋範圍。 【圖式簡單說明】 第1圖為習知晶片卡之外觀示意圖。 第2圖為習知晶片卡之立體分解圖。 13 1298140 第3圖為本發明晶片卡之外觀示意圖。 第4圖為本發明晶片卡之立體分解圖。 第5圖為本發明自動化植入晶片至載體之流程圖。1298140 IX. Description of the Invention: [Technical Field] The present invention provides a wafer card and a method for manufacturing the same that integrates a non-contact sensing function and a contact sensing function, and more particularly, a method of milling by an antenna using a trench leakage A chip card that integrates a non-contact sensing function and a contact sensing function of a conductive joint that flows out of the hole. [Prior Art] With the advancement of electronic technology, most people in modern people carry a number of electronic cards, such as credit cards, financial cards, and leisure cards, which are commonly referred to as plastic money to replace the use of cash. Based on security and functional integration considerations, the technology of smart cards came into being. The smart card is a plastic card embedded in a microchip (including a microprocessor and memory). If the smart card is distinguished from the card reader, the smart card can be divided into a "contact" and a "non-contact" smart card. The "contact" smart card is a metal contact and read through the surface of the smart card. The contacts inside the card machine are in contact with each other to read or write data. The "non-contact" smart card reads and writes data from the card reader through radio waves hidden inside. The reason why the smart card is superior to the magnetic card can be widely used in various fields, mainly because the smart card has the following advantages: data security and identity recognition, service integration, convenient use, anti-magnetic function, and the like. Therefore, smart cards are superior to plastic magnetic cards in terms of data confidentiality, service integration, and ease of use. 5 1298140 The application range of smart cards extends from the earliest telephone smart cards to banking finance, medical insurance, transportation, personnel management, network security, online transactions and entertainment. In the future, it is expected to integrate all functions into one wisdom. On the card, I believe that a card is in hand, using unlimited life, it should be coming soon. Referring to Figures 1 and 2, FIG. 1 is a schematic view showing the appearance of a conventional wafer card 10, and FIG. 2 is an exploded perspective view of a conventional wafer card 10. The chip card 10 includes a carrier 12 which is made of a non-conductive material, such as a plastic material. The carrier 12 has a flat card shape, and is provided with a shallow recess 14 , a recess 16 and a first through hole 18 . And a second hole 20 . The chip card 10 further includes an antenna 22 which is clamped in the carrier 12. The chip card 10 can read and write data to and from the external card reader through the antenna 22 hidden inside, and the two ends of the antenna are respectively set. Below the first hole 18 and the second hole 20 of the carrier 12. The wafer card 10 further includes a wafer 24 including a wafer circuit board 26 having a metal contact layer 28 thereon for reading and sensing the contact sensing data with a wafer reading device, under the wafer circuit board 26. The surface is provided with a first contact P1 and a second contact P2 for electrically connecting to both ends of the antenna 20, and a die 30, which is packaged under the chip circuit board 26. The wafers 24 are embedded in the shallow recesses 14 , and the crystal grains 30 of the wafers 24 are embedded in the recesses 16 . Further, conductive holes are respectively injected into the first and second holes 18 and 20 . The conjugates can respectively turn on the two ends of the antenna 22 and the first contact P1 and the second contact P2 of the chip circuit board 26, and the conductive 6 1298140 conjugate can be silver glue, elastic conductive glue, etc. Material. However, since the dose of the conductive bonding material injected into the first hole 18 and the second hole 20 is difficult to quantitatively control, if the conductive bonding material is too small, the antenna 22 and the wafer circuit board 26 cannot be effectively turned on, and if the conductive bonding material is injected too In the process of hot pressing the wafer 24 with the backing and the carrier 12, the conductive joint may overflow the first hole 18 or the second hole 20 and flow to the upper side of the wafer circuit board 26, so that The circuit may be shorted and the wafer card 10 may be disabled. Therefore, the structure design of the wafer card 10 implanted into the wafer 24 has the problem that the conductive bonding material is leaked and the production yield is poor, and in order to cope with the problem, it is necessary to manually judge whether or not the conductive bonding material is leaked during the manufacturing process. This has happened, which has increased manpower expenditures and caused the lack of automation of the production of the chip card 10. SUMMARY OF THE INVENTION The present invention provides a wafer card that utilizes a trench to vent a non-contact sensing function and a contact sensing function of a conductive bonding material that is ejected from an antenna to solve the above problems. The patent application scope of the present invention discloses a wafer card integrating a non-contact sensing function and a contact sensing function, comprising a carrier having a first hole, a groove, and a first groove formed thereon. Connected to the first hole and the groove. The chip card further includes an antenna, one end of which is disposed under the first hole, and a wafer including a crystal 7 1298140 1 , 2 ^ #一接' point for electrically connecting to one of the antennas The private 'and-die' package is packaged under the wafer circuit board and mounted in the recess of the carrier. The present invention claims that the wafer-to-two non-contact of the type sensing function and the contact sensing function comprises the following steps: (a) in the table of the carrier (4) into the _第=法' below the hole Destruction—the insulating layer of the antenna; (4) on the surface of the carrier: the surface of the carrier is formed by the extension of the hole-forming hole to form a groove; (4) the surface of the conductive bonding material carrier (f) is the wafer Bonded into the groove of the carrier. (8) hole breaking; and the wafer card of the present invention and the manufacturing method thereof discharge the antenna end and the chip circuit _ redundantly providing a groove can prevent the conductive joint (10) from flowing out of the antenna sharp hole, causing the circuit short circuit to lose the wafer, The board effectively improves the yield of wafer card production. In addition, the situation can occur, and it can be manually judged whether there is a conductive joint, and there is no need for related labor expenditure in the length of the garment, and the wafer card can be promoted to save the automation of the watch. [Embodiment] FIG. 4 is a schematic view of a first embodiment of the present invention, and FIG. 4 is an exploded perspective view of a wafer card 50 of the present invention. The chip card 50 includes a carrier 52. The utility model is composed of a non-conductive material, such as a plastic material. The carrier 52 has a flat card shape, and is provided with a shallow concave space 54, a groove 56, a first broken hole 58, and a second broken hole 60. a first trench 62 and a second trench 64. The chip card 50 further includes an antenna 66 which is clamped in the carrier 52. The chip card 50 can read and write data through radio waves and an external wafer reading device through the antenna 66 hidden inside, and the two ends of the antenna are respectively The first hole 58 and the second hole 60 are disposed under the carrier 52. The wafer card 50 further includes a wafer 68, which is a processor chip incorporating a non-contact sensing function and a contact sensing function. The wafer 68 includes a wafer circuit board 70 having a metal contact layer 72 thereon for use. The data is read and written by contact with a wafer reading device. The lower surface of the chip circuit board 70 is provided with a first contact P1 and a second contact P2 for electrically connecting to the two ends of the antenna 66, respectively. A die 74 is packaged under the wafer circuit board 70. The wafer 68 is embedded in the shallow recess 54 and the die 74 of the wafer 68 is embedded in the recess 56. The wafer 68 can be adhered to the carrier 52 by means of the wafer circuit board 70. On the surface of the shallow recess 54. In addition, a conductive joint is injected into the first hole 58 and the second hole 60, respectively, so that the first contact P1 and the second contact of the two ends of the antenna 66 and the chip circuit board 70 can be respectively turned on. P2, and the conductive bonding material may be a material such as silver paste or elastic conductive adhesive. The present invention is characterized in that a first trench 62 is formed on the carrier 52 to be 9 1298140 and a second trench 64, wherein the first trench 62 is connected to the first hole 58 and the recess 56, and the second trench 64 It is connected to the second hole 60 and the groove 56, which is intended to be used for the wafer 68 and the carrier 52 having the backing when the dose of the conductive bonding material injected into the first hole 58 or the second hole 60 is too much. During the hot pressing process, the excess conductive joint may be drained from the first hole 58 or the second hole 60 to the first groove 62 or the second groove 64, or even through the first groove 62 or The second trench 64 escaps to the recess 56 to prevent the conductive bond from escaping to the wafer circuit board 70, causing a short circuit and thereby causing the wafer card 50 to fail. Referring to FIG. 5, FIG. 5 is a flow chart of the automated implantation of the wafer 68 to the carrier 52 of the present invention. The method comprises the following steps: Step 100: Start. Step 102: Check the thickness of the carrier 52 and the image position. Step 104: Milling the carrier 52 out of the first hole 58 using a milling cutter. Step 106: Down-cutting to the insulating layer at one end of the antenna 66 by the capacitive sensing principle under the first hole 58. Step 108: The first groove 62 is milled out by the first hole 58. Step 110: Milling the carrier 52 out of the second groove 64. Step 112: The second hole 60 is milled out by the second groove 64. Step 114: Milling the carrier 52 out of the recess 56. Step 116: Milling the carrier 52 out of the shallow recess 54. 1298140 Step 118: The first hole 58, the first groove 62, the groove 56, the second groove 64, the second hole 60, and the dimple space 54 are cleaned by a vacuum suction method. Step 120: Measure the depth of the shallow recessed space 54 and whether the resistance of the antenna 66 is within a predetermined range. If yes, execute step 122, if not, skip to step 126. Step 122: Injecting the conductive joint into the first hole 58 and the second hole 60. Step 124: implanting the backed wafer 68, and pressing the wafer 68 and the carrier 52 under appropriate pressure, temperature and time. Hot pressing into one. Step 126: End. Herein, the above steps are described in detail. In the process of automation, the card body of the wafer card 50 is automatically input first, and then the thickness of the carrier 52 and the image position are automatically checked. If the thickness of the carrier 52 is within a predetermined range. When the orientation in which the card body is placed is correct, the operation of milling the chip slot is continued. The order of milling the wafer slots is the first hole 58, the first groove 62, the second groove 64, the second hole 60, the groove 56, and the shallow space 54, and the order of milling the groove is not limited. As mentioned above, depending on the process planning. When the milling operation of the first hole 58 and the second hole 60 is performed by using a milling cutter, it is necessary to break the insulating layer at both ends of the antenna 66, so that the injected conductive joint can be effectively turned on the antenna 66, respectively. With the first contact P1 and the second contact P2 of the chip circuit board 70, the copper wire of the antenna 66 can be milled by the principle of capacitive sensing 11 1298140 and the insulating layer can be broken, but the conductor of the copper wire itself is not destroyed. . After the process of milling the wafer groove, since the debris of the card body remains in the wafer groove, the first hole 58, the first groove 62, the groove 56, the second groove 64, The second hole 60, and the foreign matter in the dimple 54 are cleaned and then the process of implanting the wafer 68 is performed. Before the process of implanting the wafer 68, in order to ensure the yield of the wafer card 50, it is necessary to first measure the depth of the shallow concave space 54 and whether the resistance of the antenna 66 is within a predetermined range, if it is possible to continue the implantation. The procedure of the chip 68; for example, when the resistance of the antenna 66 is excessively measured, it means that when the first hole 58 or the second hole 60 is grooved, the insulation layer at both ends of the antenna 66 is not If it is completely destroyed, if the subsequent procedure is continued, the antenna 66 may be in poor contact; if the resistance of the antenna 66 is measured to be too small, the antenna 66 may be short-circuited for the previous procedure, and the antenna 66 may not be made. use. Then, the conductive joint can be injected into the first hole 58 and the second hole 60, and the conductive joint can be made of silver glue, elastic conductive glue, etc., and finally the wafer with the backing is implanted. 68 to the carrier 52, which can heat-press the wafer 68 and the carrier 52 under appropriate pressure, temperature and time conditions, thereby completing the process of automatically implanting the wafer 68 to the carrier 52, and after the wafer card 50 is completed An automatic electrical characteristic test can be performed to test whether the wafer card 50 can be used correctly. When the wafer 68 and the carrier 52 are hot-pressed in step 124, if the dose of the conductive joint of the first hole 58 or the second hole 60 is too large, the excessive conductive joint may be respectively A hole 58 or a second hole 60 overflows into the first groove 62 or the second groove 64, or even leaks to the groove 56 via the first groove 62 or the second groove 64 to avoid conductive joint leakage. The chip board 70 is spilled, causing a short circuit, which in turn causes the wafer card 5 to fail. Compared with the conventional wafer card and its manufacturing method, the present invention is characterized in that a groove is provided to discharge excess conductive joint between the antenna end and the wafer circuit board, so that the conductive joint can be prevented from overflowing and flowing through the antenna. To the chip circuit board, causing a short circuit of the circuit and causing the chip card to fail, can effectively improve the yield of the wafer card. Moreover, the present invention has the problem of poor production yield due to the leakage of the conductive joint, so that it is not necessary to manually judge whether or not the conductive joint is leaked during the manufacturing process of the wafer card. Saving the associated labor costs can also improve the shortcomings of the production of wafer cards that cannot be fully automated. The above is only the preferred embodiment of the present invention, and all changes and modifications made to the scope of the patent application of the present invention should be covered by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing the appearance of a conventional wafer card. Figure 2 is an exploded perspective view of a conventional wafer card. 13 1298140 FIG. 3 is a schematic view showing the appearance of a wafer card according to the present invention. Figure 4 is an exploded perspective view of the wafer card of the present invention. Figure 5 is a flow diagram of the automated implantation of a wafer to a carrier of the present invention.

【主要元件符號說明】 10 晶片卡 12 載體 14 淺凹空間 16 凹槽 18 第一破孔 20 第二破孔 22 天線 24 晶片 26 晶片電路板 28 金屬接觸層 30 晶粒 50 晶片卡 52 載體 54 淺凹空間 56 凹槽 58 第一破孔 60 第二破孔 62 第一溝槽 64 第二溝槽 66 天線 68 晶片 70 晶片電路板 72 金屬接觸層 74 晶粒 P1 第一接點 P2 第二接點 14[Main component symbol description] 10 wafer card 12 carrier 14 shallow recessed space 16 recess 18 first broken hole 20 second broken hole 22 antenna 24 wafer 26 wafer circuit board 28 metal contact layer 30 die 50 wafer card 52 carrier 54 shallow Concave space 56 groove 58 first hole 60 second hole 62 first groove 64 second groove 66 antenna 68 wafer 70 wafer circuit board 72 metal contact layer 74 die P1 first contact P2 second contact 14

Claims (1)

1298140 十、申請專利範圍: 1. 一種整合非接觸式感應功能和接觸式感應功能之晶片 卡,其包含有: 一載體,其上係形成有: 一第一破孔; 一凹槽;以及 一第一溝槽,連接於該第一破孔以及該凹槽; 一天線,其一端係設於該第一破孔之下方;以及 一晶片,其包含有: 一晶片電路板,其上設有一第一接點,用來電連接 於該天線之一端;以及 一晶粒(die) ’封裝於該晶片電路板之下方’該晶粒 係安裝於該載體之該凹槽中。 2. 如請求項1所述之晶片卡,其中該載體之第一破孔内 係填有一導電接合物,用來導通該天線之一端以及該 晶片電路板之第一接點,該第一溝槽係用來洩溢由該 第一破孔所流出之導電接合物。 3. 如請求項2所述之晶片卡,其中該導電接合物係為銀膠。 4. 如請求項1所述之晶片卡,其中該晶片電路板係以背 膠之方式黏貼於該載體。 15 1298140 5·如請求項丨所述之晶片卡,其中該晶片電路板係設有 一金屬接觸層,以用來與一晶片讀取設備進行接觸式 感應。 6.如請求項1所述之晶片卡,其中該載體上另形成有一 第二破孔,以及一第二溝槽,連接於該第二破孔以及 該凹槽,該天線之另一端係設於該第二破孔之下方, 且該晶片電路板上另設有一第二接點’用來電連接於 該天線之另一端。 7·如請求項6所述之晶片卡,其中該載體之第二破孔内 係填有一導電接合物,用來導通該天線之另一端以及 該晶片電路板之第二接點,該第二溝槽係用來茂溢由 該第二破孔所流出之導電接合物。 8· —種植入一整合非接觸式感應功能和接觸式感應功能 之晶片至一載體之方法,其包含有下列步驟: (a) 於該載體之表面形成一第一破孔; (b) 於該第一破孔下方破壞一天線之絕緣層; (c) 於該載體之表面上由該第一破孔延伸形成一第一溝槽; (d) 於該載體之表面形成一凹槽; (e) 將一導電接合物注入該第一破孔;以及 (f) 將該晶片結合於該載體之凹槽内。 1298140 9. 如請求項8所述之方法,其中步驟(a)係為將該載體銑 出該第一破孔。 10. 如請求項8所述之方法,其中步驟(b)係為於該第一破 孔下方下銑至破壞該天線之一端之絕緣層。 11. 如請求項10所述之方法,其中步驟(b)係為於該第一破 孔下方利用電容感應原理下銑至破壞該天線之一端之 * 絕緣層。 12. 如請求項8所述之方法,其中步驟(c)係為將該載體由 該第一破孔延伸銑出該第一溝槽。 13. 如請求項8所述之方法,其中步驟(d)係為將該載體銑 出該凹槽。 14. 如請求項8所述之方法,其中步驟(f)係為將該晶片與 該載體壓合成一體。 15. 如請求項8所述之方法,其另包含利用空氣吸入流動 方式(vacuum suction method)清潔該第一破孔、該第一 溝槽,以及該凹槽。 16. 如請求項8所述之方法,其中步驟(e)另包含量測該天 17 1298140 線之電阻是否介於一預定範圍内,若是則將該導電接 合物注入該第一破孔。 17. 如請求項8所述之方法,其另包含有下列步驟: (g) 於該載體之表面形成一第二破孔; (h) 於該第二破孔下方破壞該天線之絕緣層; ⑴於該載體之表面上由該第二破孔延伸形成一第二溝 槽;以及 ⑴將該導電接合物注入該第二破孔。 18. 如請求項17所述之方法,其中步驟(g)係為將該載體銑 出該第二破孔。 19. 如請求項17所述之方法,其中步驟(h)係為於該第二破 孔下方下銑至破壞該天線之另一端之絕緣層。 20. 如請求項19所述之方法,其中步驟(h)係為於該第二破 孔下方利用電容感應原理下銑至破壞該天線之另一端 之絕緣層。 21. 如請求項17所述之方法,其中步驟⑴係為將該載體由 該第二破孔延伸銑出該第二溝槽。 十一、圖式: 181298140 X. Patent application scope: 1. A wafer card integrating a non-contact sensing function and a contact sensing function, comprising: a carrier formed thereon: a first hole; a groove; and a a first trench connected to the first hole and the groove; an antenna having one end disposed below the first hole; and a wafer comprising: a chip circuit board having a chip thereon a first contact for electrically connecting to one end of the antenna; and a die 'packaged under the wafer circuit board' in which the die is mounted in the recess of the carrier. 2. The wafer card of claim 1, wherein the first hole of the carrier is filled with a conductive joint for conducting one end of the antenna and a first contact of the wafer circuit board, the first groove The trough is used to vent the conductive joint flowing out of the first hole. 3. The wafer card of claim 2, wherein the conductive bond is a silver paste. 4. The wafer card of claim 1, wherein the wafer circuit board is adhered to the carrier in a backing manner. 15 1298140. The wafer card of claim 1, wherein the wafer circuit board is provided with a metal contact layer for contact sensing with a wafer reading device. 6. The wafer card of claim 1, wherein the carrier is further formed with a second hole, and a second groove is connected to the second hole and the groove, and the other end of the antenna is A second contact is disposed under the second hole and electrically connected to the other end of the antenna. The wafer card of claim 6, wherein the second hole of the carrier is filled with a conductive joint for conducting the other end of the antenna and the second contact of the wafer circuit board, the second The trench is used to flood the conductive bond flowing out of the second hole. 8. A method of implanting a wafer-to-carrier integrated with a non-contact sensing function and a contact sensing function, comprising the steps of: (a) forming a first hole in a surface of the carrier; (b) Destroying an insulating layer of an antenna under the first hole; (c) forming a first groove on the surface of the carrier by the first hole; (d) forming a groove on a surface of the carrier; (e) implanting a conductive bond into the first hole; and (f) bonding the wafer into the groove of the carrier. The method of claim 8, wherein the step (a) is to mill the carrier out of the first hole. 10. The method of claim 8, wherein the step (b) is to down-cut under the first hole to an insulating layer that destroys one end of the antenna. 11. The method of claim 10, wherein step (b) is down-cutting under the first hole using a capacitive sensing principle to destroy the * insulating layer at one end of the antenna. 12. The method of claim 8, wherein the step (c) is to mill the carrier from the first hole to the first groove. 13. The method of claim 8 wherein step (d) is to mill the carrier out of the groove. 14. The method of claim 8 wherein step (f) is to press the wafer into the carrier. 15. The method of claim 8 further comprising cleaning the first breach, the first trench, and the recess using a vacuum suction method. 16. The method of claim 8, wherein the step (e) further comprises measuring whether the resistance of the line of the day 17 1298140 is within a predetermined range, and if so, injecting the conductive compound into the first hole. 17. The method of claim 8, further comprising the steps of: (g) forming a second hole in the surface of the carrier; (h) destroying the insulating layer of the antenna below the second hole; (1) forming a second trench extending from the second hole on the surface of the carrier; and (1) injecting the conductive bond into the second hole. 18. The method of claim 17, wherein step (g) is to mill the carrier out of the second hole. 19. The method of claim 17, wherein step (h) is to down-cut under the second hole to an insulating layer that destroys the other end of the antenna. 20. The method of claim 19, wherein step (h) is down-cutting under the second hole using a capacitive sensing principle to destroy the insulating layer at the other end of the antenna. 21. The method of claim 17, wherein the step (1) is to extend the carrier from the second hole to the second groove. XI. Schema: 18
TW94128961A 2005-08-24 2005-08-24 Ic card with non-contact and contact interface and manufacture method thereof TWI298140B (en)

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Publication number Priority date Publication date Assignee Title
TWI506561B (en) * 2008-11-19 2015-11-01 Internat Frontier Tech Lab Inc Embossed hologram chip and its manufacturing method

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TWI492163B (en) * 2013-02-20 2015-07-11 Smartdisplayer Technology Co Ltd Electronic card and its capacitive touch sensing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI506561B (en) * 2008-11-19 2015-11-01 Internat Frontier Tech Lab Inc Embossed hologram chip and its manufacturing method

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