1297822 九、發明說明： 【發明所屬之技術領域】 本發明涉及一種主機板冷啓動裝置。 【先前技術】 在電腦主機板研發之可靠性驗證階段，需要將主機 板置於電腦系統中，進行“開機一延時一關機一延時一 開機”之循環測試，一般要測試1000次左右。而電腦 之啓動又有熱啓動和冷啓動之分，主機板之冷啓動係在 開機狀態下按下電腦之電源開關，切斷主機板之電源供 > 應使其關機，然後再按下電腦之電源開關，恢復主機板 供電，使主機板系統重新啓動。在進行主機板啓動循環 測試時要對應進行主機板冷啓動測試。 主機板之南橋晶片上設有一主機板電源引腳，其在 無外加訊號時保持高電平維持主機板工作狀態，在接受 一“高-低-高”電平變化訊號後改變一次主機板工作狀 態。在進行主機板冷啓動測試時，按下電腦之電源鍵 後，將主機板電源引腳電平拉低，鬆開電源鍵後主機板 電源引腳之電平恢復南電平’即産生一南-低-南電 平變化訊號，使主機板上電開機，再次按下電腦電源鍵 1 鬆開後，主機板再次接受一“高-低-高”電平變化訊號 隨即關機。如此重複之人工冷啓動操作使得測試過程繁 瑣，浪費不少人力，影響測試效率和進度。因此，有必 要提供一種可以簡化主機板冷啓動測試之裝置，該裝置 可向主機板發送具有一定時間間隔之“高-低-高”電平 變化訊號，完成主機板冷啓動之自動化，使主機板冷啓 動測試過程變得規範而科學。 【發明内容】 鑒於以上内容，有必要提供一主機板冷啓動裝置， 以簡化主機板冷啓動測試過程。 6 1297822 一種主機板冷啓動裝置，其包括一連接器及一處理 器，該處理器包括一控制模塊及一訊號發生模塊，該控 制模塊與該訊號發生模塊連接，該連接器與該控制模塊 連接，該連接器用以將該主機板冷啓動裝置與一主機板 電性連接，該控制模塊接收該主機板發送之一啓動訊號 後，控制該訊號發生模塊産生一主機板重啓訊號，並將 該主機板重啓訊號輸出到主機板南橋晶片之一主機板 電源引腳，使主機板重啓。 該主機板冷啓動裝置使主機板之冷啓動過程實現 自動化，節省人力及主機板冷啓動誧試時間，提高了主 機板冷啓動測試之效率。 【實施方式】 參照第一圖，係本發明主機板冷啓動裝置較佳實施 方式之框圖，一主機板冷啓動裝置10包括一處理器12 及一連接器14，該處理器12包括一訊號發生模塊124 及一控制模塊126，該訊號發生模塊124與該控制模塊 126連接，該連接器14與談控制模塊126連接，該連 接器14用以將該主機板冷啓動裝置10與一主機板電性 連接，該控制模塊126接收該主機板發送之一啓動訊號 後，控制該訊號發生模塊124産生一主機板重啓訊號， 並將該主機板重啓訊號發送到主機板南橋晶片之一主 機板電源引腳PWRBTN，使主機板重啓。 參照第二圖，係本發明主機板冷啓動裝置較佳實施 方式之電路圖，該處理器12為一單片機電路，該連接 器14為一 PS/2連接器，其包括一電源引腳+5V、一資 料引腳DATA、一時鐘引腳CLK及一接地引腳GND， 該主機板冷啓動裝置10可透過該連接器14與一主機板 連接。 該處理器12包括一單片機120及一時鐘發生電路 7 1297822 l22 ’該訊號發生模塊ι24及控制模塊126集成於該單 片機120内。 办抑該時鐘發生電路122包括一晶振CRYSTAL及兩電 ^ f C1和C2 ’該晶振之頻率為11·0592ΜΗζ，該等電 t器C1和C2之容值均為33pF，該時鐘發生電路122 為該單片機120提供工作時鐘。 該單片機為一 AT89C51晶片，其包括一電源 腳VCC、一時鐘輪出引腳P0.0、一資料引腳P0.1、 狀悲引腳EA/VPP、一重置引腳RST、兩時鐘輸入引 XTALl^和XTAL2、-電平引腳，〇 5及一接地引腳 D，該單片機120之電源引腳VCC與該連接器14 =源引腳+5V連接，以提供單片機.之卫作電壓，1297822 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a cold start device for a motherboard. [Prior Art] In the reliability verification phase of the development of the computer motherboard, the host board needs to be placed in the computer system, and the cycle test of "power on one delay, one shutdown, one delay, one start" is generally performed, about 1000 times. The startup of the computer has a hot start and a cold start. The cold start of the motherboard is to turn on the power switch of the computer when the power is turned on, and the power supply of the motherboard is turned off, and then the computer should be turned off, and then the computer is pressed. The power switch restores power to the motherboard and restarts the motherboard system. The motherboard cold start test should be performed when the motherboard startup cycle test is performed. A motherboard power supply pin is arranged on the south bridge chip of the motherboard, which maintains a high level to maintain the working state of the motherboard when there is no external signal, and changes the working of the motherboard after receiving a "high-low-high" level change signal. status. During the cold start test of the motherboard, press the power button of the computer to lower the power supply pin level of the motherboard. After the power button is released, the level of the power supply pin of the motherboard returns to the south level. - The low-slow level change signal causes the main board to be powered on. When the computer power button 1 is pressed again, the board receives a "high-low-high" level change signal and then shuts down. This repeated manual cold start operation makes the test process cumbersome, wastes a lot of manpower, and affects test efficiency and progress. Therefore, it is necessary to provide a device that can simplify the cold start test of the motherboard, and the device can send a "high-low-high" level change signal with a certain time interval to the motherboard to complete the cold start automation of the motherboard, so that the host The plate cold start test process becomes standardized and scientific. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a motherboard cold start device to simplify the motherboard cold start test process. 6 1297822 A motherboard cold start device includes a connector and a processor, the processor includes a control module and a signal generating module, the control module is connected to the signal generating module, and the connector is connected to the control module The connector is configured to electrically connect the cold start device of the motherboard to a motherboard. After receiving the start signal sent by the motherboard, the control module controls the signal generating module to generate a motherboard restart signal, and the The motherboard restart signal is output to the motherboard power supply pin of one of the motherboard south bridge chips to restart the motherboard. The cold start device of the motherboard automates the cold start process of the motherboard, saves manpower and the cold start test time of the motherboard, and improves the efficiency of the cold start test of the host board. [Embodiment] Referring to the first figure, a block diagram of a preferred embodiment of a cold start device for a motherboard of the present invention, a motherboard cold start device 10 includes a processor 12 and a connector 14, the processor 12 including a signal The module 124 and a control module 126 are connected to the control module 126. The connector 14 is connected to the control module 126. The connector 14 is used to connect the motherboard cold start device 10 to a motherboard. Electrically connected, the control module 126 receives the start signal sent by the motherboard, controls the signal generating module 124 to generate a motherboard restart signal, and sends the motherboard restart signal to one of the host board south bridge chips. The board power pin PWRBTN causes the board to restart. Referring to the second figure, a circuit diagram of a preferred embodiment of the cold start device of the motherboard of the present invention, the processor 12 is a single-chip circuit, the connector 14 is a PS/2 connector, which includes a power pin +5V, A data pin DATA, a clock pin CLK and a ground pin GND, the motherboard cold start device 10 can be connected to a motherboard through the connector 14. The processor 12 includes a single chip microcomputer 120 and a clock generating circuit 7 1297822 l22'. The signal generating module ι24 and the control module 126 are integrated in the single chip microcomputer 120. The clock generating circuit 122 includes a crystal CRYSTAL and two electric circuits C1 and C2'. The frequency of the crystal oscillator is 11.0592ΜΗζ, and the capacitances of the electric devices C1 and C2 are both 33pF, and the clock generating circuit 122 is The microcontroller 120 provides an operating clock. The single chip is an AT89C51 chip, which includes a power pin VCC, a clock wheel out pin P0.0, a data pin P0.1, a sad pin EA/VPP, a reset pin RST, two clock inputs. Lead XTALl^ and XTAL2, - level pin, 〇5 and a ground pin D, the power supply pin VCC of the MCU 120 is connected with the connector 14 = source pin +5V to provide the voltage of the microcontroller. ,
Git L0·0分別與該單片機120之電源引腳 # #及Γ連接^ 之時鐘引腳CLK連接以傳輸一類比 了鐘訊號，該資料引腳P(U分別與該單片冑12之電源 腳VCC及該处連接$ 14之資料引腳DATA連接，該單 片機120之狀態引腳EA/Vpp與該機12〇之 腳VCC連接，該重置引腳RST與該單片機12〇之= 引腳連接，該單片機12〇之重置引腳RST還透過 一，谷态C3與該單片機12〇之電源引腳VCc連接， 供父流電保護，該時鐘輸入引腳XTAL2透過 CRYSTAL與另一時鐘輸人引腳XTAL1連接，該時鐘^ 入引腳XTAL2還透過一電容器C1與該單片機12〇之 地引腳GND連接，該時鐘輸入引腳XTAL1透過一 裔C2與該單片機120之接地引腳GND連接，該單 機120之電平引腳PQ 5與該主機板南橋晶片之主機 電源引腳PWRBTN連接，該單片機12〇之接地弓丨 GND與該連接器14之接地引腳GND連接。 該單片機120之電平引腳Ρ〇·5之預置輸出為高電 8 1297822 平，當單片機120之資料引腳P0.1接收到主機板傳輸 之一啓動訊號後，該控制模塊126控制該訊號發生模塊 124産生一低電平並發送到電平引腳P0.5，於是該電平 引腳P0.5之輸出電平被置為低電平，該訊號發生模塊 124産生低電平之持續時間為1秒，該電平引腳P0.5 輸出之低電平在持續1秒後跳回高電平，從而向該主機 板南橋晶片之電源引腳PWRBTN輸出一“高-低-高” 電平變化訊號，經過一時間間隔後，該單片機120再次 透過電平引腳P0.5輸出一 “高-低-高”電平變化訊 _ 號，該時間間隔為5秒。 在主機板冷啓動測試過程中，將該主機板冷啓動裝 ^ 置10安裝於一待測主機板之PS/2介面上，該待測主機 板透過該連接器14之資料引腳DATA向該主機板冷啓 動裝置10發送一啓動訊號，該主機板冷啓動裝置10對 該啓動訊號做出回應，透過該單片機12之電平引腳 P0.5向該待測主機板南橋晶片之主機板電源引腳 PWRBTN輸出一間隔之“高-低-高”電平變化訊號，使 該待測主機板重啓。 該主機板冷啓動裝置10使主機板之冷啓動過程實 • 現自動化，節省人力及主機板冷啓動測試時間，提高了 主機板冷啓動測試之效率。 綜上所述，本發明符合發明專利要件，爰依法提出 專利申請。惟，以上所述者僅為本發明之較佳實施例， 舉凡熟悉本案技藝之人士，在爰依本發明精神所作之等 效修飾或變化，皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 第一圖係本發明主機板冷啓動裝置較佳實施方式之框圖。 第二圖係本發明主機板冷啓動裝置較佳實施方式之電路 圖。 9 1297822 【主要元件符號說明】 主機板冷啓動裝置 10 連接器 14 時鐘發生電路 122 控制模塊 126 曰曰 處理器 12 單片機 120 訊號發生模塊124 電容器 C1〜C3Git L0·0 is respectively connected with the clock pin CLK of the power pin ## and Γ connection of the single chip 120 to transmit an analog clock signal, and the data pin P (U and the power pin of the single chip 胄12 respectively) The VCC is connected to the data pin DATA of the $14, and the status pin EA/Vpp of the MCU 120 is connected to the VCC of the machine, and the reset pin RST is connected to the pin of the MCU 12 The reset pin RST of the single chip microcomputer 12 is also connected through a state, the valley state C3 is connected with the power supply pin VCc of the single chip microcomputer 12, for the parent galvanic protection, the clock input pin XTAL2 is input through CRYSTAL and another clock. The pin XTAL1 is connected, and the clock input pin XTAL2 is also connected to the ground pin GND of the single chip microcomputer through a capacitor C1. The clock input pin XTAL1 is connected to the ground pin GND of the single chip microcomputer 120 through a C2. The level pin PQ 5 of the single unit 120 is connected to the host power pin PWRBTN of the south board chip of the motherboard, and the grounding pin GND of the single chip 12 is connected to the ground pin GND of the connector 14. The power of the single chip 120 The preset output of the flat pin Ρ〇·5 is high power 8 1297822 flat, After the data pin P0.1 of the single chip microcomputer 120 receives the start signal of the host board transmission, the control module 126 controls the signal generating module 124 to generate a low level and sends it to the level pin P0.5, so the level The output level of the pin P0.5 is set to a low level, and the signal generation module 124 generates a low level for a duration of 1 second, and the level pin P0.5 outputs a low level for 1 second. Jumping back to a high level, thereby outputting a "high-low-high" level change signal to the power supply pin PWRBTN of the south bridge chip of the motherboard. After a time interval, the single chip 120 transmits the level pin P0.5 again. A "high-low-high" level change signal is outputted, and the time interval is 5 seconds. During the cold start test of the motherboard, the motherboard cold start device 10 is mounted on a motherboard to be tested. On the PS/2 interface, the motherboard to be tested sends a start signal to the cold start device 10 of the motherboard through the data pin DATA of the connector 14, and the cold start device 10 of the motherboard responds to the start signal. The level pin P0.5 of the single chip microcomputer 12 is to the south board of the motherboard to be tested The motherboard power supply pin PWRBTN outputs an interval "high-low-high" level change signal to restart the board to be tested. The motherboard cold start device 10 automates the cold start process of the motherboard. The manpower and the cold start test time of the motherboard are saved, and the efficiency of the cold start test of the motherboard is improved. In summary, the invention complies with the invention patent requirement, and the patent application is filed according to law. However, the above is only the invention. The equivalent modifications and variations of the present invention in light of the spirit of the present invention are intended to be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a block diagram of a preferred embodiment of a cold start device for a motherboard of the present invention. The second drawing is a circuit diagram of a preferred embodiment of the cold start device of the motherboard of the present invention. 9 1297822 [Key component symbol description] Motherboard cold start device 10 Connector 14 Clock generation circuit 122 Control module 126 处理器 Processor 12 MCU 120 Signal generation module 124 Capacitor C1~C3
主機板電源引腳 PWRBTN 振Motherboard power pin PWRBTN
CRYSTALCRYSTAL