1294216 I5280twf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種設定電路裝置與方法，且特別是 有關於一種可提供多種設定初始狀態的設定電路初始狀態 的裝置與方法。 ^ ^ 【先前技術】 傳統上晶片的初始設定是由ΡΙΝ腳上的電位決定，通 常會使用輸人單向焊墊（PAD)裝置或是雙向焊墊裝置來 獲得此設定值，請參照圖2A及圖2B，圖2A為習知的輸 入單向焊墊裝置圖，圖2B為習知的雙向焊墊裝置圖，其 中圖2A為單向焊墊裝置’包括了-個内建電阻310鱼-個缓衝器320 ’若焊塾340都不外接電阻時，c端綱輪 出邏輯〇的訊號，若要改變此值，需在外部接上一個 於内建電阻·值之電阻去反向設定，柯使€端300輪 出邏輯1的訊f虎’而將接收到的邏輯i或是邏輯〇的訊號 當作初始值。若内建電阻31()接地，則外接電阻33〇 電源。 /圖2B為—個雙向焊墊裝置，包括了内建電阻430、輪 入緩，益410、輸出缓衝器42〇。通常内建電阻43〇可接電 源或是接地’此為接地，當焊墊450不外接電阻44〇時， C端_輸出邏輯〇訊號，若加入一外梢 C端·輸出邏輯⑽虎，而晶片得知此邏輯10夺，則^ 在端470發出致能訊號開啟輸出緩衝器420，將内部資 料傳送出去。 、 5 1294216 15280twf.doc/g 但是利用此兩種裝置都只能判別兩種狀態，若使用者 將外接電阻440與内建電阻430同時接地，或是同時接電 源時，則會發生初始值變成只有一種狀態，這樣使用者須 事先得知其内建電阻430為内接或是外接才行。若要讓」 根兀件（PIN)腳使用數位的方式判斷三種值或模式以供 晶片使用，則需使用特殊設計的piN腳，其内含比較器，1294216 I5280twf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a setting circuit device and method, and more particularly to a device and a device for providing an initial state of a setting circuit for setting various initial states. method. ^ ^ [Prior Art] Traditionally, the initial setting of the wafer is determined by the potential on the foot. Usually, the input unidirectional pad (PAD) device or the two-way pad device is used to obtain the set value. Please refer to Figure 2A. 2B, FIG. 2A is a conventional input unidirectional pad device diagram, and FIG. 2B is a conventional two-way pad device diagram, wherein FIG. 2A is a unidirectional pad device 'includes a built-in resistor 310 fish- Buffer 320 'If the soldering 340 does not have an external resistor, the c-end will turn out the logic signal. To change this value, connect a resistor with a built-in resistor and value to reverse the setting. Ke makes the 300-round logical 1 signal and uses the received logic i or logic signal as the initial value. If the built-in resistor 31 () is grounded, the external resistor 33 〇 power. / Figure 2B is a two-way pad assembly including built-in resistor 430, wheel delay, benefit 410, and output buffer 42. Usually the built-in resistor 43〇 can be connected to the power supply or grounding. This is the grounding. When the pad 450 is not connected to the resistor 44〇, the C terminal _ outputs a logic signal. If an external C terminal is output, the logic (10) is added. When the chip knows that the logic is 10, the enable signal is sent to the output buffer 420 at the end 470 to transmit the internal data. 5 1294216 15280twf.doc/g However, with these two devices, only two states can be discriminated. If the user connects the external resistor 440 to the built-in resistor 430 at the same time, or when the power is connected at the same time, the initial value will change. There is only one state, so the user must know in advance that the built-in resistor 430 is inscribed or external. To allow the root component (PIN) pin to use three digits to determine the three values or modes for use on the wafer, a specially designed piN pin with a comparator is required.
再利用外部輸入不同的電壓準位，來判斷出第三種值，其 缺點是成本較高及面積較大。 、 【發明内容】 ^發明的目的就是在提供一種設定電路初始狀態裝 置，藉著兩個開關不同時的關閉與導通，來產生三種模式 以供B曰片選擇使用，且設計空間更富彈性。 、、 X 、冉一目的是提供一種設定電路初始狀態之方 ^ ^由控制訊號來控制兩個開關不同時關閉與導通，來 生二種核式提供晶片選擇，藉以判別電路之初始狀態。 本發明提出一種設定電路初始狀態裝置，為雷性二接 蝴…现線與内部電路，並接收第4 = 士控制訊號’且緩衝電路係·祕 二 :及第二開關。其中第-開二 第二開關之严-端為接收一工作電壓， =再來第，具有與 ^電性減至第__之第二端’第_電&之第Then use the external input different voltage levels to determine the third value, which has the disadvantage of high cost and large area. SUMMARY OF THE INVENTION The object of the invention is to provide a device for setting the initial state of the circuit, by which the two switches are not turned off and on at the same time, to generate three modes for the B-chip to be used, and the design space is more flexible. The purpose of the X, X, and 是 is to provide a way to set the initial state of the circuit. ^ Control signals are used to control the two switches to be turned off and on at the same time. The two types of nucleus provide wafer selection to determine the initial state of the circuit. The invention provides a device for setting an initial state of a circuit, which is a lightning bar, a current line and an internal circuit, and receives a 4th control signal and a buffer circuit system and a second switch. Wherein the first-open second terminal of the second switch is to receive an operating voltage, = again, with the electrical property reduced to the second end of the first __ _ electric &
1294216 15280twf.doc/g 減至訊號線；而後第二電阻具有第—端與第二端二 電阻之第-端電_接至訊號線。最後第二關具一 S'第Z端，第Ϊ端’第二開關之第-端電性-接至第二 电阻之第二端’第二開關之第二端電性耦接至地，第二開 關之第三端接收第二控制訊號，以決定第二開關之導通與 ^ ° /、 其中’上述的缓衝電路係電性輕接至訊號線，且 -開關由關_為導通，第二開關由導通轉為_時，得 到並輸出此内部電路之一工作狀態。 &依照本發_較佳實補所述，上狀設定電路初始 狀態裝置’其巾當訊號線電性触至上拉電阻時，緩衝電 路則根據上拉電阻、第一開關與第二開關，得到並輸出^ 内部電路之工作狀態。 照本發明的較佳實施酬述，上述之設定電路初始 狀態裝置，其中當訊號線電性耦接至下拉電阻時，此緩衝 電路則根據下拉電阻、第一開關與該第二開關，得到並輸 出此内部電路之工作狀態。 &依照本發明的較佳實施例所述，上述之設定電路初始 狀態裝置，其中第一控制訊號與第二控制訊號係為反相。 、依照本發明的較佳實施例所述，上述之設定電路初始 狀悲裝置，其中緩衝電路包括··一個輸入緩衝器電性耦接 至訊號線與内部電路，以及一個輸出緩衝器電性耦接至訊 號線與内部電路，並根據内部電路輸出之禁致能訊號決定 輸出緩衝器的致能與禁能。 ‘齡&! 滅以滅线^ “瀹—祕處緣翁玄 1294216 15280twf.doc/g 依照本發明的較佳實施例所述，上述之設定電路初始 狀悲裝置’係適用於晶片中。 依照本發明的較佳實施例所述，上述之設定電路初始 狀態裝置，係自此内部電路發出第一控制訊號。 依照本發明的較佳實施例所述，上述之設定電路初始 狀悲裝置’其中在此内部電路與設定電路初始狀態裝置間 配置有反相态，用以將第一控制訊號反相後，供給至第二 開關。 本發明提出一種設定電路初始狀態裝置之操作方法， 包括以下所述。首先接收第一控制訊號與第二控制訊號， 再來根據第一控制訊號及第二控制訊號決定第一開關及第 二開關之導通與否，最後當第一開關由關閉轉為導通，第 二開關由導通轉為關閉時，則得到此内部電路之工作狀態。 本發明因採用設定電路初始狀態裝置，因此無須再使 用比較裔或是外加電壓的方式，即可多出一種模式，設計 空間更畜彈性，在硬體上增加了一個電阻、兩個開關及一 個反向器，不僅可節省成本，且不佔硬體空間，方便使用 者獲得初始狀態。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 【實施方式】 請參照圖1，圖1繪示依照本發明較佳實施例的一種 設定電路初始狀態的裝置圖，設定電路初始狀態裝置28〇 1294216 15280twf.doc/g 包括第一開關100、第一電阻110、第二開關130以及第二 電阻120。自焊墊250將訊號線210耦接至第一電阻110、 弟一電阻120以及緩衝電路16〇。而緩衝電路16〇包含輸 入緩衝器140以及輸出緩衝器15〇。 其中輸入緩衝器140的輸出端耗接至内部電路18〇， 用以得到訊號線210上的數位訊號變化，來判斷操作於哪 一種模式。而輸出緩衝器150之I端155(輸入端)及致能端 245耦接至内部電路180，當内部電路180發出致能訊號 240驅動輸入緩衝器150時，將内部電路180的數位訊號 輸出。 另外，内部電路180會發出控制訊號260來控制開關， 其中第一開關100的第三端3叙接至内部電路18〇，而第 二開關130的第三端3經由一個反向器no耦接至第一開 關器100，用來不同時關閉及導通開關。 首先’當電路處於初始狀態，由内部電路發出一 控制訊號260為邏輯〇，使得第二開關13〇導通，第一開 關100關閉（在本實施例設計開關接收邏輯〇時關閉，邏 輯1時開啟，且每一開關的第三端3為控制端，用以導通 弟一端1及第二端2導通或是關閉，以下均以此實施之）， 第二開關130導通時會連接第二開關13〇的第一端丨及第 二端2，使得第二電阻120連接至接地端，將近似接地的 電位經過訊號線210傳送至輸入緩衝器14〇，使得輸入緩 衝器140輸出邏輯〇的訊號。 當内部電路180的控制訊號為邏輯1時，第一開關1〇〇 1294216 15280twf.doc/g ，通，第二開關13〇會關閉，第一開關1〇〇導通時會連接 第一開關100白勺第一端1及第二端2，使得第一電阻110 連接至VDD，將近似VDD的電位經過訊號線21〇傳送至 輸入緩衝器140,使得輸入緩衝器14〇輸出邏輯J的訊號。1294216 15280twf.doc/g is reduced to the signal line; then the second resistor has the first end and the second end of the second resistor connected to the signal line. Finally, the second switch has an S'Z-th end, and the second end of the second switch is connected to the second end of the second resistor. The second end of the second switch is electrically coupled to the ground. The third end of the second switch receives the second control signal to determine the conduction of the second switch and ^ ° /, wherein the above buffer circuit is electrically connected to the signal line, and the switch is turned off by the off signal. When the second switch is turned from conduction to _, an operating state of one of the internal circuits is obtained and output. According to the present invention, the upper state setting device initial state device 'when the signal line is electrically connected to the pull-up resistor, the buffer circuit is based on the pull-up resistor, the first switch and the second switch. Get and output the working state of the internal circuit. According to a preferred embodiment of the present invention, the device for setting an initial state of the circuit, wherein when the signal line is electrically coupled to the pull-down resistor, the buffer circuit is obtained according to the pull-down resistor, the first switch, and the second switch. Output the working status of this internal circuit. According to a preferred embodiment of the present invention, the apparatus for setting a circuit initial state, wherein the first control signal and the second control signal are inverted. According to a preferred embodiment of the present invention, the setting circuit initially has a device, wherein the buffer circuit comprises: an input buffer electrically coupled to the signal line and the internal circuit, and an output buffer electrically coupled Connect to the signal line and internal circuit, and determine the enable and disable of the output buffer according to the disable signal of the internal circuit output. 'Eternal &! 灭灭灭线 ^ 瀹 秘 秘 处 12 12 1294216 15280 twf.doc / g According to a preferred embodiment of the present invention, the above-described setting circuit initial device is suitable for use in a wafer. According to a preferred embodiment of the present invention, the setting circuit initial state device sends a first control signal from the internal circuit. According to a preferred embodiment of the present invention, the setting circuit initial shape device is ' An inverting state is disposed between the internal circuit and the initial state device of the setting circuit for inverting the first control signal and supplying the second control signal to the second switch. The present invention provides an operation method for setting the initial state of the circuit, including the following Receiving the first control signal and the second control signal first, and then determining whether the first switch and the second switch are turned on according to the first control signal and the second control signal, and finally turning the first switch from off to on. When the second switch is turned from off to off, the working state of the internal circuit is obtained. The present invention uses the setting circuit initial state device, so there is no need to make Compared with the method of applying voltage or the voltage, the design space is more flexible, and a resistor, two switches and an inverter are added to the hardware, which not only saves cost but also does not occupy hardware. The above and other objects, features, and advantages of the present invention will become more apparent and understood. 1 is a device diagram of an initial state of a setting circuit according to a preferred embodiment of the present invention. The setting circuit initial state device 28〇1294216 15280twf.doc/g includes a first switch 100 and a first resistor. The second switch 130 and the second resistor 120. The signal line 210 is coupled from the pad 250 to the first resistor 110, the first resistor 120, and the buffer circuit 16A. The buffer circuit 16 includes an input buffer 140 and an output. The buffer 15 is outputted to the internal circuit 18A for obtaining a digital signal change on the signal line 210 to determine which mode is operated. The I terminal 155 (input) and the enable terminal 245 of the output buffer 150 are coupled to the internal circuit 180. When the internal circuit 180 sends the enable signal 240 to drive the input buffer 150, the digital signal of the internal circuit 180 is output. In addition, the internal circuit 180 sends a control signal 260 to control the switch, wherein the third end 3 of the first switch 100 is connected to the internal circuit 18A, and the third end 3 of the second switch 130 is coupled via an inverter no. The first switch 100 is used to turn off and turn on the switch at the same time. Firstly, when the circuit is in the initial state, a control signal 260 is sent to the logic circuit by the internal circuit, so that the second switch 13 is turned on, and the first switch 100 is turned off ( In this embodiment, when the switch is designed to receive the logic 〇, it is turned off, and when the logic 1 is turned on, and the third end 3 of each switch is the control end, the first end 1 and the second end 2 of the switch are turned on or off. When the second switch 130 is turned on, the first end 丨 and the second end 2 of the second switch 13 会 are connected, so that the second resistor 120 is connected to the ground, and the potential of the grounding is transmitted to the input through the signal line 210. buffer 14〇, so that the input signal logic buffer 140 outputs the square. When the control signal of the internal circuit 180 is logic 1, the first switch 1〇〇1294216 15280twf.doc/g, the second switch 13〇 is turned off, and the first switch 1〇〇 is connected to the first switch 100 white when turned on. The first end 1 and the second end 2 of the scoop are such that the first resistor 110 is connected to VDD, and the potential of approximately VDD is transmitted to the input buffer 140 via the signal line 21, so that the input buffer 14 outputs a signal of logic J.
。在内部電路18〇的控制訊號26〇輪出由邏輯〇變化至 邏輯1時，輸入緩衝器140的輸出就會由邏輯〇變化至邏 輯1，^此^變i的過程，當成第一個模式（m〇de)。 接著’第一電阻110與第二電阻12〇通常為大電阻（範 圍為60K〜70K)，當焊墊250輸出端之訊號線21〇連接至 上拉電阻190時（上拉電阻190另一端輕接至VDD，且下 拉電阻200開路），内部電路18〇發出一控制訊號施為 邏輯^則第一開關100會關閉，第二開關130會導通連 接至第=電阻120，使得訊號線210上的電壓為上拉電阻 190與第一電阻12〇分壓值，但上拉電阻1⑽是個小電阻 ^4·7Κ)，在訊號線21〇上的電壓接近vdd，則輸入緩衝 為140輪出邏輯1的訊號。 當内部電路180的控制訊號26〇為邏輯丨時，則第二 開關130會關閉，第一開關1〇〇會導通連接至卿，使得 輸入緩衝器140輸出邏輯！的訊號，故内部電路18〇的控 制訊號260輸出由邏輯〇變化至邏輯^，輸入緩衝器刚 的·則會維持在邏輯！，把維持在邏輯！的過程當成第 —個模式（mode)。 再來，同理當焊塾250輪出端之訊號線21〇連接至下 拉電阻200時（下拉電阻2〇〇另一端福接至地，且上拉電 •1294216 15280twf.doc/g 阻190開路），内部電路180輸出的控制訊號26〇為邏輯 〇 ’則弟一開關100會關閉’弟二開關130會導通連接至第 二電阻120，使得輸入缓衝器140輸出邏輯〇的訊號。. When the control signal 26 of the internal circuit 18 turns to change from logic 逻辑 to logic 1, the output of the input buffer 140 changes from logic 至 to logic 1, and the process of changing i is regarded as the first mode. (m〇de). Then, the first resistor 110 and the second resistor 12A are generally large resistors (range 60K~70K), and when the signal line 21〇 at the output end of the pad 250 is connected to the pull-up resistor 190 (the other end of the pull-up resistor 190 is lightly connected) Up to VDD, and the pull-down resistor 200 is open), the internal circuit 18 sends a control signal to the logic, then the first switch 100 is turned off, and the second switch 130 is turned on to the ==120, so that the voltage on the signal line 210 The pull-up resistor 190 and the first resistor 12 〇 are divided, but the pull-up resistor 1 (10) is a small resistor ^4·7 Κ), the voltage on the signal line 21 接近 is close to vdd, and the input buffer is 140 rounds of logic 1 Signal. When the control signal 26 of the internal circuit 180 is logic ,, the second switch 130 is turned off, and the first switch 1 导 is turned on to connect to the clerk, so that the input buffer 140 outputs logic! The signal, so the output of the internal circuit 18〇 control signal 260 changes from logic to logic ^, and the input buffer will remain in logic! Keep it in logic! The process is treated as the first mode. Then, when the signal line 21〇 of the 250-pin output of the soldering iron is connected to the pull-down resistor 200 (the pull-down resistor 2〇〇 is connected to the ground at the other end, and the pull-up is 1219216 15280twf.doc/g 190 open circuit) The control signal 26 outputted by the internal circuit 180 is logically 〇', then the switch 100 is turned off, and the second switch 130 is turned on to the second resistor 120, so that the input buffer 140 outputs a signal of logic 。.
當内部電路180的控制訊號260為邏輯丨時，則第二 開關130會關閉，第一開關1〇〇會導通連接至vdd，訊號 線210上的電壓為第一電阻110與下拉電阻12〇之分壓電 壓，但下拉電阻200是個小電阻（4·7Κ)，故分壓電壓值 接近〇，所以使得輸入緩衝器140輸出邏輯〇的訊號，故 内部電路180的控制訊號260輸出由邏輯〇變化至邏輯工， 輸入緩衝器140的輸出則會維持在邏輯〇，把維持在邏輯〇 的過程當成第三個模式（mode)。 _____了一 1 C值270變化 得知環境 开不： 工作狀態 j墊250外無電阻 模式一 1-^1 隻垄250外接上拉電阻 模式二 〇->0 芝^250外接下拉電阻 模式三 —--—__When the control signal 260 of the internal circuit 180 is logic ,, the second switch 130 is turned off, the first switch 1 〇〇 is turned on to connect to the vdd, and the voltage on the signal line 210 is the first resistor 110 and the pull-down resistor 12 The voltage is divided, but the pull-down resistor 200 is a small resistor (4·7 Κ), so the voltage divider voltage is close to 〇, so that the input buffer 140 outputs a logic , signal, so the control signal 260 output of the internal circuit 180 changes by logic 〇 To the logic, the output of the input buffer 140 is maintained at the logical state, and the process maintained at the logical state is treated as the third mode. _____ A 1 C value 270 change to know the environment is not open: Working state j pad 250 no resistance mode 1-1-1 ridge 250 external pull-up resistor mode two 〇 -> 芝 ^ 250 external pull-down resistor mode three----__
團J馬本發明較佳實施例之控制信號與 # 立^蚪序圖，可清楚得知當控制信號26〇變化時C ^义1 ’而判別内部電路180處於那一模式運作。 本發明簡單的H執彳^容獅每個設計者蚊。舉一個 工作狀態為模^ " C值270輪出變化為〇時(〇—〇)， 數位訊號設執行的動作是將内部電路180的 码’可向輸出緩衝器150發出致能訊號240， 1294216 15280twf.doc/g 將内部電路180的數位資料輸出至焊墊250輸出，由於第 二開關130導通，自輸出緩衝器15〇看出去的電阻相當於 下拉電阻200並聯第二電阻12〇，又下拉電阻2〇〇遠小於 第二電阻120，故傳送資料不受影響。 請參照圖4，圖4為設定電路初始狀態裝置之操作方 法，首先内部電路180發出控制訊號260(步驟S400)。此 • 步驟是用來驅動下一級的開關。 _ 之後第一開關1〇〇接收第一控制訊號22〇且第二開關 130經過一個反向器17〇接收第二控制訊號23〇(步^ S410)。此步驟用於讓第一開關1〇〇以及第二開關13〇回 時導通。 ，來由第一控制訊號220決定第一開關1〇〇導通與 否，第二控制訊號230決定第二開關130導通與否（步驟 S42〇)。其中此步驟之第一開關100以及第二開關13〇的第 三端3接收控制信號。 .最後，當第一開關100由關閉轉為導通，與第二開關 130由導通轉為關閉時，則可得知c 27〇值狀態變化，^ 内部電路180之工作狀態（步驟S430)。此步驟說明藉由切 換開關可讓緩衝器140之後輸出C端270上的電壓值產生 變化，、且依此變化來決定内部電路180的工作狀態（即哪 一模式），以利用此結果來決定下一個操作步驟。 細上所述，本發明之一種設定電路初始狀態的裝置與 方法’可讓一根PIN腳，使用數位的方式判斷出三種模式、， 以供晶片使用。如工作狀態為模式三，可設定操作方式為 12 1294216 15280twf.doc/g 將晶片内部電路280的數位訊號輸出，其動作方式可由使 •用者自行決定，相較於傳統方式多了 一種選擇模式，設叶 空間更富彈性，在硬體上增加了一個電阻、兩個開關^一 個反向器170，不僅可節省成本，且不佔硬體空間，即可 達成三種模式，方便使用者獲得初始狀態。 雖然本發明已以較佳實施例揭露如上，然其並非用以 — 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 • 和範圍内，當可作些許之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1緣示為依照本發明較佳實施例的一種設定電 始狀態的裝置圖。 圖2A繪示為習知的輸入單向焊墊裝置圖。 圖2B綠示為習知的雙向焊墊裝置圖。 圖3繪不為本發明較佳實施例之一種控制信號 _ 電位之時序圖。 $ ，4繪不為依照本發明較佳實施例的一種設定電路初 始狀恶裝置之操作方法。 【主要元件符號說明】 1 :第一端 2 ··第二端 3 :第三端 100 :第一開關 110 :第一電阻 13 1294216 15280twf.doc/g 120 ··第二電阻 130 :第二開關 140 :輸入緩衝器 150 :輸出缓衝器 155 ·· I 端 160 :緩衝電路 170 :反相器 180 :内部電路 190 :上拉電阻 200 :下拉電阻 210 :訊號線 220 :第一控制訊號 230 :第二控制訊號 240 :致能訊號 245 :致能端 250 :焊墊 260 :控制訊號 270 : C 端 280 :晶片内部電路 300 : C 端 310 :内建電阻 320 :緩衝器 330 :外接電阻 340 :焊墊 1294216 15280twf.doc/g 400 ·· C 端 410 :輸入緩衝器 420 :輸出緩衝器 430 :内建電阻 440 :外接電阻 450 ··焊墊 460 : I 端 470 :致能端 S400 :内部電路發出控制訊號 S410:第一開關接收第一控制訊號且第二開關經過一 個反向器接收第二控制訊號 S420 ··由第一控制訊號決定第一開關導通與否，第二 控制訊號決定第二開關導通與否 S430 :當第一開關由關閉轉為導通，第二開關由導通 轉為關閉時，得到内部電路之工作狀態 m 15In the preferred embodiment of the present invention, the control signal and the #立蚪蚪图, it is clear that when the control signal 26〇 changes C^ sense 1 ', it is determined that the internal circuit 180 is operating in that mode. The simple H of the present invention is executed by each designer mosquito. When a working state is modulo, the value of the C signal is changed to 〇 (〇-〇), and the digital signal is set to perform the action of sending the enable signal 240 to the output buffer 150. 1294216 15280twf.doc/g outputs the digital data of the internal circuit 180 to the output of the pad 250. Since the second switch 130 is turned on, the resistance seen from the output buffer 15〇 corresponds to the pull-down resistor 200 connected in parallel with the second resistor 12〇, and The pull-down resistor 2 is much smaller than the second resistor 120, so the transmitted data is not affected. Referring to Fig. 4, Fig. 4 shows an operation method of setting the initial state of the circuit. First, the internal circuit 180 issues a control signal 260 (step S400). This • The step is to drive the next level of the switch. After the first switch 1〇〇 receives the first control signal 22, and the second switch 130 receives the second control signal 23 via an inverter 17 (step S410). This step is used to turn on the first switch 1 〇〇 and the second switch 13 when turned back. The first control signal 220 determines whether the first switch 1 is turned on or not, and the second control signal 230 determines whether the second switch 130 is turned on or not (step S42 〇). The first switch 100 of this step and the third terminal 3 of the second switch 13A receive the control signal. Finally, when the first switch 100 is turned from off to on, and when the second switch 130 is turned on to off, it is known that the c 27 threshold state changes, and the operating state of the internal circuit 180 (step S430). This step illustrates that the voltage value on the output C terminal 270 of the buffer 140 can be changed by the switch, and the operating state of the internal circuit 180 (ie, which mode) is determined according to the change, to determine the result. The next step. In summary, the apparatus and method for setting the initial state of the circuit of the present invention allows a PIN pin to determine the three modes in a digital manner for use by the wafer. If the working state is mode 3, the operation mode is 12 1294216 15280twf.doc/g. The digital signal of the internal circuit 280 of the chip is output, and the operation mode of the chip can be determined by the user, and a selection mode is added compared with the conventional mode. The leaf space is more flexible, and a resistor, two switches and an inverter 170 are added to the hardware, which not only saves cost, but also does not occupy the hardware space, and can achieve three modes, which is convenient for the user to obtain the initial. status. Although the present invention has been described in the above preferred embodiments, it is not intended to limit the invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a device for setting an initial state in accordance with a preferred embodiment of the present invention. 2A is a diagram of a conventional input unidirectional pad device. 2B is a diagram of a conventional two-way pad device. Figure 3 is a timing diagram of a control signal _ potential not according to a preferred embodiment of the present invention. $ , 4 is not a method of operating a setting circuit initial device in accordance with a preferred embodiment of the present invention. [Main component symbol description] 1 : First end 2 · · Second end 3 : Third end 100 : First switch 110 : First resistor 13 1294216 15280twf.doc / g 120 · Second resistor 130 : Second switch 140: input buffer 150: output buffer 155 · · I terminal 160: buffer circuit 170: inverter 180: internal circuit 190: pull-up resistor 200: pull-down resistor 210: signal line 220: first control signal 230: The second control signal 240: enable signal 245: enable terminal 250: pad 260: control signal 270: C terminal 280: chip internal circuit 300: C terminal 310: built-in resistor 320: buffer 330: external resistor 340: Pad 1294216 15280twf.doc/g 400 ·· C terminal 410: Input buffer 420: Output buffer 430: Built-in resistor 440: External resistor 450 · Solder pad 460: I terminal 470: Enable terminal S400: Internal circuit Sending a control signal S410: the first switch receives the first control signal and the second switch receives the second control signal S420 through an inverter. The first control signal determines whether the first switch is turned on or not, and the second control signal determines the second Switch on or off S430: When the first switch is turned off Turned on, the second switch is turned off from ON, the state of the circuit to obtain operation of the internal m 15