1292559 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種指紋感應器，其係用於一晶片卡中。 【先前技術】 處理電子形成的指紋影像，特別係用於辨識人物，係需 要高階的運算能力以及大量的記憶體。連接該實際指紋感應 器至所需的電子電路以及至該記憶體，目前有兩種選擇方 式。 一指紋感應器可如一半導體晶片，連接於一電腦，其可 - 進行影像處理且用合適的軟體進行人物的鑑定與辨識。在此 範例中，該電腦的儲存容量並不會遇到任何的界限。若是需 要以微小化取代，原則上可被使用於標準規格的晶片卡上， 然而除了該指紋感應器之外，亦需要一微處理器晶片或是微 控制器晶片，其係需要以電線彼此連接。在此方式中，其尺 寸可改小且該硬_被關於所需的_。此種微小化的系 統之使用乾圍，係越來越普遍。 ' 使用於曰曰片卡中該微控制器晶片面積的技術上限制係介 於約25一平方厘米至3〇平方厘米之間。即使係使用最現代的 技術’這些財還是太似致於無法整合足夠的該記憶體空 間，用於處理該為控制器晶片中的指紋影像。 【發明内容】 、本發明之目的健合—指紋感應ϋ，其具有-微處理器 或微控制器，以及―記,it體於-晶片卡上。 1292559 本發明係提供一指紋感應器，其具有一半導體晶片、一 接觸面積、配置於該接觸面積中或之下的感應器電極以及該 感應電極之電性連接，其中記憶體胞元係整合於該半導體晶 片中，一接線平面係配置於該記憶體胞元與該感應器電極之 間’以及記憶體胞元連接及/或該感應器電極係電傳導性地接 至该接線平面。 在本發明之指紋感應器中，該指紋感應器之該半導體晶 片係整合RAM記憶體，其係當處理指紋影像時，自該微處 理态中，用於處理該指紋影像。所以在微小化系統中，可省 略三個晶片中的一個，因此僅需要該指紋感應器的一半導體 曰曰片以及被控制斋晶片。此可簡化該晶片的接線。可提供 該微控制H，_铜於分卿動翻紋錢^與該記憶體 胞元。 此絕緣 在該指紋感應器中，該記憶體係配置於該感應器電極之 間，其可選取個別影像點(畫素)與該基質。一接線平面係位 於該感應H電極與該記憶體胞元之間。根據制半導體記憶 體晶片，—半導體本體_部_握持該記憶體胞元，作為 整合70件。該錢Ilf極係形成於最高的接線平面。在該記 憶體胞7G能錢II電極之間，亦可有減健線或金屬化 板，其係彼此相疊的層狀構造，且藉由内部金屬介電質而彼 較佳為，所使用之該記憶體胞元為「SRAM胞元」。相 對於DRAM胞元，SRAM胞元需要六個電晶體取代—個電 晶體，而DRAM胞元所需要的儲存容量係_略。 1292559 該指紋感應器之較詳細說明範例，請參閱第一圖與第二 圖。 【實施方式】 第一圖係說明具有該半導體晶片1之該指紋感應器，其 頂部有供於手指的接觸面積2。在該接觸面積2中或其下， 具有感應器電極3，其個別係用於影像點格子中的影像點。 較佳為，該影像之偵測係藉由容量測量，其係關於是否建立 隨周圍環境而改變的該感應器電極之電子電容。在此方式 中，可偵測放置於該接觸面積2上得指尖之凹處與隆起部， 其改變電容量。 第一圖係說明該感應器電極3之電性連接4。在此範例 中，該連接之路線係至該基質或是該半導體晶片1之半導體 本體。另一方面，這些電性連接可接到配置於該半導體材質 上的接線平面。 該記憶體胞元5係位於該實際晶片，亦即半導體本體或 基質，例如其可為矽，頂部的電子元件。該接線平面6可啟 動配置於該記憶體胞元5與該感應電極3之間的該記憶體 胞元，且周圍皆以介電質絕緣。第一圖係說明用於該記憶體 胞元5之該電性連接7，其提供記憶體胞元輸入或輸出，因 而係電傳導連接至該接線平面6的對應部位。這些特別的部 位可為字元線，例如第一圖橫切面中該接線平面6之連續拉 長。在此範例中，該記憶體胞元5之電性連接7係連接至該 字元線。該感應器電極3之該電性連接4係穿過該接線平面 6中傳導器之間，而配置於第一圖中所見該平面之後方。該 1292559 内部金屬介電質係省略於圖示之中。 線平:t應!電極3之該連接4亦可直接出現在所示之該接 ^面6，或是可以直接連接在另一健線平面，並未顯干 材=3。觀憶體胞元5之其他連接係可配置於該半導體 係=半導體記憶體晶片之「包埋的位元線」，其 卞―體胞70電晶體之祕/汲極區域且連接至橫截 叆子兀線之列中。 网 第二圖係說明指紋感應器之透視平 體晶片1上元件之參考符號，餅㈣裳㈤置於°亥+¥ 係對應於罘一圖。該接線平面 己板'體胞元5之該接線係於圖示中省略。此外，如圖 所二之該感應器電極3係至少部分透明的。該半導體材 一摻雜的連接區域8之頂部，其與該感應器電極3之該連 如第二圖中虛線所示。在此範例中，該記紐胞元$ /、雜雜區域之襯㈣配·標準的，其係指該感應器電極 3之該連接4在方格配置中於直角方向的空間分布相當平均 、原則上記憶體胞元5的數目可任意決定，且亦取決於整 個感應器面積的之設定大小。該感應器電極3與該記憶體$ 几5之幾何配置，係符合個別實施例中之特別需求。在該感 應器面積下該記憶體胞元所形成之可自由移動的記” (應）’係可於硬體中連接至該指、紋感應器，用於處理麵 選取之影像。此種配置方式由於所需彼此相接的晶片較少， 因此可大幅降低生產成本且可增加產量。 【圖式簡單說明】 1292559 第1圖係說明該指紋感應器的橫切面。 第2圖係該指紋感應器的透視平面圖。 2 :接觸面 4、7 :電性連接 6 :接線板 【主要元件符號說明】 1 :半導體晶片 3 :感應器電極 5 :記憶體胞元 8 :連接區域1292559 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a fingerprint sensor for use in a wafer card. [Prior Art] Processing fingerprint images formed by electrons, especially for identifying characters, requires high-order computing power and a large amount of memory. There are currently two options for connecting the actual fingerprint sensor to the desired electronic circuitry and to the memory. A fingerprint sensor can be connected to a computer as a semiconductor chip, which can perform image processing and identify and identify characters with suitable software. In this example, the storage capacity of the computer does not encounter any boundaries. If it needs to be replaced by miniaturization, it can be used in principle on a wafer card of standard specifications. However, in addition to the fingerprint sensor, a microprocessor chip or a microcontroller chip is required, which needs to be connected to each other by wires. . In this way, its size can be reduced and the hard_ is related to the required _. The use of such miniaturized systems is becoming more common. The technical limitations of the microcontroller wafer area used in the cassette are between about 25 square centimeters to 3 square centimeters. Even if the most modern technology is used, the money is too much to integrate enough of the memory space to process the fingerprint image in the controller chip. SUMMARY OF THE INVENTION The object of the present invention is a fingerprint-fingerprint sensor, which has a microprocessor or a microcontroller, and a memory card. 1292559 The present invention provides a fingerprint sensor having a semiconductor wafer, a contact area, an inductor electrode disposed in or below the contact area, and an electrical connection of the sensing electrode, wherein the memory cell is integrated In the semiconductor wafer, a wiring plane is disposed between the memory cell and the sensor electrode and the memory cell is connected and/or the sensor electrode is electrically conductively connected to the wiring plane. In the fingerprint sensor of the present invention, the semiconductor wafer of the fingerprint sensor is integrated with a RAM memory for processing the fingerprint image from the micro-processing state when processing the fingerprint image. Therefore, in the miniaturization system, one of the three wafers can be omitted, so only a semiconductor wafer of the fingerprint sensor and the controlled wafer are required. This simplifies the wiring of the wafer. The micro-control H, _ copper can be provided in the memory of the memory cell. Insulation In the fingerprint sensor, the memory system is disposed between the sensor electrodes, which can select individual image points (pixels) and the substrate. A wiring plane is located between the sensing H electrode and the memory cell. According to the semiconductor memory chip, the semiconductor body_section_ holds the memory cell as 70 integrated. The money Ilf is formed at the highest wiring plane. Between the memory cell 7G energy II electrode, there may also be a mitigation line or a metallization plate, which are layered structures stacked on each other, and are preferably used by an internal metal dielectric. The memory cell is a "SRAM cell". Compared to DRAM cells, the SRAM cell requires six transistors instead of a transistor, and the memory capacity required for the DRAM cell is slightly. 1292559 For a more detailed description of this fingerprint sensor, please refer to the first and second figures. [Embodiment] The first figure illustrates the fingerprint sensor having the semiconductor wafer 1 with a contact area 2 at the top for a finger. In or below the contact area 2, there are sensor electrodes 3, which are used individually for image points in the image dot grid. Preferably, the detection of the image is by volume measurement regarding whether to establish an electronic capacitance of the sensor electrode that changes with the surrounding environment. In this manner, the recesses and ridges of the fingertips placed on the contact area 2 can be detected, which change the capacitance. The first figure illustrates the electrical connection 4 of the inductor electrode 3. In this example, the route of the connection is to the substrate or the semiconductor body of the semiconductor wafer 1. Alternatively, these electrical connections can be connected to a wiring plane disposed on the semiconductor material. The memory cell 5 is located on the actual wafer, i.e., the semiconductor body or substrate, for example, it can be a germanium, top electronic component. The wiring plane 6 can activate the memory cell disposed between the memory cell 5 and the sensing electrode 3, and is surrounded by dielectric insulation. The first figure illustrates the electrical connection 7 for the memory cell 5, which provides a memory cell input or output, and thus is electrically coupled to the corresponding portion of the wiring plane 6. These particular locations can be word lines, such as the continuous extension of the wiring plane 6 in the cross-section of the first figure. In this example, the electrical connection 7 of the memory cell 5 is connected to the word line. The electrical connection 4 of the inductor electrode 3 passes between the conductors in the wiring plane 6 and is arranged behind the plane as seen in the first figure. The 1292559 internal metal dielectric system is omitted from the illustration. The line is flat: t should be! The connection 4 of the electrode 3 can also appear directly on the interface 6 as shown, or can be directly connected to another line of the line, without the dry material = 3. The other connection system of the memory cell 5 can be disposed in the "embedded bit line" of the semiconductor system=semiconductor memory chip, and the 体-body cell 70 crystal secret/dip region and connected to the cross section The scorpion is in the middle of the line. The second figure shows the reference symbol of the component on the perspective flat wafer 1 of the fingerprint sensor, and the pie (four) skirt (five) is placed at ° Hai + ¥ corresponds to the first figure. This wiring plane of the wiring board 'body cell 5' is omitted from the illustration. Furthermore, the sensor electrodes 3 as shown in the figure are at least partially transparent. The semiconductor material is connected to the top of the doped connection region 8 and to the inductor electrode 3 as shown by the dashed line in the second figure. In this example, the symbol cell $ /, the lining of the impurity region (four) is matched with the standard, which means that the connection 4 of the sensor electrode 3 is relatively evenly distributed in the rectangular direction in the square arrangement. In principle, the number of memory cells 5 can be arbitrarily determined and also depends on the set size of the entire sensor area. The geometric configuration of the sensor electrode 3 and the memory 5 is in accordance with the particular needs of the individual embodiments. The freely movable "(should)" formed by the memory cell under the sensor area can be connected to the finger and pattern sensor in the hardware for processing the image selected by the surface. In this way, since fewer wafers need to be connected to each other, the production cost can be greatly reduced and the output can be increased. [Simple description of the drawing] 1292559 Fig. 1 illustrates the cross section of the fingerprint sensor. Fig. 2 shows the fingerprint sensing Perspective plan view of the device 2: Contact surface 4, 7: Electrical connection 6: Terminal block [Description of main components] 1 : Semiconductor wafer 3: Sensor electrode 5: Memory cell 8: Connection area