TWI292212B - Substrate for electrical device - Google Patents
Substrate for electrical device Download PDFInfo
- Publication number
- TWI292212B TWI292212B TW94141351A TW94141351A TWI292212B TW I292212 B TWI292212 B TW I292212B TW 94141351 A TW94141351 A TW 94141351A TW 94141351 A TW94141351 A TW 94141351A TW I292212 B TWI292212 B TW I292212B
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- Prior art keywords
- circuit board
- insulator
- conductor
- electronic device
- wafer
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
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- Combinations Of Printed Boards (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
1292212 五、發明說明(1) 【發明2屬之技術領域】 的電子裝置疋尤提供θ 一種電路板結構及應用此電路板而製成 者。 ,其是可提高產品品質信賴性與節省材料 【先前技術】 圖1 8所示$習4 1,具有-絕C電:士置9的特徵,其包括:-電路板 路5,其中,絕緣體30且笛第一導體7、第二導體8及一導電通 置空間14,此容詈* ^第一上表面31 '第一下表面32及容 丨一導體7環設置於^ f絕緣體3〇第一上表面31,此第 路板1第一下表面32 //雷周緣,第二導體8則設置於電 電性連通,使電性可,白¥電通路5是將第一、二導體7、8 下表面32,其^可:絕緣體30第-上表面”傳輸到第一 孔6内,以増、加導有電一的通孔6,—填充物43填充於通 體8可視為導電通路通5ΓΛ強度,其中,第一導體7及第二導 第一、。導體7、8分如此,導電通路5就可藉由 32g上延伸,而填充物4 體30的第一上、下表面31、 paste)等物質,其♦ : '、、巴緣膠或導電膏(Conductive 製成的膏狀導電物質,^ 7由以錫(Tin )為主要材料 >片20,設置於電路板丨2二二膏狀導電物質製成者;一晶 線,分別與晶片20、間14; 一導電件60實施為導電 電性連通;一封穿粗7接合,使晶片20與第一導體7 及第-導體7 ―:球’包J電路板卜晶片2〇、導電= 以供對外電性連接1 s〇 er ball )50,接合於第二導體8 1292212 五、發明說明(2) 於上述習用電子裝置9中,因為其須使用錫球50才易於 與外界電性連接,如此,即增加產品成本,且因為錫球5 0需 藉由錫球接合墊53與第二導體8接合,使錫球50易受外力撞 擊、製程污染或熱應力的影響而自第二導體8剝離,致使電 子裝置9產生故障現象,同時,導電通路5因呈中空狀而不是 實心的結構,故於溫度變化大的環境中運作時易受熱應力 影響而產生龜裂E現象,使電性無法傳遞而造成產品功能 失效,亦令電子裝置9產生故障現象;而在電子裝置9中導電1292212 V. INSTRUCTION DESCRIPTION (1) The electronic device according to the technical field of the invention belongs to θ. A circuit board structure and a circuit board are used. It is to improve the reliability of the product quality and save the material. [Prior Art] Figure 1 shows the characteristics of the $1,1, and the C-electricity: the circuit board 5, in which the insulator 30 and the first conductor 7, the second conductor 8 and a conductive through space 14, the first upper surface 31' of the first lower surface 32 and the first conductor of the conductor 7 are disposed on the insulator 3 The first upper surface 31, the first lower surface 32 of the slab 1 is // the periphery of the ray, and the second conductor 8 is electrically connected to make electrical conductivity. The white electric path 5 is the first and second conductors 7 8, the lower surface 32, which can be: the first surface of the insulator 30 is transferred into the first hole 6, and the through hole 6 is electrically connected, and the filling material 43 can be regarded as a conductive path. 5 ΓΛ intensity, wherein the first conductor 7 and the second conductor first, the conductors 7, 8 are so, the conductive path 5 can be extended by 32g, and the first upper and lower surfaces 31 of the filler body 30 , paste) and other substances, its ♦: ',, the edge glue or conductive paste (Conductive made of paste-like conductive material, ^ 7 from tin (Tin) as the main material> sheet 20, set in The circuit board is made of a paste-like conductive material; a crystal line is respectively connected to the wafer 20 and the interlayer 14; a conductive member 60 is electrically conductively connected; and a thick layer 7 is bonded to make the wafer 20 and the first Conductor 7 and the first conductor 7 -: ball 'package J circuit board wafer 2 〇, conductive = for external electrical connection 1 s 〇 er ball ) 50, joined to the second conductor 8 1292212 5, description of the invention (2) In the above-mentioned conventional electronic device 9, since it is necessary to use the solder ball 50, it is easy to electrically connect with the outside, thus increasing the product cost, and because the solder ball 50 is to be bonded to the second conductor 8 by the solder ball bonding pad 53. The solder ball 50 is easily peeled off from the second conductor 8 by the impact of external force, process pollution or thermal stress, causing the electronic device 9 to malfunction. At the same time, the conductive path 5 is hollow rather than solid, so In an environment with a large temperature change, it is susceptible to thermal stress and generates a crack E phenomenon, which causes electrical failure to be transmitted and causes product failure, and causes the electronic device 9 to malfunction; and conducts electricity in the electronic device 9.
件60疋藉由一打線製程(wire bonding process)將導電 件60分別接合於晶片20與第一導體7上,令晶片2〇得與第〆 V體7電性連接;而於導電件60接合的過程中,電路板1通常 需要加熱至140〜30 or,以利實施導電件60的接合作業,其 中,雖然將導電膏(填充物43)填充於導電通路5通孔6内 增加導電通路5的強度,但因導電膏的溶點溫度僅為】83 使電路板1於加熱期間導電膏就會變軟,令導電件6 〇益接 合於導電通路5上而必須接合於第一導體7上,如此^敗 1就須設有第一導體7,因而增加成本並且亦限制’ ' 實用性。 吩伋丄的 【發明内容】 本發明電路板主要内容包括:一絕緣體,具有一第 表面、第一下表面,一個不具中空狀的導體’被絕緣^ 一上 此導體具有將電性自絕緣體上表面傳輪至體匕覆’ 周土 r衣曲的说台匕 並令導體的表面裸露於絕緣體表面,而裸露於絕而 的導體的表面得凸出(或不凸出)於絕緣體表面以供胃電^面連The conductive member 60 is bonded to the wafer 20 and the first conductor 7 by a wire bonding process, so that the wafer 2 is electrically connected to the second V body 7; and the conductive member 60 is bonded. In the process, the circuit board 1 usually needs to be heated to 140~30 or to facilitate the bonding operation of the conductive member 60, wherein the conductive paste (filler 43) is filled in the through hole 6 of the conductive path 5 to increase the conductive path 5. The strength, but because the melting point temperature of the conductive paste is only 83, the conductive paste will become soft during the heating of the circuit board 1, so that the conductive member 6 is beneficially bonded to the conductive path 5 and must be bonded to the first conductor 7. In this case, the first conductor 7 is required to be provided, thereby increasing the cost and also limiting the 'utility'. [Invention] The main contents of the circuit board of the present invention include: an insulator having a first surface and a first lower surface, and a conductor having no hollow shape is insulated. The conductor has an electrical self-insulator. The surface is transferred to the body to cover the surface of the earth and the surface of the conductor is exposed on the surface of the insulator, and the surface of the exposed conductor is convex (or not protruding) on the surface of the insulator. Stomach
12922121292212
五、發明說明(3) 接用,藉此,電路板即可令電子裝置不必須使 造成本降低及整體高度得以較薄,同、使製 空二=:者,使導體不易受熱應力影響而產^ 且令導電件可直接與導體表面接合。 龜w現象, 【實施方式】 〜ir月第:類電路板是本發明的基本結構,其中導體 述其結構及功能: 牛卜夕』各個視圖並詳 i表面3圖電路板1〇,包括:一絕緣體3〇,具有第一上 I·面31與弟一下表面32與側邊37;二第一導俨7n夂从 T體70具有第一上表面71隻^ _導體7〇,各第一導 /、名弟上表面71、弟一下表面72及第一側邊73 士 一側邊73是受絕緣體3〇包覆,並令第一導體第一 ^ =71、第一下表面72分別裸露於絕緣體3〇第一上 =一 了表面32以供電性連接用,其中第一導體7〇第二表 ::凸出於絕緣體30第一下表面32 一高度H,使第一 J Γ平::下表Λ72«與絕緣體30第一下表面32間是位於不同 面二Γ楚施為散熱件,其具有第一上表面81、 下表面82、第一側邊83、凹部86與延伸部85 1 第一側邊83是受絕緣體30包覆,令元件8〇的第一上八, 面,1、82分別外露於絕緣體3〇第一上、下表面3i、、J且 疋件80第一下表面82亦凸出於絕緣體3〇第_下 ’一一 度H,而元件80的凹部86呈非貫穿狀,實施為 用,π件80的延伸部85是設置並貼附在絕緣體3〇 、V. Inventive Note (3) In order to use, the circuit board can make the electronic device not have to be reduced in thickness and the overall height can be made thinner, so that the conductor is not easily affected by thermal stress. Produce ^ and make the conductive member directly engage the surface of the conductor. Turtle w phenomenon, [Embodiment] ~ ir month: The circuit board is the basic structure of the present invention, in which the conductor describes its structure and function: 牛卜夕" each view and details i surface 3 circuit board 1〇, including: An insulator 3〇 has a first upper I·face 31 and a lower surface 32 and a side 37; the first first guide 7n夂 has a first upper surface 71 from the T body 70 only _conductor 7〇, each first The upper surface 71 of the younger brother, the surface 72 of the younger brother, and the side 73 of the first side 73 are covered by the insulator 3, and the first conductor first ^ 71 and the first lower surface 72 are respectively exposed. The first surface of the insulator 3 is a power supply connection, wherein the first conductor 7 is protruded from the first lower surface 32 of the insulator 30 by a height H such that the first J is flat: The following table « 72 « is spaced apart from the first lower surface 32 of the insulator 30 as a heat sink having a first upper surface 81 , a lower surface 82 , a first side 83 , a recess 86 and an extension 85 . 1 The first side 83 is covered by the insulator 30, so that the first upper surface, the surface 1, and the first surface of the element 8 are exposed to the first upper and lower surfaces 3i of the insulator 3, J and the first lower surface 82 of the element 80 is also protruded from the insulator 3 〇 下 一 一, and the recess 86 of the element 80 is non-penetrating, and is used for the extension portion 85 of the π element 80 And attached to the insulator 3〇,
^ I -vC^ I -vC
第8頁 1292212 五、發明說明(4) 面32上,因此,延伸部85除可增加元件80與絕緣體3〇的接合 強度亦可提昇電路板1 〇的散熱效能;本實施例中,第一導體 70及元件gQ實施為相同材質的金屬,其可由銅、鋼合金或 其他適當的金屬製成,且可歸納出以下優點(功效): 命1 ·因第一導體70實施為一實心固態狀的導體而不具有中 空狀空間,使第一導體70不易發生龜裂現象; 2·因第一導體70第一下表面72凸出於絕緣體第一下表面 a +使電路板1 〇即可易於與外界電性連接而不須使用錫球, ▽電路板1 0製造成本得以降低; 因·當導電件實施為導電線時,因為銅的溶點約為丨0 8 3 1, 不既使電路板10已加熱至140〜300 °C間,第一導體7〇仍 面^變軟,令導電線可以直接接合於第一導體70第一上表 圖11上,入如此,電路板1 〇就可以不須要設有第一導體7 (參閱 8 ),^電路板1 〇的應用限制減少,並且節省成本,同時也 以提兩電路板1 0的信賴性。 上、圖1B所示,一電路板ι〇,包括··一絕緣體3〇,具有第一 形成丁表面31、32及側邊37,其中,絕緣體30是以填充方式 間1 ,〜使絕緣體3 〇第一下表面3 2呈一非平面狀·,一容置空 晶片4, 置於絕緣體30第一上表面3 1上,供容納物件(例如 有ί 5件、封裝體等)用;二第一導體7〇,各第一導體 其:弟—上、下表面71、72、第一側邊73及延伸部75, 伸部^ ^伸。卩75疋與第一導體7〇為整體單一結構,亦就是延 7〇二菩锚絡一導體70的一部份,且延伸部75是自第一導體 。、、緣體30的第一上表面31延伸設置並接合於絕緣體Page 8 1292212 V. Description of the Invention (4) On the surface 32, therefore, the extension portion 85 can increase the bonding strength between the component 80 and the insulator 3〇 to improve the heat dissipation performance of the circuit board 1 ;; in this embodiment, the first The conductor 70 and the component gQ are implemented as a metal of the same material, which may be made of copper, a steel alloy or other suitable metal, and the following advantages (efficacy) can be summarized: Life 1 · The first conductor 70 is implemented as a solid solid The conductor does not have a hollow space, so that the first conductor 70 is less prone to cracking; 2. The first lower surface 72 of the first conductor 70 protrudes from the first lower surface of the insulator a + to make the circuit board 1 〇 easy Electrical connection with the outside world without the use of solder balls, the manufacturing cost of the circuit board 10 is reduced; because when the conductive member is implemented as a conductive wire, since the melting point of copper is about 丨0 8 3 1, not the circuit The board 10 has been heated to between 140 and 300 ° C, and the first conductor 7 is still softened, so that the conductive wire can be directly bonded to the first conductor 70 on the first upper surface of FIG. 11 , so that the circuit board 1 is It is not necessary to provide the first conductor 7 (see 8), ^ circuit board 1 〇 The application limit is reduced, and the cost is saved, and the reliability of the two boards 10 is also mentioned. As shown in FIG. 1B, a circuit board, including an insulator 3, has a first forming surface 31, 32 and a side 37, wherein the insulator 30 is in a filling manner, and the insulator 3 is made. The first lower surface 3 2 is in a non-planar shape, and an empty wafer 4 is placed on the first upper surface 31 of the insulator 30 for accommodating the object (for example, ί5, package, etc.); The first conductor 7〇, each of the first conductors: the upper and lower surfaces 71, 72, the first side 73 and the extension 75 extend. The 卩75疋 is integral with the first conductor 7〇, that is, a portion of the conductor 70, and the extension 75 is from the first conductor. The first upper surface 31 of the edge body 30 is extended and joined to the insulator
1292212 五、發明說明(5) 30第一上表面31上,同時,第一導體70的第一侧邊73是受絕 緣體30包覆,使第一導體70埋在絕緣體30内,並令第一導體 70第一上、下表面71、72分別裸露並凸出於絕緣體30第一 上、下表面3 1、3 2外部以供電性連接用;本實施例中,由於 電路板1 0的第一導體7 0具有延伸部7 5,如此,則可歸納出以 下優點:1292212 V. Inventive Note (5) 30 on the first upper surface 31, at the same time, the first side 73 of the first conductor 70 is covered by the insulator 30, so that the first conductor 70 is buried in the insulator 30, and the first The first upper and lower surfaces 71, 72 of the conductor 70 are respectively exposed and protruded from the outside of the first upper and lower surfaces 31, 3 of the insulator 30 for power supply connection; in this embodiment, the first of the circuit board 10 The conductor 70 has an extension 75, and thus, the following advantages can be summarized:
1. 因第一導體70不僅藉第一側邊73與絕緣體30接合,同 時,其延伸部7 5亦與絕緣體3 0接合,使第一導體7 0與絕緣體 30接合面積增大,藉此,第一導體70即可與絕緣體30接合得 更穩固而不易產生剝離的問題; 2. 因延伸部75可依需求於絕緣體30第一上表面31自由伸 展設置,故可提昇電路板10的實用性。 圖1C所示,一電路板10,包括:一絕緣體30,具有第一 上、下表面31、32; —貫穿狀容置空間15,是供設置(容納) 物件(例如晶片、導電線、封裝體等)用;多個導體,分別 實施為第一導體70、第二導體7 0a,各第一、二導體的第 一側邊73、73a受絕緣體30包覆,令各第一、二導體70、1. Since the first conductor 70 is not only joined to the insulator 30 by the first side 73, but also the extension portion 75 is also joined to the insulator 30, the joint area of the first conductor 70 and the insulator 30 is increased, thereby The first conductor 70 can be more stably bonded to the insulator 30 without being easily peeled off. 2. Since the extension portion 75 can be freely extended on the first upper surface 31 of the insulator 30 as needed, the utility of the circuit board 10 can be improved. . As shown in FIG. 1C, a circuit board 10 includes: an insulator 30 having first and lower surfaces 31, 32; and a through-space accommodating space 15 for arranging (accommodating) objects (eg, wafer, conductive wire, package) The plurality of conductors are respectively implemented as the first conductor 70 and the second conductor 70a, and the first side edges 73, 73a of the first and second conductors are covered by the insulator 30, so that the first and second conductors are 70.
70a皆埋在絕緣體30内,並令各第一、二導體的第一上表面 71 ' 71a及第一下表面72、72a分別外露於絕緣體30第一 上、下表面31、32以供電性連接用,其中,各第一導體70是 具有凸部77,該凸部77具有一上表面並令該凸部77上表面 是實施為該第一導體70的第一上表面71,使第一導體70第 一上表面71呈突出狀且不凸出於絕緣體30第一上表面31, 而第二導體70a的第一上表面71a則是低於絕緣體30第一上70a is buried in the insulator 30, and the first upper surface 71' 71a and the first lower surface 72, 72a of the first and second conductors are exposed to the first upper and lower surfaces 31, 32 of the insulator 30 respectively for power connection. Each of the first conductors 70 has a convex portion 77 having an upper surface and the upper surface of the convex portion 77 is implemented as a first upper surface 71 of the first conductor 70 to make the first conductor The first upper surface 71 is protruded and does not protrude from the first upper surface 31 of the insulator 30, and the first upper surface 71a of the second conductor 70a is lower than the first surface of the insulator 30.
第10頁 1292212 五、發明說明(6) ^ ------ 表面3 1 ;本實;^ , 狀,藉此,可拇如'4中,因第一導體70第一上表面71呈凸出 令電路板10: 裝體(未緣示)與電路板10的接合面積, 路板10剝離的體接合得更穩固而不易產生封裝體與電 圖1 D所示 — 緣體3〇3及第’_一罐電綠路板1〇,其包括:一絕緣體3〇,由第一絕 上表面71、…一、、、邑緣體30b組成;二第一導體70,各具第一 各第一侧邊7弟3二下表面72、延伸部75及第一側邊以,其中’ 絕緣體30包覆^傾/狀’而各延伸部75及第一側邊73皆受 露於絕緣體30第—\—導體70的第一上、下表面71、72裸 元件80,其材質鱼\下表面31、32以供電性連接用;一 第一上表面81裸露於絕一^ 14,設置於元件8〇繁一 …弟上衣谷置空間 例中,第一導體70延抽ϋ面81上以供設置物件用;本實施 固,同時,仍秋且t 不僅可被絕緣體3〇包覆而更穩 ,仞…、具有自由延伸的 。 圖1E所示,一電路把 " 上、下表面31、32·」繁,包含:一絕緣體30,具有第一 令第一導體70第一上導體70皆受絕緣體30包覆’並 用,其中,第一上表面、第一下表面72能供電性連接 元件8〇,其具有一貫穿狀W"絕緣體30第一上表面— 邊84,其材質與第一導體7 ,洞88、第一侧邊83、第二側 覆,而第二側邊84外露於H,帛一側邊83受 '絕、緣體3〇包 線、封裝體等)用Id容矣納)物件(例如曰曰曰片、導電 、 上表面81是凸出於絕緣體3〇第一Page 10 1292212 V. Description of invention (6) ^ ------ Surface 3 1 ; This is true; ^ , Shape, whereby, in the thumb, '4, because the first upper surface 71 of the first conductor 70 is The projections make the circuit board 10: the joint area of the package (not shown) and the circuit board 10, and the body of the board 10 is bonded to be more stable and not easy to produce the package and the electric diagram 1 D - the edge body 3〇3 And a '_one can electric green road plate 1〇, comprising: an insulator 3〇, consisting of a first upper surface 71, ..., a rim body 30b; two first conductors 70, each having a first Each of the first side 7 and the second lower surface 72, the extending portion 75 and the first side are, wherein the 'insulator 30 is covered with a tilt/shape' and each of the extending portion 75 and the first side 73 are exposed to the insulator. 30---the first upper and lower surfaces 71, 72 of the conductor 70, the bare component 80, the material fish \ lower surface 31, 32 for power supply connection; a first upper surface 81 is exposed to the absolute ^ 14, set In the case of the component 8 , the first conductor 70 is extended on the kneading surface 81 for the object to be placed; More stable, hehe... With free extension. As shown in FIG. 1E, a circuit includes " upper and lower surfaces 31, 32", including: an insulator 30 having a first first conductor 70 and a first upper conductor 70 covered by an insulator 30, wherein The first upper surface and the first lower surface 72 are connectable to the power supply connecting member 8A, and have a through-wafer W" the first upper surface-side 84 of the insulator 30, the material of which is the first conductor 7, the hole 88, and the first side The side 83 and the second side are covered, and the second side 84 is exposed to H, and the side 83 of the crucible is subjected to an object such as a 'dead, a body 3 enveloping line, a package, or the like. The sheet, the conductive, upper surface 81 is protruded from the insulator 3
第11頁 1292212 五、發明說明(7) ____ 上表面3 1 ;本實施例 从t % 一 孔洞88以容納物件,糟?變70件80的形狀,令元件80具 料。 ,康此,使電子裝置的厚度變薄而節省材 圖1F所示,一電 上、下表面31'32. _@〇,包含:一絕緣體3〇,具有第一 緣體30包覆,j:中繁一 一導體70及第二導體7〇a皆受絕 77 . - - ^ ’弟一導體70凸部77與第二導體70a凸邱 7 7a令該第一導體7〇及 子遐/仏凸邛 第一導體70凸邻77盘给-導體0的表面呈凸出狀,且該 露于該絕緣體第一工f :二體70a凸部77&是分別凸出並外 77Ka. ^ ^ π 上表面31,而該第二導體70a (另一)巧邱 7b則疋不凸出但外露于該絕緣體第一下表面3; _): ,其材^與第一導體7〇相同,*第一側邊83面3。= 二而:-上表面81外露並凸出於絕緣體3〇7一絕上緣? ;該“80第一上表面81是實施為該第= 間14供設置(容納)物件(晶片、導電件、封『Ο。置空 實施例中,藉改變元件的形狀,可令晶片(未^ _等)用;本 件80第-上表面81時,將晶片產生的熱(Heaf)=置於元 ::缘體30的元件8。而能更有效率的將熱傳導到電〜板埋"Page 11 1292212 V. INSTRUCTIONS (7) ____ Upper surface 3 1 ; This embodiment From t % a hole 88 to accommodate objects, what? The shape of 70 pieces 80 is changed to make the component 80 material. In this case, the thickness of the electronic device is thinned and the material is saved as shown in FIG. 1F. An electric upper and lower surface 31'32. _@〇 includes: an insulator 3〇, having a first edge 30 covering, j : The middle and the first conductor 70 and the second conductor 7〇a are all rejected 77. - - ^ 'The first conductor 70 convex portion 77 and the second conductor 70a are convex 7 7a to make the first conductor 7 and the 遐 / The first convex conductor 70 is convexly adjacent to the 77-disk-conductor 0 surface, and the exposed first body f: the convex portion 77 of the two-body 70a is convex and outside 77Ka. ^ ^ π upper surface 31, and the second conductor 70a (other) is not convex but exposed to the first lower surface 3 of the insulator; _):, the material is the same as the first conductor 7〇, * The first side 83 faces 3. = 2 and: - The upper surface 81 is exposed and protrudes from the insulator 3〇7. The "80 first upper surface 81 is implemented as the intermediate portion 14 for providing (accommodating) the object (wafer, conductive member, seal. In the blank embodiment, by changing the shape of the component, the wafer can be ^ _, etc.); when the 80th-upper surface 81 of the piece 80, the heat generated by the wafer (Heaf)= is placed on the element 8 of the element:: the body 8 can be more efficiently transferred to the electricity ~ plate buried " ;
圖1G所示,一電路板1〇,包括:一絕緣體μ具 ^ 表面31、第一下表面32與側邊37;—貫穿狀容’置、第一上 設置(容納)物件(晶片、導電線、封裝體等)用一:,曾供 體70,環設於貫穿狀容置空間15周緣,具有第一上一第一導 第一下表面72、第一側邊73與第二側邊74,並令第71、 下表面71、72裸露於絕緣體30第一上、下矣—上、 广衣面31、32以供As shown in FIG. 1G, a circuit board 1A includes: an insulator μ surface 31, a first lower surface 32 and a side edge 37; a through-shape, a first upper (receiving) object (wafer, conductive) a wire, a package, and the like: a donor 70 is disposed on the periphery of the through-hole accommodating space 15 and has a first upper first guiding first lower surface 72, a first side 73 and a second side 74, and the 71st, lower surface 71, 72 is exposed on the first upper and lower jaws of the insulator 30, the wide surface 31, 32 for
1292212 五、發明說明(8) 電性連接用,其中,各第一側邊7 3皆受絕緣體3 0包覆,且令 第二側邊74是裸露於貫穿狀容置空間1 5外部,藉此可縮短 第一導體70與容納於容置空間15内晶片(未繪示)的距離而 能縮短導電線的長度;1292212 V. INSTRUCTION DESCRIPTION (8) For electrical connection, each of the first side edges 7 3 is covered by the insulator 30, and the second side 74 is exposed outside the through-hole accommodating space 15 This can shorten the distance between the first conductor 70 and the wafer (not shown) accommodated in the accommodating space 15 to shorten the length of the conductive line;
二第二導體70a,是具有第一上表面71a、第一下表面 7 2a、第一側邊73a與第二側邊74a,其中,第一側邊73a至少 一部分是受絕緣體3 0包覆並埋在絕緣體3 0内,並令此第二 側邊74a至少一部分是裸露於絕緣體3 0側邊3 7外部,且第一 上表面71a及第一下表面72a分別裸露於絕緣體第一上表面 31及第一下表面32,藉此,因第二導體70a第二側邊74a無絕 緣體30(亦就是第二側邊74a不被絕緣體30包覆)而可縮小 電路板10的面積,且因第二導體70 a第二側邊74 a是裸露於 絕緣體30側邊37則可增加第二導體70a對外電性連接的面 積而提升電性連通的品質;此例中,電路板1 0的容置空間亦 可依需求實施為非貫穿狀,以利產業的運用。The second conductor 70a has a first upper surface 71a, a first lower surface 724a, a first side 73a and a second side 74a, wherein at least a portion of the first side 73a is covered by the insulator 30 Buried in the insulator 30, and at least a portion of the second side 74a is exposed outside the side of the insulator 30, and the first upper surface 71a and the first lower surface 72a are exposed to the first upper surface 31 of the insulator, respectively. And the first lower surface 32, whereby the second side 74a of the second conductor 70a is free of the insulator 30 (that is, the second side 74a is not covered by the insulator 30), thereby reducing the area of the circuit board 10, and The second side 74 a of the second conductor 70 a is exposed on the side 37 of the insulator 30 to increase the electrical connection area of the second conductor 70 a to the external electrical connection; in this example, the board 10 is accommodated. Space can also be implemented as non-penetrating according to demand, in order to benefit the use of industry.
圖1H所示,一電路板10,包括:一絕緣體30,具有第一上 表面31、第一下表面32; —凹陷狀的容置空間14,供設置物 件(晶片、黏著件、,封裝體等)用;二第一導體70,皆受絕緣 體30包覆,令各第一上、下表面71、72裸露於絕緣體30第 一上、下表面31、32以供電性連接用;一元件80,其材質是 不與第^^導體7 0相同,其是實施為铭金屬,設置於絕緣體3 0 第一下表面32上,令元件80的第一上表面81與絕緣體30第 一下表面32接合,且具有二孔洞88令第一導體70的第一下 表面7 2依然是外露在絕緣體第一下表面3 2外部;本實施例As shown in FIG. 1H, a circuit board 10 includes an insulator 30 having a first upper surface 31 and a first lower surface 32. A recessed accommodating space 14 for arranging objects (wafer, adhesive, package) And the second conductor 70 is covered by the insulator 30, so that the first upper and lower surfaces 71, 72 are exposed to the first upper and lower surfaces 31, 32 of the insulator 30 for power supply connection; The material is not the same as the first conductor 70, which is implemented as a metal, and is disposed on the first lower surface 32 of the insulator 30, so that the first upper surface 81 of the component 80 and the first lower surface 32 of the insulator 30 Bonding, and having two holes 88 such that the first lower surface 72 of the first conductor 70 is still exposed outside the first lower surface 3 2 of the insulator; this embodiment
第13頁 1292212 五、發明說明(9) ____ 中,由於元件80接合於絕緣體 一 露在外界的面積增彡曰 3 2,使元件8 0裸 圖II所示,-電路:】Π Λ 板10的散熱效果。 表面3卜第-下表二板1Q,包,:—絕緣_,具有第-上 元件…在絕緣面體 一側邊83分別與絕緣體3〇接合%苐^表面W、第 内,除提昇電路板接合於絕緣體_部⑼ 較薄。 的散…效果外,亦可使電路板10的厚度Page 13 1292212 V. Inventive Note (9) ____, since the component 80 is bonded to the insulator, the area of the outside is increased by 3 2, so that the component 80 is bare as shown in Figure II, the circuit: Π Λ 板 10 Cooling effect. Surface 3 - first to second table 1Q, package, : - insulation _, with the first - upper element ... on the side of the insulating surface 83 respectively with the insulator 3 苐 ^ surface W, the first, in addition to the lifting circuit The board is bonded to the insulator _ section (9) is thin. In addition to the effect of the bulk, the thickness of the circuit board 10 can also be
h矣& Π 1J所示,一電路板1〇,包括:一絕緣體3〇,具有第一上 ΐ=、Λ一一下表面32及孔洞38;-容置空間14;二第-£ .. 一上表面71、第一下表面72、第一側邊73及 ^ 。卩75,令第一上表面71、第一下表面72均外露於絕緣h矣& Π 1J, a circuit board 1〇, comprising: an insulator 3〇, having a first upper ΐ=, a first lower surface 32 and a hole 38; a accommodating space 14; An upper surface 71, a first lower surface 72, first side edges 73 and ^.卩75, the first upper surface 71 and the first lower surface 72 are exposed to the insulation
一 〇供電性連接用,其中,延伸部75設置於絕緣體30第一上 ^面3 1,而第一側邊73設置於絕緣體孔洞38内,並不直接與 絕緣體3 0接合;本實施例中,雖然第一導體7 〇第一側邊7 3 不直接與絕緣體30接合,但於製造電子裝置的過程中,可填 充一導電貧(Conduct i ve paste)62於絕緣體30孔洞38内, 使第一導體70第一側邊73藉導電膏62與絕緣體30接合,據 晒_此,第一導體70可被穩定的固定住,同時第一導體70可藉第 一側邊7 3增加與外界接合的面積而提昇電子裝置品質,其 中,導電膏62可實施為錫膏(Solder paste)或由其他膏狀 的導電物質製成,並令導電膏62有一部份可依需求凸出且 外露于絕緣體3〇第一下表面32。For the power supply connection, the extension portion 75 is disposed on the first upper surface 31 of the insulator 30, and the first side 73 is disposed in the insulator hole 38, and is not directly engaged with the insulator 30; in this embodiment The first conductor 7 〇 the first side edge 7 3 is not directly bonded to the insulator 30 , but in the process of manufacturing the electronic device, a conductive cathode 62 can be filled in the hole 38 of the insulator 30, so that The first side edge 73 of a conductor 70 is bonded to the insulator 30 by the conductive paste 62. According to the drying, the first conductor 70 can be stably fixed, and the first conductor 70 can be joined to the outside by the first side edge 73. The area of the electronic device is improved, wherein the conductive paste 62 can be implemented as a solder paste or made of other paste-like conductive materials, and a portion of the conductive paste 62 can be protruded and exposed to the insulator as needed. 3〇 The first lower surface 32.
第14頁 1292212 五、發明說明(10) _ 弟一類電路板是結合本發明第一類 設二導電通路或其他導體將第一、二導體電』=,再 兹舉下列各個視圖並詳述其結構及功能:4通而成, 圖ικ所不,一電路板n,包括··一絕緣體1 — 面31與第一下表面32 ; —元件80,設置於絕緣體3〇 •^表 面3!,具第-上表面81、第一下表面82及延伸部085弟::表 第一下表面82亦受絕緣體3〇包覆未裸露於絕 ’ ^ , 一容置空間u;二第—導體70,各具第一上表面 表面72、第一側邊73及延伸部75,第一導體7〇 下Page 14 1292212 V. INSTRUCTIONS (10) _ The first type of circuit board is the first type and the second conductor in combination with the first type of two conductive paths or other conductors of the present invention, and the following views are further described and detailed Structure and function: 4-way, Figure ικ, a circuit board n, including an insulator 1 - face 31 and first lower surface 32; - component 80, disposed on the surface of the insulator 3 〇 ^ ^ 3! The first lower surface 81, the first lower surface 82 and the extension portion 085 are: the first lower surface 82 of the watch is also not covered by the insulator 3 未, and the accommodating space u; the second conductor 70 Each having a first upper surface surface 72, a first side edge 73, and an extension portion 75, the first conductor 7 is lowered
I包覆,令第-上表面71、第一下表面72裸露於絕緣= 一上表面31、第一下表面32以供電性連接用,其中,第一下 表面72是凸出於絕緣體3〇第一下表面32 ,♦二第二導體 7 0a,各第二導體7〇a分別與絕緣體30第一上表面31接合 並各具有一孔洞78a ;三第三導體7〇b分別與第二導體7口〇’&I cladding so that the first upper surface 71 and the first lower surface 72 are exposed to the insulation = an upper surface 31 and the first lower surface 32 for power supply connection, wherein the first lower surface 72 protrudes from the insulator 3 a first lower surface 32, ♦ two second conductors 70a, each of the second conductors 7〇a are respectively joined to the first upper surface 31 of the insulator 30 and each have a hole 78a; the third third conductor 7〇b and the second conductor respectively 7 mouth 〇'&
第一上表面71a、元件80第一上表面81接合,其中,與第二 導體70a接合的第三導體70b,其有一部份是設置在第二導 體70a孔洞78a内,並與第一導體7〇第一上表面η接合;本實 施例中,第二導體70a藉第三導體70b與第一導體7〇接合而 電性連通,使電路板11可實施為具有二導電層的電路板而 更具實用性。 圖1 L所示,一電路板π,包括:一絕緣體3 〇,由第一絕緣 體30a及弟一絕緣體30b組成,其具第一上表面31及第一下 表面3 2及一孔洞3 8 ; —元件8 0,設置於絕緣體3 〇第一下表 面32,具第一上表面81及第一下表面82,其中,第一下表面The first upper surface 71a and the first upper surface 81 of the element 80 are joined, wherein a third conductor 70b joined to the second conductor 70a has a portion disposed in the hole 78a of the second conductor 70a and coupled to the first conductor 7 The first upper surface η is bonded; in this embodiment, the second conductor 70a is electrically connected to the first conductor 7 by the third conductor 70b, so that the circuit board 11 can be implemented as a circuit board having two conductive layers. Practical. As shown in FIG. 1L, a circuit board π includes: an insulator 3 〇, which is composed of a first insulator 30a and a first insulator 30b, and has a first upper surface 31 and a first lower surface 3 2 and a hole 3 8; The component 80 is disposed on the first lower surface 32 of the insulator 3, having a first upper surface 81 and a first lower surface 82, wherein the first lower surface
第15頁 1292212 五、發明說明αυ ------ 82裸露於絕緣體3〇第一下表面32,而第一上表面^受第二 絕緣體30b包覆而未裸露於絕緣體3〇表面;一容置空間", 设置於絕緣體3 0第一上表面31,供設置物件用;二第一導體 \〇,分別具有第一上表面71、第一下表面72、延伸部75及 第一側邊73,其中,第—下表面72裸露於絕緣體第一下表面 32,而第一上表面71及延伸部75受第二絕緣體3〇b包覆而未 裸露於絕緣體30表面;一第二導體70a,設置於絕緣體30第Page 15 1292212 V. Description of the Invention αυ ------ 82 is exposed on the first lower surface 32 of the insulator 3, and the first upper surface ^ is covered by the second insulator 30b and is not exposed on the surface of the insulator 3; The accommodating space " is disposed on the first upper surface 31 of the insulator 30 for the object to be disposed; the second first conductor 〇 has a first upper surface 71, a first lower surface 72, an extension portion 75 and a first side Side 73, wherein the first lower surface 72 is exposed to the first lower surface 32 of the insulator, and the first upper surface 71 and the extension portion 75 are covered by the second insulator 3〇b without being exposed on the surface of the insulator 30; a second conductor 70a, set in insulator 30
一上表面31,其中,第二導體70a的一部份設置於絕緣體30 的孔洞38内,並與第一導體70第一上表面71接合;一導電通 |_路69,其為習式的導電通路,分別將第一導體70與第三導體 7Ob電性連通;本實施例中,不僅可令第一導體70直接與第 二導體70a接合而電性連通,並且亦可以用導電通路69將第 一導體70與第三導體7 Ob電性連通,使電路板11可實施為三 導電層的電路板。An upper surface 31, wherein a portion of the second conductor 70a is disposed in the hole 38 of the insulator 30 and is engaged with the first upper surface 71 of the first conductor 70; a conductive pass__ path 69, which is a conventional The conductive path electrically connects the first conductor 70 and the third conductor 7Ob respectively. In this embodiment, not only the first conductor 70 can be directly connected to the second conductor 70a but also electrically connected, and the conductive path 69 can also be used. The first conductor 70 is in electrical communication with the third conductor 7 Ob such that the circuit board 11 can be implemented as a circuit board of three conductive layers.
圖1M所示,一電路板11,包括:一絕緣體30,具第一上表 面31、一第一下表面32、二第二下表面34及四凹部36;二 第一導體70,各具第一上表面71、第一下表面72、第一側 邊73及延伸部75,第一導體70受絕緣體30包覆,令第一上表 面7 1凸出且外露於絕緣體3 0第一上表面3 1以供電性連接 一用,並令其第一下表面72裸露於絕緣體30第一下表面32以 供電性連接用;二第二導體70a,設置在絕緣體四部Μ内, 各具第一上表面71a、第一下表面72a、第一侧邊了33及第 二側邊74a,其第一上表面71 a及第〆側邊73a分別與絕緣體 30接合,其中,第一下表面72a及第二側邊74a未受絕緣體30As shown in FIG. 1M, a circuit board 11 includes an insulator 30 having a first upper surface 31, a first lower surface 32, two second lower surfaces 34, and four recesses 36. The first conductor 70 has a first An upper surface 71, a first lower surface 72, a first side 73, and an extension 75, the first conductor 70 is covered by the insulator 30, so that the first upper surface 71 protrudes and is exposed on the first upper surface of the insulator 30. 3 1 is used for the power supply connection, and the first lower surface 72 is exposed to the first lower surface 32 of the insulator 30 for power supply connection; the second conductor 70a is disposed in the four sides of the insulator, each having the first The surface 71a, the first lower surface 72a, the first side edge 33 and the second side edge 74a, the first upper surface 71a and the second side edge 73a are respectively joined to the insulator 30, wherein the first lower surface 72a and the first surface The two sides 74a are not subjected to the insulator 30
1292212 五、發明說明(12) 包覆而裸露在外供雷扯 緣體30第一下表面32\連§接用;二第三導體70b,設置在絕 72b苴中笛 ’各具第一上表面71b及第一下表面 第」導以第:下表面面 合,使第一導體70斑第面及第二導體7〇a第一下表面723接 U徂%罢此从’、弟—V體70a能電性連通;一容置空間 1 4,供设置物件用·士 ^ 齅7Π盥筮-道μ “本實施例中,藉第三導體701)令第一導 體/ U與弟一-導體7 0 a Η?» 11 齋盛ΛΑ Φ1 也電性連通,使電路板1 1可實施為二導 Φ业认丁主丈 、€緣體30具凹部36使電路板11具有凸 出狀的下表面使雷%上 時,第三導體70h可田 與其他電路板接合,同 ' 了用電鍍(Plating)或濺鍍 (SPuttering)或其他的方式形成。 # ,一電路板U,包括:一絕緣體30,具有第一上 义 下表面32及孔洞38; —容置空間14· -箆一 導㈣,具第-上表面71、第一下表面72、第門一 14侧;f3及 延伸部75,令第一上表面71、第一下表面72均外露於絕緣 體3 0供電性連接用,其中,延伸部7 5設置於絕緣體3 〇第一上 表面31,而第一側邊73設置於絕緣體孔洞38内,並不與絕緣 體30接合;二第二導體7〇a,各具第一上表面7la、第二下表 面72a、第一側邊73a與第二側邊74a,其中第一上表面 >及第一側邊73a均受絕緣體30包覆而未裸露於絕緣體3〇表 面,其中,第二側邊7 4 a未受絕緣體3 0包覆而裸露於絕緣體 3 0的孔洞38;本實施例中,因設置第二導體7〇a,使電路板u 可實施為二導電層的電路板,同時,雖然第二導體7〇a第二 側邊74a不直接與絕緣體3〇接合,但於製造電子裝置的過程1292212 V. INSTRUCTIONS (12) Covered and exposed to the outside of the thundering body 30, the first lower surface 32\ § is used; and the second third conductor 70b is disposed on the yin 72b 苴 笛 各 each with the first upper surface 71b and the first lower surface are guided by the lower surface to make the first conductor 70 spot and the second conductor 7〇a first lower surface 723 connected to U徂%. 70a can be electrically connected; a receiving space is 14 for the object to be used, and the first conductor / U and the first conductor are conductors. 7 0 a Η?» 11 斋盛ΛΑ Φ1 is also electrically connected, so that the circuit board 1 1 can be implemented as a two-conductor Φ industry identifiable master, the rim body 30 has a recess 36 to make the circuit board 11 have a convex shape When the surface is made to have a % of the lightning, the third conductor 70h can be joined to other circuit boards, and is formed by plating or SPuttering or other means. #, a circuit board U, including: an insulator 30, having a first upper surface 32 and a hole 38; - an accommodation space 14 · - a guide (four), having a first-upper surface 71, a first lower surface 72, a first door 14 side; f3 and The extension portion 75 is configured to expose the first upper surface 71 and the first lower surface 72 to the insulator 30 for power supply connection, wherein the extension portion 75 is disposed on the first upper surface 31 of the insulator 3, and the first side 73 The first conductor 7〇a has a first upper surface 71a, a second lower surface 72a, a first side 73a and a second side 74a, wherein the second conductor 7〇a is disposed in the insulator hole 38. An upper surface > and a first side edge 73a are both covered by the insulator 30 and are not exposed to the surface of the insulator 3, wherein the second side 7 4 a is not covered by the insulator 30 and is exposed to the hole of the insulator 30 38. In this embodiment, the circuit board u can be implemented as a circuit board of two conductive layers by providing the second conductor 7〇a, and at the same time, although the second side 74a of the second conductor 7〇a is not directly connected to the insulator 3〇 Bonding, but in the process of manufacturing an electronic device
第17頁 1292212 五、發明說明(13) 中,牙填/二導電膏62於絕緣體3。孔洞38内,使第-導體 第一側邊73糟導電膏62與絕緣體3〇接合,據此,第一導體 70可被,固定住,同時第一導體?〇可藉第一側邊”而 增加與外界接合的面積而提昇電 甘士道+古 62是亦將第-導體7。與第4】7:裝^ 圖10所示,一電路板Η 白紅 .^ ^ ^ 7 , 孜u’包括:—絕緣體30;—呈凹陷狀 用I "I件(晶片、點著件、導電件、封裝 ΓΛ;二階梯狀的第一導體7〇,由第-上表面71、第 i上# rfr ”ί第一側邊73組成,且受絕緣體30包覆,令第一Page 17 1292212 5. In the invention description (13), the dental filling/second conductive paste 62 is on the insulator 3. In the hole 38, the first side of the first conductor 73 is bonded to the insulator 3, whereby the first conductor 70 can be fixed and the first conductor. 〇You can use the first side to increase the area of the joint with the outside world and increase the electric Gans Road + the ancient 62 is also the first conductor 7 and the 4th 7: 7 ^ Figure 10, a circuit board Η white red .^ ^ ^ 7 , 孜u' includes: - insulator 30; - I " I piece (wafer, point piece, conductive part, package ΓΛ; two stepped first conductor 7 〇, by the first - the upper surface 71, the i-th upper #rfr" ί first side 73, and covered by the insulator 30, so that the first
於絕緣體30供電性連接用,其中,各㈠ =^、、、巴緣體30第一上表面31延伸至該容置空間14内;二 ΐ ?〇a,亦文絕緣體3〇包覆,令第一上表面71a被絕緣 於總已覆亚埋在絕緣體3〇内,同時,令第一下表面了仏凸出 又j緣體30第一下表面32以供電性連接用;二導電通路㈢, 與第一導體70及第二導體7〇a接合而電性連通,如此, 可提尚電路板11的實用性;其中,第二導體7〇a的第一上 =7la亦可依需求接合在絕緣體3〇第一下 32上並供 電性連接用。 — 圖1!>所不,一電路板11,包括:四第一導體70,各具有第For the power supply connection of the insulator 30, wherein the first upper surface 31 of the pad body 30 extends into the accommodating space 14, and the second insulator 〇a, the insulating body 3 〇 The first upper surface 71a is insulated from being completely buried in the insulator 3, and at the same time, the first lower surface is protruded and the first lower surface 32 of the edge 30 is electrically connected; the second conductive path (3) And electrically connected to the first conductor 70 and the second conductor 7〇a, so that the utility of the circuit board 11 can be improved; wherein the first upper side of the second conductor 7〇a=7la can also be joined as needed It is connected to the first lower 32 of the insulator 3 for power supply connection. - Figure 1! > No, a circuit board 11 comprising: four first conductors 70, each having a
^上表面71、第一下表面72及第一側邊μ;四第一導電層 導’各具有上表面5 6、下表面5 7及側邊5 8,分別設置在第一 ^體70第一上表面71,並與第一導體7〇接合;四第二導電層 第&,各具有上表面56a、下表面57a及側邊58a,分別設置在 導電層55上表面56上,並與第一導電層55接合;一絕緣The upper surface 71, the first lower surface 72 and the first side edge μ; the four first conductive layer guides each have an upper surface 56, a lower surface 57 and a side edge 5, respectively, which are respectively disposed on the first body 70 An upper surface 71, and is bonded to the first conductor 7; the fourth second conductive layer &, each having an upper surface 56a, a lower surface 57a and a side 58a, respectively disposed on the upper surface 56 of the conductive layer 55, and First conductive layer 55 is bonded; an insulation
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五、發明說明(14) 體30,具有苐一上表面31、第一下表面32及側邊37將第一 導體70、第一導電層55及第二導電層55a包覆,使第一導體 70、第一導電層55及第二導電層55a埋設在絕緣體3〇内,其 中,第二導電層體55a上表面56a未受絕緣體30包覆而裸露 於絕緣體30第一上表面31,以供電性連接用;由電路板u結 構可知,由於各導體與導電層均埋設在絕緣體内,使電路板 的厚度得以縮小,而且導電層令該電路板得易於與外界電 性接合,並能提昇該電路板對外界電性接合的品質信賴 本發明第三類電路板是結合本發明第一類或第二類電 再設置一導電通路或導體將各導體電性連通而形成 多層的電路板,其可依需求再增加適當的層數以利產業 使用;茲舉下列各個視圖並詳述其結構及功能: H1Q所示’電路板12,其由本發明第一、一類電路板 組成,其中,電路板",有一第一絕緣體3〇-二電第路一板 筮面31a,而二第一導體7〇,設置在第一絕緣體,並令 3 = ί體第—下表面72及第一上表面71分別裸露於第 性連极—3〇8第一上表面313及電路板12第一下表面32供電V. INSTRUCTION OF THE INVENTION (14) The body 30 has a first upper surface 31, a first lower surface 32 and side edges 37 which cover the first conductor 70, the first conductive layer 55 and the second conductive layer 55a to make the first conductor The first conductive layer 55 and the second conductive layer 55a are embedded in the insulator 3, wherein the upper surface 56a of the second conductive layer 55a is not covered by the insulator 30 and is exposed on the first upper surface 31 of the insulator 30 to supply power. For the connection of the circuit board, it can be known that since the conductors and the conductive layer are buried in the insulator, the thickness of the circuit board is reduced, and the conductive layer makes the circuit board easy to electrically connect with the outside, and can improve the The circuit board of the present invention relies on the quality of the external electrical connection. The third type circuit board of the present invention is a circuit board which is formed by electrically connecting the conductors with a conductive path or a conductor in combination with the first type or the second type of the present invention. The appropriate number of layers can be added as needed to facilitate industrial use; the following views are given and their structure and function are detailed: H1Q shows 'circuit board 12, which is composed of the first and first type of circuit boards of the present invention, wherein the circuit board ", there is a first insulator 3 〇 2 第 第 一 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 Powering the first upper surface 313 of the first polarity-3〇8 and the first lower surface 32 of the circuit board 12
—絕緣=而a Ϊ 2路板1〇,具有一第二絕緣體3〇b,設置在第 第二 第一上表面31a上,而一第二導體70a,設置在 上表體3〇b,並令第一上表面71a裸露於電路板12第一 與第一道1供電性連接用,同時,第一下表面72a藉導電膏62 ψ _ 體7 0第一下表面7 2接合而電性連通;本實施例 % 將本發明的第一類電路板1〇及第二類電- insulation = and a Ϊ 2 way board 1 〇, having a second insulator 3 〇 b, disposed on the second first upper surface 31a, and a second conductor 70a, disposed on the upper body 3 〇 b, and The first upper surface 71a is exposed to the first circuit 1 of the circuit board 12 for power supply connection, and the first lower surface 72a is electrically connected by the first lower surface 72 of the conductive paste 62 ψ _ body 70. This embodiment % will be the first type of circuit board of the present invention and the second type of electricity
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路板11尨合而形成電 導電層的電路板如 ,使電路板丨2成為一具有三層 圖1R所示,」雷敗,4使電路板12更具實用性。 而成,其中,電路板10女12,由二第一類電路板1〇堆疊設置 -下表面32,而二第°4:fn緣體…上表面”及第 一下表面72,並令第一 f體,分別具有第一上表面η及第 表面供電性連接用·二表面71、72裸露於絕緣體30 70及元件80接合使二==4骨62,分別與相严應的第一導體 ^ ^ # SI 1 一電路板10能藉導電霄62而電性連通 戶導電層。 的散熱效率;本實施例中,電路板12具有三 — '一、三類的電路板其絕緣體可由黏膠、陶 瓷=玻璃、樹脂或其他適當的絕緣物質製成,而各導體與 各兀件外露於絕緣體3 〇表面的部份可再設置至少一層以上 適當的導電層材料(鎳、金、銀或鈀等)以提升電性連接時 的品質,且各導體、絕緣體與元件可製成不同的形狀圖樣 (Patterns ),亦可令導體的側邊外露於絕緣體的侧邊,且 可依需求改變絕緣體、導體與元件的形狀及數量,用以提 昇電路板的功效,而導體與元件可由銅箔、鋼合金、鎳、 金屬合金(metal 1 ic al l〇y)或其他適當的物質製成同時 办亦可依需求設置一防焊層(solder mask)以保護外露於絕 緣體的導體、元件或電路板表面。 有關運用第一類電路板10而製成電子裝置90的功效 茲舉下列實施例並配合剖視圖說明如下: ’ 圖2所示為第一實施例,一電子裝置90,包括:一電路板The circuit board 11 is formed by a circuit board which is formed to form an electrically conductive layer, for example, so that the circuit board 丨 2 has a three-layer structure as shown in Fig. 1R, which means that the circuit board 12 is more practical. Formed in which the circuit board 10 female 12 is stacked by the first type of circuit board 1 - the lower surface 32, and the second 4: fn edge ... upper surface" and the first lower surface 72, and a f body having a first upper surface η and a first surface power supply connection, two surfaces 71, 72 exposed to the insulator 30 70 and the element 80 joined to make two == 4 bones 62, respectively, with the first conductor of the phase ^ ^ # SI 1 A circuit board 10 can electrically communicate with the conductive layer of the household by the conductive cymbal 62. In the embodiment, the circuit board 12 has three--one and three types of circuit boards, and the insulator can be glued. , ceramic = glass, resin or other suitable insulating material, and each conductor and each member exposed to the surface of the insulator 3 may be provided with at least one layer of suitable conductive layer material (nickel, gold, silver or palladium). Etc.) to improve the quality of the electrical connection, and each conductor, insulator and component can be made into different shape patterns (Patterns), or the side of the conductor can be exposed on the side of the insulator, and the insulator can be changed according to requirements. The shape and number of conductors and components used to improve the board's work The conductor and the component may be made of copper foil, steel alloy, nickel, metal alloy (metal 1 ic al l〇y) or other suitable materials. A solder mask may be provided as needed to protect the exposed The conductor, component or circuit board surface of the insulator. The effect of using the first type of circuit board 10 to form the electronic device 90 is as follows with reference to the following cross-sectional views: ' Figure 2 shows the first embodiment, one The electronic device 90 includes: a circuit board
第20頁 1292212 五、發明說明(16) 10,具一絕緣體30、二第一導體70及一元件8〇,其中,第一 導體70具第一上表面71及一第一下表面72,其中第一下表 面72凸出且裸露於絕緣體30第一下表面32,而元件8〇實施 為金屬導電材質,具第一上表面81、第一下表面82及凹部 86,其中,第„下表面82凸出絕緣體3〇第一下表面^,凹部 3實施為電路板10的容置空間,供放置物件用;一晶片20, =置於元件80凹部86内;多條導電件60,實施為導電線,其 晶片2〇、第一導體70及元件80接合,使晶片20與第 ▲ ♦ 70及元件80電性連通;一封裝體40,包封晶片20、導Page 20 1292212 V. Inventive Description (16) 10, having an insulator 30, two first conductors 70 and an element 8〇, wherein the first conductor 70 has a first upper surface 71 and a first lower surface 72, wherein The first lower surface 72 is convex and exposed to the first lower surface 32 of the insulator 30, and the element 8 is implemented as a metal conductive material having a first upper surface 81, a first lower surface 82 and a recess 86, wherein the lower surface 82 protruding insulator 3 〇 first lower surface ^, recess 3 is implemented as a receiving space of the circuit board 10 for placing objects; a wafer 20, = placed in the recess 86 of the component 80; a plurality of conductive members 60, implemented as The conductive wire, the wafer 2, the first conductor 70 and the component 80 are bonded to electrically connect the wafer 20 to the ▲ 70 and the component 80; a package 40 encapsulating the wafer 20 and the conductor
體路板10;由本例得,因電路板10具有-凸出狀的 可降低電性連接,藉此,電子裝置90不須使用錫球而 一導體性i接而I施為導電線的導電件60是直接與第 1 8的第一莫雜7 ,如此,電路板1 0就可以不須要設有如圖 本,同時也可以W電路板10的應用限制減少,並且節省成 具有凸部77雜+冋電路板10的信賴性;另由於第一導體70 積,使電路板Γο與封即繁增辦加第一導f 70被封裝體40包覆的面 剝離的問題因而蔣▲體40接合得更穩固而可以避免產生 10元件80為金屬絲暂向電子裝置90信賴性,同時,因電路板 藉此,即可增進電子裝〜其Qn第二下表面82外露於電路板10,The circuit board 10; as shown in the present example, since the circuit board 10 has a convex shape, the electrical connection can be reduced, whereby the electronic device 90 does not need to use a solder ball and a conductive i is connected and I is electrically conductive. The member 60 is directly connected to the first multiplexer 7 of the first one. Thus, the circuit board 10 can be provided without a picture, and the application limit of the circuit board 10 can be reduced, and the utility model can be saved with the convex portion 77. + 信赖 the reliability of the circuit board 10; and because of the first conductor 70, the problem of peeling off the surface of the circuit board 与 ο 封 繁 第一 第一 第一 第一 第一 因而 因而It is more stable to avoid the 10 element 80 being the reliability of the wire temporary electronic device 90, and at the same time, the circuit board can enhance the electronic device to expose the second lower surface 82 of the Qn to the circuit board 10,
圖3所示的散熱效能。 板10且右姐一貫施例,一電子裝置90,包括· 一雷蹊 Λ 1U,,、有一絕緣體3〇、二 .電路 一容置空間14Jl由I 一弟導體70、二第二導體7〇a及 71、第二上表面、79、,ί —呈階梯狀,具第—上表面 弟一側邊73、第二側邊74及延伸部Figure 3 shows the heat dissipation performance. The board 10 and the right sister consistently apply, an electronic device 90, including a Thunder 1U, an insulator 3〇, 2. The circuit-accommodating space 14J1 is composed of an I conductor, and a second conductor 7〇. a and 71, the second upper surface, 79, ί—stepped, having a first-side upper side 73, a second side 74, and an extension
1292212 五、發明說明(17) 75,延伸部75設置於絕緣體30第一上表面31,並儘可能向容 置空間14延伸,而第二導體7〇a第一上表面71a的高度低於 絕緣體3 0第一上表面3 1 ; —晶片2 0,設置在容置空間1 4上; 多條導電件6 0,實施為導電線,其分別與晶片2 0、第一導1292212 V. Inventive Note (17) 75, the extension portion 75 is disposed on the first upper surface 31 of the insulator 30 and extends as far as possible toward the accommodating space 14, and the height of the first upper surface 71a of the second conductor 7A is lower than the insulator The first upper surface 3 1 ; - the wafer 20 is disposed on the accommodating space 14; the plurality of conductive members 60 are implemented as conductive lines, respectively, and the wafer 20, the first guide
體70及第二導體7〇a接合,使晶片20與第一導體70及第二導 體70a電性連通;一封裝體4〇,包封晶片20、導電件6〇及電 路板10;由本例得,由於第一導體7〇第一上表面71與第二導 體70a第一上表面71a設置於不同的高度,如此,就可以拉大 導電件6 0間的間隙g以防止電性短路現象,同時,因第一導 >體70具延伸部75而可更靠近容置空間ι4,藉此,即可縮短晶 片20與第一導體間的距離d因而減少導電件μ用量以節 =成本,且第一導體70第二侧邊74未受絕緣體3〇包覆並裸 露於封裝體40外部,用以增加電性連接的面積。 圖4所示為第三實施例,一電子裝置9〇,包括:一電路 板1〇,具一絕緣體3〇、二第一導體70、一第二導體?〇a、〆 Ϊ # ,此第=導體7〇a具有—I穿容置空間79a,該 一導齅7ηι / /日日者件、封裝體等物件用,而第 . …有延伸部7 5並設置於絕緣體3 0第一上夹面3 iThe body 70 and the second conductor 7〇a are joined to electrically connect the wafer 20 to the first conductor 70 and the second conductor 70a; a package 4 〇 encapsulating the wafer 20, the conductive member 6〇 and the circuit board 10; Therefore, since the first upper surface 71 of the first conductor 7 and the first upper surface 71a of the second conductor 70a are disposed at different heights, the gap g between the conductive members 60 can be widened to prevent electrical short circuit. At the same time, since the first guiding body 70 has the extending portion 75, it can be closer to the accommodating space ι4, whereby the distance d between the wafer 20 and the first conductor can be shortened, thereby reducing the amount of the conductive member μ to save the cost. The second side 74 of the first conductor 70 is not covered by the insulator 3 裸 and is exposed outside the package 40 for increasing the area of the electrical connection. FIG. 4 shows a third embodiment. An electronic device 9A includes a circuit board 1A having an insulator 3〇, two first conductors 70, and a second conductor. 〇a, 〆Ϊ #, the first conductor 7〇a has -I wearing the accommodating space 79a, the 齅7ηι / / 日 日, the package and the like, and the ... ... extension 7 5 And disposed on the insulator 3 0 first upper face 3 i
電路板10的外緣,具有延伸部85、表凹面部86 覆而裸露於i穿:。8外%其:,第二側邊84未受絕緣體30包 體外部,用以提昇散熱效率·_曰Μ Μ哎 置於貫穿容置空間15内·一 平,曰日片21 又 6〇及電路板10.由本裝,包封晶片20、導電件 ,由本例侍,由於電路板1〇具有貫穿容置空間The outer edge of the circuit board 10 has an extension portion 85, a concave surface portion 86, and is exposed to i: 8%%: The second side 84 is not covered by the insulator 30, for improving the heat dissipation efficiency. _ 曰Μ Μ哎 is placed in the accommodating space 15 · a flat, the 曰 21 and 6 〇 and the circuit The board 10. The package, the wafer 20, and the conductive member are encapsulated by the present invention, since the circuit board has a through space.
第22頁Page 22
1292212 五、發明說明(18) 1 5以容置晶片2 0,如此,令電子裝置9 0的整體厚度得實施為 較薄,同時,第二導體70a可實施為正極電源接點(P〇sitive supply bus)或負極電源接點(negative supply bus)而使 電子裝置90更具實用性。 圖5所示為第四實施例,一電子裝置90,由第一電子裝 置91及第二電子裝置92組成;第一、二電子裝置91、92分 別包括:一電路板1〇,具有〆絕緣體30及第一、二導體7〇、 7〇a,其中,第一導體70第一上表面71、第一下表面72均裸 鉻於絕緣體30第一上表面31及第一 r衣性連接 用,而第二導體7〇a設置於絕緣體30第一上表面31供電性連 接用;一貫穿狀容置空間1 5 ;二個晶片2 0、2 5均設置於容 置空間15内,其中,晶片25設置於晶片2〇上而呈堆疊狀;多 條導電件60,實施為導電線,分別與晶片2〇、25、第_導> 70及第二導體7〇a接合,使晶片20、25與第一、二導體7〇、一 7 0 a電性連通;一封裝體4 0,包封晶片2 0、晶片2 5、導電侏 60及電路板1〇;由本例得,電子裴置9〇是具有多個電 並藉由各電路板10形成的貫穿狀容置空間15而能設置夕 晶片20、25,如此,就得提高電子裝置9〇的功效;另夕個 置90于封裝體40包封完成後’亦可依需求自切割線a子裝 子裝置90分割而成各別的第一電子裝置9 1及第二電子验電 U,令晶片2〇、25是位於電路板10的側邊37據此置 路板10的容置空間15可不受限制的伸展日尤合!:據此,電1 R戀士品以 旧伸展,且不會因容詈命 路板10的面積,更利於電子產業運 不為弟五實施例,—電子裝置90,包括:一電路1292212 V. Description of the Invention (18) 1 5 to accommodate the wafer 20, so that the overall thickness of the electronic device 90 is implemented to be thin, and at the same time, the second conductor 70a can be implemented as a positive power contact (P〇sitive The supply bus) or the negative supply bus makes the electronic device 90 more practical. FIG. 5 shows a fourth embodiment, an electronic device 90, which is composed of a first electronic device 91 and a second electronic device 92. The first and second electronic devices 91 and 92 respectively include: a circuit board 1 〇 having a 〆 insulator And the first and second conductors 7〇, 7〇a, wherein the first upper surface 71 of the first conductor 70 and the first lower surface 72 are bare chrome on the first upper surface 31 of the insulator 30 and the first r-shaped connection The second conductor 7〇a is disposed on the first upper surface 31 of the insulator 30 for power supply connection; a through-hole accommodating space 15; the two wafers 20 and 25 are disposed in the accommodating space 15, wherein The wafers 25 are disposed on the wafer 2 in a stacked manner; the plurality of conductive members 60 are implemented as conductive lines, respectively bonded to the wafers 2, 25, the first guide 70 and the second conductor 7A, so that the wafer 20 is bonded. 25 is electrically connected to the first and second conductors 7〇 and 170°; a package 40, encapsulating the wafer 20, the wafer 25, the conductive crucible 60 and the circuit board 1〇; It is possible to provide the eve wafers 20 and 25 with a plurality of electric power and through the accommodating spaces 15 formed by the respective circuit boards 10. Thus, it is necessary to improve the electronic equipment. 9 〇 ; ; ; 另 另 另 于 于 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装 封装U, so that the wafers 2, 25 are located on the side 37 of the circuit board 10, according to which the accommodating space 15 of the routing board 10 can be unrestricted, and the stretching day is particularly good!: According to this, the electric 1 R lover is stretched out. And will not be due to the area of the road board 10, which is more conducive to the electronic industry, not the fifth embodiment, the electronic device 90, including: a circuit
1292212 發明說明(19) 板1〇,具有一絕緣體30、一容置空間14及四第一導體70,其 二,各f 一導體70分別具有多個凸部77、77c令該第一導 # 的第一上表面71及第一下表面72分別裸露於絕緣體30 f 一上表面31及第_下表面32供電性連接用,其中,第一上 1凸出於絕緣體3〇第一上表面31;一晶片2〇,實施為覆 曰片(Flip chip),設置於電路板1〇的容置空間14上,其 ^用面21具四個導電件65,實施為導電凸部,而各導電件65 =,與晶片20及第一導體7〇凸部77(第一上表面71)接合,1292212 DESCRIPTION OF THE INVENTION (19) A board 1 has an insulator 30, an accommodating space 14 and four first conductors 70. Second, each f-conductor 70 has a plurality of convex portions 77, 77c for the first guide. The first upper surface 71 and the first lower surface 72 are respectively exposed to the upper surface 31 of the insulator 30 f and the lower surface 32 for power supply connection, wherein the first upper surface 1 protrudes from the first upper surface 31 of the insulator 3 A wafer 2 is implemented as a Flip chip, and is disposed on the accommodating space 14 of the circuit board 1 ,. The surface 21 has four conductive members 65, which are implemented as conductive protrusions, and each conductive a member 65 = joined to the wafer 20 and the first conductor 7 〇 convex portion 77 (first upper surface 71),
曰片胃2〇與第一導體7〇電性連通;一封裝體40,包封晶片 、V電件6 5及電路板丨〇 ;由本例得,由於第一導體具有 j 7 7,藉此,即增加導電件65與第一導體7〇的接觸面積, :電件65與第一導體70接合得更穩固而可以避免晶片20 路板1 0分離而產生剝離問題,因而提昇電子裝置9 〇的 =貝,同時,亦可依需求令封裝體4〇包覆晶片2〇的非作用面 22,使晶片20更穩定的固定於電路板1〇上。The sputum stomach 2 〇 is electrically connected to the first conductor 7 ;; a package 40 encapsulating the wafer, the V electrical component 65 and the circuit board 丨〇; as by this example, since the first conductor has j 7 7 That is, the contact area between the conductive member 65 and the first conductor 7 is increased, and the electric member 65 is more firmly bonded to the first conductor 70 to prevent the wafer 20 to be separated from the substrate 10 to cause a peeling problem, thereby lifting the electronic device 9 At the same time, the package 4 can be coated with the non-active surface 22 of the wafer 2 to make the wafer 20 more stably fixed on the circuit board 1 .
圖7所不為第六實施例,一電子裝置9 〇,包括:一電路 板10,具一絕緣體3〇、二第一導體及一貫穿狀容置空間 5,其中,絕緣體3 0是以填充方式形成使絕緣體3 〇第一下表 面32呈一非平面狀,而各第一導體7〇具一延伸部、第一7 is not a sixth embodiment, an electronic device 9 includes: a circuit board 10 having an insulator 3, two first conductors, and a through-type receiving space 5, wherein the insulator 30 is filled Forming such that the first lower surface 32 of the insulator 3 is non-planar, and each of the first conductors 7 has an extension, first
^ f I3及第二側邊?4,其中,第一導體70第一側邊73裸露於 牙容置空間15; —晶片2〇,設置於貫穿容置空間15内並藉 由一黏著件45與電路板1〇接合;多條導電件6〇,實施為導電 線,分別與晶片20及第一導體7〇接合,使晶片2〇與第一導體 7〇電性連通;一封裝體4〇,包封晶片2〇、導電件6〇、黏著件^ f I3 and the second side? 4, wherein the first side edge 73 of the first conductor 70 is exposed to the tooth receiving space 15; the wafer 2 is disposed in the through space 151 and is joined to the circuit board 1 by an adhesive member 45; The conductive member 6〇 is implemented as a conductive line, respectively bonded to the wafer 20 and the first conductor 7〇, so that the wafer 2〇 is electrically connected to the first conductor 7〇; a package body 4〇, encapsulating the wafer 2〇, the conductive member 6〇, adhesive parts
第24頁 1292212 五、發明說明(20) 3 = ί二由本例得’由於第—導體刻—侧邊?3裸 =於電路板10貫穿狀容置空間15,使第—導體?〇得更靠近 曰曰片20’耩此,可縮短晶片2〇散熱路徑以提昇電子裝置 散熱能力;另黏著件45可依需求實施& 、 且黏者件45亦可依需求與封裝體4〇為相同材質者。Page 24 1292212 V. Description of invention (20) 3 = ί2 From this example, 'Because the first conductor is carved-side? 3 bare = in the circuit board 10 through the accommodating space 15, so that the first conductor? 〇 更 更 20 耩 耩 耩 耩 耩 耩 耩 耩 耩 耩 耩 20 20 20 20 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片〇 is the same material.
圖8為第七實施例,一電子裝置90,;括:一電路板1〇, 公一絕緣體30、二第一導體70及一容置空間i 4,其中,第一 導體70有一部份是位於容置空間14内;—晶片2〇收納於容 置空間1 4内並設置在第一導體70第二上表面79上;多條導 >電件6 〇,實施為導電線,分別與晶片2 Q及第一導體γ q接合 使晶片20與第一導體70電性連通;一封裝體40,包封晶片 2〇、導電件60及電路板1〇;三防焊層46(s〇lder mask),設 置在電路板10的絕緣體30第一下表面32,用以保護電路板 1 0 ;由本例得,由於第一導體7 〇有一部份是設置於容置空間 1 4内,使電子裝置9 0外觀得以縮小並能提昇晶片2 〇散熱效 率 〇FIG. 8 is a seventh embodiment, an electronic device 90 includes: a circuit board 1 , a common insulator 30 , two first conductors 70 , and an accommodating space i 4 , wherein a portion of the first conductor 70 is The device is disposed in the accommodating space 14 and is disposed in the accommodating space 14 and disposed on the second upper surface 79 of the first conductor 70. The plurality of conductive members 电 are electrically conductive, respectively The wafer 2 Q and the first conductor γ q are bonded to electrically connect the wafer 20 to the first conductor 70; a package 40 encapsulating the wafer 2, the conductive member 60 and the circuit board 1; and the third solder resist layer 46 (s〇 The lder mask is disposed on the first lower surface 32 of the insulator 30 of the circuit board 10 for protecting the circuit board 10; as a result of this example, since a portion of the first conductor 7 is disposed in the accommodating space 14 The appearance of the electronic device 90 is reduced and the heat dissipation efficiency of the wafer 2 can be improved〇
圖9所示為第八實施例,一電子裝置90,包括:一電路 板10,具一絕緣體30、二第一導體7〇及一元件80,其中,第 一導體70具第一上表面71、第一下表面7 2及延伸部75,令 Ο第一上表面71及第一下表面72裸露於絕緣體30第一上表面 31及第一下表面32以供電性連接用,而元件80具一貫穿狀 孔洞8 8,此孔洞8 8是實施為電路板1 〇的貫穿狀容置空間供 容納物件用;一晶片2 0,該晶片2 0的作用面2 1與電路板1 〇的 表面接合,並設置在電路板10的貫穿狀容置空間上;多條導FIG. 9 shows an eighth embodiment, an electronic device 90 comprising: a circuit board 10 having an insulator 30, two first conductors 7A and an element 80, wherein the first conductor 70 has a first upper surface 71 The first lower surface 71 and the extension portion 75 expose the first upper surface 71 and the first lower surface 72 to the first upper surface 31 and the first lower surface 32 of the insulator 30 for power supply connection, and the component 80 has a through-hole 8 8 is a through-hole accommodating space for the circuit board 1 供 for accommodating the object; a wafer 20, the active surface 2 1 of the wafer 20 and the surface of the circuit board 1 〇 Bonded and disposed on the through-shaped receiving space of the circuit board 10; multiple guides
第25頁 1292212Page 25 1292212
電件6 Ο,實施為導電線,分別鱼曰 ,刀乃丨』興晶片2 0 '第一導騁7 n — 80接合,使晶片20與第一導艚冗务啟〇及兀件 斧體7 0、兀件8 〇電性連诵一 μ壯 體40,分別設置在絕緣體3()篦 μ ^ ^ Q1 遷、,一封裝 肢弟一上表面31及第一 32,並依需求分別包封晶片2 乐 卜表面上 Α乙υ、導電件6 0、元养Q 〇、Φ紛 板10及第一導體70的延伸部75豆中筮i」 電路 丨τ 口丨々其中,第一導體7〇箆一 面71及第一下表面7 2未受封奘鲈4n勺豫 上表 又封裝體4 〇包覆,而能對外電性遠 接;由本例得,由於第一導體7〇第一上表面71及 72均外露於於電路板1G表面,使電子裝請可藉錫球5 = 線所示者)與外界電性連接’並可依需求堆疊多個電子裝= 9 0以利產業利用。 丁衣置 圖10為第九實施例,一電子裝置9〇,包括:一電路 1 0,具一絕緣體3 0、二導體7 〇及一容置空間i 4,其中,絕緣 體30第一上表面31是具有預設形狀的凸出體p,藉此凸出 體P即是與容置空間14相鄰設置;一晶片2〇,設置於容置空 間1 4内;多條導電件6 〇,分別與晶片2 〇及第一導體7 〇接合, 使晶片20與第一導體70電性連通;一蓋體c,設置在絕緣體 30凸出體P上,藉此,電路板iq即形成有一凹陷的容置空間 1 7,而晶片2 0、導電件6 〇就被包封在容置空間1 7内,其中, 曰曰片20可依兩求實施為光學晶片(image sensor)等,而蓋 看_體C則可依4求實施為透明基板(tranSparent substrate);本實施例中,可依需求於容置空間〗7内填入封 裝體以包封晶片20、導電件60及電路板1〇,而蓋體c則可 依需求實施為散熱件或其他物件等。 圖11為第十實施例,一電子裝置9Q,包括:一電路板The electrical component 6 Ο is implemented as a conductive wire, which is respectively a fish 曰 刀 丨 丨 丨 晶片 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 , , , 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片7 0, 兀 8 〇 性 性 诵 μ μ μ μ μ μ μ , , , , μ μ μ μ μ μ μ μ μ μ μ μ 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘The wafer 2 is on the surface of the slab, the conductive member 60, the conductive member 〇, the Φ board 10, and the extension portion 75 of the first conductor 70. The circuit 丨 丨々 丨々 丨々 丨々 丨々 丨々 , , , , , , , , , , , , 7〇箆71 and the first lower surface 7 2 are not covered by 4n spoons and the package is covered by 4 〇, and can be electrically connected to each other; this example, because the first conductor 7〇 first The upper surfaces 71 and 72 are exposed on the surface of the circuit board 1G, so that the electronic device can be electrically connected to the outside by the solder ball 5 = line, and can be stacked with multiple electronic devices according to requirements. use. FIG. 10 is a ninth embodiment, an electronic device 9A includes: a circuit 10 having an insulator 30, a two-conductor 7 〇, and an accommodating space i 4, wherein the first upper surface of the insulator 30 31 is a protrusion p having a predetermined shape, whereby the protrusion P is disposed adjacent to the accommodating space 14; a wafer 2 〇 is disposed in the accommodating space 14; and a plurality of conductive members 6 〇, The wafers 20 and the first conductors 7 are respectively bonded to electrically connect the wafer 20 to the first conductor 70. A cover c is disposed on the protrusions P of the insulator 30, whereby the circuit board iq is formed with a recess. The accommodating space 17 and the conductive member 6 〇 are enclosed in the accommodating space 17 . The cymbal 20 can be implemented as an image sensor or the like according to the two requirements. The _body C can be implemented as a transparent substrate (transparent substrate). In this embodiment, the package can be filled in the accommodating space 7 to encapsulate the wafer 20, the conductive member 60, and the circuit board 1 〇, and the cover c can be implemented as a heat sink or other objects as needed. Figure 11 is a tenth embodiment, an electronic device 9Q, comprising: a circuit board
1292212 五、發明說明(22)1292212 V. Description of invention (22)
11,其結構與本發明第二類電路板中圖1Μ的結構相似,具一 絕緣體30、二第一導體70、二第二導體70a及二第三導體 70b,其中,絕緣體30具第一上表面31、第二上表面33、第 一下表面32及二凸部39,絕緣體30因凸部39而使第一上表 面31凸出於第二上表面33,而第一導體70受絕緣體3〇包覆, 並令第一上表面71及第一下表面72分別裸露於絕緣體3〇第 一上表面31及第一下表面32供電性連接用,第二導體?〇3設 置在絕緣體3 0第二上表面3 3上並與絕緣體3 〇凸部3 9相鄰設 置,第三導體70b設置在絕緣體30第一上表面31上,並分別 與第一導體7 0及第二導體7〇a接合,令第一導體7〇與第二導 體70a能電性連通;一容置空間14供設置物件用·一晶片2q 設置在容置空間14上;多條導電件6〇,實施為導電$分別 與晶片20及第三導體70b接合,使晶片2〇與第—導體7〇電性 連通’·一封裝體40,包封晶片20、導電件6〇及電 實施例中,顯示第二類電路板u亦可運用於電子褒置9〇麥 中 〇 圖1 2所不為第十一實絲办丨丨 _ 具有一電路板、一晶片2〇 2 =化的電子裝置90, (capaci t〇r)89,其中,電路板12,包括:一電合 > 一絕緣體30a、第二絕綠驊姑一 巴豕體30,其由第11. The structure is similar to the structure of FIG. 1A of the second type of circuit board of the present invention, having an insulator 30, two first conductors 70, two second conductors 70a and two third conductors 70b, wherein the insulator 30 has the first The surface 31, the second upper surface 33, the first lower surface 32 and the two convex portions 39, the insulator 30 protrudes from the second upper surface 33 by the convex portion 39, and the first conductor 70 is insulated by the insulator 3. The first upper surface 71 and the first lower surface 72 are respectively exposed to the insulator 3, the first upper surface 31 and the first lower surface 32 for power supply connection, and the second conductor? The 〇3 is disposed on the second upper surface 3 3 of the insulator 30 and is disposed adjacent to the insulator 3 〇 convex portion 39. The third conductor 70b is disposed on the first upper surface 31 of the insulator 30 and respectively respectively with the first conductor 70. And the second conductor 7〇a is joined to electrically connect the first conductor 7〇 with the second conductor 70a; an accommodating space 14 is provided for the object to be disposed on the accommodating space 14; the plurality of conductive members 6〇, the conductive material is bonded to the wafer 20 and the third conductor 70b, respectively, so that the wafer 2 is electrically connected to the first conductor 7〇, a package 40, the packaged wafer 20, the conductive member 6〇, and the electrical implementation. In the example, it is shown that the second type of circuit board u can also be used in the electronic device 9 〇 〇 〇 1 1 1 1 1 1 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有 具有The electronic device 90, (capaci t〇r) 89, wherein the circuit board 12 includes: an electrical insulation > an insulator 30a, a second absolute green aunt body 30, which is
別j置在第二絕緣體30b的表面別; 及第三絕緣體30c包覆,且各具有弟H = 70,分別與第一絕緣體30 a,一苐一導體 JUa及弟二絕緣體3〇c接合並令第一The other is disposed on the surface of the second insulator 30b; and the third insulator 30c is covered, and each has a brother H=70, and is respectively engaged with the first insulator 30a, the first conductor JUa and the second insulator 3〇c. Order first
1292212 五、發明說明(23) 上表面71分別依需求外露於絕緣體3〇第 下表面32供電線連接用,而第—表面Μ及第一 導體7〇a的孔洞78a内;三導電膏62=2=置於第二 孔洞78 a内,並令第一導體7〇與第_ °並弟二導體 電性連通,·二容置空間“,供設以:70,電膏62而 容置空間14上;一電容89,設置在另:置片2〇,設置在 導電膏62分別與二第一導體7〇電性連 ^間上,並藉 別與晶片20及第一導體7〇接合,令曰A ^導電件分 電性連通;本實施例中,各個第—心7Q的、^導m寻 需外露於絕緣體30第一上表面31或 下表面72不 板12依然可執行對外電性連接的功效一 =32,令電路 體可使電路板12具有四層導電声 ,夺’運用二層絕緣 使用。 ^等书層的電路板,而利於產業的 藉由上述各實施例可推導出本發明中 絕緣體表面的導…在電路板的下表面而 覆,令電子裝置得易於與外界電性連接且可以不必須設置 錫球’而可降低製造成本,或將電路板翻轉使用令裸露且 凸出於絕緣體表^導體言免置在電路㈣上纟^受絕緣 體包覆,如此,亦可提昇電路板的實用性。 自圖13A〜13E為第一類電路板第一種製造步驟方法 說明如下: ’ 圖13A所示,提供一第一導電板7〇p,實施為鋼材質,並 分別於其第一上表面Ήρ、第一下表面72p上設置薄膜49 其中,薄膜49具有孔洞48,令第—導電板7〇p第一下表面72p1292212 V. INSTRUCTION OF THE INVENTION (23) The upper surface 71 is respectively exposed to the insulator 3 〇 lower surface 32 for the power supply line connection, and the first surface Μ and the first conductor 7 〇 a hole 78a; three conductive paste 62 = 2 = placed in the second hole 78 a, and the first conductor 7 〇 and the _ ° and the second conductor electrically connected, · two accommodation space ", provided with: 70, the paste 62 and the accommodation space 14; a capacitor 89, disposed in the other: the sheet 2, disposed in the conductive paste 62 and the two first conductors 7 electrically connected, and by the wafer 20 and the first conductor 7 〇,曰A ^ conductive member is electrically connected; in this embodiment, each of the first core 7Q is exposed to the first upper surface 31 or the lower surface 72 of the insulator 30. The function of the connection is one = 32, so that the circuit body can make the circuit board 12 have four layers of conductive sound, and use the circuit board of the book layer, which is advantageous for the industry, and can be derived from the above embodiments. In the present invention, the surface of the insulator is covered on the lower surface of the circuit board, so that the electronic device can be easily electrically connected to the outside and can be It is not necessary to set the solder ball' to reduce the manufacturing cost, or to flip the circuit board to make it bare and protrude from the insulator. The conductor is not placed on the circuit (4) and covered by the insulator. 13A to 13E are the first manufacturing steps of the first type of circuit board. The method of the first manufacturing step is as follows: ' As shown in FIG. 13A, a first conductive plate 7〇p is provided, which is made of steel and is respectively first. The upper surface Ήρ, the first lower surface 72p is provided with a film 49, wherein the film 49 has a hole 48 for the first lower surface 72p of the first conductive plate 7〇p
第28頁 1292212 五、發明說明(24) 的一部份得裸露於薄膜4 9 ; 圖13B所不,第一導電板7〇p藉化學蝕刻製程後,形成 有六個預設形狀的凸部77p ; 圖13C所不,將第一導電板7〇p上的薄膜49去除後,提 供一絕緣體30並經固化製程以包覆第一導電板7〇p的各個 凸部7 7p,其中,第一導電板7〇p第一 了表面72p未受絕緣體 30包覆而裸露於絕緣體30第一下表面32 ;完成此製作步驟 後,可依需求於絕緣體30第一下表面32設置第二導電板7〇s 以製成不同結構的電路板(參閱圖15A〜15C說明); 丨圖130所不,於第_導電板7〇p第一上表面7ip、第一下 表面72P及絕緣體30第一下表面32上分別設置薄膜“,其 :,薄膜49具有孔洞48,令第—導電板?〇p第—上表面Μ及 弟一下表面72p—部份得裸露於薄膜49 ; ,膜fq 1 二所二Ϊΐ 一韻刻製程,將第-導電板7 〇 P裸露於 溥膜49的部伤依%求蝕刻掉後,就形 含:一絕緣體30,具一第_上矣而叫 电峪板匕 络 ^ ^ 上表面31、弟一下表面32及二 孔洞38 ; —第一導體70,具第一 72、第一側邊73及延伸部75第上::71、第-下表面 30第-上表面31,而第—侧5邊^置延=部^設置在絕緣體 令第一上表面71及第一下表邊面7 2汉裸置命在於絕緣體30孔洞38内, 電性連接用,且第-上表面表71面凸72出裸於路够於絕緣體30外,以供 …-第二導體風具第:絕緣體3°第-上表面 第-側邊73a,其中,第—側邊7表二:缝第-下表面72a、 -上表面…及第-下表上邊體30包覆,並令第 ’2 a裸路於絕緣體3 0外,以供電Page 28 1292212 V. Part of the invention (24) is exposed to the film 4 9; Figure 13B does not, the first conductive plate 7〇p is formed by a chemical etching process, forming six preset shapes of convex portions 77p; FIG. 13C, after removing the film 49 on the first conductive plate 7〇p, an insulator 30 is provided and cured to cover the respective convex portions 7 7p of the first conductive plate 7〇p, wherein The first surface 72p of a conductive plate 7〇p is not covered by the insulator 30 and is exposed on the first lower surface 32 of the insulator 30. After the manufacturing step, the second conductive plate can be disposed on the first lower surface 32 of the insulator 30 as needed. 7〇s to make a circuit board of different structure (refer to FIG. 15A to 15C); FIG. 130 does not, the first upper surface 7ip of the first conductive plate 7〇p, the first lower surface 72P and the insulator 30 first The lower surface 32 is respectively provided with a film ", which: the film 49 has a hole 48, so that the first conductive plate 〇p first surface Μ and the lower surface 72p portion are exposed to the film 49; , the film fq 1 After the second conductive process, the portion of the first conductive plate 7 〇P exposed to the ruthenium film 49 is etched away, The shape includes: an insulator 30 having a first cymbal plate and an electric slab ^ ^ ^ ^ upper surface 31, a lower surface 32 and two holes 38; - a first conductor 70 having a first 72, a first side 73 and the extension portion 75 on the upper surface:: 71, the first-lower surface 30, the first upper surface 31, and the first side, the fifth side, and the second surface, the first upper surface 71 and the first lower surface 7 2 Han bare life in the insulator 30 hole 38, for electrical connection, and the first-upper surface table 71 surface convex 72 out of the road is outside the insulator 30 for ... - second conductor wind: the insulator 3° first-upper surface first side 73a, wherein the first side 7 is second: the slit first-lower surface 72a, the upper surface... and the first-lower upper body 30 are covered, and the second side is covered Bare road to insulator 30, to supply power
第29頁 1292212 五、發明說明(25)Page 29 1292212 V. Description of invention (25)
性連接用·’一第三導體70b,具第一上表面?lb、第一下表面 72b、第一側邊73b及延伸部75b,其中,第一上表面7ib及 延伸部75b設置在絕緣體30第一上表面31,而第一側邊73^ 受絕緣體30包覆,並令第一上表面7lb、第一下表面721)裸 露於絕緣體30表面外,以供電性連接用,且第一上表面71b 凸出於絕緣體30第一上表面31;—第四導體7〇c,具第一上 表面71c、第一下表面72c及第一側邊73c,其中,第一侧邊 7 3c受絕緣體30包覆,並令第一上表面71c、第一下表面72c 裸露於絕緣體3 0表面外,以供電性連接用 且第一上表面 Η c凸出於絕緣體30第一上表面31 ; 一元件8〇,其=質與各 導體相同,具有一第一上表面81、第一下表面82、第一側 邊83及孔洞88,其中,第一側邊83受絕緣體3〇包覆,並令第 一上表面81及第一下表面82裸露於絕緣體3〇表面外·上述 方法中,由於電路板10第四導體70c的第一上表面是凸 出且外露於絕緣體30,令電路板10易於與外界電性連接而 =巧使用錫球,並於製造過程中不需使用含有鉛等其他有 。環境的物質,因此,即可減少電路板對環境的污染;同 時電路板10的上、下表面亦可依需求設置防焊層(s、d a mask)以保護電路板10。For the connection, 'a third conductor 70b, with the first upper surface? 1b, a first lower surface 72b, a first side 73b and an extension 75b, wherein the first upper surface 7ib and the extension 75b are disposed on the first upper surface 31 of the insulator 30, and the first side 73 is covered by the insulator 30 Covering and exposing the first upper surface 7lb and the first lower surface 721) to the outside of the surface of the insulator 30 for power supply connection, and the first upper surface 71b protrudes from the first upper surface 31 of the insulator 30; the fourth conductor 7〇c, having a first upper surface 71c, a first lower surface 72c and a first side edge 73c, wherein the first side edge 7 3c is covered by the insulator 30, and the first upper surface 71c and the first lower surface 72c are Exposed to the surface of the insulator 30, for power supply connection and the first upper surface Η c protrudes from the first upper surface 31 of the insulator 30; an element 8〇, which is the same as each conductor, has a first upper surface 81. The first lower surface 82, the first side 83, and the hole 88, wherein the first side 83 is covered by the insulator 3, and the first upper surface 81 and the first lower surface 82 are exposed on the surface of the insulator 3. In the above method, since the first upper surface of the fourth conductor 70c of the circuit board 10 is convex and exposed to the insulator 30, The circuit board 10 is easy to be electrically connected to the outside world. = The solder ball is used skillfully, and other materials such as lead are not required in the manufacturing process. The environment material can reduce the environmental pollution of the circuit board; at the same time, the upper and lower surfaces of the circuit board 10 can also be provided with a solder resist layer (s, mask) to protect the circuit board 10.
、自圖14A〜14F為第一類電路板第二種製造步驟方法 說明如下: / 如圖14A所示,提供一第一導電板7〇p,並於第一導 板7〇P第一上表面71p及第一下表面72p各設置一第一導電 層$5,令各弟一導電層55分別接合於與第一導電板上The first manufacturing step of the first type of circuit board is illustrated as follows from the following FIGS. 14A to 14F: / As shown in FIG. 14A, a first conductive plate 7〇p is provided, and the first conductive plate 7〇P is first. Each of the surface 71p and the first lower surface 72p is provided with a first conductive layer $5, so that each of the conductive layers 55 is bonded to the first conductive plate.
1292212 五、發明說明(26) 此第一導電層55可實施為銀或鈀金屬; 如圖14 B所示,提供薄膜49,將薄膜49分別設置於各第 一導電層55上表面56上,其中,薄膜49具有多個孔洞48,使 第一導電層55有一部分未受薄膜49包覆而裸露於大氣 (atmosphere)之中,· 如圖14C所示,提供一蚀刻製程,將裸露於大氣中的第 一導電層55及第一導電板70p—部分去除,使第一導電板 70p具有二凸部77p,並將薄膜49移除,而未被蝕刻掉的第一 導電層55仍然分別接合於第一導電板7〇p ;1292212 V. The invention (26) The first conductive layer 55 can be implemented as silver or palladium metal; as shown in FIG. 14B, a film 49 is provided, and the film 49 is respectively disposed on the upper surface 56 of each of the first conductive layers 55. The film 49 has a plurality of holes 48, such that a portion of the first conductive layer 55 is not covered by the film 49 and is exposed to the atmosphere. As shown in FIG. 14C, an etching process is provided, which is exposed to the atmosphere. The first conductive layer 55 and the first conductive plate 70p are partially removed, so that the first conductive plate 70p has two convex portions 77p, and the film 49 is removed, and the first conductive layer 55 that is not etched is still bonded separately. On the first conductive plate 7〇p;
如圖14 D所示,提供一絕緣體3 〇,並令絕緣體3 〇包覆第 一導電板70p凸部77p及第一導電層55,經烘烤固化製程後, 使絕緣體3 0成一預沒形狀外觀,其中,第一導電層5 5上表面 5 6未受絕緣體30包覆而裸露於大氣+ . 如圖14E所示,提供薄膜49,將薄膜“分別設置於各第 一導電層55上表面56上及絕緣體3〇第—下面^上,其中,薄 膜49具有多,開孔4/,使第一導電層55有一部分未受薄膜 49包覆而裸露於大氣之中; 如圖1 4 F所示,提供一蝕刻絮As shown in FIG. 14D, an insulator 3 is provided, and the insulator 3 is wrapped around the convex portion 77p of the first conductive plate 70p and the first conductive layer 55. After the baking curing process, the insulator 30 is formed into a pre-formed shape. Appearance, wherein the upper surface 56 of the first conductive layer 5 5 is not covered by the insulator 30 and exposed to the atmosphere +. As shown in FIG. 14E, a film 49 is provided, and the film is respectively disposed on the upper surface of each of the first conductive layers 55. 56 and the insulator 3 〇 first - lower ^, wherein the film 49 has a large number of openings 4 /, so that a portion of the first conductive layer 55 is not covered by the film 49 and exposed to the atmosphere; As shown, an etch wadding is provided
一導電板7〇P裸露於大氣中的』^1,將第一導電層W及第 然後,就形成第一類電路板1〇此除,再將薄膜49移除, 一導體70,各具有第一上表面路板10結構包括:二第 邊73;四第一導電層55,各具有上主一下表面72及第一側 邊58,分別設置在第一導體7〇第一面56、下表面57及側 72上,並分別與第一導體70接人.上表面71及第一下表面 # 口 ,—絕緣體30,具有第一上A conductive plate 7〇P is exposed to the atmosphere, and the first conductive layer W and then the first type of circuit board 1 is formed, and then the film 49 is removed, and a conductor 70, each having The structure of the first upper surface road plate 10 includes: two first sides 73; four first conductive layers 55 each having an upper main lower surface 72 and a first side edge 58 disposed on the first surface of the first conductor 7 and the lower surface 56, respectively The surface 57 and the side 72 are respectively connected to the first conductor 70. The upper surface 71 and the first lower surface #口, the insulator 30, have the first upper surface
1292212 五、發明說明(27) 表面31、第一下表面32及侧邊 接合於第-導體7。第一下表:,的第\? 一導體70及 第一導體70莖一卜矣& 7^ 第一導電層55包覆,使 等體70第一上表面71未跫絕緣體30包霜而 :絕緣體3。第一上表面3 i,而第一導體? 〇?一而下稞二凸, 凹陷於絕緣體30第-下表面&其中,接 3°。包^ : ί Ϊ 2 表面71的第一導電層5 5未受絕緣體 連接用,而接合於第-導體7〇第-下表 ί = : 55是受絕緣體3〇包覆,且令其上表面56 緣體30第一下表面32以供電性連接用;該電路板 \ 導體及導電層可埋設在絕緣體内,使電路板 =^ ^侍以縮小,而有利於產業運用,且第一導電層Η令該 =^0得易於與外界電性接合,並能提昇該電路板1〇對 外界電性接合的品質信賴性。 自圖ΐ5Α〜ικ為第二類電路板第一種製造步驟及方 法,說明如下: 圖15A所示,首先,提供一具有六個凸部77p的第一導電 板70p並以一絕緣體30包覆該第一導電板7〇p及各凸部了^, 該圖1 5 A所示的結構是與圖! 3C所示者相同,然后於絕緣體 30第一下表面32及第一導電板7〇p第一下表面72p設置一第 二導電板70s,此第二導電板7〇s可依需求由電鍍(1292212 V. INSTRUCTION DESCRIPTION (27) The surface 31, the first lower surface 32, and the side edges are joined to the first conductor 7. The first table: the first conductor 70 and the first conductor 70 are bundled with a first conductive layer 55 so that the first upper surface 71 of the body 70 is not covered with the insulator 30 : Insulator 3. The first upper surface 3 i, and the first conductor 〇 一 一 一 一 , , , , , , 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 绝缘 绝缘 绝缘 绝缘 绝缘 绝缘Package ^ : ί Ϊ 2 The first conductive layer 5 5 of the surface 71 is not connected by the insulator, but is bonded to the first conductor 7 〇 - the following table ί = : 55 is covered by the insulator 3 ,, and the upper surface thereof The first lower surface 32 of the edge body 30 is connected for power supply; the circuit board \ conductor and the conductive layer can be buried in the insulator, so that the circuit board can be reduced, which is advantageous for industrial use, and the first conductive layer This makes it easy to electrically connect with the outside world, and can improve the reliability of the circuit board 1 to the external electrical connection. The first manufacturing step and method of the second type of circuit board are illustrated as follows: As shown in FIG. 15A, first, a first conductive plate 70p having six convex portions 77p is provided and covered with an insulator 30. The first conductive plate 7〇p and each convex portion are formed, and the structure shown in FIG. 3C is the same, and then a second conductive plate 70s is disposed on the first lower surface 32 of the insulator 30 and the first lower surface 72p of the first conductive plate 7〇p. The second conductive plate 7〇s can be plated according to requirements (
Plating)或濺鍍(Sputtering)等方式形成; 圖15B=示,於第一導電板7〇p第一上表面71p及第二 導電板70s第一下表面72s設置薄膜49,其中,薄膜49具有 孔洞48,令第一導電板70p第一上表面71p的一部份及第二Plating) or sputtering (Sputtering) or the like; FIG. 15B=showing that a film 49 is disposed on the first upper surface 71p of the first conductive plate 7〇p and the first lower surface 72s of the second conductive plate 70s, wherein the film 49 has a hole 48 for making a portion and a second portion of the first upper surface 71p of the first conductive plate 70p
第32頁 I292212 丨、明^ ---Page 32 I292212 丨, 明^ ---
板7 〇 s第一下表面7 2 s的一部份得裸露於薄膜4 9 ; 及第圖15C所示,提供一化學蝕刻製程,將第一導電板7〇p 丰一導電板7 0 s裸露於薄膜4 9的部份蝕刻掉,並將薄膜4 9 —除’至此,即形成一導電板11,其包含:一絕緣體3 0,具第 表上表面31、第一下表面32;六第一導體70,各具第一上 $ 71、第一下表面72及第一侧邊73,其中,各第一側邊 命交絕緣體30包覆,令各第一上表面71及第一下表面72裸 :於絕緣體30表面,以供電性連接用,且各第一上表面71凸 絕緣體^3 0第一上表面31;五第二導體7〇a,各具第一上表 面pa、第一下表面72a及第一側邊73a,並個別與絕緣體 30第一下表面32及第一導體70第一下表面72接合;上述方 法中,由於電路板11第二導體70a設置在絕緣體3〇第一下表 面32,令電路板形成一雙層導電層的電路板^。 自圖16A〜16E為第二類電路板第二種製造步驟及方 法,說明如下:a portion of the first lower surface 7 2 s of the plate 7 〇s is exposed to the film 49; and as shown in FIG. 15C, a chemical etching process is provided to bond the first conductive plate 7〇p to a conductive plate 7 0 s The portion exposed to the film 49 is etched away, and the film is removed. Thus, a conductive plate 11 is formed, which comprises: an insulator 30 having a surface upper surface 31 and a first lower surface 32; The first conductors 70 each have a first upper surface 71, a first lower surface 72, and a first side edge 73, wherein each of the first side edge insulators 30 is wrapped so that the first upper surface 71 and the first lower surface The surface 72 is bare: on the surface of the insulator 30, for power supply connection, and each of the first upper surfaces 71 protrudes from the first upper surface 31 of the insulator ^3 0; five second conductors 7〇a, each having a first upper surface pa, The surface 72a and the first side 73a are respectively joined to the first lower surface 32 of the insulator 30 and the first lower surface 72 of the first conductor 70. In the above method, since the second conductor 70a of the circuit board 11 is disposed on the insulator 3〇 The first lower surface 32 is such that the circuit board forms a circuit board of a double-layer conductive layer. Figure 16A to Figure 16E show the second manufacturing steps and methods of the second type of circuit board, which are described as follows:
圖16A所示,提供一第一導電板7〇p,其具有一第一上表 面71p、四第一下表面7 2p及四凸部77p •,一第二導電板7〇s, 具有第一上表面71s、第一下表面72s及凹部76s;二導電 霄62,填充於二凹部76s内,其中,該二導電膏62的水平高 度不同;一填充物43,填充於另二凹部76s内,其中,該二填 充物4 3的水平高度不同; ' 圖16β所示,將該第一、二導電板70p、70s接合,並令 第一導電板70p的各第一下表面72p埋入於第二導電板7〇s 的四凹部76s内並分別受導電f62及填充物43包覆,經一固As shown in FIG. 16A, a first conductive plate 7p is provided, which has a first upper surface 71p, four first lower surfaces 7 2p and four convex portions 77p, and a second conductive plate 7〇s having a first The upper surface 71s, the first lower surface 72s and the recess 76s; the second conductive ridge 62 is filled in the two recesses 76s, wherein the two conductive pastes 62 have different horizontal levels; a filler 43 is filled in the other recesses 76s, Wherein, the horizontal heights of the two fillers 4 3 are different; 'the first and second conductive plates 70p and 70s are joined as shown in FIG. 16β, and the first lower surfaces 72p of the first conductive plates 70p are buried in the first The four concave portions 76s of the two conductive plates 7〇s are respectively covered by the conductive f62 and the filler 43
1292212 五、發明說明(29) 化製程將導電膏62及填充物43固化,如此,第一導電板7〇p 與第二導電板70s就連接在一起,然後,再提供一填充製程 將絕緣體30填充於第一導電板7 0p與第二導電板70s二者 間,並固化該絕緣體3 0 ; 圖16C所示,提供薄膜49,分別設置於第一導電板7〇p第 一上表面71p及第二導電板70s第一下表面72s上,並依需求 開設孔洞4 8,令第一導電板7 0 p第一上表面7 1 p —部份及第 二導電板70s第一下表面72s—部份得分別裸露於薄膜49 ; 圖16D所示,提供一餘刻製程,將第一、二導電板7〇p、 丨7 0 s裸露於薄膜4 9開孔4 8處的部份去除,使第一導電板7 〇 p 形成二第一導體70'二第二導體70a,而第二導電板70a形 成一第二導體70 b及一元件80 ; 圖16E所示,提供一清除製程,將填充物43去除,令第二 導體70a第一下表面72a裸露於絕緣體30外部,至此,電路板 11即已形成,其包括:一絕緣體3〇,具第一上表面31、第一 下表面32、第二下表面34、第三下表面35、凹部36及凸部 39;二第一導體70,受絕緣體30包覆,各具第一上表面71、 第一下表面72、第一側邊73及延伸部75,並令第一上表面 71及第一下表面72裸露並凸出於絕緣體30表面以供電性連 丨接用,其中,延伸部75設置在絕緣體30第一上表面31 ;二 第二導體70a,受絕緣體30包覆,各具第一上表面71a、第 一下表面72a及第一侧邊73a,並令第一上表面71a及第一下 表面72a分別裸露並凸出於絕緣體30第一上表面31、第二 下表面34或第三下表面35,以供電性連接用;二第三導體1292212 V. INSTRUCTION DESCRIPTION (29) The process of curing the conductive paste 62 and the filler 43 is such that the first conductive plate 7〇p and the second conductive plate 70s are connected together, and then a filling process is provided to the insulator 30. Filled between the first conductive plate 70p and the second conductive plate 70s, and solidifies the insulator 30; as shown in Fig. 16C, a film 49 is provided, which is respectively disposed on the first upper surface 71p of the first conductive plate 7〇p and The second conductive plate 70s is disposed on the first lower surface 72s, and the holes 4 8 are opened as required, so that the first conductive plate 70p first upper surface 7 1 p - portion and the second conductive plate 70s first lower surface 72s - Part of the film is exposed to the film 49; as shown in Fig. 16D, a process is provided to remove the portions of the first and second conductive plates 7〇p and 丨7 0 s exposed at the opening of the film 49. The first conductive plate 7 〇p forms two first conductors 70' and the second conductor 70a, and the second conductive plate 70a forms a second conductor 70b and an element 80. As shown in FIG. 16E, a cleaning process is provided, which will The filler 43 is removed to expose the first lower surface 72a of the second conductor 70a to the outside of the insulator 30. Thus, the circuit board 11 is shaped. And comprising: an insulator 3〇 having a first upper surface 31, a first lower surface 32, a second lower surface 34, a third lower surface 35, a recess 36 and a convex portion 39; and two first conductors 70, which are insulated 30, each having a first upper surface 71, a first lower surface 72, a first side 73, and an extension 75, and exposing the first upper surface 71 and the first lower surface 72 to the surface of the insulator 30 The power supply is connected, wherein the extension portion 75 is disposed on the first upper surface 31 of the insulator 30; the second conductor 70a is covered by the insulator 30, each having a first upper surface 71a, a first lower surface 72a, and a first a side edge 73a, and the first upper surface 71a and the first lower surface 72a are respectively exposed and protruded from the first upper surface 31, the second lower surface 34 or the third lower surface 35 of the insulator 30 for power supply connection; Third conductor
第34頁 1292212 五、發明說明(30) 70b,設置在絕緣體30第三下表面35,各具第一下表面7 2b, 分別裸露並凸出於絕緣體3 0第三下表面3 5以供電性連接 用;二導電膏62,分別設置在第一導體70第一下表面72與 第三導體70b間,使第一導體70及第三導體70b能電性連通; 一元件80,設置在絕緣體30第一下表面32及第三下表面35 上,並令第一下表面82裸露並凸出絕緣體30第三下表面35; 上述方法中,第三導體70b可依需求,在絕緣體30第三下表 面35自由延伸設置,使電路板11成為一具雙層導電層的電 路板。Page 34 1292212 V. Inventive Note (30) 70b, disposed on the third lower surface 35 of the insulator 30, each having a first lower surface 7 2b, respectively exposed and protruding from the insulator 30, the third lower surface 35 for power supply The second conductive paste 62 is disposed between the first lower surface 72 of the first conductor 70 and the third conductor 70b to electrically connect the first conductor 70 and the third conductor 70b. An element 80 is disposed on the insulator 30. The first lower surface 32 and the third lower surface 35 are disposed, and the first lower surface 82 is exposed and protrudes from the third lower surface 35 of the insulator 30. In the above method, the third conductor 70b can be third under the insulator 30 according to requirements. The surface 35 is freely extended to make the circuit board 11 a circuit board having a double layer of conductive layers.
自圖17A〜 法,說明如下: 17D為第二類 電路板第三種製造步驟及方 圖17A所示,提供一第一導電板70p,其具有一第一上表 面71p、二第一下表面72p及二凸部7 7p;提供一第二導電板 70s,設置在黏膠帶47上,具有第一上表面71s、第一下表面 72s及孔洞78s,其中,二填充物43填充於二孔洞78s内; 圖17B所示,將第一、二導電板7 Op、70s接合,並令第 一導電板70p的各第一下表面72p分別埋入於第二導電板 70s孔洞78s内的填充物43,且令第一下表面72p與黏膠帶47 接合,經一加熱製程將填充物43固化,如此,第一導電板70p ❸與第二導電板70s就連接在一起,然後,再提供一填充製程 將絕緣體30填充於第一導電板7 〇p與第二導電板70s二者 間,並固化該絕緣體3 0 ; 圖17C所示,去除黏膠帶47,然後提供薄膜49,分別設 置於第一導電板7〇p第一上表面71P及第二導電板70s第一 1292212 五、發明說明(31) 下表面7 2 s上,並依需求開設孔洞4 §,令第一導電板7 〇 p第一 上表面71p—部份及第二導電板7〇s第一下表面72p—部份 得分別裸露於薄膜49 ; 圖17D所示,提供一蝕刻製程,將第一、二導電板70p、From Fig. 17A~, the description is as follows: 17D is a second type of circuit board and a third manufacturing step and shown in Fig. 17A, a first conductive plate 70p is provided, which has a first upper surface 71p and two first lower surfaces. 72p and two convex portions 7 7p; providing a second conductive plate 70s, disposed on the adhesive tape 47, having a first upper surface 71s, a first lower surface 72s and a hole 78s, wherein the two fillers 43 are filled in the two holes 78s As shown in FIG. 17B, the first and second conductive plates 7 Op, 70s are joined, and the first lower surfaces 72p of the first conductive plates 70p are respectively embedded in the fillers 43 in the holes 78s of the second conductive plates 70s. And the first lower surface 72p is bonded to the adhesive tape 47, and the filler 43 is cured by a heating process. Thus, the first conductive plate 70p and the second conductive plate 70s are connected together, and then a filling process is provided. The insulator 30 is filled between the first conductive plate 7 〇p and the second conductive plate 70s, and the insulator 30 is cured; as shown in FIG. 17C, the adhesive tape 47 is removed, and then a film 49 is provided, which is respectively disposed on the first conductive Plate 7〇p first upper surface 71P and second conductive plate 70s first 1292212 Ming (31) lower surface 7 2 s, and open holes 4 § as required, so that the first conductive plate 7 〇p first upper surface 71p - part and the second conductive plate 7 〇 s first lower surface 72p - The parts are respectively exposed to the film 49; as shown in FIG. 17D, an etching process is provided to bond the first and second conductive plates 70p,
7Os裸露於薄膜49開孔48處的部份去除,再提供一清除製程 將薄膜49及填充物43去除,令第一導體70第一上表面71及 第一下表面7 2均裸露於絕緣體3 0外部,至此,電路板11即已 形成,其包括:一絕緣體3〇,具第一上表面31、第一下表面 32、第二下表面34及凹部36;—容置空間14;二第一導體 + 70,受絕緣體30包覆,具有一第一上表面71、第一下表面 72及延伸部75,其中,延伸部75設置在絕緣體30第一上表 面31上,而第一上表面71及第一下表面72均裸露且凸出於 絕緣體30第一上表面31及第二下表面34外,以供電性連接 用·’一第二導體70a,設置在絕緣體30第一上表面31上;一第 三導體70b,設置在絕緣體3〇第一下表面32,其受絕緣體3〇 包覆,並令第一下表面72b裸露於絕緣體30第一下表面32; 上述方法中,第三導體70b可依需求設置延伸部,使電路板 11成為一具雙層導電層的電路板,亦可依需求於製作步驟 中,不設置第二導板70s,使電路板11不具有第三導體7 〇b而 ❼成為第一類電路板(1〇)。7Os is removed from the portion of the opening 49 of the film 49, and a cleaning process is provided to remove the film 49 and the filler 43 so that the first upper surface 71 and the first lower surface 71 of the first conductor 70 are exposed to the insulator 3. 0 outside, so far, the circuit board 11 has been formed, comprising: an insulator 3, having a first upper surface 31, a first lower surface 32, a second lower surface 34 and a recess 36; - an accommodation space 14; A conductor + 70, covered by the insulator 30, has a first upper surface 71, a first lower surface 72 and an extension 75, wherein the extension 75 is disposed on the first upper surface 31 of the insulator 30, and the first upper surface 71 and the first lower surface 72 are exposed and protrude from the first upper surface 31 and the second lower surface 34 of the insulator 30, and are connected to the first upper surface 31 of the insulator 30 by a second conductor 70a for power supply connection. a third conductor 70b disposed on the first lower surface 32 of the insulator 3, covered by the insulator 3, and exposing the first lower surface 72b to the first lower surface 32 of the insulator 30; The conductor 70b can be provided with an extension as required, so that the circuit board 11 becomes a circuit with a double-layer conductive layer. The board may also be provided in the manufacturing step as needed, without providing the second guide 70s so that the circuit board 11 does not have the third conductor 7 〇b and becomes the first type of circuit board (1〇).
唯上所述者僅為本發明的較佳範例,在導體將電性自 絕緣體第一上表面傳輸到第一下表面的功能不變下,當不 能以此限制本發明實施範圍,例如··圖1 A所示,其中,該元件 80亦可依需求具有一孔洞;如圖1E所示,其中,該元件8〇不Only the above is only a preferred example of the present invention, and the function of transmitting the electrical conductor from the first upper surface of the insulator to the first lower surface is not changed, and the scope of the present invention cannot be limited thereto, for example, As shown in FIG. 1A, the component 80 can also have a hole as required; as shown in FIG. 1E, wherein the component 8 is not
第36頁 1292212 弋、發明說明(32) 一"實施為散熱件而且亦可實施為第二導體;如圖ικ所 :、其中,第三導體7〇b與第二導體7〇a是可以彼此互換,亦 麻=第二導體7〇b可實施為第二導體,而第二導體7〇a則可 =:為第三導體;圖1N所示,其中,導電膏62是可依需求被 、、邑緣體取代’·如圖1 H、1 1所示,元件8 0可依需求設置在 體30的第一上表面31或第一下表面32而未受絕緣體3〇 匕是,或可依需求令元件80第一侧邊83受絕緣體3〇包覆,如 此,亦可令電路板更具實用性;如圖1M、1N所示,第二導體 7(^可依需求設置在絕緣體30的第一上表面31或第一下表 面32而未受絕緣體30包覆,或可依需求令第二導體7〇a第 一側邊7 4 a受絕緣體3 0包覆,如此亦可令電路板更且實用 ,如圖1P所示,其中,位於絕緣體= ¥體7 0與位於絕緣體第一下表面3丨的第一導體7 〇二者間, 可依高求设有一第二導體,其將各第一導體電性連通,此 第二導體可實施為錫或銅質的導電通路等;如圖1Q所示,該 電路板12,可依需求不具有第三導體7〇b,令第一導體7〇第 「下表面72裸露並凸出於第一絕緣體3〇a表面,如此,亦可 達到不需設置鍚球而卽省材料的功效;又如圖1 A、1 e或1 F 所不,元件8 〇亦可依需求製成不同的形狀而設置在絕緣體 ,30的第一上表面31、弟一下表面32、或受絕緣體3〇包覆, 如此,可提昇散熱效率而令電路板更具實用性;而如圖4所 不,右元件80與第一、二導體70、70a均實施為導電材質 時,則元件80與第一、二導體70、70a可依需求更換功能, 如將元件80實施為第二導體(70a),或將第二導體7〇a實施Page 36 1292212 弋, invention description (32) a " implemented as a heat sink and can also be implemented as a second conductor; as shown in Figure ι:, wherein the third conductor 7〇b and the second conductor 7〇a are Interchanged with each other, also the second conductor 7〇b can be implemented as a second conductor, and the second conductor 7〇a can be: a third conductor; as shown in FIG. 1N, wherein the conductive paste 62 can be required , the rim body is replaced by '· as shown in FIG. 1 H, 1 1 , the component 80 can be disposed on the first upper surface 31 or the first lower surface 32 of the body 30 as required without being subjected to the insulator 3 〇匕, or The first side 83 of the component 80 can be covered by the insulator 3〇 according to requirements, so that the circuit board can be made more practical; as shown in FIGS. 1M and 1N, the second conductor 7 can be disposed on the insulator as required. The first upper surface 31 or the first lower surface 32 of the 30 is not covered by the insulator 30, or the first side 7 4 a of the second conductor 7〇a may be covered by the insulator 30 as required, so that The circuit board is more practical and practical, as shown in FIG. 1P, wherein the insulator = ¥ body 70 and the first conductor 7 位于 located at the first lower surface 3 of the insulator can be A second conductor is provided, which electrically connects the first conductors, and the second conductor can be implemented as a tin or copper conductive path; as shown in FIG. 1Q, the circuit board 12 can have no The three conductors 7〇b are such that the first conductor 7〇 “the lower surface 72 is exposed and protrudes from the surface of the first insulator 3〇a, so that the effect of saving the material without setting the spheroidal ball can be achieved; 1 A, 1 e or 1 F, component 8 〇 can also be formed into different shapes according to requirements, and is disposed on the insulator, the first upper surface 31 of the 30, the surface 32 of the younger body, or the insulator 3, so The heat dissipation efficiency can be improved to make the circuit board more practical; and as shown in FIG. 4, when the right component 80 and the first and second conductors 70, 70a are both made of a conductive material, the component 80 and the first and second conductors 70 are 70a can be replaced as needed, such as implementing element 80 as a second conductor (70a) or implementing a second conductor 7a
第37頁 1292212 五、發明説明(33) 為元件(80 ),如此,可令電路板的使用更具彈性;如圖6所 示,其中,晶片20的非作用面22上亦可依需求設置一散熱 件,·如圖1 3、1 4、1 5、1 6或1 7的方法所示,可依需求再設置 一個或多個絕緣體、導體或元件於電路板表面,經敍刻、 清除等製程以形成多層導電層的電路板,並藉導電膏、導 電通路或電鍍層將各導電層間的導體電性連通,其中,圖 13A所示的第一導電板70ρ可依需求是由銅或金屬合金 (metallic alloy)等適當的材質製成者;如圖14Α所示,其 中,第一導電板70p第一上、下表®71p、72p上各導電層的 ❶層數可依需求層層堆疊而再具有第二導電層或第三導電層 等逐層增加的層數,且亦可依需求僅於第一導電板7 Op第一 下表面72p設置第一導電層55,使圖14F的第一導體7〇第一 上表面71不具有第一導電層55,而各導電層的材質亦可依 需求改變金屬材質,例如,第一導電層實施為鎳,第二導電 層實施為金等適當的金屬材質,同時,亦可依需求於第一導 板7 Op上設置預設形狀的第一導電層5 5,以利於蝕刻作業 及提升電路板10的使用性·,而如圖1P或圖所示,其中, 圖1P的電路板11,在絕緣體30與第一導體7〇(含第一導電層 55側邊58及第二導電層55a側邊58a)間,可依需求,設有一 ^絕緣層(insulating layer),據此,令第一導體70(含第一 導電層55側邊58及第二導電層55a側邊58a)得被絕緣體30 包覆更穩固,以提昇第一導體70、第一導電層5 5、第二導 電層55a與絕緣體30的接合性;而如圖所示,其中,在第 一導電板70p與絕緣體30二者間亦是可依需求設有一絕緣Page 37 1292212 V. Inventive Note (33) is the component (80). Thus, the use of the circuit board can be made more flexible; as shown in FIG. 6, wherein the non-active surface 22 of the wafer 20 can also be set as required. a heat sink, as shown in the method of Figure 13, 3, 14, 5, 16 or 17, one or more insulators, conductors or components can be placed on the surface of the board as required, after being carved and removed The process is to form a circuit board of a plurality of conductive layers, and electrically connect the conductors between the conductive layers by using a conductive paste, a conductive path or a plating layer, wherein the first conductive plate 70p shown in FIG. 13A can be copper or A suitable material such as a metallic alloy is produced; as shown in FIG. 14A, wherein the number of layers of the conductive layers on the first upper and lower surfaces of the first conductive plate 70p can be determined according to requirements. Stacking and further having a second conductive layer or a third conductive layer and the like, and the first conductive layer 55 is disposed on the first lower surface 72p of the first conductive plate 7 Op as required, so that the first conductive layer 55 is provided in FIG. 14F. The first upper surface 71 of the first conductor 7 不 does not have the first conductive layer 55, and the material of each conductive layer The metal material may be changed according to requirements. For example, the first conductive layer is made of nickel, and the second conductive layer is made of a suitable metal material such as gold. At the same time, a preset shape may be set on the first guide plate 7 Op according to requirements. The first conductive layer 55 is used to facilitate the etching operation and to improve the usability of the circuit board 10. As shown in FIG. 1P or FIG. 1 , wherein the circuit board 11 of FIG. 1P is in the insulator 30 and the first conductor 7 (including Between the side of the first conductive layer 55 and the side of the second conductive layer 55a 58a), an insulating layer may be provided according to requirements, thereby making the first conductor 70 (including the first conductive layer 55 side) The edge 58 and the side edge 58a) of the second conductive layer 55a are more stably covered by the insulator 30 to improve the bonding property of the first conductor 70, the first conductive layer 55, the second conductive layer 55a and the insulator 30; As shown, an insulation may be provided between the first conductive plate 70p and the insulator 30 as needed.
第38頁 1292212 五、發明說明(34) 、 層(insulati ng layer),據此,令第一導電板7〇P亦付被v 緣體30包覆更穩固,以提昇第一導電板7〇P與絕緣體30的接 合性,而在實施蝕刻製程時,該絕緣層的一部份是可以被去 除,如此,該絕緣體3 0第一上表面3 1 (參閱圖1 6 D )的一部份 就可以裸露在大氣(atmosphere)中,同時,該絕緣層是實施 為絕緣體3 0的一部份者;而如圖1 6 J;所示,其中,該絕緣體 30的第二下表面34與該絕緣體3〇的第一下表面32是玎以彼 此互換,亦就是該絕緣體30的第二下表面34可實施為第〆 ΐ 2 而該絕緣體3〇的第一下表面32則可實施為第二 置,令該黏膠圖帶 174Α7:2^ 電路板11就可以开,僅具有填充物43,如此,圖17D所示的 (A、Β、C)所示的^第二為本發明第一類電路板;同時,如圖Π 體70a取代者;故舉一導電板70s是可依需求被多個第二導 申請專利範圍所^ ,變更或等效元件置換或依本發明 涵蓋的範疇。 句等變化與修飾皆應仍屬本發明專利Page 38 1292212 V. Inventive description (34), layer (insulati ng layer), according to which, the first conductive plate 7〇P is also more stably covered by the v-edge body 30 to enhance the first conductive plate 7〇 The bonding of P to the insulator 30, and a portion of the insulating layer can be removed during the etching process, such that a portion of the first upper surface 3 1 of the insulator 30 (see FIG. 16D) It can be exposed in the atmosphere, and at the same time, the insulating layer is implemented as part of the insulator 30; and as shown in Fig. 16 6; wherein the second lower surface 34 of the insulator 30 is The first lower surface 32 of the insulator 3 is 玎 interchangeable with each other, that is, the second lower surface 34 of the insulator 30 can be implemented as the second 而 2 and the first lower surface 32 of the insulator 〇 can be implemented as the second Therefore, the adhesive tape 174Α7:2^ the circuit board 11 can be opened, and only has the filler 43, so that the second shown in FIG. 17D (A, Β, C) is the first of the present invention. Class circuit board; at the same time, the body 70a is replaced; therefore, a conductive plate 70s can be applied for by a plurality of second guides according to requirements. , alteration or equivalent component replacement or in accordance with the scope of the present invention. Sentences and other changes and modifications should still belong to the invention patent
1292212 圖式簡單說明 【圖式簡單說明】 圖1 A〜1 J :本發明第一類電路板的剖視圖; 圖1 K〜1 P :本發明第二類電路板的剖視圖; 圖1 Q〜1 R ·.本發明第三類電路板的剖視圖; 圖2〜1 0 :應用本發明第一類電路板的電子裝置實施例 的剖視圖; 圖1 1 :應用本發明第二類電路板的電子裝置實施例的剖 視圖;1292212 Brief description of the drawing [Simplified description of the drawings] Fig. 1 A to 1 J: sectional view of the first type of circuit board of the present invention; Fig. 1 K~1 P: sectional view of the second type of circuit board of the present invention; Fig. 1 Q~1 R. A cross-sectional view of a third type of circuit board of the present invention; FIGS. 2 to 10: a cross-sectional view of an embodiment of an electronic device to which the first type of circuit board of the present invention is applied; FIG. 11: an electronic device to which the second type of circuit board of the present invention is applied a cross-sectional view of an embodiment;
圖1 2 :應用本發明第三類電路板的電子裝置實施例的剖 視圖; 圖1 3A〜1 3 E:本發明第一類電路板第一種製造方法 剖視圖; 圖1 4A〜1 4 F:本發明第一類電路板第二種製造方法 剖視圖; 圖1 5A〜1 5 C:本發明第二類電路板第一種製造方法 剖視圖; 圖1 6A〜1 6 E:本發明第二類電路板第二種製造方法 剖視圖;Figure 1 2 is a cross-sectional view showing an embodiment of an electronic device to which the third type of circuit board of the present invention is applied; Figure 1 3A to 1 3 E: a cross-sectional view of the first manufacturing method of the first type of circuit board of the present invention; Fig. 1 4A to 1 4 F: BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a first manufacturing method of a second type of circuit board of the present invention; FIG. 1 6A to 1 6 E: a second type circuit of the present invention a cross-sectional view of a second manufacturing method of the board;
圖1 7A〜1 7D:本發明第二類電路板第三種製造方法 剖視圖; 圖1 8 :習式電子裝置結構的剖視圖; 【主要元件符號說明】 1.......習式電路板 5......導電通路 6........導電通孔 7......第一導體Figure 1 7A~1 7D is a cross-sectional view showing a third manufacturing method of the second type circuit board of the present invention; Fig. 18 is a cross-sectional view showing the structure of the conventional electronic device; [Description of main components] 1. Plate 5 ... conductive path 6 ..... conductive through hole 7 ... first conductor
第40頁 1292212 圖式簡單說明 9 · · · •習式電子裝置 1 4 、1 7 · ·容置空間 2 0 、 2 5 · · · •晶片 2 2· · •晶片非作用面 3 1 ·絕緣體第一上表面 33·絕緣體第二上表面 3 5 ·絕緣體第三下表面 3 7· · · •絕緣體側邊 3 9 · · · ·絕緣體凸部 4 3......填充物 4 6......防焊層 4 8.......孔洞 5 0.......錫球 8 ........第二導體 10、11、12· ·電路板 15· · · •貫穿狀容置空間 2 1......晶片作用面 3 0.......•絕緣體 32· · •絕緣體第一下表面 34· · •絕緣體第二下表面 3 6......絕緣體凹部 3 8......絕緣體孔洞 4 0··......封裝體 4 5........黏著件 4 7·.......黏膠帶 4 9.........薄膜 5 3 5 6 .....接合墊 第一導電層上表面 5 5 5 7 第一導電層 導電層下表面 第 5 8 _ • · · 第 導 電 層 側 邊 6 0 · 導 電 件 ( 導 電 線 ) 6 2 _ 導 電 膏 6 5 •導 電 件 ( 導 電 凸 部 ) 6 9 _ 導 電 通 路 7 0 • • .第- -導體 7 1 · 第一導 體 第 一 上 表 面 7 2 •第 導 體 第 下 表 面 7 3 •第一 導 體 第 一 側 邊 7 4 • · 第 一 導 體 第 二 側 邊 7 5 · • •第 一 導 體 延 伸 部 7 7 • · 參 • 第 導 體 凸 部 7 8 . • · · 第 _ 導 體 孔 洞 7 9 •第 _ · 導 體 第 —* 上 表 面 8 0 · 元 件 8 1 • · • 元 件 第 一 上 表 面 8 2 · • ·元 件 第 — _ 下 表 面 8 3 • · • • 元 件 第 側 邊Page 40 1292212 Brief description of the diagram 9 · · · • Custom electronic device 1 4 , 1 7 · · Accommodation space 2 0 , 2 5 · · · • Wafer 2 2 · · • Wafer non-active surface 3 1 · Insulator First upper surface 33·Insulator second upper surface 3 5 ·Insulator third lower surface 3 7 · · · Insulator side 3 9 · · · · Insulator protrusion 4 3 ... filler 4 6. ..... solder resist layer 4 8....... hole 5 0....... solder ball 8 ........ second conductor 10, 11, 12 · · circuit board 15· · · • Through-space accommodating space 2 1... wafer action surface 3 0.......•Insulator 32·· • Insulator first lower surface 34· · • Insulator second lower surface 3 6...Insulator recess 3 8...Insulator hole 4 0··......Package 4 5........Adhesive 4 7·... ....adhesive tape 4 9.........film 5 3 5 6 ..... bonding pad first conductive layer upper surface 5 5 5 7 first conductive layer conductive layer lower surface 5 8 _ • · · Conductive layer side 6 0 · Conductive member (conductive wire) 6 2 _ Conductive paste 6 5 • Conductive member (conductive bump) 6 9 _ Conductive path 7 0 • • . First - - conductor 7 1 · first conductor first upper surface 7 2 • first conductor lower surface 7 3 • first conductor first side 7 4 • first conductor second side 7 5 · • • first Conductor extension 7 7 • · • • Conductor protrusion 7 8 • • · _ conductor hole 7 9 • _ · conductor —— _ upper surface 8 0 · element 8 1 • · • element first upper surface 8 2 · • · Component No. — _ Lower surface 8 3 • · • • Side of the component
第41頁 1292212 圖式簡單說明 8 4 ·————·元件第二側邊 85.....元件延伸部 8 6.....•元件凹部 88·.....元件孔洞 89........電容 90......電子裝置 91· · · •第一電子裝置 92· · · •第二電子裝置 2 0 3 .....弟二晶片 30a · · · ·第一絕緣體 3 0 b · · · ·第二絕緣體 3 0 c · · · ·第三絕緣體 3 1a...........第一絕緣體第一上表面 3 2a·..........第一絕緣體第一下表面 55a· · · •第二導電層 56a ·第二導電層上表面Page 41 1292212 Brief description of the diagram 8 4 ·————· The second side of the component 85.....The component extension 8 6.....•Component recess 88·.....Component hole 89 ........capacitor 90...electronic device 91··· • first electronic device 92··· • second electronic device 2 0 3 ..... 2nd chip 30a · · · First insulator 3 0 b · · · · Second insulator 3 0 c · · · · Third insulator 3 1a.............. First insulator first upper surface 3 2a ·.. . . . first insulator first lower surface 55a · · · second conductive layer 56a · second conductive layer upper surface
57a·第二導電層下表面 58a.·第二導電層側邊 70a·····第二導體 70b.....第三導體 70c·····第四導體 70p····第一導電板 70s· · •第二導電板 71a ·第二導體第一上表面 7 1b............第三導體第一上表面 7 1c............第四導體第一上表面 7 1 ρ...........第一導電板第一上表面 7 1s...........第二導電板第一上表面 7 2a............第二導體第一下表面 7 2b............第三導體第一下表面57a·second conductive layer lower surface 58a.·second conductive layer side 70a·····second conductor 70b.....third conductor 70c·····fourth conductor 70p···· a conductive plate 70s · · a second conductive plate 71a · a second conductor first upper surface 7 1b ... ... third conductor first upper surface 7 1c. ..... fourth conductor first upper surface 7 1 ρ...........first conductive plate first upper surface 7 1s...........second conductive The first upper surface of the board 7 2a ... the second lower surface of the second conductor 7 2b ... the first lower surface of the third conductor
7 2c............第四導體第一下表面 7 2 ρ...........第一導電板第一下表面 7 2s...........第二導電板第一下表面 7 3a.............第二導體第一側邊 7 3 b ·第三導體第一側邊 7 3 c ·第四導體第一側邊7 2c............the fourth lower surface of the fourth conductor 7 2 ρ.....the first lower surface of the first conductive plate 7 2s..... ...the first lower surface of the second conductive plate 7 3a........the first side of the second conductor 7 3 b ·the first side of the third conductor 7 3 c ·The first side of the fourth conductor
第42頁 1292212 圖式簡單說明 7 4 a ·第二導體第二側邊 75a 75b··第三導體延伸部 76s 77a、77b........ 7 7c............ 7 7 p............ 7 8 a、7 8 s •孔洞 7 C...... •盍體 D E...... •龜裂 G Η...... •南度 Ρ a •第二導體延伸部 •第二導電板凹部 • ••第二導體凸部 • ••第一導體凸部 ••第一導電板凸部 第二導體貫穿容置空間 ........距離 ........間隙 .......凸出體Page 42 1292212 Brief description of the diagram 7 4 a · Second conductor second side 75a 75b · Third conductor extension 76s 77a, 77b........ 7 7c........ .... 7 7 p............ 7 8 a, 7 8 s • Hole 7 C... • Carcass D E... • Crack G Η... • Southern Ρ a • Second conductor extension • Second conductive plate recess • • Second conductor projection • • • First conductor projection • • First conductive plate projection The two conductors penetrate the accommodating space........distance........gap.......protrusion
第43頁Page 43
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