TWI287292B - Method and apparatus transporting charges in semiconductor device and semiconductor memory device - Google Patents

Method and apparatus transporting charges in semiconductor device and semiconductor memory device Download PDF

Info

Publication number
TWI287292B
TWI287292B TW94122357A TW94122357A TWI287292B TW I287292 B TWI287292 B TW I287292B TW 94122357 A TW94122357 A TW 94122357A TW 94122357 A TW94122357 A TW 94122357A TW I287292 B TWI287292 B TW I287292B
Authority
TW
Taiwan
Prior art keywords
energy
conductor
charge
filter
dielectric
Prior art date
Application number
TW94122357A
Other languages
Chinese (zh)
Other versions
TW200607078A (en
Inventor
Chih-Hsin Wang
Original Assignee
Chih-Hsin Wang
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/007,907 external-priority patent/US7115942B2/en
Priority claimed from US11/120,691 external-priority patent/US7759719B2/en
Application filed by Chih-Hsin Wang filed Critical Chih-Hsin Wang
Publication of TW200607078A publication Critical patent/TW200607078A/en
Application granted granted Critical
Publication of TWI287292B publication Critical patent/TWI287292B/en

Links

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

A conductor-filter system, a conductor-insulator system, and a charge-injection system are provided. The conductor-filter system provides band-pass filtering function, charge-filtering function, voltage-divider function, and mass-filtering function to charge-carriers flows. The conductor-insulator system provides Image-Force barrier lowering effect to collect charge-carriers. The charge-injection system includes the conductor-filter system and the conductor-insulator system, wherein the filter of the conductor-filter system contacts the conductor of the conductor-insulator system. Method and apparatus on charges filtering and injection are provided for semiconductor device and nonvolatile memory device. Additionally, method and apparatus on charges injection using piezo-ballistic-charges injection mechanism are provided to the charge-injection system and devices operation. Memory cells and array architectures and manufacturing method thereof are provided.

Description

1287292 九、發明說明: 【發明所屬之技術領域】 本發明係有i半導置與抖敎,隨置,_是有關彻影像力 (Image Force)機制以於這些裝置内傳輸電荷之方法與裝置。 【先前技術】 影像力係眾所周知之研究題材,如Sze所撰-名為「半導體元件物理」 (“Physics of Senriconductor Devices”,Wiley,New Y〇rk,1981,Ch邮 作所描述n册力會導致罐降低,_造摘·影像力能障降 低效應(Image_Forcebarriei·loweringeffct),並且是電荷載子發射所使用許特 基效應(Schottky Effect)之主要主導機制。 由Lenzlinger與Snow所發表一篇名為「富爾諾罕穿隧進入熱長成之二 j CToweler-Nordheim Timneling into Thermally Grown Si02/5 J. Appl. Phys” 40, pp. 278-283 (1969))的文章亦討論到影像力。該文將影像力效應與 常溫載子(Thermal Cairiers)穿隧通過二氧化矽(氧化物)時所利用之富爾諾罕 穿隧(Fowler-Nordheim Tunneling; FN)機制相合併。 人們已嘗試將影像力連同光電流一電壓量測法一起使用以描緣氧化物 電何之分佈(參見Nicollian與Brews所發表一名為「MOS物理與技術」之 著作(“MOS Physics and Technology,,,Wiley,New York,1982, Chapter 11, ρ·513))。影像力與這些方法亦被運用於研究金屬和氧化物交界處的能障高 度及研究矽(Si)和氧化物交界處的能障高度。 在2004年6月1日一由Wu發表之案號為6,744,111的美國專利中,一 種具有一射極(Emitter),一基極(Base),以及一集極(Collector)之三端點半導 體元件被加以描述。命特基能障接面(Schottky barrier j皿ctions)係形成於射 極區和基極區之交界處’以及集極區和基極區之交界處。這類元件係利用 許特基效應(藉由影像力能障降低機制),並且經由控制基極區的電壓來允許 0881-A31715TWF(5.0) d 1287292 穿隧電流通過該等許特基能障接面。 然而,上述種種利用影像力機制之範例與嘗試,皆為與非揮發性記憶 體無關之應用。 具電荷儲存能力之非揮發性半導體記憶單元在技術領域内乃眾所皆 知。電荷典型上係儲存於一浮動閘内,用以定義一記憶單元的狀態。典型 上’記憶單元的狀態可有兩具種位準,或可具有兩種以上的位準(使用於多 位準狀態之儲存)。諸如通道熱電子(Channel Hot Electron; CHE)、源極側注 入(Source_Side Injection; SSI)、富爾諾罕穿隧(Fowler-Nordheim Tunneling; FN) ’以及能帶至能帶穿隧(BalKj_t〇_BanciTunneling; BTBT)等引入熱電子注 入之機制皆可在編程和/或抹除操作中用來改變這類記憶單元之狀態。這些 機制運用於記憶單元操作之範例可參見案號為4,698,787,5,029,130, 5792,670以及5,966,329之美國專利,其係分別針對CHEI機制,SSI機制, FN機制以及BTBT機制來探討。 ,然而’所有上述機制與嘗試之注入效率(定義為所收集載子數與所供應 載子數之比率)都相當低劣。此外,這些機制需要高電壓以支持記憶體之 作L而高達1〇V之電壓往往可見。在這樣的高電壓下,勢必得嚴格控制環 繞淨動閘之絕緣體的品質。在以這些機制操作下的記憶體因而容易遭受製 造問題與可靠性問題。 鑑於上述問題,本發明的目的之—在於提供—絕緣能障於—導體—絕 ,體系統中,鱗體—絕緣齡統可用麵加載子注人效率與減少操作電 =^發明之另-目的在於提供能以緊密能量分佈與高注入效 ,載子(電荷_)。本發明之其餘目的與對這些目的之更 = 照說明書與圖示來領略之。 J ^ 【發明内容】 本毛月之目的係為半導體裝置與記憶體内之電荷過濾與注人提供方法 0881-A31715TWF(5.0) 6 1287292 \ 與裝置。 簡單言之,本發明實施例之一係一種導體一過濾器系統。此導體一過 濾器系統係包括一導體以供應常溫電荷載子,以及一與該導體相接觸之過 ,濾器。此過濾器係包括介電質,用以提供對某極性電荷載子之過濾功能, 其中該過濾器係包括可電性修改(Electrically Alterable)之電位能障(Potential : Barrier),並用以控制沿某一方向來通過該過濾器之某極性電荷載子的流動。 除了對某極性的電荷載子進行控制外,此過濾器更包括另一組可電性 修改之電位能障,以控制沿另一與上述某一方向大體上相反之方向來通過 • 該過濾器之相反極性電荷載子的流動。 簡單έ之,本發明之另一實施例係一種導體一絕緣體系統。該導體一 絕緣體系統係包括一具有高能電荷載子之導體,其中該等高能電荷載子具 有一肖b里分佈,以及一絕緣體,其與該導體相接於一交界。該絕緣體於該 交界處附近具有-可電性修改之影像力電位能障,其中該像力電位能障係 可電性修改’以允許該等高能電荷載子能越過它來傳輸。在另—較佳實施 例中,該等尚能電荷載子具有一能譜(Energy Spectrum)範圍約為3〇 meV至 300 meV之能量分佈。 _ 帛單言之,本發明之另—實施例係—電荷注人系統。該電荷注入系統 係包括-導體-過濾_統,其具有一導體以提供常溫電荷載子,以及一 .與該導體相接觸之過滤器,其包含介電質以提供對某極性電荷載子之過濾 -侃。該顧II係包括-組可電性修改之電位能障,以控制沿某—方向通 ·過該猶H之某極性電荷載子的流動,以及更包括另—組可電性修改之電 位能障,以控制沿另-與上述某一方向大體上相反之方向通過該過滤器之 相反極性電荷載子的流動。該電荷注入系統更包括一導體一絕緣體系統。 該導體-絕緣體系統係包括一第二導體,其與該過遽器接觸並具有來自該 過濾器之高能電子,以及包括一絕緣體,其與該第二導體相接於一交界, 並且該絕緣體霞交界附近具有_影像力修麟。該影像力電位能障係 0881-A31715TWF(5.0) 1287292 可電性修改,以允許該等尚能電荷載子能越過它來傳輸。 簡單言之,本發明之另-實施例係-種記憶單元。該記憶單元包括一 導體-過濾器祕,其具有-導體以提供常溫電韻子,以及—與該導體 •相接觸之過滤器,其包含介電質以提供對某極性電荷載子之過濾功能。該 過,器係包括第-組可電性修改之電位麟,以控制沿某—方向通過該過 ·-濾、器之某極性電荷載子的流動’以及第二組可電性修改之電位能障,以控 • 另一與上述某一方向大體上相反之方向通過該過濾器之具相反極性: 電荷載子的流動。 # ®單言之’本發明之另一實施例係一種記憶單元之形成方法。該方法 包括以下步驟··形成-具第—導電型之主體於—半導體基板内,形成一第 -絕緣層於該基板上,形成—電制存層於該第—絕緣層上,形成一具第 二導電型之第-區域與-具第二導電型之第二區域於該主體内,形成一通 道區域於該主_於該第-區域與第二區域之間,其中該通道區域大體上 與該電荷儲存區域相鄰且相絕緣,形成一第二絕緣層於該電荷絕緣層之鄰 近區域,形成二至少有-部分區域與該電制存區域相臨且相絕緣之第一 導電區域形成具有過滤功能且相鄰於該第一導電區域之過滤器,以及 鲁形成-與該第-導電區域之至少一部分區域相鄰且藉由該過絲相絕緣之 第二導電區域。 簡單σ之本發明之另_實補係—種記鮮元陣列之形成方法。該 方^包括以下步驟··形成—具第—導電型之主體於_半導體基板内,形成 一第一絕緣層於該基板上,形成彼此分離並以—第—方向延伸之位元線㈣ lmes)於H域内,其中每—該位元線㈣成於該主體之至少一部分區 域内域翻:個電荷齡區域機第—絕緣層上,其巾料電荷儲存區 域係安排為:陣列,其中該陣列之行以該第一方向延伸,而該陣列之列以 垂直於該帛㈣之第二方向延伸,形成複數個具有第二導電型之第一 區域域複數個具有第二導電型之第二區域,形成複數個通道區域於該 ⑧ 0881-A31715TWF(5.0) 1287292 感 ·,主體内,其中每一該通道區域皆延伸於該等第一區域當中之一與該等第二 區域當中之-之間並大體上與該等電荷赫區域#中之_相鄰幻目絕緣, 形成複數個具有過濾功能之顯H,其中每-該過濾器皆具有一部分區域 與該等第-導電區域當中之-相鄰;以及形成複數個第二導電區域,其中 每-該第二導Μ域皆與該等第-導電區域當中之—之至少_部分區域相 鄰且藉由該等過濾器當中之一相絕緣。 本發明之上賴及其他目的、特徵姻益,·藉由以下詳細說明連 同附加圖示而顯而易見。 【實施方式】 本說明書所使用的符號Ν+係代表一重度摻雜的ν型半導體材料,其所 含Ν型雜質(比方是砷)之摻雜濃度典型上是102〇(原子數/立方公分)之數量 級。符號Ρ+則代表一重度摻雜的Ρ型半導體材料,其所含!>型雜質(比方是 硼)的換雜》辰度典型上疋10 (原子數/立方公分)之數量級。在任何適當之 處,所有圖示及以下通篇說明將會使用同一參考指標以指示相同或相似部 分。 藝第1圖係顯示一導體一絕緣體系統於一電場施加下之能帶圖。該能帶 圖顯示一導體10與一絕緣體12相接觸,並於其能帶中具有一費米能階 (FermiLevel)16。圖中並顯示出絕緣體12於影像力效應下之導電帶18與不 ψ • 具影像力效應下之導電帶18’。此外,絕緣體12於影像力效應下之電位能 / 障24與無影像力效應下之電位能障24’分別具有能障高度A 20與‘ 22。 此圖顯示出,應力效應使電位能障的形狀由一能障邊緣處具有尖銳轉角之 三角形能障24,改變為具有一圓滑轉角之三角形能障24(稱為「影像力電仅 能障」或「影像力能障」)。此效應使電位能障之能障高度由能障高度22 降低為能P早南度20 ’兩能卩早南度之差距為△么26。一能障頂峰28亦顯示於 影像力能障24之最高點處,其與導體10與絕緣體12之交界處相距一距離 0881-A31715TWF(5.0) 9 1287292 • x- 30。 在第1圖中,該導體可為半導體,比方是N+多晶型式的矽(即多晶矽 (Polysiclicon))、P+多晶梦、重度掺雜之多晶型式石夕錄(即多晶石夕鍺(P〇ly SiGe)),或可為金屬,比方是鋁(Aluminum; A1)、鉑(Platinum; Pt)、Au、鎢 (Tungsten; W)、la (Molybdenum; Mo)、釕(Ruthenium; Ru)、钽(Tantalum; Ta)、 : 鎳(Nickel ; Ni)、氮化鈕(Tantalum Nitride)、氮化鈦(Titanium Nitride ; ΉΝ) 等等,或為以上材料之合金,比方是銘一石夕化物(Platinum_Silicide)、鶴一石夕 化物(Tungsten-Silicide)、鎳一石夕化物(Nickel — Silicide)…等等。該絕緣體可 • 以是一介電質或是空氣。當介電質被考慮用作該絕緣體之材料時,諸如氧 化物、氮化物、氮氧化物(SiON)都可用作該介電質。此外,介電常數低於 或高於氧化物之介電常數(或稱電容率)之介電質(分別稱為「低k介電質」 和「高k介電質」)亦可考慮作為絕緣體之材料。這類低k介電質可為氟矽 玻璃(Fluorinated Silicon Glass; FSG)、SiLK、多孔氧化層(Porous Oxide),比 方是奈米多孔碳掺雜氧化物(Nanoporous Cabon-Doped Oxed)等等。而這類高 k介電質則可以為氧化鋁(Aluminum Oxide; Al2〇3)、氧化铪(Hafoium Oxide; Hf02)、氧化鈦(Titanium Oxide; Ti02)、氧化錘(Zirconium Oxide; Zr02)、氧 • 化组(TantalumPen_〇xide; Ta205)等等。更者,這些材料的混成物或其所形成 的合金’比方是氧化铪一氧化物之合金(Hafiiium Oxide-Oxide alloy; , Hf〇rSi〇2)、铪—氧化鋁之合金(Hafiiium-Aluminum-Oxide Alloy; HfAlO)、 " 銓一氮氧化物之合金(Hafiiium-Oxynitride Alloy; HfSiON)…等等,都可選作 參 - 這類介電質之材料。此外,不須要求絕緣體為具有均勻化學元素的介電質 材料,亦不須要求其僅包括單獨一層而已,而可允許當中的元素能漸次變 化,並可允許其可包括一層以上。 第2圖係顯示電子31經由量子力學穿隧機制(例如富爾諾罕穿隨)以傳 輸通過第1圖之電位能障。導體10内的電子31在穿隧過電位能障24與24, 之前係處於常溫,a _對費米謎16不具有動能。這種電子稱為「常溫 0881-A31715TWF(5.0) 1287292 ,電子(ThermalElectrons)」,以及這種電荷載子稱為「常溫電荷載子」或「常 溫載子」。當一大電場(典型上大於10 MV/cm)施加於絕緣體12内時,常溫 電子31能夠利用量子力學傳輸機制通過絕緣體12。在如此大的電場下,圖 中顯示電子31穿隧過絕緣體12,並在具影像力效應與不具影像力效應之情 況中係分別進入導電帶18與18’。當影像力使能障高度降低時,人們已知 這種穿隧機制會令電子31傳輸通過電位能障24之穿隧機率高於傳輸通過 電位能障24’之穿隧機率。 第3A圖係顯示一個尚能電荷載子(熱電子32)傳輸越過第1圖之導體一 絕緣體系統之電位能障時的能帶圖。某區域内之高能電荷載子係定義為相 對該區域之費米能階擁有動能的電荷載子。舉例而言,在第3A圖中,位於 導體10内的熱電子32顯示為相對導體1〇之費米能階%具有一動能%。 這樣的電子之傳輸機制不同於第2圖内常溫電子31的傳輸機制。動能% 所在位準在圖中係稱微高於影像力電位能障24之能障高度2〇,並低於能障 高度22。圖中顯示熱電子32沿一朝前方向34(以箭頭顯示)由導體1〇移往 絕緣體12。當考慮不具衫像力效應之電位能障時,動能%不足以支持熱電 子32越過電位能障24’,因此熱電子32被電位能障24,阻擋而沿一返回路 徑34,移動。然而,在影像力效應影響下,降低的能障高度2〇允許具有相 同動能33的熱電子32能沿該朝前方向34傳輸並掠過影像力電位能'障以 而進入它的導電帶18。此效應是受到希望的,因為在積體電路⑽和記憶 體之相關應用中製造熱電子時,其能使供給熱電子32能量之所需供應之電 壓降低。 第3B圖係顯示影像力於改變能障高度與電位能障之能障頂峰位置上 的效果。能障高度與能障頂峰位置係描繪為絕緣體12之外加電場Ε〇的函 數。第3B圖顯示當約5MV/cm之電場ED施加於絕緣體12上時,能障高度 20會從3.1V降低至約3_5V。典型上,是藉由施加一橫跨絕緣體J之= 來施加這_電場。舉_言,以-厚度為6奈米的氧化物絕緣體為例, 0881-A31715TWF(5.〇) 11 1287292 •若需製造5麟m的電場,乃需要約3·〇ν之電黯跨於該氧化物。在施加 此電場下,力效應絲省電子_,是影像力效應與電位能障必 須被克服至-距離Xm而已,而非被克服至無限長的距離。 第3B圖更顯示能障頂峰至導體/絕緣體交界處之距離Xm 3〇可由無限 長之範圍(ED=〇MV/Cm)縮減至小於i奈米之範圍(於^^娜咖時)。在 固態物理領域内,當-移動電荷之傳輸時間(T_it Time)較—介質(Medium) (例如第1圖之絕緣體12)之介電質極化時間_ectric p〇larizati〇n 短時,人們已知該介電質之極性無法緊隨該移動電荷來變化。如第3圖所 不,減短能障頂峰距離Xm之長度會縮減電荷傳輸時間,並且此效應是受 到希望的,因為它可提供令影像力電位能障24之介電常數(像力介電常數) =低之手段,從而增進能料低之效應。其他手段,譬如增加電荷移動速 率(比方是增加電荷動能),亦可考慮贿減少傳輸時間以在本發明中達到相 同的效果。典型上,在採用這類手段下,介電常數可由它的靜態值(例如, 氧化物是約3·9)降至接近光介電常數之值(〇ptical Didectric c〇nstant)(例 如’氧化物是2·2),並因而使影像力電位能障24更降低了約〇14 eV(就氧 化物而言)。注意到,此效應是載子(電子)於穿越距離Xm 30時傳輸時間短 暫之結果’並且此效應是當載子傳輸時間較絕緣體12之介電質極化時間為 紐而載子與其他粒子之間無交互作用時發生。注意到,在某些情況中,載 子可能於距離30内與量子力學粒子(例如聲子(ph〇n〇ns))交互作用。這樣的 父互作用會造成電位能障24的影像力介電常數稍微大於它的光介電常數, k而當採肋上提供之手段時,麟降低之效應捕微減弱。 第3C圖顯示在利用影像力理論下,根據不同的介電常數K所計算而得 的電位能障之能障高度與施加於電位能障之電場間的函數關係。圖中顯 不’取小KH.4)所對應的能障高度么與電場Ed間的關係最為強烈。對約 5MV/cm的電場Ed之情況而言,圖中顯示當K=31時,能障高度可能會降 低至約2.6 eV,並可能當Κ=1·4時,更降低約0.2 eV至2·4 eV。結杲顯示 12 〇881-A317l5TWF(5.〇) 1287292 -出,可藉由選用具較低介電常數之絕緣體,和/或藉如第3B圖相關描述中 使影像力電位能障之藉電常數降低之手段,以放大影像力降低能障之效應。 第4圖係顯示本發明所提供關於導體一絕緣體系統之能帶圖的一個實 , 施例’說明一群熱電子32傳輸通過第1圖之導體一絕緣體系統32的電位 • 能障24。此導體一絕緣體系統係包括一導體10,其包含了具有能量分佈36 • 之高能電荷載子32,以及一絕緣體12,其與該導體10相接於一交界14, • 並且該絕緣體12於該交界14之鄰近區域内具有一影像力電位能障24,其 中該影像力電位能障24係可電性修改,以容許高能電荷載子32能越過它 修來傳輸。 圖中顯示關於電子32具有能量分佈36,其係電子32於不同能級(Energy level)之分佈型態’並且此能量分佈%顯示為一具有寬能譜A36之高斯形 狀(Gaussian-Shape)。此能量分佈36在動能33之能級處具有一頂峰分佈 36p,該動能33與第3A圖相關描述中的動能能級相同。第4圖更顯示出, 約有一半(上半部)的電子32的能量高於能障高度20,而另一半(下半部)的 電子32的能量則低於能障高度2〇。在不具影像力能障降低之效應下,圖中 顯示所有的電子32皆被導電帶18所形成之電位能障24,擋住。而在具有影 • 像力能障降低之效應下,圖中顯示能譜上部分内的電子32有能力克服導電 帶丨8所形成之影像力電位能障24並沿朝前方向34(以箭頭顯示)來傳輸。 • 這些電子32進入導電帶18内並變成具有一能量分佈36,之電子32,。電子 , 32之下半部因為不具有足夠的動能所以被影像力電位能障24擋住。因此尤 、 其重要的事是,如圖所示,電子32,之能量分佈36,僅僅反映電子32之上部 分的能量分佈。 在第4圖中,有另一值得注意並在此提供的影像力效應。注意到電子 32之下部分具有比上部分較低的動能。因此,電子32於穿越距離Xm30而 尚未到達頂峰能障時,其下部分的傳輸時間會高於其上部分之傳輸時間。 在一些情況中’傳輸時間會較絕緣體12之介電質鬆弛時間(Dielectrie °881-A31715TWF(5.0) 13 1287292 T Relaxati〇n Time)長,並因而容許絕緣體12能完全屏蔽(screen)與這些電子間 的影像力交互作用。由於這類電子所見的介電常數較大,因此這會導致影 像力能障降低效應微弱。這類效應導致較低能量的電子必須穿隧較高的能 障高度20,從而阻擋這些電子以使其無法克服電位能障24之效應會較為強 烈。 在第4圖内描述的影像力效應更提供一種過濾作用,即能容許高能量 電荷載子通過並將低能量電荷載子擋住。欲通過載子之能級(臨限能量 (Threshold Energy))可藉由控制能障高度20來加以選取,而能障高度2(^ 可依據第3B圖相關描述内能障高度么與電場^間的關係,藉由選擇絕綠 體12的電場來加以選取。以第3B圖為例,當電場於〇至5刪咖之間變 動時,臨限能量之調整範圍可在3J eV至約2·5 eV之間(或等價上,當假定 氧化物厚度為6奈米時,藉由施加〇至3V之電壓橫跨於氧化物介電質上)。 在弟4圖中,具有寬能譜的電子係藉由如CHEI、SSI、BTBl···等等在 本領域為人熟知的機制來製造。這類供給電子能量之機制典型上牵涉到與 ,格原子作球面及非方向性碰撞,因而能譜Δ36可能約為Q.5…至3 ^ ^ 範圍。 第5圖係呈現本發明所提供另一關於導體—絕緣體系統之能帶圖的一 ΖίΓ其顯示高能電子37傳輸通過第1圖之導體'絕緣體系統幻的 電位月办24。此導體'絕緣體系統係包括一導體ι〇 佈38之高能電荷載子37,以及一絕緣體12,其與該導體刀 二14之鄰近_有—影像力電位能障= ;來中^像力電位鱗24係可做,峰許高能電荷奸37能越過 在第5圖中,當尚能電荷載子(熱電子37)越過導體_絕_系 像力電位能障24來傳輸時,圖中顯示 緣體系統之影 能譜Δ38中。此能帶圖除了 —點外絲里刀佈38而分佈於-窄 ...L餘方面音與第4圖之能帶圖相同。此 0881-A31715TWF(5.0) 1287292 差異點在於熱電子不再具有能量分佈36之寬能譜δ36,而改為具处旦八 佈38之較窄能譜Δ38。由於熱電子37之頂峰分佈和第4圖插述'中== 之頂峰分佈的能級33相同,因而圖中顯示全部的熱電子37均有处力克服 導電帶18所形成之影像力電位能障24,而變成電子37,,其中電^ 能量分佈38,與能量分佈38相似。典型上,能譜Δ38係介於約3〇 300meV之範圍。 此實施例獨特之處在於電子37係擠於一緊密能量分佈内,並且影像力 電位能障24係用作-「全通過濾、器_1_?咖1^)」,即其允許全部的熱電 子白月b以較低的動此來穿越它。此獨特之處因而能為此實施例帶來較胃 注入效率與較低操作電壓之利益。 儘管以上關於第2圖至第5圖之說明皆針對高能電荷載子為電子以及 能障為導電帶之情況而描述,然而對其餘種類的高能電荷载子,譬如電洞, 以及對其他種能帶’譬如價電帶,皆可輕易地作同樣的說明。 第6圖係呈現本發明另一舉電洞為例之能帶圖的實施例。在第6圖中, 此導體一絕緣體系統係包括一導體1 〇,其包含了具有能量分佈48之高能電 荷載子40,以及一絕緣體12,其與該導體1〇相接於一交界14,並且該絕 緣體12於該交界之鄰近區域具有一影像力電位能障42,其中該影像力電位 能障42係可電性修改,以容許高能電荷載子4〇能越過它來傳輸。 第6圖之能帶圖與第5圖僅有幾點差異,其餘方面皆相同。差異點之 一在於第6圖並非以熱電子37作為傳輸電荷載子,而以高能電洞40(即「熱 電洞」40)作為傳輸電荷載子。此外,絕緣體所形成之電位能障現在是與絕 緣體之價電帶有關。圖中亦顯示第1圖之導體一絕緣體系統内之一電位能 障42’的能障高度41’,其與不具影像力效應之情況下的價電帶44有關,以 及顯示一影像力電位能障42的能障高度41。與第1、3B與3C圖相關描述 中的能障高度20類似,此能障高度41於一電場施加至絕緣體12時,會受 影像力降低效應之影響而降低。 0881-A31715TWF(5.0) 15 1287292 在第6圖中,熱電洞40係顯示為具有一能量分佈48,而總體係分佈於 一具有窄能譜Δ48中之高斯形狀分佈圖中。能量分佈48顯示為具有一頂峰 分佈48ρ以及一尾端分佈48t。圖中顯示頂峰分佈48ρ具有相對導體1〇之 費米能階16的動能46。動能46顯示為稍微高於影像力能障高度41而低於 能障高度41’。在無影像力能障降低效應時,圖中顯示具有能量分佈48之 電洞40之能量低於能障高度41並因而無法克服電位能障42,。然而,當有 影像力效應時,圖中顯示大部分的電洞40(除了尾端分佈48t之部分)能夠克 服影像力電位能障42並沿一朝前方向34傳輸,而變為具有能量分佈48, 之電洞40’。這些電洞40,的能量高過價電帶44,因此在絕緣體12的範圍 内能沿相同方向傳輸而到達絕緣體另一側的相鄰材料(圖中未顯示)。針對電 洞而描緣的第6圖另顯示出高通過滤效應e;g^ect),其與針 對電子描繪的第4圖相關描述中之效應相似。如圖所示,尾端分佈4汾範圍 内的電/同40之動能係稍微低於能障高度41。這些電洞被阻擋而無法克服影 像力電位能F早42,因此不包含在能量分佈48,之内。然而,由於電洞4〇具 有緊岔旎譜Δ48,因此若藉由施加一額外的小電壓(比方約1〇〇 mV)以提升 這電洞的能量,阻擋尾端分佈48t範圍内電洞4〇之情況即能加以避免。 現可明白得知,本發明在採用影像力能障降低效應下,熱載子(電子或 電洞)能夠以較低的動能傳輸通過絕賴之能障,並且當在記憶單元操作中 ^這樣的效應時,操作輕可以降低。為了達到高注入效率,乃希望於 月b里刀佈具有緊魏譜的鮮類作誠子並於記憶單元操作巾能與影像 力能障降低效應共同使用。 要了解到本發科歸此處所描述相及社實酬而已,而涵 蓋任何落於附加申請專__之任何所有變倾心舉例來說,雖然本 發明載子之能量讀36、38與48依_為高卿狀,然具本躺之通常 技術者®月白可知,此此篁分佈可延伸為任何形狀,並且不需要在能量上 為對稱。 〇881-A31715TWF(5.0) (g 1287292 - 第7圖係提供本發明另一導體一過濾器系統之能帶圖的實施例。在第7 圖所示的導體一過濾器系統中,包括一過濾器52,其與一導體5〇相接觸。 此導體50係用來供應用作常溫電荷載子之電子56。過濾器52與導體5〇相 . 接觸,並包含介電質53與54以提供對具某極性之電荷載子56(負電荷裁 子’電子56)之過濾功能,其中過濾器係包括可電性修改之能障高度24 ^ 與2454,以控制沿某一方向(朝前方向34)通過過濾器52之某極性電荷载子 56的流動。 ** 第7圖係顯示過濾功能之一範例。導體50具有費米能階1650,並可以 * 是一半導體,比方是N+多晶石夕、P+多晶石夕、重度摻雜之多晶石夕結構的石夕錯 (多晶石夕鍺(Poly SiGe))、或者可以是一金屬,比方是鋁⑷)、翻㈣、金(Au)、 鎢(W)、鉬(Mo)、釕(RU)、|g(Ta)、鎳(Ni)、氮化鎳(TaN)、氮化鈦(TiN)等等, 或者可以是以上材料構成之合金,比方是鉑一矽化物、鎢_矽化物、鎳一 碎化物專專。圖中顯示過滤器52係包括一穿隧介電質(以下簡稱td) 53以 及一阻擋介電質(以下簡稱BD54)。穿隧介電質TD53之導電帶以幻内有一 能障24幻形成。阻擋介電質BD 54之導電帶18从内有一能障24从形成,並 且此導電帶I854與TD 53之導電帶I853間有一偏移量55。TD 53係設置於 • 導體50之鄰近區域,以及BD 54係設置於TD 53之鄰近地區。典型上,BD 54之能帶間隙(Energy Band Gap)窄於TD 53之能帶間隙。當外加電壓橫跨 、 在過濾器52上時,過濾器52的導電帶的能帶彎曲可互不相同。圖中顯示 ; BD 54的導電帶1854比TD 53的導電帶I853具有比較輕微的能帶彎曲。導 - 體50係供應具有能量分佈57之常溫電子56。電子56的能量分佈57顯示 為低於費米能階165〇,並於能量分佈圖上具有一頂峰分佈57p與一尾端分佈 57t。導體50係提供能量低於費米能階μ%之電荷載子,並因而用作一「低 通(Low-Pass)」載子供應器。圖中顯示,當過濾器52被施加電場時,頂峰 分佈57p内的電子56能以量子力學傳輸機制(例如直接穿隧)來傳輪通過瓜 53,並進入BD54之導電帶π%而成為在一能量分佈57,上具有緊密能譜△ 0881-A31715TWF(5.0) 17 1287292 • 57’之電子56’。相對而言,尾端分佈57t内的電子56顯示出無法穿隧通過 能障2453與2454。過濾器52内BD 54的能障2½形成一額外的穿隧能障以 阻擋位於尾端分佈57t内的電子56,並且藉由將能障2454維持於一高於這 . 些電子56的能量之能級(「臨限能量」58),能障2½可對這些電子56產生 阻擋作用。過濾器52之能障結構因而能提供一種過濾機制,即產生對穿隧 - 電荷載子56之高通過濾效應。此過濾效應是獨特的,因其與第4圖之相關 描述中影響高能電子(例如熱電子32)之過濾效應稍微不同。儘管第7圖顯 不過濾器52具有TD 53與BD 54,然而此圖僅用作一範例,任何額外層, ^ 只要具有適合控制電荷流之能障,都可加以採用。這類額外加入的層可以 是半導體或介電質,並可以設置於TD 53與BD 54之間,或可設置於TD 53 或BD 54僅僅其中之一的鄰近區域。 第7圖之導體一過濾器系統獨特之處在於其能夠供應具緊密能量分佈 之傳輸電荷載子。這種能力是導體50之「低通」載子供應功能以及過濾器 52之高通過濾功能所造成之結果。第7圖之導體—過濾器系統將這兩種功 能相結合’而提供一種「帶通(Band-Pass)」過濾功能,即容許於能量分佈上 具有窄能譜之電荷載子能傳輸通過。此帶通過濾功能是過濾器52所提供過 φ 濾功能之另一實施例。典型上,能譜係介於30meV至300 meV之範圍。 過濾器52係提供容許能量高於臨限能量58之電子通過之過慮效應。 這導致頂峰分佈57p内孓電子被允許通過而尾端分佈57t内之電子被阻擔 - 住。電子56’之能量分佈57’係用作一範例,用以說明第7圖之導體—過遽 : 器所提供之「帶通」過濾功能,而能量分佈57,與能量分佈57之頂峰分佈 57p相似,用以說明此效應。為了達到最佳的r帶通」過濾效應,典型上可 藉由調整臨限能量58的能級為高或低於第7圖所示的能級,以分別使能量 分佈57’之能譜A57’變窄或變寬來達成。調整能譜Δ57,之能力是受到希望 的,因其能調變(Modulate)帶通過濾器之「帶寬(Bandwidth)以形成任何實際 應用中的過濾效應。這可藉由調整橫跨於過濾器52之外加電壓或其他將於 0881-A31715TWF(5.〇) 18 (§: 1287292 以下段落描述的參數來實施。 Μ1287292 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a semi-conducting and dithering, and is a method and apparatus for transmitting an electric charge in these devices with respect to an Image Force mechanism. . [Prior Art] Imaging power is a well-known research topic, such as Sze's "Physics of Senriconductor Devices" (Wiley, New Y〇rk, 1981, Ch. This leads to a reduction in the tank, _ splicing and image energy barrier reduction effect (Image_Forcebarriei·loweringeffct), and is the main dominant mechanism for the Schottky Effect used for charge carrier emission. A name published by Lenzlinger and Snow The image force is also discussed in the article "Fulnohan tunneling into the heat of the second J CToweler-Nordheim Timneling into Thermally Grown Si02/5 J. Appl. Phys" 40, pp. 278-283 (1969). In this paper, the image force effect is combined with the Fowler-Nordheim Tunneling (FN) mechanism used by the tunneling of the Thermal Cairiers through the cerium oxide (oxide). Attempts have been made to use image forces together with photocurrent-voltage measurements to trace the distribution of oxides (see Nicollian and Brews for a book on "MOS Physics and Technology" ("MOS Physics and Technology," , Wiley, New York, 1982, Chapter 11, ρ·513)). Imaging forces and these methods have also been applied to study the energy barrier height at the junction of metals and oxides and to study the interface between bismuth (Si) and oxides. In U.S. Patent No. 6,744,111 issued by Wu on June 1, 2004, one has an emitter (Emitter), a base (Base), and a collector (Collector). The three-terminal semiconductor elements are described. Schottky barriers are formed at the junction of the emitter region and the base region and at the junction of the collector region and the base region. This type of component utilizes the Schottky effect (by the image force barrier reduction mechanism) and allows the 0881-A31715TWF(5.0) d 1287292 tunneling current to pass through the Schottky barrier by controlling the voltage in the base region. However, all of the above uses the image force machine Examples and attempts are non-volatile memory-independent applications. Non-volatile semiconductor memory cells with charge storage capability are well known in the art. Charges are typically stored in a floating gate. To define the state of a memory cell. Typically, the state of a 'memory cell can have two levels, or can have more than two levels (used for storage in a multi-level state), such as channel hot electrons (Channel Hot) Electron; CHE), Source_Side Injection (SSI), Fowler-Nordheim Tunneling (FN) and energy introduction into the band (BalKj_t〇_BanciTunneling; BTBT) The mechanism of electron injection can be used to change the state of such memory cells during programming and/or erasing operations. Examples of these mechanisms for memory cell operation can be found in Case Nos. 4,698,787, 5,029,130, 5792,670 and 5,966,329. US patents are discussed separately for the CHEI mechanism, the SSI mechanism, the FN mechanism, and the BTBT mechanism. However, 'all of the above mechanisms and tried injection efficiency (defined as the collected carriers) In addition, these mechanisms require a high voltage to support the memory of L and a voltage of up to 1 〇V is often visible. At such high voltages, it is necessary to strictly control the surrounding net. The quality of the insulator of the brake. Memory operating under these mechanisms is thus susceptible to manufacturing and reliability issues. In view of the above problems, the object of the present invention is to provide - insulation energy barrier - conductor - absolute, body system, scale - insulation age, surface loader can be used to inject efficiency and reduce operation power = ^ invention another purpose It is to provide a carrier (charge_) capable of tight energy distribution and high injection efficiency. The remaining objects of the present invention and the implication of these objects are described in the specification and drawings. J ^ [Summary of the Invention] The purpose of this month is to provide a method for charge filtration and injection in a semiconductor device and a memory. 0881-A31715TWF(5.0) 6 1287292 \ and device. Briefly stated, one embodiment of the invention is a conductor-filter system. The conductor-pass filter system includes a conductor for supplying a normal temperature charge carrier and a filter that is in contact with the conductor. The filter includes a dielectric for providing a filtering function for a polar charge carrier, wherein the filter includes an electrically variably (Potential: Barrier) and is used to control the edge. The flow of a certain polarity charge carrier through the filter in a certain direction. In addition to controlling the charge carriers of a certain polarity, the filter further includes another set of electrically configurable potential energy barriers for controlling the passage in the direction substantially opposite to one of the above directions. The flow of opposite polarity charge carriers. Briefly, another embodiment of the present invention is a conductor-insulator system. The conductor-insulator system includes a conductor having high-energy charge carriers, wherein the high-energy charge carriers have a Schott-Break distribution, and an insulator that interfaces with the conductor. The insulator has an electrically deformable image force potential barrier adjacent the junction, wherein the image potential barrier is electrically configurable to allow the high energy charge carriers to pass over it. In another preferred embodiment, the still-charged charge carriers have an energy spectrum with an energy spectrum ranging from about 3 〇 meV to 300 meV. _ 帛 In other words, another embodiment of the present invention is a charge injection system. The charge injection system includes a conductor-filter system having a conductor to provide a normal temperature charge carrier, and a filter in contact with the conductor, the dielectric comprising a dielectric to provide a charge to a certain polarity. Filter - 侃. The Gu II system includes a group of electrically configurable potential energy barriers for controlling the flow of a certain polarity charge carrier passing through the H-direction in a certain direction, and further including another set of electrically correctable potential energy a barrier to control the flow of opposite polarity charge carriers through the filter in a direction substantially opposite to one of the above directions. The charge injection system further includes a conductor-insulator system. The conductor-insulator system includes a second conductor in contact with the filter and having high energy electrons from the filter, and an insulator connected to the second conductor at an interface, and the insulator There is a _ image force repairing near the junction. The image force potential barrier system 0881-A31715TWF(5.0) 1287292 can be electrically modified to allow these capable charge carriers to pass over it for transmission. Briefly stated, another embodiment of the invention is a memory unit. The memory unit includes a conductor-filter secret having a conductor to provide a constant temperature symmetry, and a filter in contact with the conductor, the dielectric comprising a dielectric to provide a filtering function for a polar charge carrier . The device includes a first group of electrically configurable potentials to control the flow of a polar charge carrier passing through the filter in a certain direction and a second set of electrically correctable potentials. Energy barrier to control • Another opposite polarity through the filter in a direction generally opposite to one of the above directions: the flow of charge carriers. #®单言' Another embodiment of the present invention is a method of forming a memory unit. The method includes the steps of: forming a body having a first conductivity type in a semiconductor substrate, forming a first insulating layer on the substrate, forming an electrical storage layer on the first insulating layer, forming a a second region of the second conductivity type and a second region having a second conductivity type are formed in the body to form a channel region between the main region and the second region, wherein the channel region is substantially Adjacent to and insulated from the charge storage region, a second insulating layer is formed adjacent to the charge insulating layer to form a first conductive region in which at least a portion of the region is adjacent to and electrically insulated from the electrical storage region a filter having a filtering function adjacent to the first conductive region, and a second conductive region adjacent to at least a portion of the first conductive region and insulated by the filament. The simple σ of the invention is another _ real complement system - a method for forming a fresh-keeping array. The method includes the following steps: forming a body having a first conductivity type in the semiconductor substrate, forming a first insulating layer on the substrate, forming bit lines separated from each other and extending in a first direction (4) lmes In the H domain, wherein each of the bit lines (four) is formed in at least a portion of the area of the body: a charge age area machine-insulation layer, and the towel charge storage area is arranged as: an array, wherein The rows of the array extend in the first direction, and the array of the array extends in a second direction perpendicular to the crucible (four) to form a plurality of first regions having a second conductivity type and a plurality of second regions having a second conductivity type a region, forming a plurality of channel regions in the 80881-A31715TWF (5.0) 1287292 sense, within the body, wherein each of the channel regions extends between one of the first regions and the second regions And substantially insulatively adjacent to the adjacent phantoms in the charge regions #, forming a plurality of display H having a filtering function, wherein each filter has a portion of the region and the first conductive regions - Adjacent; And a plurality of second conductive regions, wherein each of the second conductive regions is adjacent to at least a portion of the first conductive regions and is insulated by one of the filters. The present invention is based on other objects and features, and will be apparent from the following detailed description. [Embodiment] The symbol Ν+ used in the present specification represents a heavily doped v-type semiconductor material, and the doping concentration of the cerium-type impurity (for example, arsenic) is typically 102 Å (atoms/cm 3 ). The order of magnitude. The symbol Ρ+ represents a heavily doped ytterbium-type semiconductor material, and the inclusion of the > type impurity (for example, boron) is typically on the order of 10 (atoms/cubic centimeter). Wherever practicable, the description and the following description will be used to refer to the same or similar parts. Fig. 1 shows an energy band diagram of a conductor-insulator system applied under an electric field. The energy band diagram shows a conductor 10 in contact with an insulator 12 and having a Fermi level 16 in its energy band. The figure also shows the conductive strip 18 of the insulator 12 under the effect of image force and the conductive strip 18' under the effect of image force. In addition, the potential energy barrier 24 under the image force effect of the insulator 12 and the potential energy barrier 24' under the imageless force effect have energy barrier heights A 20 and ‘22, respectively. This figure shows that the stress effect changes the shape of the potential barrier from a triangular barrier 24 with a sharp corner at the edge of the barrier to a triangular barrier with a rounded corner 24 (called "image power only" Or "image power barrier"). This effect reduces the energy barrier height of the potential barrier from the barrier height 22 to the energy P early south 20 ’. The difference between the two can be △ 26. An energy barrier peak 28 is also shown at the highest point of the image energy barrier 24, which is a distance from the junction of the conductor 10 and the insulator 12 by 0881-A31715TWF (5.0) 9 1287292 • x- 30. In Fig. 1, the conductor may be a semiconductor, such as an N+ polymorph type of germanium (i.e., polysiclicon), a P+ polycrystalline dream, and a heavily doped polymorphic type of stone lithography (i.e., polycrystalline stone 锗(P〇ly SiGe)), or may be a metal, such as aluminum (Aluminum; A1), platinum (Platinum; Pt), Au, tungsten (Tungsten; W), la (Molybdenum; Mo), ruthenium (Ruthenium; Ru ), Tantalum; Ta), Nickel (Ni), Nitanium Nitride, Titanium Nitride, etc., or alloys of the above materials, such as Ming Shishi (Platinum_Silicide), Tungsten-Silicide, Nickel-Silicide, etc. The insulator can be a dielectric or air. When a dielectric is considered as a material for the insulator, such as an oxide, a nitride, or an oxynitride (SiON) can be used as the dielectric. In addition, dielectrics whose dielectric constant is lower or higher than the dielectric constant (or permittivity) of oxides (referred to as "low-k dielectric" and "high-k dielectric", respectively) may also be considered as The material of the insulator. Such low-k dielectrics may be Fluorinated Silicon Glass (FSG), SiLK, Porous Oxide, such as Nanoporous Cabon-Doped Oxed, and the like. Such high-k dielectrics can be aluminum oxide (Aluminum Oxide; Al2〇3), hafnium oxide (Hafium Oxide; Hf02), titanium oxide (Titanium Oxide; Ti02), oxidized hammer (Zirconium Oxide; Zr02), oxygen • Group (TantalumPen_〇xide; Ta205) and so on. Furthermore, the mixture of these materials or the alloy formed thereof is, for example, an alloy of Hafiiium Oxide-Oxide alloy (Hf〇rSi〇2), an alloy of bismuth-alumina (Hafiiium-Aluminum- Oxide Alloy; HfAlO), "Hafiiium-Oxynitride Alloy; HfSiON... and so on, can be selected as the material of this type of dielectric. In addition, it is not necessary to require the insulator to be a dielectric material having a uniform chemical element, and it is not required to include only a single layer, but the elements therein may be allowed to gradually change, and may be allowed to include more than one layer. Figure 2 shows that electrons 31 are transmitted through a quantum mechanical tunneling mechanism (e.g., Furnohan) to pass the potential barrier of Figure 1. The electrons 31 in the conductor 10 are at normal temperature before being tunneled through the potential barriers 24 and 24, and a_ has no kinetic energy to the Fermi puzzle 16. This type of electron is called "normal temperature 0881-A31715TWF (5.0) 1287292, electronic (Thermal Electrons)", and such charge carriers are called "normal temperature charge carriers" or "normal temperature carriers". When a large electric field (typically greater than 10 MV/cm) is applied to the insulator 12, the ambient temperature electrons 31 can pass through the insulator 12 using a quantum mechanical transmission mechanism. Under such a large electric field, the electrons 31 are shown to tunnel through the insulator 12 and enter the conductive strips 18 and 18', respectively, in the case of image force effects and non-image force effects. When the image force enablement barrier is lowered, it is known that such a tunneling mechanism causes the tunneling rate of electrons 31 to pass through the potential barrier 24 to be higher than the tunneling probability of the transmission through the potential barrier 24'. Fig. 3A shows an energy band diagram of a potential charge carrier (hot electron 32) transmitted over the potential energy barrier of the conductor-insulator system of Fig. 1. A high-energy charge sub-system within a region is defined as a charge carrier with kinetic energy in the Fermi level of the region. For example, in Figure 3A, the hot electrons 32 located within the conductor 10 are shown to have a kinetic energy % relative to the Fermi level of the conductor 1 。. Such an electron transfer mechanism is different from the transfer mechanism of the normal temperature electron 31 in FIG. The kinetic energy % is in the figure and is slightly higher than the energy barrier height of the image force potential barrier 24 by 2〇 and lower than the energy barrier height 22. The figure shows that the hot electrons 32 are moved from the conductor 1 to the insulator 12 in a forward direction 34 (shown by the arrow). When considering a potential barrier that does not have a shirting effect, the kinetic energy % is insufficient to support the thermocouple 32 to cross the potential barrier 24', so that the thermal electrons 32 are blocked by the potential barrier 24 and move along a return path 34. However, under the influence of the image force effect, the reduced energy barrier height 2〇 allows the hot electrons 32 having the same kinetic energy 33 to travel along the forward direction 34 and pass over the image force potential energy barrier to enter its conductive strip 18 . This effect is desirable because when the hot electrons are fabricated in the integrated circuit (10) and related applications of the memory, it can reduce the voltage required to supply the energy of the hot electrons 32. Fig. 3B shows the effect of the image force on the position of the peak of the barrier that changes the height of the barrier and the potential barrier. The energy barrier height and the energy barrier peak position are depicted as a function of the electric field 之外 applied to the insulator 12. Fig. 3B shows that when an electric field ED of about 5 MV/cm is applied to the insulator 12, the barrier height 20 is lowered from 3.1 V to about 3_5 V. Typically, this _ electric field is applied by applying a = across insulator J. For example, an oxide insulator with a thickness of 6 nm is taken as an example. 0881-A31715TWF(5.〇) 11 1287292 • If an electric field of 5 lm is required, it is necessary to cross the 3 3 之 于The oxide. Under the application of this electric field, the force effect wire saves electrons, and the image force effect and the potential energy barrier must be overcome to the distance Xm instead of being overcome to an infinitely long distance. Figure 3B further shows that the distance Xm 3 from the peak of the barrier to the conductor/insulator boundary can be reduced from the infinite length range (ED = 〇 MV / Cm) to less than i nanometer (in the case of ^ 娜 咖 咖 ). In the field of solid state physics, when the transit time of the mobile charge (T_it Time) is shorter than the dielectric polarization time of the medium (for example, the insulator 12 of Fig. 1), _ectric p〇larizati〇n It is known that the polarity of the dielectric does not change closely with the mobile charge. As shown in Figure 3, shortening the length of the barrier peak Xm will reduce the charge transfer time, and this effect is desirable because it provides the dielectric constant of the image force potential barrier 24 (like force dielectric) Constant) = low means to increase the effect of low energy. Other means, such as increasing the rate of charge movement (e.g., increasing charge kinetic energy), may also be considered to reduce the transmission time to achieve the same effect in the present invention. Typically, with such means, the dielectric constant can be reduced from its static value (e.g., the oxide is about 3.9) to a value close to the optical permittivity (e.g., 'oxidation'). The object is 2·2), and thus the image force potential barrier 24 is further reduced by about 14 eV (in terms of oxide). Note that this effect is the result of a short transit time of the carrier (electron) at a distance Xm 30' and this effect is when the carrier transport time is higher than the dielectric polarization time of the insulator 12 and the carrier and other particles Occurs when there is no interaction between them. It is noted that in some cases, the carrier may interact with quantum mechanical particles (e.g., phonons) within distance 30. Such a parent interaction would cause the image dielectric constant of the potential barrier 24 to be slightly greater than its optical permittivity, k and the effect of the reduction of the nucleus would be slightly diminished when the ribs were provided. Fig. 3C shows the relationship between the energy barrier height of the potential barrier calculated from the different dielectric constants K and the electric field applied to the potential barrier using the image force theory. The relationship between the energy barrier height corresponding to the small KH.4 and the electric field Ed is the strongest. For the case of an electric field Ed of about 5 MV/cm, the figure shows that when K=31, the energy barrier height may be reduced to about 2.6 eV, and may be reduced by about 0.2 eV to 2 when Κ=1·4. · 4 eV. The crucible shows 12 〇 881-A317l5TWF (5. 〇) 1287292 - out, by means of an insulator with a lower dielectric constant, and / or by means of the relevant description of Figure 3B to make the image of the power potential barrier The means of reducing the constant to magnify the image force reduces the effect of the energy barrier. Figure 4 is a diagram showing the energy band diagram of the conductor-insulator system provided by the present invention. The embodiment illustrates a group of hot electrons 32 transmitted through the potential-energy barrier 24 of the conductor-insulator system 32 of Figure 1. The conductor-insulator system includes a conductor 10 including a high-energy charge carrier 32 having an energy distribution 36, and an insulator 12 interfacing with the conductor 10 at an interface 14, and the insulator 12 is An image force potential barrier 24 is provided in the vicinity of the junction 14, wherein the image force potential barrier 24 is electrically configurable to allow the high energy charge carrier 32 to be transported over it. The figure shows that the electron 32 has an energy distribution 36 which is a distribution pattern of electrons 32 at different energy levels and this energy distribution % is shown as a Gaussian-Shape having a broad energy spectrum A36. This energy distribution 36 has a peak distribution 36p at the energy level of the kinetic energy 33, which is the same as the kinetic energy level in the description associated with Fig. 3A. Figure 4 further shows that about half (upper half) of electrons 32 have energy above the barrier height of 20, while the other half (lower half) of electrons 32 have energy below the barrier height of 2 〇. In the absence of the effect of reducing the image energy barrier, all of the electrons 32 are shown to be blocked by the potential barrier 24 formed by the conductive strip 18. Under the effect of the reduction of the image and image energy barrier, the electrons 32 in the upper portion of the spectrum are capable of overcoming the image potential potential barrier 24 formed by the conductive strip 8 and in the forward direction 34 (with an arrow) Display) to transfer. • These electrons 32 enter the conductive strip 18 and become electrons 32 having an energy distribution 36. The lower part of the electron 32 is blocked by the image force potential barrier 24 because it does not have sufficient kinetic energy. Therefore, it is important that, as shown, the energy distribution 36 of the electrons 32 reflects only the energy distribution of the upper portion of the electrons 32. In Figure 4, there is another image force effect that is noted and provided herein. It is noted that the lower portion of the electron 32 has a lower kinetic energy than the upper portion. Therefore, when the electron 32 crosses the distance Xm30 and has not reached the peak energy barrier, the transmission time of the lower portion is higher than the transmission time of the upper portion. In some cases, the transmission time is longer than the dielectric relaxation time of the insulator 12 (Dielectrie ° 881-A31715TWF (5.0) 13 1287292 T Relaxati〇n Time), and thus allows the insulator 12 to completely screen and these electrons. Inter-image force interaction. Since the dielectric constant seen by such electrons is large, this results in a weak effect of reducing the image energy barrier. Such effects result in lower energy electrons having to tunnel higher energy barriers 20, thereby blocking the electrons from being able to overcome the potential barrier 24. The image force effect described in Figure 4 provides a filtering effect that allows high energy charge carriers to pass and block low energy charge carriers. The energy level of the carrier (Threshold Energy) can be selected by controlling the energy barrier height 20, and the energy barrier height 2 (^ can be based on the description of the internal energy barrier height and the electric field according to Figure 3B. The relationship between the two is selected by selecting the electric field of the adipose body 12. Taking the 3B picture as an example, when the electric field varies between 〇 and 5, the threshold energy can be adjusted from 3J eV to about 2 Between 5 eV (or equivalently, when the oxide thickness is assumed to be 6 nm, the voltage across the oxide dielectric is applied by applying a voltage of 〇 to 3 V). The electrons of the spectrum are made by mechanisms well known in the art, such as CHEI, SSI, BTBl, etc. Such mechanisms for supplying electron energy typically involve spherical and non-directional collisions with lattice atoms. Therefore, the energy spectrum Δ36 may be in the range of Q.5... to 3^^. Fig. 5 is a view showing another energy band diagram of the conductor-insulator system provided by the present invention, which shows that the high-energy electron 37 is transmitted through the first Figure conductor "insulator system phantom potential month 24. This conductor 'insulator system includes a conductor The high-energy charge carrier 37 of the tarpaulin 38, and an insulator 12, which is adjacent to the conductor knives _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Tracing 37 can pass through Figure 5, when the still charge carriers (hot electrons 37) are transmitted over the conductor _ _ _ _ image force potential barrier 24, the figure shows the image of the edge system Δ38. This energy band diagram is distributed except that the outer blade is distributed in the narrow-leaf. The balance of the L is the same as that of the fourth diagram. This 0881-A31715TWF(5.0) 1287292 is different in that the hot electrons are no longer The broad energy spectrum δ36 with the energy distribution 36 is changed to the narrower energy spectrum Δ38 with the radiance 38. The peak distribution of the hot electrons 37 and the energy level 33 of the peak distribution of the middle == are interpolated by the fourth graph. The same is true, so that all of the hot electrons 37 are shown to overcome the image force potential barrier 24 formed by the conductive strip 18 and become electrons 37, wherein the electrical energy distribution 38 is similar to the energy distribution 38. Typically The energy spectrum Δ38 is in the range of about 3〇300 meV. This embodiment is unique in that the electron 37 is squeezed into a tight energy distribution. And image force potential energy barrier 24 as a line - "all-pass filter, coffee filter _1_ 1 ^)?", That is, it allows all of the hot electron white b months at lower this to move through it. This unique feature thus provides benefits to the embodiment of the gastric injection efficiency and lower operating voltage. Although the above descriptions with respect to Figures 2 through 5 are described for the case where the high-energy charge carriers are electrons and the energy barrier is a conductive strip, the remaining types of high-energy charge carriers, such as holes, and other species of energy are described. The same description can be easily made with a belt such as a price belt. Fig. 6 is a view showing an embodiment of the energy band diagram of another embodiment of the present invention. In Fig. 6, the conductor-insulator system comprises a conductor 1 包含 comprising a high-energy charge carrier 40 having an energy distribution 48, and an insulator 12 connected to the conductor 1 at an interface 14, The insulator 12 has an image force potential barrier 42 in the vicinity of the interface, wherein the image force potential barrier 42 is electrically configurable to allow high energy charge carriers to pass over it. There are only a few differences between the energy band diagram in Figure 6 and Figure 5, and the rest are the same. One of the differences is that in Fig. 6, the hot electrons 37 are not used as the transport charge carriers, and the high-energy holes 40 (i.e., "thermoelectric holes" 40) are used as the transport charge carriers. In addition, the potential barrier formed by the insulator is now related to the valence band of the insulator. The figure also shows the energy barrier height 41' of a potential barrier 42' in the conductor-insulator system of Figure 1, which is related to the valence band 44 in the absence of an image force effect, and displays an image force potential energy. The barrier height 42 of the barrier 42 is 41. Similar to the energy barrier height 20 in the descriptions of Figures 1, 3B and 3C, the energy barrier height 41 is reduced by the effect of the image force reduction effect when an electric field is applied to the insulator 12. 0881-A31715TWF(5.0) 15 1287292 In Fig. 6, the thermoelectric holes 40 are shown to have an energy distribution 48, and the total system is distributed in a Gaussian shape distribution map having a narrow energy spectrum Δ48. The energy distribution 48 is shown to have a peak distribution 48p and a tail distribution 48t. The peak distribution 48p is shown to have kinetic energy 46 relative to the Fermi level 16 of the conductor 1〇. The kinetic energy 46 is shown to be slightly above the image dynamometer height 41 and below the barrier height 41'. In the absence of an image force barrier reduction effect, the energy of the hole 40 having the energy distribution 48 is shown to be lower than the energy barrier height 41 and thus the potential energy barrier 42 cannot be overcome. However, when there is an image force effect, the figure shows that most of the holes 40 (except for the portion of the tail end distribution of 48t) can overcome the image force potential barrier 42 and transmit in a forward direction 34 to become an energy distribution. 48, the hole 40'. The energy of these holes 40 is higher than the price of the electrical strips 44, so that they can be transported in the same direction within the range of the insulator 12 to reach adjacent materials on the other side of the insulator (not shown). Figure 6 for the hole mapping also shows a high pass filter effect e; g^ect), which is similar to the effect described in the description of Fig. 4 for electronic depiction. As shown, the kinetic energy of the electricity/same 40 in the range of 4 尾 at the end is slightly lower than the energy barrier 41. These holes are blocked from overcoming the image potential energy F 42 and are therefore not included in the energy distribution 48. However, since the hole 4〇 has a close spectrum Δ48, if an additional small voltage (for example, about 1 〇〇 mV) is applied to increase the energy of the hole, the hole 4 in the end distribution is blocked. The situation can be avoided. It can be understood that the present invention adopts the image force barrier reduction effect, and the hot carrier (electron or hole) can transmit through the dying energy barrier with low kinetic energy, and when operating in the memory unit ^ The effect can be reduced when the effect is light. In order to achieve high injection efficiency, it is hoped that in the month b, the knife cloth has a strong class of sharpness and the memory unit can be used together with the image energy barrier reduction effect. It is to be understood that the hairdressings described herein are the actual and social rewards, and cover any examples of any of the changes in the application of the application, although the energy readings of the present invention are 36, 38 and 48. _ is a high-clear shape, but it is known that the general technique of the lie is white, and this 篁 distribution can be extended to any shape and does not need to be symmetrical in energy. 〇 881-A31715TWF (5.0) (g 1287292 - Figure 7 is an embodiment of an energy band diagram of another conductor-filter system of the present invention. In the conductor-filter system shown in Figure 7, a filter is included The device 52 is in contact with a conductor 5 。. The conductor 50 is used to supply electrons 56 for use as room temperature charge carriers. The filter 52 is in contact with the conductor 5 and includes dielectrics 53 and 54 to provide A filtering function for a charge carrier 56 of a certain polarity (negative charge cuter 'electron 56), wherein the filter includes electrically correctable barrier heights 24^ and 2454 to control in a certain direction (forward direction) 34) Flow through a polar charge carrier 56 of the filter 52. ** Figure 7 shows an example of a filter function. The conductor 50 has a Fermi level 1650 and can be * a semiconductor, such as N+ poly Shi Xi, P+ polycrystalline lithox, heavily doped polycrystalline litho structure, poly SiGe, or may be a metal, such as aluminum (4), turn (four), gold (Au), tungsten (W), molybdenum (Mo), yttrium (RU), |g (Ta), nickel (Ni), nickel nitride (TaN), titanium nitride (TiN), etc., or It is an alloy composed of the above materials, such as platinum monomethane, tungsten-telluride, and nickel monolith. The filter 52 is shown to include a tunneling dielectric (hereinafter referred to as td) 53 and a blocking dielectric (hereinafter referred to as BD54). The conductive tape of the tunnel dielectric TD53 has a magical shape of 24 illusions. The conductive strip 18 blocking the dielectric BD 54 is formed from an energy barrier 24 therein, and there is an offset 55 between the conductive strip I854 and the conductive strip I853 of the TD 53. The TD 53 is placed in the vicinity of the conductor 50 and the BD 54 is placed in the vicinity of the TD 53. Typically, the Energy Band Gap of the BD 54 is narrower than the band gap of the TD 53. When the applied voltage is across the filter 52, the band bending of the conductive strips of the filter 52 can be different from each other. The figure shows that the conductive strip 1854 of the BD 54 has a relatively slight band bending than the conductive strip I853 of the TD 53. The body 50 is supplied with a normal temperature electron 56 having an energy distribution 57. The energy distribution 57 of the electron 56 is shown to be lower than the Fermi level 165 〇 and has a peak distribution 57p and a tail distribution 57t on the energy profile. Conductor 50 provides charge carriers with energy less than the Fermi level and is thus used as a "Low-Pass" carrier supply. The figure shows that when the filter 52 is applied with an electric field, the electrons 56 in the peak distribution 57p can pass through the melon 53 by a quantum mechanical transmission mechanism (for example, direct tunneling), and enter the conductive band π% of the BD54 to become An energy distribution 57 having an electron spectrum 56' of a compact energy spectrum Δ 0881-A31715TWF(5.0) 17 1287292 • 57'. In contrast, electrons 56 within 57t of the trailing end distribution are shown to be unable to tunnel through energy barriers 2453 and 2454. The energy barrier 21 of the BD 54 in the filter 52 forms an additional tunneling barrier to block the electrons 56 located within the trailing end distribution 57t, and maintains the energy barrier 2454 at a higher energy than the electrons 56. The energy level ("Ring Energy" 58), the energy barrier 21⁄2 can block these electrons 56. The energy barrier structure of filter 52 thus provides a filtering mechanism that produces a high pass filter effect on tunneling - charge carriers 56. This filtering effect is unique in that it has slightly different filtering effects affecting high energy electrons (e.g., hot electrons 32) in the description associated with Figure 4. Although the Fig. 7 shows that the filter 52 has the TD 53 and the BD 54, this figure is only used as an example, and any additional layer, ^ can be used as long as it has an energy barrier suitable for controlling the charge flow. Such additional layers may be semiconductor or dielectric and may be disposed between TD 53 and BD 54, or may be disposed adjacent to only one of TD 53 or BD 54. The conductor-filter system of Figure 7 is unique in that it is capable of supplying transport charge carriers with a tight energy distribution. This capability is the result of the "low pass" carrier supply function of conductor 50 and the high pass filter function of filter 52. The conductor-filter system of Figure 7 combines these two functions to provide a "Band-Pass" filtering function that allows the transport of charge carriers with a narrow energy spectrum in the energy distribution. This belt pass filter function is another embodiment in which the filter 52 provides a φ filter function. Typically, the energy spectrum is in the range of 30 meV to 300 meV. The filter 52 provides an over-effect of electrons that allow energy to pass above the threshold energy 58. This causes the electrons in the peak distribution 57p to be allowed to pass and the electrons in the tail distribution 57t to be blocked. The energy distribution 57' of the electron 56' is used as an example to illustrate the "bandpass" filtering function provided by the conductor-passing device of Fig. 7, and the energy distribution 57, and the peak distribution of the energy distribution 57 is 57p. Similar to illustrate this effect. In order to achieve the optimal r-bandpass filtering effect, the energy level of the energy distribution 57' can be individually adjusted by adjusting the energy level of the threshold energy 58 to be higher or lower than the energy level shown in Fig. 7. 'Narrow or widen to achieve. The ability to adjust the energy spectrum Δ57 is desirable because it can modulate the "bandwidth" of the band through the filter to create a filtering effect in any practical application. This can be adjusted across the filter 52. Additional voltage or other parameters will be implemented as described in paragraph 0881-A31715TWF(5.〇) 18 (§: 1287292).

在建k第7 ®之過軸&之過程巾,基於町幾點賴 削的介電纖奶53之介電常數為大。第―,這能減少BD 54 2 電场,而54内的電場減少會降低尾端分佈切内電子的穿賴率 而提升.這些電子之崎效應。再者,纽加—電驗 =過舰應時’ _ 54有較大的介電常數,會容許大部分 秩跨於TD 53。延能提升外加電麼謂53的跨屋之間之電壓轉換,因 而擁有降㈣獻應職之外加電場、增加外加電麵此效應之敏减度, 以及增加對雌擋之尾端分_電子之麟㈣項優點。 除此之外,在建造第7圖之過滤器52之過程中,其他參數亦 整能譜Δ57,。這些參數之一是咖4與则間的導電帶偏移55。導電帶 偏移55可以修改為獨數值轉制臨_量%,樣量分佈π内超出此 臨限月b里58的電子即可穿隨通過過濾器52。這可藉由適當地選取^ 與TD =材料來達成。在一特定範例内,當選擇氧化物為td π之材料 時’-氮氧化物系統(Si〇xN〗.x)之介電質薄膜將會是助54之優良候選材 料’因其具有廣泛受到證實及值得製造之薄膜品質與製程㈣。在In the process paper of the 7th ® shaft and the process, the dielectric constant of the dielectric fiber milk 53 which is based on the town is large. First, this can reduce the BD 54 2 electric field, and the reduction of the electric field in 54 will reduce the penetration rate of the electrons in the tail distribution and increase the electrons. Furthermore, the Nugau-Electrical test = the ship's response time _ 54 has a large dielectric constant, which will allow most of the ranks to cross the TD 53. The extension of the external power supply is called the voltage conversion between the cross-streets of 53. Therefore, it has the (4) contribution to the application of the electric field, the increase of the external power supply, the sensitivity reduction, and the increase of the tail end of the female block. The advantages of the Lin (4) item. In addition to this, during the construction of the filter 52 of Fig. 7, the other parameters are also the energy spectrum Δ57. One of these parameters is the conductive strip offset 55 between the coffee and the fourth. The conductive strip offset 55 can be modified to a unique value conversion of _% by volume, and electrons exceeding 58 in the sample distribution π beyond the threshold month b can be passed through the filter 52. This can be achieved by appropriately selecting ^ and TD = material. In a specific example, when a material with an oxide of td π is selected, the dielectric film of the NOx system (Si〇xN.x) will be an excellent candidate for the 54- because it has a wide range of Confirmed and worthy of film quality and process (4). in

=化予表示式巾,X」代表該氮氧化物薄膜巾氧化物的比例或氧化物的等 價百分比。舉例來說,X=1是代表薄膜是單純氧化物;類似地,㈣則代表 ^膜是單純的說化物。當氧化物所佔的部分χ由〇變為i時,導電帶偏移= ization to the expression towel, X" represents the proportion of the oxide of the oxynitride film or an equivalent percentage of the oxide. For example, X = 1 means that the film is a simple oxide; similarly, (4) means that the film is a simple compound. When the portion of the oxide χ changes from 〇 to i, the conductive strip is offset

量55會由約1 eV變為〇 eV β此,修改Si〇xNi x魄化物的所佔的比例X 即能允許過滤器52之導電帶偏移量%修改為所欲數值,從而提供調整能 sy Δ 57 (亦即▼通過遽器之「帶寬出細別她)」)至實際應用中戶斤欲使用範 圍的方法。 s諸如TD 53與BD 54以及導體50之費米能階‘等其他參數亦可用來 mmpm* 58 ^ 58 i650 之能級的·方法,以及因而提供帶寬猶器之「帶寬」_整方法。在 〇881-A31715TWF(5.0) 19 d 1287292 -此將於第7圖之導體一過濾器之建造過程中考慮這些參數。為了說明之目 的,在此假定多晶矽、氧化物、以及氮化物分別用作導體5〇、TD 53以及 BD 54之材料。並假定TD 53所使用的氧化物厚度為30埃(A)。第8圖係顯 、 示兩種情況中臨限能量58相對於費米能階16s〇之能級。臨限能量相對費米 能階為負值係對應至臨限能量之能級低於費米能階之情況,而臨限能量與 • 費米能階間的差距係對應至帶通過濾器之「帶寬」。這兩個情況的差異係在 • 於多晶石夕之費米能階(N+多晶石夕相對P+多晶梦)與在於橫跨於過渡器52之 外加電壓Va。外加電壓Va能決定電子56於穿隧過過濾器52後的動能大 小。參考第8圖,對P+多晶矽與Va為_4¥之情況而言,當將BD 54之厚 度(TBD)由30埃降至20埃時,臨限能量58在費米能階丨心❾下的變動範圍約 為0 eV至0·4 eV。而就N+多晶矽與Va為—3V的情況而言,圖中顯示, 當BD 54之厚度(TBD)介於50埃至20埃之間時,臨限能量58在費米能階 165〇下具有較大的變動範圍(約為〇·8 eV)。 現在應能瞭解,臨限能量相對導體之費米能階的調整方式,可經由過 濾器内TD厚度與BD厚度之調整方法來加以調整,和/或可經由導體費米 能階之調整方法來加以調整。這種方法可用來修改傳輸電荷之帶寬至一實 _ 際顧之所欲麵。傳輸電荷鮮之動能可藉由此方絲㈣並猫準於一 應用。 第7圖之導體-^濾、器系統可以用來提供對其他種類的電荷載子之帶 通過濾功能,這魏荷載子比方是電、;_如輕賴(LightHGles;LH)或重電 洞(Heavy Holes ; HH))。藉由考慮形成於能帶圖價電帶中過滤器%的穿隧 此P早’與帛7圖與第8圖針相關描述内對電子所作的類似考量可輕易地應 用至这些電社。餅電洞相對電子具有相反的電荷極性,因此藉由反轉 第7圖内檢跨於過滤器52上的電壓極性,可實施電洞之帶通過遽功能。 具本領域之通常技術者亦應能明白,於應用本揭露之教導内容時,可 改變過濾^’之介電質,以藉此修改電荷之能量分佈喊到過獄果。舉例 0881-A31715TWF(5.0) 20 1287292 來說,雖然依說明BD 54之介電常數係大於扣53之介電常數,但當可明 白,於應肖本揭漏之教導内料,可將BD 54之材料改變絲^^且 ^目似的介電常數,以在穿隨傳輸之過財,有效地允許頂峰分佈内之電荷 載子通過。此外,不需要求TD 53細54為具有均勻化學元素的材料, 而可允許當中元素較變化^並且,任何適料介電冊料,比方是氧化 鋁(Al2〇3)、氧化銓_2)、氧化鈦_、氧化錯師2)、氧化叙(躺)… 等等,都可以用來取代氧化物、氮化物錢氧化物。更者,這些材料之任The amount 55 will change from about 1 eV to 〇eV β. Modifying the proportion X of the Si〇xNi x bismuth compound allows the offset of the conductive strip of the filter 52 to be modified to a desired value, thereby providing adjustment energy. Sy Δ 57 (that is, ▼ passes the "bandwidth out of her") of the device to the method of using the range in the actual application. s such as TD 53 and BD 54 and the Fermi level of the conductor 50 and other parameters can also be used for the method of the level of mmpm* 58 ^ 58 i650, and thus the bandwidth of the bandwidth device. In 〇881-A31715TWF(5.0) 19 d 1287292 - these parameters will be considered during the construction of the conductor-filter of Figure 7. For the purpose of explanation, it is assumed here that polycrystalline germanium, oxide, and nitride are used as the materials of the conductors 5, TD 53, and BD 54, respectively. It is also assumed that the oxide used in TD 53 has a thickness of 30 angstroms (A). Figure 8 shows the energy levels of the threshold energy 58 relative to the Fermi level of 16 s in both cases. The negative energy relative to the Fermi level is a negative value corresponding to the energy level of the threshold energy is lower than the Fermi level, and the difference between the threshold energy and the Fermi level corresponds to the filter passing through the filter. bandwidth". The difference between the two cases is in the Fermi level of the polycrystalline stone (N+ polycrystalline stone versus P+ polycrystalline dream) and the applied voltage Va across the transition 52. The applied voltage Va determines the amount of kinetic energy of the electrons 56 after they have passed through the filter 52. Referring to Fig. 8, for the case where P+ polysilicon and Va are _4, when the thickness (TBD) of the BD 54 is reduced from 30 angstroms to 20 angstroms, the threshold energy 58 is at the Fermi level. The range of variation is approximately 0 eV to 0. 4 eV. In the case of N+ polysilicon and Va being -3V, the figure shows that when the thickness (TBD) of the BD 54 is between 50 angstroms and 20 angstroms, the threshold energy 58 has a Fermi energy level of 165 〇. Large range of variation (approximately 〇·8 eV). It should now be understood that the adjustment of the Fermi energy level of the threshold energy relative to the conductor can be adjusted via the adjustment of the TD thickness and the BD thickness in the filter, and/or can be adjusted via the conductor Fermi level. Adjust it. This method can be used to modify the bandwidth of the transferred charge to the desired level. The kinetic energy of the transfer charge can be used by the square wire (4) and the cat is allowed to apply. The conductor-^ filter system of Figure 7 can be used to provide a filter function for other types of charge carriers. This Wei loader is, for example, electricity; _ such as LightHGles (LH) or heavy holes (Heavy Holes ; HH)). By considering the tunneling of the filter % formed in the energy band of the band, the similar considerations for electrons in the description of the P early and the 7th and 8th pins can be easily applied to these companies. The pie hole has opposite charge polarity with respect to electrons, so by inverting the polarity of the voltage across the filter 52 in Fig. 7, the band pass function of the hole can be implemented. It will also be apparent to those of ordinary skill in the art that, in applying the teachings of the present disclosure, the dielectric of the filter can be altered to thereby modify the energy distribution of the charge to the prison. For example, 0881-A31715TWF(5.0) 20 1287292, although the dielectric constant of the BD 54 is greater than the dielectric constant of the buckle 53, it can be understood that the BD 54 can be used in the teaching of the leak. The material changes the dielectric constant of the wire and the like to effectively allow the passage of charge carriers within the peak distribution during the passage of the transmission. In addition, it is not necessary to find TD 53 fine 54 as a material with uniform chemical elements, but allow the middle elements to be changed ^ and any suitable dielectric material, such as alumina (Al2〇3), yttrium oxide_2) , titanium oxide _, oxidation error division 2), oxidation (lie) ... and so on, can be used to replace oxide, nitride money oxide. Moreover, the responsibility of these materials

何混成物或其卿賴合金,丨枝氧錄_祕物之合金卿^ 、 給—氧脑之合姉娜)、給—錄化物之合金_叫..料,都可用 來取代氧化物或氮化物。 第9圖翻示本發明所提供一種電荷注入系統之能帶圖的實施例,該 電荷注入系統係用以注入具有緊密能量分佈之電荷。此電荷注入系統之能 帶結構係以注入電子來作說明。參考第9圖,圖中顯示有一導體—過據器 系統59,其屬於第7 _描述_式,—導體—絕緣體系統ω,其胁第 1圖與第5圖所描述的型式’一電荷儲存區域(以下簡稱csr)66,一通道介 電質(以下簡稱CD)68,以及-主體7〇。第9圖顯示的是完整的能帶結構。 •舉例來說,在導體一過濾'器系統59中,除了第7圖所示的導電帶1853與1854 之外’還有價電帶4453與4454。導體—過濾器系統59係包括—穿随閘(以下 -簡稱TG) 6卜以及一電荷過濾器52。電荷過遽器52包含電位能障2453與 ;2454,其中電位能障2454具有—臨限能量58以控制其過滤效果,如同第1 ,®之相臟述。電荷磁々52還包括細介電質(TD)53與阻擋介電質 ㈣54’如同第7圖之相關描述。導體一絕緣體系統6〇包括一彈道閘⑽下 簡稱BG) 62與-保_(以下_肋)64分別作為祕_導體與絕緣 體。此電荷注入系統之能帶圖内由TG 61延伸至奶64之區域的建造方= 是將導體-過濾器系統59内的過遽器52與導體—絕緣體系統⑼内的導體 (BG62)相「接觸」。TG61與BG62是具有功函數之金屬,並且其功函數分 0881-A31715TWF(5.0) 21 (S) 1287292 - 別具有費米能階1601與16位。圖中顯示CSR 66分別利用介電質Rp 64與 卜 CD 68以與BG 62與主體70相絕緣,以及包括N導電型之半導體,並且此 半導體具有一導電帶1866與一價電帶44沉。CSR 66可包括另一導電型之半 導體(比方是P型),並可包括金屬或其他適合用於儲存電荷的材料(比方是 奈米顆粒(nano-particles)或位於介電質内的阱(Traps))。主體70係包括導電 ; 帶1870與價電帶4470,以及可藉由將電壓經由€〇68耦合至〇81166,而用 來調變一位於導體一絕緣體系統60内之影像力能障2464。介電質RD 64與 CD 68分別顯示為單獨一層,然一般而言可包括一層以上而形成一種混合 馨層。 第9圖係更提供具有緊密能量分佈之電荷之形成與注入過程的相關說 明。圖中顯示,具有緊密能量分佈57之常溫電子56是由TG 61供應而作 為供應載子。這些電子56於利用第7圖描述之機制以穿隨通過過滤器52 之期間,會被過濾器52過濾。在接受過濾後,常溫電子56變成電子56,, 而電子56’之能量分佈57比過濾前常溫電子56之能量分佈57還要緊密。 這些電子56’係注入導體一絕緣體系統60。在一情況中,電子56,當中一部 分能以高於BG 62之費米能階1662之動能33傳輸通過BG 62而不發生散射 • (Scattering)(意即是作「彈道傳輸(Ballistic Transport)」),繼而於BG 62與 RD 64之交界處變成電子37。這類電子37(稱作「彈道電子(Ballistic Electrons)」)不經歷與其他粒子(例如電子、聲子(ph〇nons)等等)之散射事件, - 因而能保留動能及沿原本行進方向之衝量(Momentum)。在另一情況中,電 / 子56’可於傳輸通過BG 62時與其他粒子發生部分散射(意即是作「部分彈 道傳輸」)並且其動能33仍能維持夠高,以及能維持往bg 62與RD 64之 交界的方向行進,繼而變成電子37。在所有情況中,這類電子37均利用第 3B圖與第5圖相關描述之機制以克服影像力電位能障2464之能障高度2〇, 以及進入RD 64之導電帶1864並一路前進而變成具有能量分佈38,之電子 37’,最後被CSR66加以收集並成為導電帶1866内的電子刀。這種形成和 0881-A31715TWF(5.0) 22 1287292 : 注入電荷之過程(不論是利用彈道傳輸或部分彈道傳輸)乃稱作彈道電荷注 入機制(Ballistic-Charge Injection Mechanism)。當電子選作電荷載子時,之 種機制稱為彈道電子注入。這類電子之注入效率(定義為所收集載子數相對 一 所供應載子數之比率)典型上係介於1〇-4至10-1之範圍。此注入機制能藉由 注入壓電電子(Piezo-Electrons)來獲得進一步的提升(參見第17B相關描述中 ; 之壓電彈道電子注入機制)。 第9圖所示之彈道電荷注入係說明彈道電子注入,而實行方式是藉由 ” 施加一電壓於TG 61與BG 62之間,以令電子37之動能33高於導體二絕 • 緣體系統60之影像力能障高度20來達成。這樣的電壓可如第3A、3B與 3C圖之相關描述,藉由降低影像力電位能障41之方式來降低。而實行方 式,比方來說,可藉由耦合一正電壓(比方是由約+lv至約+3”至cSR沉 來達成。選擇性地,可藉由選取CSR66之材料的功函數大於BG 62之功函 數(或費米能階低於BG 62之費米能階),來使影像力電位能障降低。 第1〇圖係提供另-電荷注人祕之能帶圖的實補,其巾該電荷注入 系統係用以注人具緊密能量分佈之電子。在第1G圖之導體_過滤器系統分 中,導體61係供應常溫電荷載子56。過濾器52與導體61相接觸,並且包 • 括介電質53與54以提供對於某極性之電荷載子56(負電荷載子)之過滤功 能,其中過遽器52係具有可電性修改之電位能障仏與^,以控制=某 - 方向(朝别方向34)通過過濾器52之某極性電荷載子56的流動。除了對 ^某極性電荷載子(負電荷载子,電子56)進行控制之外,過遽器52還包括可 .f性修改之電位能障4¾3與4知,以控制沿另一與上述某一方向大體上相 反之方向來通過過濾、器52之相反極性電荷載子(正電荷載子,lh η與冊 73)的流動。 〃 /這種過濾功能允許具某極性之電荷載子沿一朝前方向34(意即由tg6i 在BG 62)傳輸’並阻擋沿一朝後方向74(意即由bg 62往和㈣之相反極 性的電荷載子。因此,過據器52提供一種可「純化」電荷流動之電荷過遽 〇881-A31715TWF(5.0) 23 ⑧ 1287292 功月b。此電荷過濾功能是過濾器52所提供過濾功能之另一實施例。 比第10 ®之能帶圖與第9圖之能帶圖除了少數幾點有差異外,其餘各方 ,白相同。這些差異點之—在於第1G圖並非使用金屬作為導體—過滤器系 、、充與導體—絕緣體系統60内導體區域之材料,這些導體區域(即tg 61 ^ BG62)現在是以半導體為材料,其中TG61之半導體具有導電帶1861與 價電帶44β1,以及BG a之半導體具有導電帶^與價電帶44位。顯示於 圖中的TG 61是- Ρ型半導體,並在其價電帶a内具有電子%為供應載 子。确電子56以及其能量分佈57經歷與第9圖相關描述相目之傳輸過 程,因此電子56當中有-部分能夠進入CSR66而變成了具有能量分佈贤 之電子37,並且最後以與第9圖相關描述類似的方法來被收集和儲存在 CSR 66 上。 對第10圖所顯示之範例而言,當施加極性可使TG 61之電子56以朝 刖方向34來注入之電壓的時候,同時也會致使BG 62内的LH 72與73 沿朝後方向74傳輸。往後傳輸之LH π與冊73可能導致不希望產生的問 題。舉例來說,當LH 72與HH 73往後傳輸進入TG 61内時,可能會因為 月匕里兩於彳貝電▼ 1601之能量而在該處觸發撞擊游離(此诉如㈤丨加丨如)。此 外,當採用彈道電子注入以對記憶單元進行編程操作時,這些電洞對記憶 操作不具貢獻。因此,這可能浪費電流並因而耗費功率。因而,乃希望阻 擋LH 72與HH 73 ’使其無法往後傳輸進入Tg 61。 第10圖之能帶結構顯示出往後傳輸之載子(即LH 72與HH 73)必須比 往前傳輸的載子(即電子56)穿越過較多數量的能障,並因而能提供阻擋往 後穿隨載子之過濾、效應。此過濾效應是以過滤器52内電位能障所構成之能 帶結構為基礎。第一個阻擋往後傳輸電洞72與73之電位能障42分於進入 侧與離開側分別具有能障高度4154與41,54。這兩個能障高度4154與41,54 是以BD 54之價電帶44^作為參考點。第二個電洞能障4253於進八側具有 一能障高度4I53,其形成另一個阻擋電洞72與73的能障。能障高度4153 0881-A31715TWF(5.0) 24 1287292 —係以TD53與BD54交界處之TD53的價電帶4453來作為參考點。 ‘ 此過濾器52係建立在能障高度工程學觀念之基礎上。一個用以說明此 能障高度工程學觀念之導體一過濾器59以及導體一絕緣體系統60之本發 - 明特定實施例係包括一構成TG 61之P+多晶矽,一構成TD 53之氧化物 層,一構成BD 54之氮化物層,一構成BG泣之讲多晶矽,以及一構成 ^ RD 64之氧化物層。使用N+多晶矽為BG62之材料係來自幾點考量。其中 • 最重要的考量因素是由於N型雜質(比方是砷、磷等等)的固溶度(s〇lid solubility)比P型雜質(比方是硼)來得高。希望雜質能擁有較高的固溶度的原 • 因疋如此此以較咼的濃度來為石夕作摻雜,因此摻雜石夕之片電阻降低,從而 可較適合應用於積體電路中。在此實施例内,使用多晶矽為TG61與^〇 62 之材料的原S是目其擁有廣泛證實的收益、量產力,以及與現今1(=;驗的 相容性。使用厚度約為7奈米至1〇奈米的氧化物為奶糾之材料亦是來自 相同緣由。構成TD 63的氧化層厚度可約在15奈米至4奈米之間,並較佳 上約在2奈米至3·5奈米之間。TD 53之厚度範圍係選取為能令傳輸過它的 電荷載子(電子,LH或HH泣要是以直接穿隨機制來傳輸。BD %之厚度係 選取為’當-介於約IV至約2.5V範圍的適中電壓施加於犯61與阳62 • 之間牯、’旎夠阻擋電荷載子穿隧通過BD 54與TD 53兩層。BD 54之厚度 更選取為,較高的電壓(3V以上)下,能夠容許某型的電荷載子(比方是 '電子56)在別傳輸,並且阻擔另一型的電荷載子(比方是LH %往後傳輸。 . 在下述之此障1^度卫程學觀念内,BD54的厚度亦依據其所具有的介電質常 ^ 數而定。一般來說,捣若過遽器52能確實符合上述要求,則BD 54的厚度 可車㈣53厚或薄都可以。舉例來說,在此特定實施例内,如果選擇TD 53 為厚?奈:卡(即3〇埃)之氧化物,則BD 54的最小厚度可約為2奈米(即2〇 埃)或者更厚。就此特定實施例而言,構成丁㈣的氧化物可以是利用傳統 積(P )技術所製成的高溫氧化物(扭班TempCTatoe oxide; TE0S層或疋利用本領域為人熟知的化(孤_aI 〇纖舰)技術所製 0881-A31715TWF(5.0) 25 (ί 1287292 " 成的熱氣化物(Thermal Oxide)。而構成BD 54的氮化物則可為一能帶間隙内 不具電荷捕捉中心(trapping center)之優質氮化物。此優質氮化物的製造方 式’舉例來說,可在含氨(Ammonia;NH3)的環境中以高溫(比方是1〇5〇。c) - 進行本領域為人熟知的快速熱氮化(Rapid Nitridati⑽;rtn)技術來 製造。 . 彈道電荷注入之能障高度工程學 現欲提供能障高度工程學之相關細節。第11圖係顯示與第10圖相似 攀的能帶圖,但在過顏62内的能帶弯曲較輕微,這是為了揭示能障高度的 更多細節。除了顯示具有第10圖所示的區域與參考符號外,第n圖還顯 示價電帶4462與4453間價電帶偏移量的能障高度41,53。此能障高度41,’"53 是位於阻擋LH 72與HH 73往後傳輸之第二電洞電位能障%之離開側。 此外’圖中亦顯示一由TD 53形成之第一電子電位能障24幻,其於阻擋電 子56往前傳輸之電位能障%的進入側和離開侧處,分別具有能障高度i 與2〇’53。圖中還顯示-由BD 54形成之第二電子能障%,其進入侧和離 開侧分別具魏障高度2054與2〇,54。此第二電雜障2454亦具有阻撞往前 φ 注入之電子56的效果。 由本發明所提供的這個能帶結構可明白看出,有兩個電子電位能障2453 '和2454與往前傳輸的電子56有關。同樣地,有兩個電洞能障4254虚4253 與BG 62内往後傳輸的電洞72與73有關。為了產生高效率之彈道電荷注 '人,乃希望第一與第二電子能障2453與A4之能障高度為可電性修改,以 能協助沿往前方向34之傳輸的進行。反之,為了阻擔bg 62内的電洞72 往後傳^TG61,乃希望在整個壓電彈道電荷注人的電絲圍内, 第-電洞能障4254的能障高度以及第二電洞能障4253的能障高度 持得夠高。 半 參考第11圖’第一電子能障2454之能障高度2〇54(Δφ之主要項^ 0881-A31715TWF(5.0) 2 ⑧ 1287292 開可利用下式表示: 一⑴ = M>C5, -丨厂切丨 其中What kind of mixture or its Qinglai alloy, lychee oxygen record _ secret material alloy Qing ^, give - oxygen brain combination ) Na), give - the alloy of the alloy _ called .. material, can be used to replace oxide or nitride. Figure 9 illustrates an embodiment of an energy band diagram of a charge injection system for injecting a charge having a tight energy distribution. The energy band structure of this charge injection system is illustrated by the injection of electrons. Referring to Fig. 9, there is shown a conductor-passer system 59 which belongs to the seventh-description_type, conductor-insulator system ω, which is characterized by the type described in Figures 1 and 5, a charge storage. A region (hereinafter referred to as csr) 66, a channel dielectric (hereinafter referred to as CD) 68, and a body 7 〇. Figure 9 shows the complete energy band structure. • For example, in the conductor-filter system 59, in addition to the conductive strips 1853 and 1854 shown in Fig. 7, there are also valence strips 4453 and 4454. The conductor-filter system 59 includes a pass-through (hereinafter referred to as TG) 6b and a charge filter 52. The charge passer 52 includes potential barriers 2453 and 2454, wherein the potential barrier 2454 has a threshold energy 58 to control its filtering effect, as described in the first, ® phase. Charged magnetic field 52 also includes a fine dielectric (TD) 53 and a blocking dielectric (4) 54' as described in relation to Figure 7. The conductor-insulator system 6A includes a ballistic gate (10) and a BG) 62 and a _ _ _ rib 64 as secret conductors and insulators, respectively. The construction of the region of the charge injection system in which the TG 61 extends to the area of the milk 64 is the phase of the conductor 52 in the conductor-filter system 59 and the conductor (BG62) in the conductor-insulator system (9). contact". TG61 and BG62 are metals with a work function, and their work functions are 0881-A31715TWF(5.0) 21 (S) 1287292 - they have Fermi level 1601 and 16 bits. The CSR 66 is shown to utilize a dielectric Rp 64 and a CD 68 to insulate the BG 62 from the body 70, and a semiconductor including an N conductivity type, and the semiconductor has a conductive strip 1866 and a monovalent electrical strip 44. The CSR 66 may include another conductivity type semiconductor (such as a P type) and may include a metal or other material suitable for storing a charge (such as a nano-particles or a well located in a dielectric ( Traps)). The body 70 includes electrical conduction; a strap 1870 and a valence strap 4470, and can be used to modulate an image force barrier 2464 located within the conductor-insulator system 60 by coupling a voltage via 〇68 to 〇81166. The dielectrics RD 64 and CD 68 are shown as a single layer, respectively, but in general may comprise more than one layer to form a mixed layer. Figure 9 is a more detailed description of the formation and implantation of charge with a tight energy distribution. The figure shows that the ambient temperature electrons 56 having a compact energy distribution 57 are supplied by the TG 61 as a supply carrier. These electrons 56 are filtered by the filter 52 during the passage through the filter 52 using the mechanism described in FIG. After being filtered, the ambient temperature electron 56 becomes electron 56, and the energy distribution 57 of the electron 56' is closer to the energy distribution 57 of the normal temperature electron 56 before filtration. These electrons 56' are injected into the conductor-insulator system 60. In one case, a portion of the electrons 56 can be transmitted through the BG 62 with a kinetic energy 33 higher than the Fermi level 1662 of the BG 62 without Scattering (meaning "Ballistic Transport") ), and then becomes an electron 37 at the junction of BG 62 and RD 64. Such electrons 37 (called "Ballistic Electrons") do not experience scattering events with other particles (such as electrons, phonons, etc.) - thus retaining kinetic energy and traveling along the original direction Momentum. In another case, the electric/sub-56' can be partially scattered with other particles when transmitting through the BG 62 (meaning "partial ballistic transmission") and its kinetic energy 33 can still be maintained high enough, and can be maintained to bg 62 travels in the direction of the junction with RD 64, which in turn becomes electron 37. In all cases, such electrons 37 utilize the mechanisms described in relation to Figures 3B and 5 to overcome the barrier height 2〇 of the image force potential barrier 2464, and enter the conductive strip 1864 of the RD 64 and become all the way forward. An electron 37' having an energy distribution 38 is finally collected by the CSR 66 and becomes an electron knife within the conductive strip 1866. This formation and 0881-A31715TWF(5.0) 22 1287292: The process of injecting charge (whether by ballistic transmission or partial ballistic transmission) is called the Ballistic-Charge Injection Mechanism. When electrons are selected as charge carriers, such a mechanism is called ballistic electron injection. The injection efficiency of such electrons (defined as the ratio of the number of collected carriers to the number of supplied carriers) is typically in the range of 1 〇 4 to 10-1. This injection mechanism can be further enhanced by injecting piezoelectric electrons (Piezo-Electrons) (see the piezoelectric ballistic electron injection mechanism in the related description of Section 17B). The ballistic charge injection shown in Figure 9 illustrates ballistic electron injection by applying a voltage between TG 61 and BG 62 to make the kinetic energy 33 of the electron 37 higher than the conductor. The image energy barrier of 60 is achieved by a height of 20. Such a voltage can be reduced by reducing the image force potential barrier 41 as described in the 3A, 3B and 3C diagrams, and the implementation method, for example, can By coupling a positive voltage (say, from about + lv to about +3) to cSR sinking. Alternatively, the work function of the material by selecting CSR66 is greater than the work function of BG 62 (or Fermi level) It is lower than the Fermi level of BG 62) to reduce the image potential energy barrier. The first diagram provides a real complement of the charge-charging diagram of the charge-injection system. An electron with a tight energy distribution. In the conductor_filter system of Figure 1G, the conductor 61 supplies a normal temperature charge carrier 56. The filter 52 is in contact with the conductor 61 and includes dielectrics 53 and 54. To provide a filtering function for a charge carrier 56 (negative charge carrier) of a certain polarity, wherein The buffer 52 has electrically deformable potential energy barriers and controls to control the flow of a certain polarity charge carrier 56 through the filter 52 in a certain direction (toward the other direction 34). In addition to the control of the sub (negative charge carriers, electrons 56), the filter 52 further includes a potential energy barrier 43⁄43 and 4 that can be modified to control the direction substantially opposite to one of the above directions. Through the flow of the opposite polarity charge carriers (positive charge carriers, lh η and book 73) of the filter 52. 〃 / This filtering function allows the charge carriers of a certain polarity to be along a forward direction 34 (ie by Tg6i transmits at BG 62) and blocks charge carriers in a backward direction 74 (i.e., from bg 62 to (4). Therefore, the passer 52 provides a charge that can "purify" the charge flow. 〇881-A31715TWF(5.0) 23 8 1287292 Power Month b. This charge filtering function is another embodiment of the filtering function provided by the filter 52. Except for the energy band diagram of the 10th and the 9th In addition to the differences, the other parties are the same in white. These differences are in the 1G map. The metal is used as the conductor-filter system, and the material of the conductor region in the conductor-insulator system 60. These conductor regions (ie, tg 61 ^ BG62) are now made of semiconductor materials, wherein the semiconductor of TG61 has a conductive strip 1861 and a price. The semiconductor of the electric strip 44β1, and BG a has a conductive strip and a valence band of 44. The TG 61 shown in the figure is a Ρ-type semiconductor, and has electron % as a supply carrier in its valence band a. The electron 56 and its energy distribution 57 undergo a transmission process that is related to the description associated with Fig. 9, so that a portion of the electron 56 can enter the CSR 66 and become an electron 37 having an energy distribution, and finally described in relation to Fig. 9. A similar approach is collected and stored on CSR 66. For the example shown in Figure 10, when a polarity is applied such that the electrons 56 of the TG 61 are injected with a voltage in the 刖 direction 34, the LHs 72 and 73 in the BG 62 are also caused to be in the rearward direction 74. transmission. LH π and booklet 73 transmitted later may cause undesirable problems. For example, when LH 72 and HH 73 are transmitted back into TG 61, the impact may be triggered by the energy of the mussel electric charge ▼ 1601 in the moon ( (this is the case (5) ). In addition, these holes do not contribute to memory operations when ballistic electron injection is used to program memory cells. Therefore, this may waste current and thus consume power. Therefore, it is desirable to block the LH 72 and HH 73 ' from being transmitted back into the Tg 61. The energy band structure of Figure 10 shows that the carriers that are transmitted later (ie, LH 72 and HH 73) must pass through a larger number of energy barriers than the forwardly transmitted carriers (ie, electrons 56) and thus provide a barrier. Afterwards, wear the filter and effect of the carrier. This filtering effect is based on the energy band structure formed by the potential barrier in the filter 52. The first potential barrier 42 that blocks the rearward transmission holes 72 and 73 has barrier heights 4154 and 41, 54 on the entry side and the exit side, respectively. The two barrier heights 4154 and 41, 54 are based on the BD 54 price strip 44^. The second hole energy barrier 4253 has an energy barrier height 4I53 on the eight sides which forms another barrier to the holes 72 and 73. The height of the energy barrier is 4153 0881-A31715TWF (5.0) 24 1287292 — The TD53 price band 4453 at the junction of TD53 and BD54 is used as a reference point. ‘ This filter 52 is based on a highly engineered concept of energy barriers. A particular embodiment of a conductor-filter 59 and a conductor-insulator system 60 for illustrating the high degree of engineering of the barrier includes a P+ polysilicon constituting TG 61 and an oxide layer constituting TD 53. A nitride layer constituting the BD 54 constitutes a polycrystalline germanium of BG, and an oxide layer constituting the RD 64. The use of N+ polysilicon as the material of BG62 comes from several considerations. Among them • The most important consideration is that the s〇lid solubility of N-type impurities (such as arsenic, phosphorus, etc.) is higher than that of P-type impurities (such as boron). It is hoped that the impurity can have a higher solid solubility. Therefore, the doping of the stone is doped with a relatively high concentration, so that the resistance of the doped stone plate is lowered, so that it can be suitably used in an integrated circuit. . In this embodiment, the original S using polycrystalline germanium as the material of TG61 and ^62 is a widely proven benefit, mass productivity, and compatibility with today's 1 (=; test thickness. The oxides of nanometers to 1 nanometers are also derived from the same reason. The thickness of the oxide layer constituting TD 63 may be between about 15 nm and 4 nm, and preferably about 2 nm. Between 3 and 5 nanometers. The thickness range of TD 53 is chosen to be able to transmit the charge carriers (electron, LH or HH weeping is transmitted by direct randomization. BD % thickness is selected as ' When - a moderate voltage in the range of about IV to about 2.5V is applied between the crime 61 and the yang 62. 旎, '旎 阻挡 阻挡 电 电 电 电 电 电 电 电 电 电 电 电 BD 。 。 。 。 。 。 。 。 。 。 。 。 。 Therefore, at higher voltages (above 3V), it is possible to allow certain types of charge carriers (such as 'electron 56) to be transmitted separately, and to block another type of charge carriers (for example, LH% is transmitted later). In the following concept of the obstacle, the thickness of the BD54 is also determined by the dielectric constant of the BD54. Generally speaking, if The device 52 can indeed meet the above requirements, and the thickness of the BD 54 can be 53 (thick) or thick or thin. For example, in this particular embodiment, if the TD 53 is selected to be thick, the card is (ie, 3 angstroms). For oxides, the minimum thickness of the BD 54 can be about 2 nanometers (i.e., 2 angstroms) or thicker. For this particular embodiment, the oxide constituting the butyl (tetra) can be made using conventional product (P) techniques. The high temperature oxide (TempCTatoe oxide; TE0S layer or 疋 using the well-known chemical (orphan _aI 〇 fiber ship) technology made by 0881-A31715TWF (5.0) 25 (ί 1287292 " into a hot gas ( Thermal Oxide. The nitride that makes up BD 54 can be a high-quality nitride without a charge trapping center in the band gap. This high-quality nitride is manufactured by way of example, in ammonia (Ammonia). ; NH3) environment is manufactured by high temperature (for example, 1〇5〇.c) - rapid thermal nitridation (Rapid Nitridati (10); rtn) technology well known in the art. Ballistic charge injection energy barrier high engineering It is now intended to provide details on the high degree of engineering of energy barriers. Figure 11 shows Figure 10 is similar to the energy band diagram of the climbing, but the band bending in the face 62 is relatively slight, in order to reveal more details of the height of the barrier. In addition to showing the area and reference symbols shown in Figure 10, Figure n also shows the energy barrier height 41,53 of the price band offset between the price band 4462 and 4453. The barrier height 41, '"53 is the second transmission to block the LH 72 and HH 73. The potential of the hole potential energy barrier is %. In addition, the figure also shows a first electronic potential energy barrier 24 formed by the TD 53, which has an energy barrier height i and 2 at the entry side and the exit side of the potential energy barrier % of the blocking electron 56 forward. 〇 '53. Also shown is a second electron energy barrier % formed by BD 54 having a barrier height of 2054 and 2, 54 on the entry side and the off side, respectively. The second electrical barrier 2454 also has the effect of blocking the electrons 56 injected into the front φ. As can be seen from the energy band structure provided by the present invention, there are two electronic potential barriers 2453' and 2454 associated with the forwardly transmitted electrons 56. Similarly, there are two hole energy barriers 4254 imaginary 4253 associated with the holes 72 and 73 transmitted in the BG 62. In order to produce a highly efficient ballistic charge, it is desirable that the energy barriers of the first and second electronic energy barriers 2453 and A4 be electrically configurable to assist in the transmission in the forward direction 34. On the contrary, in order to block the hole 72 in the bg 62 from passing back to the TG61, it is desirable to have the energy barrier height of the first hole energy barrier 4254 and the second hole in the entire wire of the piezoelectric ballistic charge. The energy barrier of the energy barrier 4253 is held high enough. Half reference Figure 11 'The energy barrier height of the first electronic energy barrier 2454 is 2〇54 (the main item of Δφ ^ 0881-A31715TWF(5.0) 2 8 1287292 can be expressed by the following formula: one (1) = M> C5, -丨The factory cuts among them

”是平能帶條件下TG 61與BD 54間的導電帶偏移量, 功疋壓電彈道電子注入期間橫跨於τ ,的壓降龙了表不為 β疋檢跨於TG 61與BG 62間的外加電壓(即橫跨於過遽器 ^是平能帶電壓; ~是1^61之能帶間隙; ^和〜分別是TD53和BD54的介電常數;以及 心與心分別是TD 53和BD 54的厚度; ,似地’阻擋往後傳輸電洞之第二電洞能障他之能障高声 4153(防-沉)可利用下式表示:又 ΔΦ,"It is the offset of the conductive band between TG 61 and BD 54 under the condition of flat energy. The voltage drop across the τ during the piezoelectric ballistic electron injection is not the β 疋 test across the TG 61 and BG. The applied voltage of 62 (that is, across the filter ^ is the flat band voltage; ~ is the band gap of 1 ^ 61; ^ and ~ are the dielectric constants of TD53 and BD54 respectively; and the heart and heart are TD respectively The thickness of 53 and BD 54; , like the second hole that blocks the transmission hole, the energy barrier of the second hole can be high. 4153 (anti-sink) can be expressed by the following formula: ΔΦ,

GT ΔΦ,GT ΔΦ,

GT -丨厂肪丨 其中 - (2)GT - 丨厂肥丨 where - (2)

”疋平能帶條件下BG 62與tD 53帛的價電帶偏移量 肋疋壓電彈予電子注入期間橫跨於BD 5 並可表示為 L上述公式⑴與⑺可明白得知,能障高度2〇54(ΔΦ”)與能障高度 41«( 兩者與匕之間的關係乃有所差異。這種與電壓間的關係為非對 稱’並且主要取決於介電質常數與介電質厚度之結合效應(即「ε τ效應」)。 第12Α圖係顧示一個運用上述原理以實行彈道電子注入之能障高度工 程學觀念範例。可明白看出,當降低扣61與如62間的外加電壓時,阻 擔TG61内電子之能障高度2〇54(祕心)會比阻擋BG 62内的LH 72與ΗΗ 73之能障高度=3(δφ”)降低得快。事實上,當外加電壓約為一3·5‘ν時, 能障高度2〇54(ΔΦ—)轉移至費米能階i知之下(即能障高度等於零),然而 0881-A31715TWF(5.0) 27 ⑧ 1287292 :此時能障高度4153(ΔΦ”)卻仍維持在約丄㈣之足夠能障高度。第ι〇圖 •係顯不外加電壓降低至超越此電壓位準之情況下的能帶圖。如第⑺圖所 不’當外加電壓降至超越此電壓位準時,第U圖中阻檔電子56的第二電 . 子電位能障2454現在位於費米能階1601以下。因此,TG 61内能量高於臨 限能量58之電子56可直接傳輸通過過濾器52而不被BD 54層阻擔。這容 • 許導體一過濾器系統59之帶通過濾功能注入沿朝前方向34移動且具有緊 一 密能量分佈57,之電子。於此電壓範圍内,在能障高度4153(Δφ^σΓ)與外加 電壓間微弱得多的關係下,避免電洞往後傳輸之第二電洞電位能障 ♦ 4153(Δφ^-π)因此維持住。因此,此處描述的能障工程學概念實際上能為彈 道電子注入提供可電性修改過濾器之構建方法。此過濾器獨特之處在於能 過濾掉不想要的載子(比方是往後傳輸的LH 72與ΗΗ 73)卻不影響到想要載 子的傳輸(比方是往前傳輸的電子56)。 上述關於公式(1)與(2)之說明與第12Α圖所示之結果係作為一範例,以 呈現能障南度2〇54和4Ι54與電壓之間的關係。可輕易地對第11圖内過滤器 52之其他的能障高度(例如能障24%與24μ分別具有的能障高度2〇,53與 20’54,以及第二電洞電位能障42%具有的能障高度41,43與4153)進行同樣的 ρ 說明。因此可明白到,控制往後傳輸電荷載子之電位能障的能障高度與過 濾器跨壓之間的關係,比起控制往前傳輸電荷載子之電位能障的能障高 度,會較為微弱。 ρ4 在彈道電子注入一般使用的電壓範圍内,乃希望BD 54的跨壓(Gd)能 _ 較能障高度4154來得小。希望使心小於能障高度4154是因為如此可使BD54 地區之第一電洞電位能障4254維持為一種梯形能帶結構,以能更有效地阻 擋往後注入的LH 72與HH 73。參考第10圖即可更明瞭此種能障結構。圖 中顯示能障高度4154形成第一電洞電位能障4254其中一側(電洞72與73的 進入侧)的能障高度,而能障高度41’54形成第一電洞電位能障之另一侧(電 洞72與73的離開側)的能障高度。此梯形第一電洞電位能障能障4254之離 0881-A31715TWF(5.0) 28 1287292 :開側的能障高度41’54的主要項係等於ΔΦ'促其中ΔΦ^_仍是能障高度 ‘ 41m。在第10圖所顯示的此能帶結構之特定實施例中,# TG 61和BG 62 間的外加電壓為-4V時,能障高度41,54約為〇JeV,因而第_電洞電位能 . 障4254之梯形結構仍然保持住。承上述原理所授,藉由使TD 53和BD 54 _ 的介電常數和厚度最佳化以使&降低,能使能障高度41,54提高。 - 對此特定實施例而言,TG 61之電壓範圍係選取成相對BG 62的電壓 - 為介於—3.5V至約—4·5ν以實行彈道電子注入。可如第3A、3B與3C圖 之相關描述,藉由降低導體一絕緣體系統6〇之影像力能障高度2〇,這樣的 _ 電壓可進—步降低。這可藉由將—介於約IV至約3V之電難合至CSR66 來達成。選擇性地,可藉由選取CSR 66之材料的功函數低於BG 62之功函 數(或費米能階咼於BG62之費米能階),來使影像力電位能障降低。 藉由降低影像力能障以降低TG 61與BG 62間的電壓為本發明帶來值 得嚮往之效應。主要優點之一在於能降低TG 61與BG 62間介電質内的電 場’從而可避免介電質内發生與高電場相關的問題(比方是介電質擊穿,其 會造成介電質的永久損害)。 " 依據本發明之另一實施例,過濾器52更提供一種電壓分割功能。電壓 • 分割功能降低過濾器52内介電質之壓降。 第12B圖係顯示利用上述之能障高度工程學觀念以實行彈道電子注入 - 之電壓分割功能的範例。參考第12B圖,圖中顯示不同介電質跨壓與過濾 器52之跨壓間的關係。明顯可知,過濾、器52之跨麼,即TG 61與BG 62 •間的外加電壓,由過濾器52内的數個區域分割且分享。此由過滤器幻所 提供的電壓分割功能因而允許TG 61與BG62間的外加電壓能被bd 54與 TD53分割並分享,而不須與彈道電荷注入相妥協。此電壓分割功能減少這 些介電質當中每一介電質所須抑制之電壓,從而能夠避免介電質擊穿之問 題。 本發明的特點之一在於能障高度工程學觀念所提供之效應以及等效 O881-A31715TWF(5.0) 29 1287292 •應於注入過濾器内之實踐。這些效應提供了電壓分割功能,並且避免了可 能發生於電荷注入期間之介電質擊穿問題。此外,由往後傳輸電荷載子所 觸發而發生在TG 60内的撞擊游離問題,亦藉由運用過濾效應以抑制這些 • 載子往後注入而有效地避免。 • 因此可明白到,於本發明内所說明之過濾器與能帶結構可在彈道電荷 ‘ 注=期間,有效地阻擋某極性電荷載子往後傳輸,然而卻允許相反極性的 - 電荷載子往則傳輸。因此,過濾器52提供一種將電荷流「純化」之電荷過 麵制。雖非必要,但普遍上乃希望BG 62的費米能階於平能帶條件下係 位於過滤器52内BD 54之能帶間隙的中央,以於使用此種能帶結構與注入 機制來構建單元時,能夠最充分地利用電荷過濾機制。 以上對彈道電荷注入與能障高度工程學觀念所作的說明係針對電子而 §。可對輕制與重電册電荷顧和注人所達成之雜效應作類似的說 明。 第13圖係提供一能帶圖,其係說明第1〇圖内該種電荷注入系統内電 洞之彈道電荷注入與據效應。在第13圖所示之導體_過遽器系統分中, 導體61供應常溫電荷載子75與76。過濾器%與導體&相接觸,並且包 • 括介電質53與54以提供對於某極性之電荷載子75與76(正電荷載子)之過 濾功能,其中過遽器52係具有可電性修改之電位能障42训與心,以控 ; 彻H⑽赠額34)通過過脑52之雜性f荷奸75與76的流 . 動。除了對某極性電荷載子(正電荷載子75與76)進行控制之外,過濾器52 還包括可電性修改之電位能障^與24撕,以控制沿另一與上述某一方向 大體上相反之方向(朝後方向74)來通過過滤器52之相反極性電荷载子(負電 荷載子,電子84)的流動。 、 這種猶魏鱗具某極性之電荷載子沿_前方向34傳輸,並阻播 74 im 〇 . 「純化」電荷流動之電荷過滤功能。此電荷過滤功能是過渡器52所提供過 0881-A31715TWF(5.0) 1287292 :渡功能之另-實施例,並與第1G圖相關描述中之電荷過滤功能相似。 參見第13圖,圖中顯示LH75與冊76位於tg6i之價電帶^中, 以用作注入之供應電荷虬Η 75與HH76顯示為具有能量分佈77並沿該朝 •前方向34來傳輸。雖紅Η 75與ΗΗ 76於圖中具有相同的能量分佈乃, 然而注_,它們具有不_有效質量,_可以具有不_能量分 _ 佈0 • •在第13圖中,LH75與ΗΗ76兩者皆利用量子力學傳輸機制以傳輸通 過過濾器52之能障而變成LH75,與冊76,。LH 75,與HH W相對BG幻 之價電帶係具有動能46,並且此動能46稍微高於一影像力能障%之能障 高度41。當這些載子再繼續沿該朝前方向傳輸時,由於其在有效質量上有 所差異之故,因而在BG62内的傳輸行為大不相同。就jjjj%,而言,由於 其有效質I較重’所以平均自由路徑可以非常短。因此,冊76,易於和其 他粒子(比方是聲子)發生散射事件,從而具有低的彈道傳輸效率(彈道性 (Ballisticity))。第13圖中,HH 76,正在經歷散射事件並因此喪失能量而變 成HH 79。此外,圖中還顯示這些被散射的hh 79由於散射所以具有比原 先能量分佈77還寬的能量分佈81。這些電洞79在圖中以低於一位於64 • 之價電帶4464内影像力能障犯64之能障高度40之能量來傳輸,並因此被阻 擋而無法越過能障42私也無法進入CSR 66。反之,LH 75,具有較輕的有效 、 質量,因此其平均自由路徑較HH 76,之平均自由路徑為長(舉例來說,在矽 ^ 内,LH的平均自由路徑約為HH平均自由路徑之三倍)。在一情況中,這此 kt 厂'- 電洞LH 75’當中一部分能以動能46傳輸通過BG 62而不發生散射(意即是 作彈道傳輸),繼而於BG 62與RD 64之交界處變成LH 78。這類LH 78(稱 作「彈道LH」)不經歷與其他粒子(例如聲子)之散射事件,因而能保留動能 以及沿原本行進方向之衝量(M〇mentum),並且其能量分佈80與原先的能量 分佈77相似。在另一情況中,LH 75,能以部份彈道傳輸來通過BG 62,並 且其動能46仍能維持夠高,以及能維持往bg 62與RD 64之交界的方向行 0881-A31715TWF(5.0) 31 ⑧ 1287292 ' 進,繼而變成LH 78。在所有情況中,這類LH 78均利用第6圖相關描述 之機制來克服影像力電位能障42m之能障高度41,以及進入虹>64之價電 帶44似並一路前進而變成具有能量分佈80,之LH78,,最後被CSR66加以 - 收集並成為價電帶4466内的電洞82。這種形成和注入電洞之過程(不論是利 用彈道傳輸或部分彈道傳輸)乃稱作彈道電洞注入機制 - Injectkm Mechanism)。這類電洞之注入效率(定義為所收集載子數相對所供 • 應載子數之比率)典型上係介於ΙΟ·6至ΗΓ3之間。此注入機制能藉由注入壓 電電洞(Piezo-Holes)以獲得進一步的提升(參見第17B圖與第17C圖相關描 • 述中之壓電彈道電洞注入機制)。 就系統59與60使用第1〇圖相關描述之材料的特定實施例而言,TG 61 之電壓範圍係選取成相對BG 62的電壓為介於+5V至約+6 〇v之間以實行 彈道電洞注入。這樣的電壓可如第6圖之相關描述,藉由降低導體—絕緣 體系統60之影像力能障咼度41來進一步降低。舉例而言,這可藉由將一 介於約一3V至約一IV之電壓耦合至CSR66來達成。選擇性地,此影像力 能障可藉由選取CSR 66為具有比BG 62還小的功函數(或較高的費米能階) 之材料來降低。 φ 藉由使用具有相似費米能階之材料來構成TG 61與BG 62,TG 61與 BG62間的外加電壓可進一步降低。這構成另一個用作彈道電洞注入之導體 , 一過濾器系統59與導體—絕緣體系統60所使用之材料的實施例。舉例來 說’此過濾、器52可以包括一構成TG 61之P+多晶石夕,一構成jd 53之氧 化物層,一構成BD 54之氮化物層,一構成bg 62之P+多晶石夕層,以及— 構成RD64之氧化物層。這樣的實施例允許丁(361之電壓相對於β(}62之 電壓於實行彈道電洞注人時可選取在一較小的電壓範圍内(譬如約為+4·5 v 至約+5.5 V)。 第13圖更顯示在將能帶結構作偏壓以使沿該朝前方向 34來傳輸之同時,BG 62之導電帶_内的電子棘可沿該新後方向%來 0881-A31715TWF(5.0) 32 1287292 傳輸。此往後傳輸之電子84可導致諸如TG 61内的撞擊游離、電流與功率 浪費等等問題,這些問題與第10圖的相關描述中往後傳輸電洞所導致問題 類似。因此乃希望能利用過濾器52阻擋電子84,使其無法往後傳輸進入 TG6卜 第13圖之能帶結構顯示往後傳輸之載子(即電子84)必須比往前傳輸的 载子(即LH 75與HH 76)穿越過較多數量的能障。第一個阻擋往後傳輸電子 84為電位能障24撕,其進入側與離開側分別具有能障高度2〇5413與2〇,54b。 這兩個能障南度20^1^20^分別是以BD 54與BG 62交界處之導電帶I854 以及TD 53與BD 54交界處之導電帶I854作為參考點。圖中顯示第二個電 子施障245%之進入側具有一能障高度205%,並且形成另一個阻擋電洞84 之能障。能障南度2〇53!3係以TD 53與BD 54交界處TD 53的導電帶1853 作為參考點。一能障高度20’53b(圖中並未顯示)存在於能障2453b之離開側, 並以TG 61與TD 53交界處之TD 53的導電帶1853作為參考點。在此處所 說明的範例中,能障高度於電子84之能級以下,並因而未顯示於 第13圖中。能障2454]3與2453b兩者在過瀘、器52之導電帶内形成一能帶結構 以阻擋往後傳輸之電子84。 電洞75與76沿朝前方向34之傳輸路徑上係存在著兩個類似能障。一 第一電位能障42现是由TD 53形成,並且其進入側和離開側分別具有能障 高度41別與41’现。一第二電位能障42^是由BD54形成,並且其進入侧 和離開侧分別具有能障南度叫处與❿扑(圖中未顯示)。這兩個能障π饥 與42^兩者在過濾器52之價電帶内形成一能帶結構,並且具有阻擋往前傳 輪電洞75與76之效應。在第13圖中,能帶結構係以注入電洞之目的來作 偏壓。兩能障南度叫处與41’Mb皆位於往前傳輸電洞之能級以下,因而並 未顯示於第13圖中。 第14圖係顯示本發明之能障高度卫程學之於彈遵電洞注入的效應,其 顯示阻擋往後傳輸電子之能障高度2〇,5处與過渡器总之壓评^胃61與 0881-A31715TWF(5.0) 33 Ϊ287292 BG 62間之電壓)間的關係,比起阻擋往前傳輸能障高度41撕與過濾器52 遂降間的關係’乃較微弱。因此可藉由過滤器52之跨壓,以不同程度改變 兩個能障高度20’5处與41Mb。如能障高度工程學内所作的說明,此能障高 度與電壓間的關係是非對稱,並主要由介電常數與介電質厚度之合併效應 (即「εΤ」效應)主導。可明白看出,當增加tg 61與BG 62間的外加電壓 時,阻擋TG 61内之電洞75與76的能障高度4154b會比可阻檔BG 62内之 電子84的能障高度20,54b降低得快。事實上,當外加電壓為+3·5ν時,能 障高度41Mb轉移至電洞能量之下(即能障高度等於零),然而此時能障高度 20、卻仍維持在約+2.5 eV之足夠能障高度。第13圖顯示外加電壓增加至 超越此電壓位準之情況下的能帶圖。如第13圖所示,當外加電壓增至超越 此電壓位準時,阻擋電洞75與76的第二能障42Mb現在位於電洞能量之下。 因此,TG 61内電洞75與76可直接傳輸通過過濾器52而不被BD 54層阻 擋。在此電壓範圍内能障南度20’54b與外加電壓間微弱得多的關係將控制電 子84之能障245%維持住,因而能避免電子往後傳輸。 以上第14圖所作之說明係用作一範例,以呈現兩能障高度2〇,5你與41地 與電壓間的關係。可輕易地對第13圖内過濾器52之其他的能障高度(例如 能障24饥與42饥分別具有的能障高度20伽與41,训)進行同樣的說明。因 此可明白瞭解,控制往後傳輸電荷載子之電位能障的能障高度與過濾器跨 壓之間的關係,比起控制往前傳輸電荷載子之電位能障的能障高度與過濾 器跨壓之間的關係’會較為微弱。 雖然圖中並未顯示,當TG 61與BG 62間的電壓極性設定於作彈道電 洞注入時,過濾器52亦提供電壓分割功能。此供彈道電洞注入使用之電壓 分割功能減少過濾器52内介電質之壓降,並且主要是由與第12B圖針對彈 道電子注入之相關描述相似的效應來主導。就彈道電洞注入而言,由於電 壓在說明中較高,因此電壓分割功能藉由減少過濾器内介電質之電壓而能 減少介電質之壓降,從而避免介電質擊穿問題。 0881-A31715TWF(5.0) 34 ⑧ 1287292 因此’此處概的鱗4學觀念實際上能為彈道電荷注人提供可電 性修改過義之猶綠。此過顧觸之處麵能過雜枝要的載子 (比方是往後傳輸的載子)卻不影響到想要載子的傳輪(比方是往前傳輸的載 子)0 依據本發日f ’猶器52更提供另—種職功^這樣的過瀘、功能允許 .具某極性且f量較輕之電荷載子(例如LH)能通器,以及阻播具相反 -極性且f量較重之電絲子⑽如_穿過。因此,喊器52提供-種質量 過濾功能,即能根據過據載子之質量以對電荷載子之流動進行過濾。 • 第15圖係用以說明過濾器52之質量過遽功能的基礎。可參考第13圖 以對此質量磁魏歧佳掌握。衫13 _示之賴—過蘇系統% 中,導體61係供應常溫電荷載子(Ljj 75與冊%。過濾器52與導體& 相接觸,並包括介電質53與54以提供對某極性電荷載子75與76(正電荷 載子)之過滤功能,其中過濾器52係包括可電性修改之電位能障42现與 42^,以控制>^某-方向(朝前方向34)通過過滤器%之某極性電荷載子乃 與76之流動。 人們已知,在量子力學理論内,電荷載子之穿隨機率係其質量之函數, # 並且較重載子(例如冊76)之穿隧機率低於較輕載子(例如LH 75)之穿隧機 率。第15圖係顯不計算而得之LH與冊的正規化穿隧機率 ;T^eling Pr〇bab卿),並且係繪示為心倒數的函數,以說明過濾、器52之 . 質$過遽功能。在此說明中,過濾器52係假定為包括由厚度為3奈米之氧 -錄構成之TD «,以及由厚度為2奈米之氮化物構成之BD %。就彈道電 洞注入所使用之TG 61與BG 62間的電壓範圍(+5V至+6V)而言,圖中顯 不’HH之穿隧機率係低於LH之穿隧機率約4到8個數量級。這種因載子 質篁所導致之穿隨機率差異允許過渡器52能施行質量過渡功能。雖然在此 疋以電洞載子來作說明,類似、的說明可輕易地推衍至其他具有相同,極性但 相異質篁之載子(舉例來說,如第17B與17C圖之相關描述中的壓電電子)。 〇881-A31715TWF(5.0) 35 (S) 1287292 此質量過濾功能是過濾器52所提供過濾功能之另一實施例。"The valence band offset of BG 62 and tD 53帛 under the condition of 疋平 can bring the ribs to the electron injection during the electron injection period and can be expressed as L. The above formulas (1) and (7) can be understood that The height of the barrier is 2〇54(ΔΦ”) and the height of the barrier is 41« (the relationship between the two is different. The relationship between the voltage and the voltage is asymmetric) and depends mainly on the dielectric constant and the dielectric constant. The combined effect of the thickness of the electrical material (ie, the "ε τ effect"). Figure 12 shows an example of a highly engineering concept of energy barriers using the above principles to perform ballistic electron injection. It can be clearly seen that when the buckle 61 and When the voltage is applied to 62, the height of the electron barrier in the TG61 is 2〇54 (secret), which is faster than the barrier height of the LH 72 and ΗΗ73 in the BG 62 = 3 (δφ). Above, when the applied voltage is about 1·5'ν, the energy barrier height 2〇54(ΔΦ−) is transferred to the Fermi level (ie, the energy barrier height is equal to zero), however, 0881-A31715TWF(5.0) 27 8 1287292: At this time, the energy barrier height is 4153 (ΔΦ"), but it is still maintained at a sufficient energy barrier height of about 丄 (4). Reduce the energy band diagram beyond the voltage level. As shown in the figure (7), when the applied voltage falls below this voltage level, the second potential of the blocking electron 56 in the U-shaped sub-potential energy barrier The 2454 is now located below the Fermi level 1601. Therefore, the electrons 56 in the TG 61 with energy above the threshold energy 58 can be transmitted directly through the filter 52 without being blocked by the BD 54. This allows a conductor-filter system The belt of 59 injects electrons moving in the forward direction 34 and having a tightly dense energy distribution 57 through the filter function. In this voltage range, the relationship between the energy barrier height 4153 (Δφ^σΓ) and the applied voltage is much weaker. The second hole potential energy barrier ♦ 4153 (Δφ^-π), which avoids the transmission of holes later, is thus maintained. Therefore, the energy barrier engineering concept described herein can actually provide electrical conductivity for ballistic electron injection. Modify the filter construction method. This filter is unique in that it can filter out unwanted carriers (such as LH 72 and ΗΗ 73 transmitted later) without affecting the transmission of the desired carrier (for example, forward) The transmitted electrons 56). The above statements about formulas (1) and (2) The results shown in Fig. 12 are taken as an example to show the relationship between the energy barriers 2〇54 and 4Ι54 and the voltage. Other energy barrier heights of the filter 52 in Fig. 11 can be easily applied (e.g. The energy barrier heights 24〇, 53 and 20'54 of the energy barrier 24% and 24μ, and the energy barrier heights 41, 43 and 4153 of the second cavity potential energy barrier 42% are the same ρ description. It is understood that the relationship between the energy barrier height of the potential energy barrier for controlling the transmission of the charge carriers and the filter crossover pressure is weaker than the energy barrier height of the potential energy barrier for controlling the forward transmission of the charge carriers. Ρ4 is within the voltage range generally used for ballistic electron injection. It is hoped that the cross-pressure (Gd) of the BD 54 can be smaller than the energy barrier height of 4154. It is desirable to make the heart smaller than the barrier height 4154 because the first hole potential barrier 4254 in the BD54 region can be maintained as a trapezoidal band structure to more effectively block the LH 72 and HH 73 injected later. This energy barrier structure can be more clearly understood by referring to FIG. The figure shows that the barrier height 4154 forms the energy barrier height of one of the first hole potential barriers 4254 (the entry side of the holes 72 and 73), and the barrier height 41'54 forms the first hole potential barrier. The height of the barrier on the other side (the exit side of the holes 72 and 73). The trapezoidal first hole potential energy barrier 4254 is separated from 0881-A31715TWF(5.0) 28 1287292: the main item of the open side energy barrier height 41'54 is equal to ΔΦ', where ΔΦ^_ is still the energy barrier height' 41m. In the specific embodiment of the band structure shown in Fig. 10, when the applied voltage between #TG 61 and BG 62 is -4 V, the energy barrier height 41, 54 is about 〇JeV, and thus the potential of the first hole The trapezoidal structure of the barrier 4254 remains. As appreciated by the above principles, the energy barrier heights 41, 54 can be increased by optimizing the dielectric constant and thickness of the TD 53 and BD 54 _ to reduce & - For this particular embodiment, the voltage range of the TG 61 is selected to be relative to the voltage of the BG 62 - between -3.5V and about -4. 5v to effect ballistic electron injection. As can be seen in the description of Figures 3A, 3B and 3C, such a _ voltage can be further reduced by reducing the image energy barrier height 2〇 of the conductor-insulator system 6〇. This can be achieved by combining - between about IV and about 3V to CSR66. Alternatively, the image force potential barrier can be reduced by selecting the work function of the material of CSR 66 to be lower than the work function of BG 62 (or the Fermi level of BG62). Reducing the image power barrier to reduce the voltage between TG 61 and BG 62 is a desirable effect for the present invention. One of the main advantages is that it can reduce the electric field in the dielectric between TG 61 and BG 62, thus avoiding the problems associated with high electric fields in the dielectric (such as dielectric breakdown, which causes dielectric properties). Permanent damage). " According to another embodiment of the present invention, the filter 52 further provides a voltage splitting function. Voltage • The split function reduces the voltage drop across the dielectric in filter 52. Fig. 12B shows an example of the voltage division function using the above-described energy barrier high engineering concept to perform ballistic electron injection. Referring to Figure 12B, the relationship between the different dielectric cross-pressures and the cross-pressure of the filter 52 is shown. It is apparent that the filter, the crossover of the device 52, that is, the applied voltage between the TG 61 and the BG 62, is divided and shared by several regions in the filter 52. This voltage splitting function provided by the filter phantom allows the applied voltage between TG 61 and BG62 to be split and shared by bd 54 and TD53 without compromising ballistic charge injection. This voltage splitting function reduces the voltage that each dielectric of these dielectrics must suppress, thereby avoiding dielectric breakdown. One of the features of the present invention is the effect provided by the highly engineered concept of energy barriers and the equivalent of O881-A31715TWF(5.0) 29 1287292 • The practice of injecting into the filter. These effects provide voltage splitting and avoid dielectric breakdown problems that may occur during charge injection. In addition, the problem of impact detachment occurring in the TG 60 triggered by the transmission of charge carriers in the future is also effectively avoided by applying a filtering effect to suppress the backward injection of these carriers. • It will thus be appreciated that the filter and band structure described in the present invention can effectively block the transmission of a certain polarity charge carrier during ballistic charge 'Note', while allowing opposite polarity - charge carriers Transfer to. Thus, filter 52 provides a means of over-charging the charge stream "purified". Although not necessary, it is generally desirable that the Fermi level of the BG 62 is located in the center of the energy band gap of the BD 54 in the filter 52 under the condition of the flat band, so as to construct using the band structure and the injection mechanism. In the case of cells, the charge filtering mechanism can be utilized to the fullest extent. The above description of the ballistic charge injection and the highly engineered concept of energy barriers is for electronics. A similar description can be made of the mixed effects achieved by the light and heavy electricity charge. Figure 13 provides an energy band diagram illustrating the ballistic charge injection and effect of the holes in the charge injection system of Figure 1. In the conductor_passer system section shown in Fig. 13, the conductor 61 supplies the normal temperature charge carriers 75 and 76. The filter % is in contact with the conductor & and includes dielectrics 53 and 54 to provide a filtering function for charge carriers 75 and 76 (positive charge carriers) of a certain polarity, wherein the filter 52 has Electrically modified potential energy barrier 42 training and heart, to control; Che H (10) gift amount 34) through the brain 52 of the hybrid f rape 75 and 76 flow. In addition to controlling a polar charge carrier (positive charge carriers 75 and 76), filter 52 also includes an electrically configurable potential energy barrier and 24 tear to control substantially along one of the above directions. The flow in the opposite direction (backward direction 74) through the opposite polarity charge carriers (negative charge carriers, electrons 84) of the filter 52. This kind of jujube scale has a polarity of charge carriers transmitted along the _ front direction 34, and blocks 74 im 〇. "Purification" charge flow charge filtering function. This charge filtering function is provided by the transitioner 52 as a further embodiment of the 0881-A31715TWF (5.0) 1287292: and is similar to the charge filtering function of the description associated with Figure 1G. Referring to Fig. 13, it is shown that LH75 and 76 are located in the valence band of tg6i, and the charge 虬Η 75 and HH76 used as injections are shown to have an energy distribution 77 and are transmitted along the forward direction 34. Although H. 75 and ΗΗ 76 have the same energy distribution in the figure, however, they have no _ effective mass, _ can have no _ energy score _ cloth 0 • • In Fig. 13, LH75 and ΗΗ76 two All use the quantum mechanical transmission mechanism to transmit the energy barrier through the filter 52 to become LH75, and 76. LH 75, in contrast to HH W, has a kinetic energy 46, and this kinetic energy 46 is slightly higher than the energy barrier height 41 of an image energy barrier. When these carriers continue to travel in the forward direction, the transmission behavior in the BG 62 is greatly different due to the difference in effective quality. As far as jjjj% is concerned, the average free path can be very short because its effective mass I is heavier. Therefore, Book 76 is susceptible to scattering events with other particles (such as phonons), resulting in low ballistic transmission efficiency (Ballisticity). In Fig. 13, HH 76, which is experiencing a scattering event and thus loses energy, becomes HH 79. Furthermore, it is also shown that these scattered hh 79 have an energy distribution 81 which is wider than the original energy distribution 77 due to scattering. These holes 79 are transmitted in the figure at an energy level of less than 40, which is an energy barrier of 64 in the price band 4464 of the 64 • price band 4464, and thus are blocked from being able to pass the energy barrier 42 and cannot enter. CSR 66. On the contrary, LH 75 has a lighter effective and quality, so its mean free path is longer than HH 76, and the average free path is long (for example, in 矽^, the average free path of LH is about HH mean free path. three times). In one case, a portion of this kt plant '-hole LH 75' can be transmitted by kinetic energy 46 through BG 62 without scattering (meaning ballistic transmission), and then at the junction of BG 62 and RD 64 LH 78. This type of LH 78 (called "ballistic LH") does not experience scattering events with other particles (such as phonons), thus retaining kinetic energy and impulses along the original direction of travel (M〇mentum), and its energy distribution 80 is the same as the original The energy distribution 77 is similar. In another case, the LH 75 can pass through the BG 62 with partial ballistic transmission, and its kinetic energy 46 can still be maintained high enough to maintain the direction of the boundary between bg 62 and RD 64. 0881-A31715TWF (5.0) 31 8 1287292 'Into, then become LH 78. In all cases, this type of LH 78 utilizes the mechanism described in relation to Figure 6 to overcome the energy barrier height 41 of the image force potential barrier of 42 m, and enters the rainbow > 64 price band 44 and proceeds all the way into The energy distribution 80, LH78, is finally collected by CSR66 and becomes a hole 82 in the valence band 4466. This process of forming and injecting holes (whether using ballistic transmission or partial ballistic transmission) is called the ballistic hole injection mechanism - Injectkm Mechanism. The injection efficiency of such holes (defined as the ratio of the number of carriers collected to the number of carriers supplied) is typically between ΙΟ·6 and ΗΓ3. This injection mechanism can be further improved by injecting a piezoelectric hole (Piezo-Holes) (see the piezoelectric ballistic hole injection mechanism described in Figures 17B and 17C). For a particular embodiment of the materials described in connection with systems 59 and 60 using the first drawing, the voltage range of TG 61 is selected to be between +5V and about +6 〇v relative to the voltage of BG 62 to effect ballistics. Hole injection. Such a voltage can be further reduced by reducing the image energy barrier 41 of the conductor-insulator system 60 as described in relation to Figure 6. For example, this can be accomplished by coupling a voltage between about 3V and about a IV to the CSR 66. Alternatively, the image energy barrier can be reduced by selecting CSR 66 as a material having a smaller work function (or a higher Fermi level) than BG 62. φ By using materials having similar Fermi level to form TG 61 and BG 62, the applied voltage between TG 61 and BG62 can be further reduced. This constitutes another embodiment of the material used for the ballistic hole injection, a filter system 59 and the conductor-insulator system 60. For example, the filter 52 may include a P+ polycrystalline stone constituting TG 61, an oxide layer constituting jd 53, a nitride layer constituting BD 54, and a P+ polycrystalline stone constituting bg 62. The layers, and - constitute the oxide layer of RD64. Such an embodiment allows the voltage of 361 (with respect to the voltage of β (} 62 to be selected in a small voltage range when performing ballistic hole injection (for example, about +4·5 v to about +5.5 V). Figure 13 further shows that while the band structure is biased for transmission in the forward direction 34, the electron spines in the conductive strip_ of the BG 62 can be 0881-A31715TWF along the new rear direction % ( 5.0) 32 1287292 Transmission. This subsequent transmission of electrons 84 can cause problems such as impingement of the TG 61, waste of current and power, etc. These problems are similar to those caused by the transmission of holes later in the description of Figure 10. Therefore, it is desirable to be able to block the electrons 84 by the filter 52 so that it cannot be transported backwards into the band structure of the TG6. Figure 13 shows that the carrier (ie, the electron 84) that is transmitted later must be transported more than the carrier ( That is, LH 75 and HH 76) traverse a large number of energy barriers. The first block to transmit electrons 84 is a potential energy barrier 24, and the entry and exit sides have energy barrier heights of 2〇5413 and 2〇, respectively. 54b. These two energy barriers are 20^1^20^, which are the conductive belts at the junction of BD 54 and BG 62. And the conductive strip I854 at the junction of TD 53 and BD 54 serves as a reference point. The figure shows that the second electron barrier 245% of the entry side has an energy barrier height of 205% and forms another barrier hole 84. The energy barrier south degree 2〇53!3 is the reference point of the TD 53 conductive strip 1853 at the junction of TD 53 and BD 54. The energy barrier height 20'53b (not shown) exists on the exit side of the energy barrier 2453b. And the conductive strip 1853 of the TD 53 at the junction of TG 61 and TD 53 is used as a reference point. In the example illustrated here, the energy barrier is higher than the energy level of the electron 84, and thus is not shown in FIG. The energy barriers 2454] 3 and 2453b form an energy band structure in the conductive strip of the damper 52 to block the electrons 84 that are transported backward. The holes 75 and 76 are in the forward direction 34. Two similar energy barriers. A first potential energy barrier 42 is now formed by the TD 53 and has an energy barrier height 41 and a 41' respectively on the entry side and the exit side. A second potential energy barrier 42 is determined by the BD 54 Formed, and its entry side and exit side respectively have an energy barrier south and a slap (not shown). Both π hunger and 42^ form an energy band structure in the valence band of the filter 52, and have the effect of blocking the forward-passing holes 75 and 76. In Fig. 13, the band structure is injected. The purpose of the hole is to be biased. The two energy barriers and the 41'Mb are located below the energy level of the forward transmission hole, and thus are not shown in Figure 13. Figure 14 shows the energy of the present invention. The obstacle height is called the effect of the bomb hole injection. It shows that the height of the energy barrier that blocks the electrons transmitted backward is 2〇, and the 5th and the transitional device are generally evaluated. ^ stomach 61 and 0881-A31715TWF (5.0) 33 Ϊ 287292 BG 62 The relationship between the voltages is weaker than blocking the relationship between the forward energy barrier height 41 tearing and the filter 52 遂 drop. Therefore, the two energy barrier heights 20'5 and 41Mb can be changed to different degrees by the pressure across the filter 52. As explained in the high-impact engineering, the relationship between the barrier height and the voltage is asymmetric and is dominated by the combined effect of dielectric constant and dielectric thickness (ie, the "εΤ" effect). It can be seen that when the applied voltage between tg 61 and BG 62 is increased, the barrier height 4154b of the holes 75 and 76 in the blocking TG 61 is higher than the barrier height 20 of the electrons 84 in the blocking BG 62. 54b is lowered faster. In fact, when the applied voltage is +3·5ν, the energy barrier height of 41Mb is transferred to the hole energy (ie, the energy barrier height is equal to zero), but at this time the energy barrier height is 20, but it is still maintained at about +2.5 eV. The height of the barrier. Figure 13 shows the band diagram when the applied voltage is increased beyond this voltage level. As shown in Fig. 13, when the applied voltage is increased beyond this voltage level, the second energy barrier 42Mb of the blocking holes 75 and 76 is now under the hole energy. Therefore, the holes 760 and 76 in the TG 61 can be directly transmitted through the filter 52 without being blocked by the BD 54 layer. A much weaker relationship between the energy barrier 20'54b and the applied voltage in this voltage range maintains 245% of the energy barrier of the control electronics 84, thereby preventing electrons from being transmitted later. The description made in Figure 14 above is used as an example to show the relationship between the two barrier heights 2〇, 5 and 41 and the voltage. The same can be easily explained for the other barrier heights of the filter 52 in Fig. 13 (e.g., the energy barrier heights of 20 gamma and 41 hunger, respectively). Therefore, it can be understood that the relationship between the energy barrier height of the potential energy barrier for controlling the transport of the charge carriers and the filter crossover pressure is compared with the energy barrier height and the filter for controlling the potential energy barrier of the forward charge carrier. The relationship between the pressures will be weaker. Although not shown, the filter 52 also provides a voltage splitting function when the voltage polarity between the TG 61 and the BG 62 is set for ballistic hole injection. This voltage splitting function for ballistic hole injection reduces the voltage drop across the dielectric in filter 52 and is primarily dominated by effects similar to those described in Figure 12B for ballistic electron injection. In the case of ballistic hole injection, since the voltage is higher in the description, the voltage division function can reduce the dielectric drop by reducing the voltage of the dielectric in the filter, thereby avoiding dielectric breakdown. 0881-A31715TWF(5.0) 34 8 1287292 Therefore, the concept of scales in this case can actually provide the electrical modification of the ballistic charge. This over-the-top surface can pass the hybrid carrier (for example, the carrier transmitted later) but does not affect the carrier that wants the carrier (for example, the carrier transmitted forward). Day f 'Juss 52 provides another kind of job ^ This kind of over-the-counter, function allows. A chargeer with a certain polarity and a light amount of f (such as LH), and a reverse-polarity The wire with a heavier amount of f (10) passes through _. Therefore, the snooper 52 provides a quality filtering function that filters the flow of charge carriers based on the mass of the carrier. • Figure 15 is a diagram to illustrate the basis for the quality of the filter 52. Refer to Figure 13 for the mastery of this quality magnetic Wei Qijia. In the shirt 13 _ 示之赖-% of the system, the conductor 61 is supplied with a normal temperature charge carrier (Ljj 75 and the volume %. The filter 52 is in contact with the conductor & and includes dielectrics 53 and 54 to provide The filtering function of polar charge carriers 75 and 76 (positive charge carriers), wherein the filter 52 includes an electrically configurable potential energy barrier 42 and 42^ to control >^ a-direction (frontward direction 34) Passing a certain number of polar charge carriers through the filter is a flow with 76. It is known that in quantum mechanics theory, the random rate of charge carriers is a function of its mass, # and heavier carriers (eg, 76) The tunneling rate is lower than that of lighter carriers (such as LH 75). Figure 15 shows the normalized tunneling probability of LH and the book; T^eling Pr〇babqing), And it is shown as a function of the reciprocal of the heart to illustrate the filter, the quality of the device. In this description, the filter 52 is assumed to include a TD « consisting of an oxygen-record having a thickness of 3 nm, and a BD % consisting of a nitride having a thickness of 2 nm. For the voltage range between TG 61 and BG 62 used for ballistic hole injection (+5V to +6V), the tunneling rate of 'HH shown in the figure is about 4 to 8 than that of LH. Magnitude. This difference in the random rate of wear caused by the carrier mass allows the transitioner 52 to perform the mass transition function. Although a hole carrier is used here for illustration, a similar description can be easily derived to other carriers having the same polarity but different heterogeneity (for example, as described in Figures 17B and 17C). Piezoelectric electronics). 〇881-A31715TWF(5.0) 35 (S) 1287292 This mass filtering function is another embodiment of the filtering function provided by the filter 52.

過濾器52之質量過濾功能以及其於LH傳輸上之應用為本發明帶來幾 項爻到希望之利益。舉例來說,這種質量過濾功能可以避免TG 61内用作 彈道注入之供應載子被浪費掉。原因是1(}61内大部分的電洞載子是, 而HH由於具有較短的平均自由路徑,因此在傳輸通過BG泣期間容易經 歷散射事件。這樣的HH無法有效率地對彈道注入作出貢獻,從而當用作 供應載子時會被浪費掉。由於糊猶器52所提供_量過濾功能來渡除 掉HH,主要的供應電荷_限定為LH載子而已。LH載子具有較長的平 均自由路徑,因此當經由第13圖相關描述之機制來傳輸通過bg62時,能 夠較有效軸解雜人作錄。結果,過顧52之質量賴功能所提供 的特徵在於魏選取具有高料性_驗邮之電荷載子作為供應載子, 從而避免低彈道性載子於供應電流上之浪費。 導體-過濾器系統59之過濾器52提供數種獨特的過滤特徵。此過遽 器52提供如第7圖之相關描述中的帶通過濾、功能,第ΐ()、μ、13,以及 14圖之相關描述中的電荷過濾功能’以及第15圖之相關描述中的質量過滤 =能。除了提供過遽功能之外’如第12B圖之相關描述所言,過遽器^更 提供-種電壓分割魏。具本領域之通倾術者#刊白,當麵本揭露 時,若對過攄器之介電質和/或結構加以修改,以藉其來個別地或統 口 h改上逑之功能’仍屬於本發日月之範鳴。舉例來說,過滤器可包含兩 介電f以提升其電壓分割功能。此外,不須要求過濾器之介電質 學f ’而可允許當中之化學元素在有效支持這些功能下作 丨而p ,、、〃,了朗’本發日脸不受限於此處所描述者以及上述實施 歹’ ’而涵蓋任何落於附加申請專利範圍之所有變化。 現在’請轉向參考第16圖。第16圖係提供本 铲 、’、"之1帶結構相同。此差異點在於此能_當中的BG62並非 〇881-A31715TWF(5.〇) ⑧ 36 1287292 =半導體為材料,而以具有功函敝功函數具有一費米能階—之金屬為 t料,比方是第!圖相關描述中用作導體之材料。第16圖還顯示tg6i之 仏電帶4461内的電荷載子,即電^6,LH75,以及冊%,如同第了、以 ,ίο圖之相關描述,藉由施加適當大小與極性之電壓至TG 61與bg泣, 讀電子56被過濾器52過滤並注射在CSR 66上。類似地,如同第i4、 ” 13圖之描述’藉由施加適當大小與極性之電廢至丁⑽與b⑽,^㈣ 與HH 76被過濾器52過濾並注射在CSR恥上。 #在上職於彈道電荷注人所使耽帶結構之實補巾,bg &形成彈道 電荷傳輸之主騎,並且為了猶_荷載子能以良好速轉越它,B⑽ 的厚度普遍上需要低於電荷載子之平均自由路衝典型上約為1〇奈米至邡 不米)之幾倍。在要求BG 62層的厚度如此低下,不可避免地導致BG 62具 有較南的片電阻,並因而導致1(:應用之基本問題。舉例來說,在大r與大 c兩效應結合下,這可導致大的訊號延遲(即所謂的rc延遲卜這在單元操 作中尤其成為主要的問題,原因是此延遲可能限制一大型記憶陣列中記憶 單元的存取速率。第二,為了避免未選取的記憶單元受到干擾,通常需要 -組理想的外加碰施加到那些未選取的單元上。然而,由於受到此延遲 的影響’未選取單元上的電麼可能和欲達成的電廢值不^,結果單元干擾 較容易發生。此外,大R值可能與一大電流〗結合而產生m效應。當一電 縣-訊絲帽猶,此!r效應會導致電壓下降,從而使—記憶單元中 所指定的電極無法到達所欲達成的位準,結果是對單元操作產生負面影 響。舉例來說’ IR效應對一未選取的單元的影響可能是產生干擾,因此未 選取的單元會非刻意地從一邏輯態(比方是「〇」)轉換為另一狀態(比方是 「1」)。而IR效應對受選取單元的影響則可能是減緩單元的操作(比方是編 程、抹除,以及讀取操作)速率。 然而,上述問題,皆可利用以下所述之壓電效應來獲得克服。 壓電效應於彈道電荷注入上之應用 0881-A31715TWF(5.0) 37 ⑧ 1287292 壓電效應(Piezo-effect)是固態物理内廣為人知的物理現象。在一機械應 • 例施加於一半導體材料時,壓電效應可改變該半導體材料的電性(參見Pikus 和 Bir 所者之 Symmetry and Strain-Induced Effects in Semiconductors,New - York: wiley,1974)。此機械應力可能起源於該半導體材料内部或外部的一個 • 應變源(亦稱作「應力供應者(stressor)」)。這種機械應力可能是以壓縮 r (ComPressive)型式出現(Compression),也可能是以張力的型式出現 • (tensi〇n) ’並能在材料内導致一種應變(Strain)。它破壞晶格内的對稱性,因 此使晶格内的電位變形。一些壓電效應於半導體(比方是石夕)内的著名應用包 籲 括電阻内的塵電電阻效應、雙極電晶體(Bipolar transistors)和二極體内的壓 電接面效應(Piezo-Junction Effect),感測器内的壓電霍爾效應(Piez〇Hall Effect),以及MOS電晶體(「MOSFETS」)内的壓電場效電晶體(Piezo-FETs)。 本發明更提供壓電效應於彈道電荷載子注入與傳輸上的應用。以下將 利用許多不同的記憶單元與半導體裝置之實施例以提出一種新的壓電彈道 電荷注入機制。 壓電彈道電荷注入機制 • 人們已知當一應變出現在一半導體内時,它可能會使導電帶的能谷與 存在於HH和LH價次電帶之簡併(Degeneracy)分離(請參考Hensel et al., . "Cyclotron Resonance Experiments in Uniaxially Stressed Silicon: ValenceThe quality filtering function of filter 52 and its application to LH transmissions bring several benefits to the present invention. For example, this mass filtering function prevents the supply carriers used for ballistic injection in the TG 61 from being wasted. The reason is that most of the hole carriers in 1(}61 are, and HH has a short average mean free path, so it is easy to experience scattering events during transmission through BG. Such HH cannot efficiently make ballistic injection. Contribute, so that it will be wasted when used as a supply carrier. The main supply charge_ is limited to the LH carrier due to the _ amount filtering function provided by the cloister 52. The LH carrier has a longer length. The mean free path, so when transmitted through bg62 via the mechanism described in Figure 13, the more effective axis can be used to record the miscellaneous. The result is that the quality of the function of 52 is characterized by the fact that Wei has a high material. The charge carriers are used as supply carriers to avoid waste of low ballistic carriers on the supply current. The filter 52 of the conductor-filter system 59 provides several unique filtering features. Providing the charge filtering function in the related description of the band passing filter, function, the third (), μ, 13, and 14 figures in the related description of Fig. 7 and the mass filtering in the related description of Fig. 15 In addition to mentioning In addition to the over-the-top function, as described in the related description of Figure 12B, the over-the-counter ^ provides a voltage-dividing type of Wei. It has a white-leaf in the field, and when it is revealed, if it is over The dielectric and/or structure of the device is modified to use it to change the function of the device individually or in a way that is still a fan of the date of the month. For example, the filter can contain two dielectrics f In order to improve its voltage division function, in addition, it is not necessary to require the dielectric chemistry of the filter, and the chemical elements in the middle can be allowed to effectively support these functions while p, ,, 〃, 朗's face It is not limited to the ones described herein and the above-described implementations, and all changes that fall within the scope of the appended claims are covered. Now, please turn to refer to Figure 16. Figure 16 provides the shovel, ', " The band structure is the same. The difference is that the BG62 is not 〇881-A31715TWF(5.〇) 8 36 1287292 = the semiconductor is the material, and the metal having the work function and the work function has a Fermi level - t material, for example, the material used as a conductor in the description of the figure. Figure 6 also shows the charge carriers in the electric strip 4461 of tg6i, that is, the electric ^6, LH75, and the book %, as described in the first, the, ίο diagram, by applying the appropriate size and polarity voltage to the TG 61 and bg weep, the read electron 56 is filtered by the filter 52 and injected on the CSR 66. Similarly, as described in the figure i4, "13" by applying an appropriate amount of electricity and polarity to the D (10) and b (10), ^ (4) The HH 76 is filtered by the filter 52 and injected on the CSR shame. #在上职上的球道充电注人的带带结构的补巾, bg & forming the main ride of ballistic charge transmission, and for the _ The loader can turn at a good speed over it, and the thickness of B(10) generally needs to be several times lower than the average free path of the charge carrier, which is typically about 1 〇 to 邡. When the thickness of the BG 62 layer is required to be so low, BG 62 is inevitably caused to have a souther sheet resistance, and thus leads to 1 (the basic problem of application. For example, in combination with the large r and large c effects, this This can lead to large signal delays (so-called rc delays), which is especially a major problem in unit operations, since this delay may limit the access rate of memory cells in a large memory array. Second, to avoid unselected The memory unit is disturbed, and it is usually required that the ideal set of external touches is applied to those unselected units. However, due to the influence of this delay, the power on the unselected unit may not be the result of the electrical waste value. Unit interference is more likely to occur. In addition, the large R value may be combined with a large current to produce the m effect. When a power county - the wire cap is still, this !r effect will cause the voltage to drop, thus making the - memory unit specified The electrode cannot reach the desired level, and the result is a negative impact on the unit operation. For example, the effect of the IR effect on an unselected unit may be interference. This unselected unit will be deliberately converted from a logical state (such as "〇") to another state (such as "1"). The effect of the IR effect on the selected unit may be the operation of the slowing down unit ( For example, programming, erasing, and reading operations). However, the above problems can be overcome by using the piezoelectric effect described below. Application of piezoelectric effect to ballistic charge injection 0881-A31715TWF(5.0) 37 8 1287292 Piezo-effect is a well-known physical phenomenon in solid state physics. When a mechanical application is applied to a semiconductor material, the piezoelectric effect changes the electrical properties of the semiconductor material (see Pikus and Bir). Symmetry and Strain-Induced Effects in Semiconductors, New York: Wiley, 1974. This mechanical stress may originate from a strain source (also known as a "stressor") inside or outside the semiconductor material. This mechanical stress may occur in a Compressive (ComPressive) version or in a tensioned form ((tensi〇n)' and can cause a Strain, which destroys the symmetry in the crystal lattice, thus deforming the potential in the crystal lattice. Some piezoelectric effects in semiconductors (such as Shi Xi) are well-known applications that include the dust electric resistance effect in the resistor. , Bipolar transistors and Piezo-Junction Effect in the diode, Piezo〇Hall Effect in the sensor, and MOS transistor (" Piezoelectric field effect transistors (Piezo-FETs) in MOSFETS"). The invention further provides the application of piezoelectric effect to ballistic charge carrier injection and transmission. Embodiments of many different memory cells and semiconductor devices will be utilized below to propose a new piezoelectric ballistic charge injection mechanism. Piezoelectric Ballistic Charge Injection Mechanism • It is known that when a strain occurs in a semiconductor, it may separate the energy valley of the conduction band from the degeneracy of the HH and LH valence bands (see Hensel Et al., . "Cyclotron Resonance Experiments in Uniaxially Stressed Silicon: Valence

Band Inverse Mass Parameters and Deformation Potentials, Phys. Rev. 129, pp. 1141-1062”,1963)。第17A、17B和17C圖係分別提供一半導體無應變時、 在張應力(Tensile Stress)下,以及在壓縮應力(Compressive Stress)下,能量E 與衝量向量(momentum vector) k 之間的色散關係(Dispersion Relationship)示 意圖。 第17A圖係顯示一無應變半導體之色散關係。圖中顯示電子85填在一 左能谷86與一右能谷87兩個導電帶能谷中,而導電帶能谷86與87分別 0881-A31715TWF(5.O) 38 1287292 -具有最小值86瓜與87m。圖中顯示最小值86m與87m係位於相同之能級。 .由於圖中顯示出能谷之色散曲線具有不同的曲率,左能谷86m内電子的有 效質量較右能谷87m内電子的有效質量重。圖中亦顯示LH次能帶邰與 • 1111次能帶89兩色散曲線,兩者皆填滿了電洞90。LH次能帶88與HH次 . 能帶89在圖中一價電帶最大值52上具有能量簡併現象。導電帶最小值86m • 或87m與價電帶最大值91之間係以一能帶間隙92來隔開。 一 第17B圖係顯示與第PA圖類似的色散關係,然而半導體因受到張應 力而發生應變。導電帶能谷發生最小值一個往上(左能谷86)或一個往下(右 • 能谷87)的偏移現象,結果這兩個能谷内的電子總數會重新分佈。其中右能 谷87會聚集較多電子85,因其導電帶最小值87m之能級較低。電子朽重 新分佈而大多聚居於能谷42是受到希望之現象,原因有二。第一,由於導 電能谷87内的電子之有效質量較輕,因此能在半導體内產生對電子傳輸有 益的效應。第二,已知能谷分離能夠減少能谷間電子散射現象。這些效應 可利用矽來作具體說明。發生於石夕内的應變通常會導致具有六摺簡併 的導電帶分解為兩摺簡併與四摺簡併的能谷,其中大部分電子(將近百分之 百的總電子數)聚居於電子傳輸方向之有效質量較輕的兩摺簡併能谷内。已 φ 知此應變效應在應變_M0SFET (—種壓電場效電晶體,可參見v〇gelsang et al·,"Electron Mobilities and High-Field Drift Velocity in Strained Silicon - on Silicon-Germanium Substrate" ? IEEE Trans, on Electron Devices, pp. — 2641 -2642,1992)内會增加50%的電子遷移率(Mobility)以及釣16 %的飄移 速率(Drift Velocity)。可運用類似的應變效應來使彈道電荷載子傳輸提昇。 因此,矽内的彈道電子注入效率可能因電子重新聚居於兩摺簡併能谷内而 有所提升。這可藉由施加應力於矽上以引起沿電子傳輸方向之應變來達 成。因此可明白得知,壓電效應可導致緊密聚居的「壓電」電子(即受機械 應力之材料内的電子),而此壓電電子具有較輕的質量與較低的散射比率。 依據本發明之一個實施例,在將這些效應與彈道電子傳輸結合時,能提供 0881-A31715TWF(5.0) 39 ⑧ 1287292 • 一種壓電彈道電子注入機制。 雖然圖中並未顯示’然這樣的壓電電子可以用作第9圖與第10圖所示 能帶結構之供應電子而經歷其中描述之傳輸過程。 第17B圖亦顯示出半導體内張應力所產生的應力效應亦可解除次價能 帶88與89之簡併性,當中LH次能帶咫顯示為往上偏移,而jjh次能帶 89則顯不為往下偏移次能帶挞之最大值8郎的能級顯示為高於第i7A 圖内價電帶之最大值91的能級。而hh次能帶89之最大值89p的能級則 顯不為低於17A圖内價電帶之最大值91的能級。在具有此效應與導電帶能 谷87往下偏移而連帶其最小值87m往下偏移之這兩個效應下,能帶間隙 93可能比第17A圖無應變情況的能帶間隙92窄。以矽為例,對受張力而 應變的石夕層(比方是在一 SiuGex層上形成一矽層)而言,若鍺的莫耳比例X 約為30 %時’矽内具兩摺簡併度的能級可能會往下偏移約〇18eV,而LH 簡併則可能會往上偏移約〇.12ev。如此會產生約為〇.8eV之能帶間隙93。 更者’圖中顯示一 LH與HH能帶分離現象發生於LH次能帶88之最大值 88p與HH次能帶89之最大值89p之間。此能帶分離現象是移除LH與HH 簡併性所造成之效果,並具有減少LH與HH次能帶間散射作用之效果。此 外,次價能帶的形狀改變能減少輕電洞的有效質量。結果,一應變半導體 内彈道輕電洞之平均自由路徑可能較一無應變半導體内彈道輕電洞之平均 自由路徑來得長。 第17B圖亦顯示出,在LH次能帶88與HH次能帶89之簡併性解除 下,電洞90可能會從HH次能帶89重新聚居於LH次能帶88。事實上, 當矽受到張應力而作應變時,LH次能帶内的電洞總數可能會增加20 %至 90 % (參見 Fischetti et al.,Journal of Appl· Physics,vol· 94, ρρ· 1079-1095, 2003)。此外,LH的散射比率已知遠比HH的散射比例低得多(參見Hinckley et al” “Hole Transport theory In Pseudomorphic Sii.xGex Alloys Grown on Si(001) Substrates,” Phys· Rev· B,41,ρρ·2912-2926,1990)。本發明之注入機 0881-A31715TWF(5.0) 40 1287292 •制進一步考慮到這些效應(譬如第13圖相關描述中之LH注入)。藉由將電 •洞由™次能帶重新分配至LH次能帶以注入「壓電」電 ^ 力之材料内的電洞)下,電洞注入效率能有所提升。這可藉由施加張應= . 電洞注入的源起區域來達成。在LH大量聚居並其具有較高彈道性下,當藉 • 由這樣的方法而將這些結合效應運用於彈道電荷注入上時,它能提供一種 * 賴電效應運用於彈道電荷注入之方法,而成為本發明另-壓電彈道電荷 , 注入機制之實施例。此方法藉由注入壓電彈道電洞(比方是LH)來提升彈道 電洞注入效率。 籲 帛17C圖係顯示與第17B醜似的色散關係,然此時導體因受到一壓 縮應力而發生應變。與上述之張應力類似,此壓縮應力可解除次價能帶88 與89的簡併性,然而方式與第17B圖相反。圖中顯示LH次能帶咫往下 偏移而HH次能帶89乃往上偏移。HH與LH簡併的解除仍減少LH與hh 電荷之間的能帶間散射事件(inter-band scattering)。由於次價能帶發生偏 移,圖中顯示大部分的電洞聚居於HH次能帶内。此外,圖中亦顯示,若 與第17A圖無應變的範例相比,次價能帶的曲率形狀改變。第17C圖中變 形的HH次能帶會降低重電洞的有效質量而使其變成較輕的電洞。結果, φ 在一應變半導體内,電洞(即壓電電洞)的平均自由路徑較無應變半導體内電 洞的平均自由路徑為長。此效應係提供本發明另一壓電彈道電荷注入機制 之實施例。 ”人們已知,對一簡併性被解除之次價能帶内的電荷而言,其有效質量 之主要項(First order)能隨應力作線性偏移(參見Hensel et al.,“Cyclotron Resonance Experiments in Uniaxially Stressed Silicon: Valence Band InverseBand Inverse Mass Parameters and Deformation Potentials, Phys. Rev. 129, pp. 1141-1062", 1963). Figures 17A, 17B, and 17C provide a semiconductor without strain, under Tensile Stress, and Under the Compressive Stress, the Dispersion Relationship between the energy E and the momentum vector k. Figure 17A shows the dispersion relationship of an unstrained semiconductor. One left energy valley 86 and one right energy valley 87 are two conductive bands in the valley, while the conductive band energy valleys 86 and 87 are respectively 0881-A31715TWF (5.O) 38 1287292 - with a minimum value of 86 me and 87 m. The figure shows the smallest The values 86m and 87m are at the same energy level. Since the figure shows that the dispersion curve of the energy valley has different curvatures, the effective mass of electrons in the 86m of the left energy valley is heavier than the effective mass of the electrons within 87m of the right energy valley. It also shows that the LH secondary energy band and the 1111 energy band have two dispersion curves, both of which are filled with holes 90. The LH secondary energy band is 88 and HH times. The energy band 89 is in the figure. Energy degeneracy on the surface 86m • or 87m is separated from the valence band maximum 91 by a band gap 92. A 17B chart shows a dispersion relationship similar to that of the PA chart, but the semiconductor is strained by tensile stress. The lowest value of the energy valley is the upward shift (left energy valley 86) or one downward (right energy valley 87). As a result, the total number of electrons in the two energy valleys will be redistributed. More electrons 85 are concentrated, because the energy level of the conductive band is 87m, the energy level is lower. The electrons are redistributed and mostly concentrated in the energy valley 42 is a promising phenomenon for two reasons. First, due to the conductive energy valley 87 The effective mass of electrons is lighter, so it can produce beneficial effects on electron transport in semiconductors. Second, it is known that energy valley separation can reduce the phenomenon of inter-valley electron scattering. These effects can be specifically explained by using 矽. The strain usually leads to a six-fold degenerate conductive strip that decomposes into a two-fold degenerate and four-fold degenerate energy valley, in which most electrons (nearly one hundred percent of total electrons) are concentrated in the electron transport direction. The two-fold degenerate energy can be found in the valley. It is known that the strain effect is in strain _M0SFET (a piezoelectric field effect transistor, see v〇gelsang et al, "Electron Mobilities and High-Field Drift Velocity in Strained Silicon - on Silicon-Germanium Substrate" ? IEEE Trans, on Electron Devices, pp. — 2641 -2642, 1992) will increase the electron mobility (Mobility) by 50% and the drift rate (Drift Velocity) of 16%. Similar strain effects can be applied to enhance ballistic charge carrier transmission. Therefore, the ballistic electron injection efficiency in the crucible may be improved by the re-aggregation of electrons in the two-fold degenerate energy valley. This can be achieved by applying stress to the crucible to cause strain in the direction of electron transport. It is therefore clear that the piezoelectric effect can result in tightly packed "piezoelectric" electrons (i.e., electrons in a material that is subject to mechanical stress) that have a lighter mass and a lower scattering ratio. In accordance with an embodiment of the present invention, when these effects are combined with ballistic electron transport, it is possible to provide 0881-A31715TWF (5.0) 39 8 1287292 • A piezoelectric ballistic electron injection mechanism. Although the figure does not show that such piezoelectric electrons can be used as the supply electrons of the energy band structure shown in Figs. 9 and 10, the transmission process described therein is experienced. Figure 17B also shows that the stress effect caused by the tensile stress in the semiconductor can also remove the degeneracy of the subvalent energy bands 88 and 89, where the LH secondary energy band is shown as an upward shift, while the jjh secondary energy band is 89. The energy level of the maximum value of 8 lang which is not offset downward is shown to be higher than the maximum value of 91 of the valence band in the i7A figure. The energy level of the maximum value of 89p of the hh sub-band 89 is not lower than the maximum value of 91 of the valence band in the 17A chart. Under the two effects of having this effect offset from the conductive band energy valley 87 with its minimum value of 87 m downward, the band gap 93 may be narrower than the band gap 92 of the unstrained condition of Fig. 17A. Taking 矽 as an example, for a tension-strained shoal layer (for example, forming a 矽 layer on a SiuGex layer), if the 莫 molar ratio X is about 30%, the 矽 has a two-fold defect. The energy level of the degree may be offset by approximately e18eV, while the LH degeneracy may be offset upward by approximately 〇.12ev. This produces an energy band gap 93 of approximately 〇8. Furthermore, the figure shows that an LH and HH band separation phenomenon occurs between the maximum value of the LH sub-band 88 and the maximum value of 89H of the HH sub-band 89. This band separation phenomenon is the effect of removing the degeneracy of LH and HH, and has the effect of reducing the scattering between the LH and HH sub-bands. In addition, the shape change of the subvalent band can reduce the effective quality of the light hole. As a result, the average free path of a strained semiconductor inner ballistic light hole may be longer than the average free path of an unstrained semiconductor inner ballistic light hole. Figure 17B also shows that under the degeneracy of the LH secondary energy band 88 and the HH secondary energy band 89, the hole 90 may re-aggregate from the HH secondary energy band 89 to the LH secondary energy band 88. In fact, when the strain is strained by tensile stress, the total number of holes in the LH secondary energy band may increase by 20% to 90% (see Fischetti et al., Journal of Appl. Physics, vol. 94, ρρ· 1079). -1095, 2003). Furthermore, the scattering ratio of LH is known to be much lower than the scattering ratio of HH (see Hinckley et al" "Hole Transport theory In Pseudomorphic Sii. x Gex Alloys Grown on Si (001) Substrates," Phys Rev B, 41, Ρρ·2912-2926, 1990). The implanter of the present invention 0881-A31715TWF(5.0) 40 1287292 • further considers these effects (such as the LH injection in the related description of Fig. 13) by using the electric hole by TM The hole injection efficiency can be improved by redistributing the secondary energy band to the LH secondary energy band to inject the "piezoelectric" material into the hole. This can be achieved by applying the source region of the hole injection. When LH is heavily inhabited and has high ballisticity, when such a combined effect is applied to ballistic charge injection by such a method, it can provide a method of applying electric current to ballistic charge injection, and It is an embodiment of the piezoelectric ballistic charge and injection mechanism of the present invention. This method improves ballistic hole injection efficiency by injecting a piezoelectric ballistic hole (such as LH). The 帛17C diagram shows the ugly dispersion relationship with the 17B, but the conductor is strained by a compressive stress. Similar to the tensile stress described above, this compressive stress relieves the degeneracy of the subvalent energy bands 88 and 89, but in a manner opposite to that of Figure 17B. The figure shows that the LH secondary energy band is shifted downward and the HH secondary energy band 89 is shifted upward. The deliberate relaxation of HH and LH still reduces the inter-band scattering between the LH and hh charges. Due to the deviation of the subvalent energy band, most of the holes in the figure show that they are concentrated in the HH sub-band. In addition, the figure also shows that the curvature shape of the subvalent band changes when compared to the unstrained example of Fig. 17A. The deformed HH sub-band in Figure 17C reduces the effective mass of the heavy hole and makes it a lighter hole. As a result, φ is within a strained semiconductor, and the average free path of the holes (i.e., piezoelectric holes) is longer than the mean free path of the holes in the unstrained semiconductor. This effect provides an embodiment of another piezoelectric ballistic charge injection mechanism of the present invention. It is known that for a charge in the subvalent energy band where degeneracy is removed, the first order of its effective mass can be linearly offset with stress (see Hensel et al., "Cyclotron Resonance Experiments in Uniaxially Stressed Silicon: Valence Band Inverse

Mass Parameters and Deformation Potentials”,Phys. Rev· 129, pp· 1141-1062, 1963,並參見 Hinckely et al” “Hole Transport Theory in Pseudomorphic Sil-xGex Alloys Grown on Si(001) Substates, M Phys. Rev: B? 41, ρρ·2912-2926, 1990)。藉由運用此線性關係以及有效質量與平均自由路徑間 0881-A31715TWF(5.0) 41 ⑧ 1287292 ^關係,本發賴供—觀讀電電荷之平均自由雜的方法。此 &代表另->1轉道電荷注人_之實補,並且是糊整平行於電 齡向義力等絲作朗。第18 _顯稍力雜平均職之效應的一 個_。應變梦上的_應力係用作一個範例,以說明施加於HH之效應。 >見第18圖’垂直軸代表正規化_聰腕)平均自由路徑,即轉梦 均自由路徑相對無應變砍之平均自由路徑的比率。由此圖可清楚得知,正 ^化平均自由路徑係隨增加的應力作線性變化。此外,平均自由路徑沿梦 曰曰軸[111]之平行方向與沿石夕晶軸_]之平行方向相比,係長得多。 第19圖係顯示屢電彈道電洞注入之效率提升率與魏應力之對應關 係。此效率提升率是應變魏率相對無應變魏率之比值。可由圖中看出, ^適中賴械應力下,比方是約2GGMegaPaseal(「嫩」)或較低,效率 提升率會隨應力超線性地(super-Hneariy)增加,並且當應力介於較高範圍時 (比方是約4〇0MPa或更高),效率提升率與應力間近乎成線性正比關係。此 外’效率提升率沿石夕晶軸[⑴]之平行方向與沿石夕晶軸[_之平行方向相 比,係顯著得多。圖中顯示,在沿梦晶軸[0〇w[111]的平行方向,效率分 別約提升了二十倍以及五十倍。 第20圖係顯示無應變矽内效率提升度對於平均自由路徑(以後簡稱為 「ιηφ*」)之敏感度。應注意到,的差異可能來自,舉例言之,半導體 内不同濃度的雜質。此圖係選取沿矽晶軸方向[001]平行方向的應力。參見 第20圖’可注意到’當應力皆保持相同時,較短比方是4奈米)與較 長πτφ*(比方是1〇奈米)相比,效率提升率顯著地增加。舉例來說,當一 MPa的應力施加在一具有4奈米ηιφ*的碎時,效率提升率能高到⑻倍, 然而當同樣的應力施加在一具有10奈米㈤电*的梦時,效率可能僅提升了 10倍。此處呈現的效應對先進技術下縮小的記憶單元有所助益,因為可預 料到梦内的咼雜質濃度會導致較短的ιηφ*。這是由於梦内的高濃度雜質可 協助單元按比例縮減至一較小尺寸(譬如,其可避免當縮減記憶單元尺寸 0881-A31715TWF(5.0) 42 1287292 時,供彈=電荷穿越之區_電阻過度增加)。 現在田可明白’藉由利用壓電彈道電荷注人,能改變彈道載子(⑶、 HH」或疋電子)的傳輪機制。具本領域之通常技術者也應當清楚,當應用本 揭路所教授之技術時,可挑選不同種類的應力(比方是張應力或壓縮應力) 並可改變應力轴,㈣藉歧變制分佈和平均自由雜而提升這些情況 中的注入效率。 雖然上述討論係針對麼電電洞而言,然具本領域之通常技術者將會明 白’在類似的考慮下,壓電電洞之效應與優點皆可適用於壓電彈道電子注 入。此外,雖然上述討論把焦點集中在半導體(比方是石夕)上,針對半導體之 效應與優點皆可_於其他種類之導體(比枝咖、遞、%•版合金… 等等)、此外’雖然上述關於電荷注入系統之說明係集中在記憶體相關應用 上,然對林賴之财技術者在_似之思量下,上賴日肋之效應與 優勢皆適用於其他種類之半導體裝置(比方是電晶體以及放大器等等)。 第21A係顯示注入效率與彈道傳輸用的主動層(BG 62)厚度之間的關 係,以比較應變矽與無應變矽之差異。如圖所示,藉由壓電彈道電子注入 機制,電子能以相較注入無應變矽之正常電子所能達到效率還高得多的效 率注入至CSR 66上。這是由於彈道電子具有較低的散射比率以及較長的平 均自由路徑,正如之前所述(比方是可參見第17B圖與其相賊明)。此效應 提供出解決習知技術内大電阻之手段而成為本發明特徵之一。第21B圖係 顯示當注入效率固定為百分之一時,BG62之片電阻與平均自由路徑間的關 係。藉由採用壓電彈道電子注入機制,片電阻能夠降低。舉例來說,片電 阻在無應變矽内約為250 Ohms/square,而在具類似平均自由路徑之應變石夕 内’則降至約220 Ohms/square。第21B圖亦顯示,在利用此機制下,藉由 將平均自由路徑由10奈米增至約28奈米’在不須與注入效率相妥協下, 即可使片電阻降得更低。 此厘電斧道電何注入機制可輕易地應用至本發明之電荷注入的能帶矣士 0881-A31715TWF(5.0) 43 ⑧ 1287292 等么、使用第13圖所示能帶結構之範例。參考第13圖,由於 TG61作應變,因而電洞大多由LH 75組成。TG61内LH總數較高是受到 希望的現象’原因是其能提供具高彈道性之電獅成之供應電流於電荷注 而實施方法’舉例來說,可依據壓電彈道電荷注入機制之一個實施例, 藉由施加張應力至TG 61來達成。在受應力效應影響下,HH 76,其可與 LH 75共存在TG 61内,會比lh %少渾例來說,約佔了總電洞數的$ % 至 20 。 /主忍到’儘管在此TG 61係按照上述的機制作應變,但bg泣可依據 另-種壓f料電荷注人卿實細的條件來作應變 ,以使穿越BG 62之 ^同的平均自由路控較其所在區域之响*為長。而其實施方式,舉例來說, 可如第17B與第17C目之相關描述,藉由施加一機械應力於阳62上以移 除月匕可之簡併性來程成,如此可減少LH電荷於穿過BG 62時之能帶間散 射事件,從而提升電洞之注入效率。 本發明之記憶單元 實施例100 第22圖係顯示本發明一記憶單元1〇〇結構之實施例的剖面圖。參考第 22圖,圖中顯示單元10(M系包括一導體_過滤器系統%,其屬於第7、9、 1卜以及13圖所描述的種類,一導體一絕緣體系統6〇,其屬於第卜5、 以及6圖所描述的種類,一電荷儲存區域(以下簡稱CSR) 66 ,其係為一浮 動閘(以下簡稱FG) 66100之型式,以及一通道介電質(以下簡稱CD)沾。該 導體一過濾器系統59係包括一穿隧閘(以下簡稱TG) 61,以及一過濾器%, 其中TG 61係對應導體-過渡器系統59之導體。過滤器52提供第7圖相 關描述中的帶通過濾功能,第10、12A、13、以及14圖相關描述中的電荷 過濾功能,第12B圖相關描述中的電壓分割功能,以及第15圖相關描述中 的質量過濾功能。在一較佳實施例中,過濾器52係包括如第7圖相關描述 0881-A31715TWF(5.0) 44 (^) 1287292 中之一穿隧介電質(以下簡稱TD)53以及一阻擋介電質(以下簡稱BD) 54。 導體一絕緣體系統6〇係包括一彈道閘(以下簡稱BG)62以及一保留介電質 (以下簡稱RD) 64,其係分別作為系統之導體與絕緣體。此早元結構内由 TG 61至RD 64之區域係藉由將導體一過濾器系統59之過濾器52與導體 一絕緣體系統60之導體(BG 62)相接觸來建造而成。如此形成之結構具有夾 於TG61與BD54兩區域間之TD53,以及具有夾於TD53與BG62兩區 域間之BD 54。BG 62係設置於FG 6610〇之鄰近區域,並與FG 6610〇之間以Mass Parameters and Deformation Potentials”, Phys. Rev. 129, pp·1141-1062, 1963, and see Hinckely et al” “Hole Transport Theory in Pseudomorphic Sil-xGex Alloys Grown on Si(001) Substates, M Phys. Rev: B? 41, ρρ·2912-2926, 1990). By applying this linear relationship and the relationship between the effective mass and the mean free path, 0881-A31715TWF(5.0) 41 8 1287292 ^, the average of the charge-viewing electrical charge The method of free and miscellaneous. This & represents another -> 1 turn charge injection _ the real complement, and is paste parallel to the age of electricity to the righteous force and other silk lang. 18th _ slightly slightly mixed average One of the effects of the _ stress system is used as an example to illustrate the effect applied to HH. > See Figure 18 'Vertical axis represents normalization _ smart wrists' mean free path, that is, free dreams are free The ratio of the path to the mean free path of the unstrained cut. It can be clearly seen from this figure that the normalized free path system changes linearly with increasing stress. Furthermore, the mean free path is parallel along the nightmare axis [111]. The direction parallel to the axis along the axis In comparison, the system is much longer. The 19th figure shows the correspondence between the efficiency improvement rate of the repeated electric ballistic hole injection and the Wei stress. This efficiency improvement rate is the ratio of the strain rate to the unstrained rate. , ^ Under moderate stress, for example, about 2GGMegaPaseal ("tender") or lower, the rate of efficiency increase will increase with super-Hneariy, and when the stress is in a higher range (for example, 4〇0MPa or higher), the efficiency improvement rate is almost linearly proportional to the stress. In addition, the rate of efficiency improvement is much more significant along the parallel direction of the Shixi crystal axis [(1)] and the parallel direction along the axis of the Shihejing [[1]. The figure shows that the efficiency is increased by about twenty times and fifty times in parallel directions along the axis of the dream crystal [0〇w[111]. Fig. 20 shows the sensitivity of the unstrained internal efficiency improvement degree to the mean free path (hereinafter referred to as "ιηφ*"). It should be noted that the difference may come from, for example, different concentrations of impurities in the semiconductor. This figure selects the stress in the direction parallel to the direction of the twin axis [001]. Referring to Fig. 20, it can be noted that when the stresses are kept the same, the shorter ratio is 4 nm. The efficiency improvement rate is remarkably increased as compared with the longer πτφ* (for example, 1 〇 nanometer). For example, when a stress of one MPa is applied to a piece having a particle size of 4 nm, the efficiency improvement rate can be as high as (8) times, whereas when the same stress is applied to a dream having 10 nm (five) electricity*, Efficiency may only increase by a factor of 10. The effects presented here are useful for shrinking memory cells under advanced technology, as it is expected that the concentration of germanium impurities in the dream will result in a shorter ιηφ*. This is because the high concentration of impurities in the dream can help the unit to be scaled down to a smaller size (for example, it can avoid the area where the charge is traversed when the memory unit size is 0881-A31715TWF(5.0) 42 1287292 is reduced. Excessive increase). Now Tian can understand that by using piezoelectric ballistic charge, it is possible to change the ballistic mechanism of ballistic carriers ((3), HH or 疋 electrons). It should also be clear to those of ordinary skill in the art that when applying the techniques taught by this method, different types of stresses (such as tensile or compressive stresses) can be selected and the stress axes can be changed, (iv) the distribution and The average freeness increases the injection efficiency in these cases. Although the above discussion is directed to a galvanic hole, it will be apparent to those of ordinary skill in the art that, under similar considerations, the effects and advantages of the piezoelectric hole can be applied to piezoelectric ballistic electron injection. In addition, although the above discussion focuses on semiconductors (such as Shi Xi), the effects and advantages for semiconductors can be used for other types of conductors (because of the branch, hand, %•plate alloy, etc.), in addition Although the above description of the charge injection system is concentrated on the memory-related applications, the effects and advantages of the reliance on the ribs are applicable to other types of semiconductor devices. It is a transistor and an amplifier, etc.). Section 21A shows the relationship between the injection efficiency and the thickness of the active layer (BG 62) for ballistic transport to compare the difference between strain 无 and no strain 矽. As shown, by the piezoelectric ballistic electron injection mechanism, electron energy is injected into the CSR 66 at a much higher efficiency than the normal electrons injected into the unstrained enthalpy. This is due to the fact that ballistic electrons have a lower scattering ratio and a longer average free path, as previously described (see, for example, Figure 17B and its thief). This effect provides one of the features of the present invention by providing a means of solving the large resistance in the prior art. Figure 21B shows the relationship between the sheet resistance of BG62 and the mean free path when the injection efficiency is fixed at one percent. The sheet resistance can be reduced by using a piezoelectric ballistic electron injection mechanism. For example, the sheet resistance is about 250 Ohms/square in an unstrained crucible and drops to about 220 Ohms/square in a strained stone with a similar mean free path. Figure 21B also shows that by using this mechanism, by increasing the mean free path from 10 nm to about 28 nm, the sheet resistance can be lowered even without compromising the injection efficiency. The injection mechanism of the electric axe can be easily applied to the charge injection energy band of the present invention, 0881-A31715TWF(5.0) 43 8 1287292, etc., using the example of the energy band structure shown in FIG. Referring to Fig. 13, since the TG61 is strained, the holes are mostly composed of LH 75. The higher total number of LHs in TG61 is a promising phenomenon 'because it can provide a highly ballistic electric lion to supply current to the charge injection method'. For example, it can be implemented according to a piezoelectric ballistic charge injection mechanism. For example, this is achieved by applying tensile stress to TG 61. Under the influence of stress effect, HH 76, which can coexist with LH 75 in TG 61, accounts for about $% to 20% of the total number of holes compared to lh%. / The main endures 'Although the TG 61 series is strained according to the above-mentioned machine, but bg can be strained according to the conditions of another type of pressure, so that it can pass through the BG 62. The average free path is longer than the sound of the area in which it is located. The embodiment, for example, can be as described in the 17B and 17C, by applying a mechanical stress on the anode 62 to remove the degeneracy of the moon, thereby reducing the LH charge. In the band-to-band scattering event when passing through BG 62, the hole injection efficiency is improved. Memory Unit of the Invention Embodiment 100 Fig. 22 is a cross-sectional view showing an embodiment of a memory cell structure of the present invention. Referring to Fig. 22, the display unit 10 (M system includes a conductor_filter system% belonging to the types described in Figures 7, 9, 1 and 13 and a conductor-insulator system 6〇, which belongs to the A type of charge storage area (hereinafter referred to as CSR) 66 is a type of floating gate (hereinafter referred to as FG) 66100, and a channel dielectric (hereinafter referred to as CD). The conductor-filter system 59 includes a tunneling gate (hereinafter referred to as TG) 61, and a filter %, wherein the TG 61 is a conductor corresponding to the conductor-transitioner system 59. The filter 52 provides a description in FIG. The band filtering function, the charge filtering function in the related descriptions of Figs. 10, 12A, 13, and 14, the voltage dividing function in the related description of Fig. 12B, and the mass filtering function in the related description in Fig. 15. In a preferred embodiment, the filter 52 includes a tunneling dielectric (hereinafter referred to as TD) 53 and a blocking dielectric (hereinafter referred to as 0881-A31715TWF(5.0) 44 (^) 1287292 as described in FIG. BD) 54. Conductor-insulator system 6〇 includes a ballistic gate (hereinafter referred to as BG) 62 and a reserved dielectric (hereinafter referred to as RD) 64, which are respectively used as conductors and insulators of the system. The region of the early element structure from TG 61 to RD 64 is made by a conductor-filter. The filter 52 of the system 59 is constructed in contact with the conductor (BG 62) of the conductor-insulator system 60. The structure thus formed has a TD53 sandwiched between the two regions TG61 and BD54, and has two regions sandwiched between TD53 and BG62. Between the BD 54. The BG 62 is placed in the vicinity of the FG 6610 and is connected to the FG 6610〇.

保留介電質(RD64)相絕緣。FG661()()係設置於主體70之鄰近區域,並與主 體70之間以CD 68相絕緣。FG 661()()典型上係藉由諸如RD 64、CD 68,或 其他與其相鄰之介電質來包覆並作絕緣,這些介電質必須具有適當厚度與 良好絕緣性質,以使電荷能保留其上而不洩漏。典型上,RD 64與CD 68 之厚度約在5奈米至20奈米之範圍。TD 53與BD 54可包括具有均勻化學 元素或當中元素漸次變化之介電質。TD 53與BD 54可以自一包括氧化物、 氮化物、氮氧化物、氧化鋁(Al2〇3)、氧化銓(HfO2)、氧化錘(Zr02)、氧化紐 (Ta2〇5)之群組中選取出。更者,任何以上材料之複合物或所構成之合金, 比方疋氧化铪-氧化物之合金(Hf〇rSi〇2)、給—氧化銘之合金(HfAiO)、铪 —氮氧化物(HfSiON)之合金…等等,都可用作TD 53與BD 54之材料。在 該較佳實施射,-厚度為2奈米至4奈米之氧化物介電質以及—厚度為2 奈米至5奈米之氮化物介電質係分別選作TD53與BD 54之材料。 第22圖之單元1〇〇更提供一源極%、一通道%、一汲極97以及一位 =基板讷之主體70。主體7G係包括-具第—導峨比方是p型)且摻雜濃 又、、勺在1 X 10原子數/立方公分至i χ 1〇ls原子數/立方公分之半導體。源 =5與^ 97係形雜該主體7_具有通道96於主勸於兩者之間,、 分至;、==導電型(比方是 '、立方A分之摻雜濃度來作摻雜。這些摻雜區域可利用 〇881-A31715TWF(5.0) 45 ⑧ 1287292 熱擴散(Thermal Diffusion)或藉由離子佈植(Ion Implantion)來形成。 在第22圖中,TG61顯示為與BG62相重疊而在兩者之間形成一重疊 區域’其中FG 66ι⑽至少有一部分位於此重疊區域之下。此重疊區域在此 單元結構内具有不可或缺之地位,原因是供應電荷載子係通過此重疊區域 來接受過濾以傳輸通過BG 62、RD 64、並最後進入FG 661G()。FG 661()0是 用來收集與儲存這些電荷載子,並且可為多晶矽、多晶矽鍺、或任何其他 種月b有效儲存電荷之半導體材料。j?G 661()()之導電型可為N型或P型。TG61 與BG 62之材料可以選為半導體,比方是n型多晶矽、P型多晶矽、重度 摻雜之多晶矽鍺…等等,或選為一金屬、比方是鋁(A1)、鉑(pt)、金(Au)、 鎢(W)、鉬(Mo)、釕(RU)、組(Ta)、鎳(Ni)、氮化鈕(TaN)、氮化鈦(TiN)…等 等,或是選為以上材料構成之合金,比方是鎢矽化物、鎳矽化物等等。雖 然TG61與BG62在單元100内分別顯示為單獨一層,但是BG62與丁〇61 之結構各別可包括一層以上。舉例而言,TG61可包括一形成於一多晶矽層 上之鎳石夕化物層,因此TG61為一複合層。TG61之厚度範圍可約為齐 米至500奈米,而BG 62之厚度範圍可約為20奈米至2〇〇奈米。 沿直線AA,之能帶結構可以屬於第9圖所示種類、第1〇圖所示種類, 或是第16圖所示種類。 ' 單元100之編程操作可以利用如第9和10圖相關描述中之彈道電子注 入結構機制來達成,献棚第17B、9以及10圖相關描述中之壓電彈道 電子注入機制來達成。就此特定實施例而言,TG61之電壓係選為相對 62之電壓為-3.3V至-4.5V,以使兩者之間形成一能夠注人具有緊密子能量 分佈之電子的壓降。而實施方式,舉例來說,可藉由施加_3·3ν之電Z TG 61以及0V之電壓至BG 62來達成,從而TG 61與BG 62間會產=一 3.3V之壓降。選擇性地,亦可藉由其他種電壓組合來實施,= TG 61 aA+1.5V M BG 62 〇 3A v 3B ^ 3C 述,藉由降低影像力能障高度可使TG 61與BG 62間的壓降更為降^。^ 〇881-A31715TWF(5.0) 46 1287292 、施方式可藉由施加約1V至3·3ν之電壓至源極95、汲極97以及主體70, 以藉此將約IV至3V範圍之電壓耗合至CSR 66。舉例來說,假設肋64 之厚度為8奈米,這樣的影像力降低效應可使TG 61與bg &帛之壓降由 * -3.3V 降至約一2.8V 至一3.0V。 . 在單元100接受編程而至一編程狀態之後,CSR66之FG66100因具有 • «子載子而帶負電。單元⑽之此編程狀態可藉由實行-抹除操作而抹除。 •抹除操作可運用第13圖相關描述中之彈道電洞注入機制來達成,或是運用 第17B、17C以及第13圖相關描述中之壓電彈道電洞注入機制來達成。就 此特疋實施例而s ’TG61之電難選為相對BG62之電麼為+5λ^+6ν, 以使兩者之間形成-能夠注入具有緊密能量分佈之輕電洞的壓降。而實施 方式,舉例來說,可藉由施加+3V之電壓至TG 61以及_2V之電壓至BG 62 來達成,從而使TG 61與BG 62 生+5V之料。選擇性地,亦可藉由 其他種電壓組合來實施,比方施加+2·5ν之電壓至见61以及_2·5ν之電 壓至BG62。如第6圖之描述,藉由降低影像力能障高度可使冗^❸與3^ 62間的壓降更為降低。影像力能障於阳66ι⑻帶負電時會猶微降低,並且 -般而言可藉由將-約為-IV至-3V之電壓搞合至CSR66來降低更多, 而實施方式可藉由施加約一m—3V之電壓至源極95、汲極97以及主體 70來達成。舉例而言,假設肋料之厚度為8奈米,這樣的影像力降低效 . 應可使TG 61與BG 62間之遂降由+5V降至約+4·5ν至+4.7V。 最後,為了讀取此記憶單元,一約+lv的讀取電壓係施加於此記憶單 • 元之汲極57上,以及一約+2·5ν的電壓(取決於裝置之電源電壓)施加此記 憶單兀之BG62上。而其他區域(即源極95與主體7〇)則位於地位準。如果 FG661G()是帶正電(即CSR66經過電子放電广則通道區96導通。結果,一 電流將由源極95流向汲極97。這會是狀態「1」。另一方面,若FG 66ι〇() 帶負電’則通道區96要不是輕微地導通或就是完全關閉。因此即使BG62 與汲極97都拉抬為讀取電壓,極少電流或完全沒有電流能流經通道96。如 0881-A31715TWF(5.0) 47 1287292 -此,記憶單元在感測下乃是編程為狀態「〇」。 6己隱單it 100’乃以將電荷儲存於一個與周圍電極電性上相絕 緣仁電谷上相麵合之導電材料或半導體材料所形成的(即「浮動閉」) •之清況來作說明。在足樣的健存方案中,電荷係均勻分佈於整個CSR66中。 •然而,^領域通常技術者當可明白,本發明並非限制於此處所說明者以 •及上述實施^已’而包括任何其他種類的電荷儲存方案。舉例來說,本 •發明之德單70可將電魏存於包括複數個離散儲存座(DiscretePreservation of dielectric (RD64) phase insulation. FG661()() is disposed in the vicinity of the main body 70 and insulated from the main body 70 by CD 68. FG 661()() is typically coated and insulated by a dielectric such as RD 64, CD 68, or other adjacent dielectrics. These dielectrics must have suitable thickness and good insulating properties to allow charge. Can keep it without leaking. Typically, the thickness of RD 64 and CD 68 is in the range of from about 5 nanometers to about 20 nanometers. The TD 53 and the BD 54 may include a dielectric having a uniform chemical element or a gradually changing element among them. TD 53 and BD 54 may be included in a group consisting of oxide, nitride, nitrogen oxide, aluminum oxide (Al2〇3), hafnium oxide (HfO2), oxidized hammer (Zr02), and oxidized neon (Ta2〇5). Select it. Furthermore, a composite of any of the above materials or an alloy thereof, such as an alloy of niobium oxide-oxide (Hf〇rSi〇2), an alloy of niobium-oxygen (HfAiO), and a niobium-nitrogen oxide (HfSiON) Alloys, etc., can be used as materials for TD 53 and BD 54. In the preferred embodiment, an oxide dielectric having a thickness of 2 nm to 4 nm and a nitride dielectric having a thickness of 2 nm to 5 nm are selected as materials of TD53 and BD 54, respectively. . The unit 1 of Fig. 22 further provides a source %, a channel %, a drain 97 and a bit = substrate 70. The main body 7G includes a semiconductor having a first-conducting ratio of p-type and doped with a concentration of 1 X 10 atoms/cm 3 to i χ 1 〇 s atoms/cm 3 . Source = 5 and ^ 97 are mixed with the main body 7_ having a channel 96 between the two to persuade the two, and to;; = = conductive type (such as ', cubic A sub-doping concentration for doping These doped regions can be formed using 〇881-A31715TWF(5.0) 45 8 1287292 Thermal Diffusion or by Ion Implantion. In Figure 22, TG61 is shown as overlapping with BG62. Forming an overlap region between the two' wherein at least a portion of the FG 66(10) is below the overlap region. This overlap region has an indispensable position within the cell structure because the supply charge sub-system passes through the overlap region. Filtered for transmission through BG 62, RD 64, and finally into FG 661G(). FG 661()0 is used to collect and store these charge carriers and may be polycrystalline germanium, polycrystalline germanium, or any other species b A semiconductor material that stores electric charge. The conductivity type of j?G 661()() can be N type or P type. The materials of TG61 and BG 62 can be selected as semiconductors, such as n-type polycrystalline germanium, P-type polycrystalline germanium, heavily doped Polycrystalline...etc., or as a metal, for example (A1), platinum (pt), gold (Au), tungsten (W), molybdenum (Mo), ruthenium (RU), group (Ta), nickel (Ni), nitride button (TaN), titanium nitride ( TiN), etc., or an alloy composed of the above materials, such as tungsten telluride, nickel telluride, etc. Although TG61 and BG62 are respectively shown as separate layers in unit 100, the structures of BG62 and Ding 61 For example, the TG 61 may include a nickel-lithium layer formed on a polysilicon layer, so that the TG 61 is a composite layer. The thickness of the TG 61 may range from about SEM to 500 nm. The thickness of the BG 62 can range from about 20 nm to about 2 nm. The energy band structure along the line AA can be of the type shown in Figure 9, the type shown in Figure 1, or the figure shown in Figure 16. The 'programming operation of unit 100 can be achieved using the ballistic electron injection structure mechanism as described in the description of Figures 9 and 10, which is achieved by the piezoelectric ballistic electron injection mechanism in the related description of Figures 17B, 9 and 10. For this particular embodiment, the voltage of TG 61 is selected to be -3.3V to -4.5V with respect to 62 to form a capable injection between the two. The human has the pressure drop of the electrons of the compact sub-energy distribution, and the embodiment can be achieved, for example, by applying the electric Z TG 61 of _3·3ν and the voltage of 0V to the BG 62, so that between the TG 61 and the BG 62 Will yield = a voltage drop of 3.3V. Alternatively, it can be implemented by other voltage combinations, = TG 61 aA + 1.5VM BG 62 〇 3A v 3B ^ 3C, by reducing the image height of the energy barrier The pressure drop between TG 61 and BG 62 can be reduced. ^ 〇 881-A31715TWF (5.0) 46 1287292, by applying a voltage of about 1V to 3·3ν to the source 95, the drain 97 and the body 70, thereby consuming a voltage in the range of about IV to 3V. To CSR 66. For example, assuming that the thickness of the rib 64 is 8 nm, such an image force reduction effect can reduce the voltage drop of TG 61 and bg & 由 from * -3.3 V to about 2.8 V to 3.0 V. After unit 100 accepts programming to a programmed state, CSR66's FG66100 is negatively charged with a *subcarrier. This programming state of cell (10) can be erased by an implementation-erase operation. • The erase operation can be achieved using the ballistic hole injection mechanism in the related description in Figure 13, or by using the piezoelectric ballistic hole injection mechanism in the related descriptions of Figures 17B, 17C, and 13. In this particular embodiment, the electrical susceptibility of s 'TG61 is +5λ^+6ν relative to the power of BG62 to form a voltage drop between the two capable of injecting a light hole having a tight energy distribution. The implementation, for example, can be achieved by applying a voltage of +3V to the voltages of TG 61 and _2V to BG 62, thereby producing TG 61 and BG 62 with +5V. Alternatively, it may be implemented by other voltage combinations, such as applying a voltage of +2·5 ν to a voltage of 61 and _2·5 ν to BG62. As described in Fig. 6, the pressure drop between the redundancy and the 3^62 can be further reduced by lowering the image energy barrier height. The image force barrier is slightly reduced when the Yang 66(8) is negatively charged, and can be reduced more by combining the voltage of about -IV to -3V to the CSR66, and the implementation can be applied by applying A voltage of about one m-3V is achieved by the source 95, the drain 97, and the body 70. For example, assuming that the thickness of the rib is 8 nm, such image force is reduced. The enthalpy drop between TG 61 and BG 62 should be reduced from +5 V to about +4·5 ν to +4.7 V. Finally, in order to read the memory cell, a read voltage of about + lv is applied to the drain of the memory cell, and a voltage of about +2·5 ν (depending on the power supply voltage of the device) is applied. Memory on the BG62. The other areas (ie source 95 and main body 7〇) are in the right position. If the FG661G() is positively charged (ie, the CSR66 is electrically discharged, the channel region 96 is turned on. As a result, a current will flow from the source 95 to the drain 97. This will be the state "1". On the other hand, if FG 66ι〇 ( With negative charge, channel region 96 is either slightly turned on or completely turned off. Therefore, even if both BG62 and drain 97 are pulled up to read voltage, very little or no current can flow through channel 96. For example, 0881-A31715TWF ( 5.0) 47 1287292 - Here, the memory unit is programmed to state "〇" under sensing. 6 隐单单it 100' is to store the charge in a phase opposite to the surrounding electrode. This is illustrated by the condition of the conductive material or semiconductor material (ie, “floating closed”). In the foot-based survival scheme, the charge is evenly distributed throughout the CSR66. It will be understood by those skilled in the art that the present invention is not limited to the above-described embodiments and includes any other type of charge storage scheme. For example, the invention of the invention 70 can be used to include Multiple discrete storage seats (Di Screte

Storage 内比方疋一介電質層内的奈米顆粒(Nano-Particles)或阱 着 (Traps),如第23圖與第24圖所示。 實施例200 現,向參考第23圖,其係顯示—記憶單元挪’該記憶單元挪係第 22圖之單元1〇〇之輕微變化型式。單元2⑽除一點外其餘所有方面皆盘第 22圖之單疋⑽相同。此差異點在於單元並非使用fg %。。之導電區 域作為CS祕,而以複數個具有奈米尺寸之奈米顆粒66咖來作為c藝。 追些奈練粒6“翻上為橢_,其直齡於2絲至1()絲的範圍, φ 並在圖中顯示為與CD 68相接觸以及形成於RD 64内。RD 64在圖中係一 單-層,然可為不同介電質組成之堆疊層,比方是氧化物/氮化物/氧化物之 •==儲存座之奈米顆粒可為石夕奈米顆粒’其中每—奈米顆粒為橢 _就、有2絲至1G奈·L以及可彻為人熟知的㈣ 技術來製造H储粒可躲继_祕奈米顆_式並 效儲存電荷之半導體材料(比方是Ge、siGe合金…等等),介 是Hf〇2),或是金屬(比方是Au、Ag、Pt···等等)。 y 具本領域之通常技術者當能明白,奈米顆粒—不需要在剖 _形’亦不需要與基板表面在同-平面上,而可以位於基板表面土方或 下方之任何《度,以及可具有其断有_存電雜子之微。此外,奈 〇881-A31715TWF(5.0) 48 ⑧ 1287292 米顆粒662〇0不需要與肋64相接觸,亦不需要完全位於肋私之内,而可 部分位於RD 64之内而部分位於⑦68之内,或可完全位於⑶沾之内。 實施例300 第24圖係顯示本發明另一記憶單元3〇〇之實施例的剖面圖。單元· 除-點外其餘所有方面皆與第22圖之單元·_。此差異點在於單元· 並非使用FG 66100之導電區域作為CSR的,而以一具有複數個捕捉中心 (topping centers)(阱663〇〇)之捕捉介電質㈣_ "電質CSR 66係细解663()()作為電荷儲存座並可為—本領域内為人熟知 之低壓化學汽相 ί贿(L_Pre_e_ehen^mpOT_Depc«it_ LPeVDM 術所形成之氮化物層。 單元200 # 300兩者之電荷儲存方案皆是將電荷储存於局部電荷儲存 座内,其中單元200之局部儲存座是奈米顆粒662〇〇之型式,而單元之 局部儲存剌鱗663GG之型式。這些單元可贿第22圖相_述内單元 100相似之操作方式來操作。這兩種單元結構之優點在於能降低製程之複雜 度,並且當這類單元排置於一記憶陣列内,兩相鄰單元間的干擾可予以忽 略。此外,這些儲存座當中若有一個儲存座周圍的絕緣層發生局部擊穿事 件時,其他儲存座所儲存的電荷仍可維持住。 本發明之記憶單元的尺寸係與所給定製程技術世代(Generati〇n)之設計 規則(Designmles)密切相關。因此,以上定義單元與區域之尺寸係僅為說明 性之範例而已。然而,一般而言,記憶單元之尺寸必須能令供應電荷於TG 與BG間電壓在一較高絕對值時(比方是3v至6V)能被過濾器過濾並能通過 過濾器,而能令供應電荷於TG與BG間電壓在一較低絕對值時(比方是2·5ν 以下)能被過濾器阻擋而無法通過過濾器。此外,BG與RD之尺寸必須能允 許絕大部分之過濾電荷典型上以約10-6至10-1之注入效率來穿過它們以被 CSR收集。 0881-A31715TWF(5.0) 49 1287292 • “應注意縣發縣不錄於此處所制者以及上述實施_已,而涵 -,任何所有落於_加申請專利細之所有變化。舉例來說,單元1〇〇於 單元結構和操作上,不需要導體—過渡器系統與導體—絕緣體系統兩者兼 *具,而可以具有能有效過滤和傳輸電荷載子至CSR之導體—過濾器系 導體一絕緣體系統之單元結構。 ^ • 本個之輯單元可軸於-具树輕路的陣顺,而該陣列的週 • 邊電路可包含本領域内皆為人熟知的傳統列位址解碼電路、行位址解碼電 路、感測放大器電路、輸出緩衝電路,以及輸入緩衝電路。 泰 1述實施例之記憶單元典型上係安排於-具有列與行之長方形陣列 内在該陣列内複數個§己憶單元係構成本領域為人熟知之結構戋 N娜結構。第25圖係以記憶單幻〇〇為例,顯示其所構成之一二r陣 列結構的示意圖。參考第25圖,當中顯示有字元線(w〇rdHnes)11〇,其係包 含字元線Μ小M,和M+1,並且每-字元線係沿一第-方向(列方向)設置。 此外,圖中亦顯示有穿隧線(_成啤1_)12〇,其包括穿隧線1^、]^,和 Ι/Η,以及位元線(bit_Hnes)i3〇,其包括N4、N、N+]l,和Ν+2,所有穿隧 線120和位元線130皆沿一第二方向(行方向)設置。同一列内每一記憶單元 φ 1〇0之BG 62係藉由字元線no當中之一來彼此相連。藉此,字元線Μ+ι 與最低列内母一纪憶單元之BG 62相連接。每一穿隨線120與同一行中所 • 有記憶單元之TG 61相連。藉此,第25圖中穿隧線L-1與最左行内每一記 -憶單元之TG 61相連。同樣地,每一位元線13〇與同一行中所有記憶單元 之汲極97相連。藉此,位元線N與第25圖中最左行内每一記憶單元之汲 極97相連。由於此範例所呈現之陣列係使用虛接地(Virtual Gr〇und)之陣列 結構,因此最左行内記憶單元所使用之位元線N亦用作一相鄰行(即第25 圖之中心行)内§己憶單元之源極線(source-line)N。具本領域之技術者將能領 略到,源極與沒極可互換名稱’並且源極鍊和波極線或是源極 線與位元線可以互換名稱。此外,字元線110係連接至記憶單元之62。 0881-A31715TWF(5.0) 50 ⑧ 1287292 因此,BG,及BG線,亦可與字元線互換名稱。 第25圖所示之NOR陣列是一眾所周知之陣列結構,其係用作一範例 以說明本發明記憶單元所形成之_型態。應能領略到,雖_中僅顯示 陣列之-小段而已’第25圖之範例係說明上述區域所組成之贿尺寸的 列。除此之外’本發明之記憶單元可應用至其餘種類之⑽汉陣列社構。舉 例而言,雖然每-位元、線130係安排為與相鄰行之源極線共享記憶^元, 然而,可安排—記憶陣列每—行上之記憶私具有自有專屬的源極線。更 者’雖然本發日月是以單獨-記憶單元以及一 N〇R陣列來作說明,對呈本領 域之通常技術者當可知,複數個本發明記鮮元可以安排為一且有列 與行之長方形陣列’其中該複數個單稀構成本領域為人熟知之細^ 列結構,或是構成由-NAND _與_•職陣列相組合之混合結構。 依此構建而得瞬狀抹除操作可對—小群單元(例如館存—數位字元 用的單Ϊ,其具有8個單元)作位元抹除來實施。此外,此抹除操作亦可於 -大群^元内實施(比方是儲存軟體程式碼的單元,其可包含綱個配置為 頁面的單元,或包含複數個組成陣列結構的大量頁面)。 φ 製造方法 本發明更提供形成記憶單元與記憶陣列之自鮮技術⑼讀轉細 ^ TeChmqUeS)及製造方法’並以第22圖所示的單元麵(單it 100)以及第25 目所示之物麵來作綱。雜在此是以單it 1GG來作解說,然這樣的 ,說贿料範例而已,因此可以㈣地修&並細至本發日月之其餘單元。 參考第26A圖,其係顯示-半導體基板%之俯視圖,該半導體基板 98係用作形成§己憶單元與陣列之起始材料。此材料的剖面圖係顯示於第 26B圖’其中半導體基板98較佳上係-第-導電型(例如p型)之石夕。一主 體70利用為人熟知之技術,比方是離子佈植,而形成於該半導體基板兕 之内’並假定為具有第一導電型。此主體7〇可以選擇性地利用具有第二導 0881-A31715TWF(5.0) 51 1287292 電型之半導體區域(比方是N型)以與該半導體基板98相絕緣。 第26B圖所示之結構進一步依照下述步驟進行處理。一第一絕緣體邰 係形成於該半導體基板98上,該第一絕緣體68之厚度較佳上約介於5奈 米至50奈米之間。此絕緣體68舉例來說,可以是氧化物,並且此氧化物 可利用傳統熱氧化(Thermal Oxidation)技術、HTO、TEOS、或藉由現場蒸氣 矽生成(In-situ Steam Generation ; ISSG)之沉積(Depostion)製程來沉積而得。 接下來,一層電荷儲存材料66a,比方是多晶矽,係沉積在該結構之上,而 方法比方是利用傳統LPCVD技術,其摻雜之方式係當場加麵摻雜或藉 由隨後進行一離子佈植程序於多晶矽薄膜來達成。依此形成之多晶矽層6如 係用來形成第22圖所示記憶單元種類(單元丨⑻)2 CSR從,並可利用第二 導電型之雜質以1 X 1〇18原子數/立方公分至5χ 1〇2i原子數/立方公分之摻 雜濃度來作摻雜。此多晶矽層66a所具厚度,舉例而言,可介於5〇奈米至 約500奈米之間。較佳上,由此形成之多晶矽的起伏形貌大體上為平面。 應注意到,此例係選多晶矽作電荷儲存層66a之材料以說明單元1〇〇。一般 而言’其他具有電荷儲存能力之適合材料(譬如奈米顆粒,捕捉介電質)都可 供本發明其他種單元使用。 接下來,-光阻性_to_resistant)材料(以下稱作光a_t〇_resist))係^ 當地塗於此結構表面上,並隨後_傳統光微影技術 technique)進行一光罩(masking)步驟,用以選擇性地移除光阻,而於電荷儲 存層66a上留下複數個以該第二方向(行方向)延伸之光阻直線執跡。接下來 的程序是侧該曝露之電荷儲存層66a,直峨察到絕緣體68為止,而此 絕緣體68係用作-钱刻阻止層。電荷儲存層當中仍位於剩餘光阻層下的部 分不受此蝕刻程序影響。此步驟形成複數個以該第二方向(即「行方向」) 延伸之多晶矽直線66b,並且每兩條多晶矽直線66b係以一第一溝槽分 離。多晶梦直線66b之線寬以及兩相鄰多晶梦線獅之間距可以^到等: 所使用製程之最小光微影尺寸。接下來執行一離子佈植步驟以對該曝露之 0881-A31715TWF(5.0) 52 1287292 矽區域作第二導電型之摻雜,用以形成與該第一溝槽142自對準之擴散區 域。這樣的擴散區域係形成位元線130。剩餘之光阻繼而利用傳統方法加以 移除。 接下來的程序是形成一第二絕緣層64a於該曝露之電荷儲存層66a上, 該第二絕緣層64a之厚度較佳上約介於5奈米至約50奈米之間。該絕緣體 可以是運則輪錄化、ΗΊΌ、TEOS或ISSG沉積技術來沉積之氧化物。 此絕緣體可以是單獨一層之型式,或是與其他種絕緣體相組合而為複合層 的型式(比方是氧化物與FSG構成之複合層)。此第二絕緣體64a主要是用 來形成本發明記憶單元之RD 64。 接下來,一比方是多晶矽之導電層62a係沉積於該結構上,沉積方法, 舉例而言’可傳統LPCVD技術,其摻雜之方式係當場加金)摻雜或 藉由隨後進行-離子佈植程序於多晶梦薄膜來達成。此導電材料咖係用 來形成s己憶單元以及記憶陣列之字元線11〇之BG62。典型上,導電層必 厚到足以填滿第-溝槽142,並且厚度約介於2〇奈米至奈米之範圍。 較佳上’依此形成之導電材料62a的起伏形貌大體上是平面,並且一選擇 1±之平坦化裝程(即CMP)可用來達成此平面起伏形貌。結果形成的字元線The inside of the storage is like Nano-Particles or Traps in a dielectric layer, as shown in Figures 23 and 24. Embodiment 200 Referring now to Figure 23, it is shown that the memory unit is shifted to a slight variation of the unit 1 of Figure 22. Unit 2 (10) except for one point is the same as the single (10) of Figure 22. The difference is that the unit does not use fg %. . The conductive area is used as the CS secret, and a plurality of nano particles having a nanometer size are used as the c art. After chasing some of the granules 6" turned up to the ellipse _, which is directly in the range of 2 filaments to 1 () filaments, φ is shown in the figure as being in contact with CD 68 and in RD 64. RD 64 is in the figure The middle layer is a single layer, but it can be a stacked layer composed of different dielectrics, such as oxide/nitride/oxide. ===The nanoparticle of the storage base can be the stone granules of each of them. Nanoparticles are ellipsoidal, with 2 filaments to 1G Na·L and well-known (4) technology to make H-storage particles can be used to hide semiconductor materials (such as semiconductor materials) Ge, siGe alloy, etc.), or Hf〇2), or metal (such as Au, Ag, Pt, etc.) y It is common for those skilled in the art to understand that nanoparticle - It does not need to be in the same shape as the surface of the substrate, but can be located on the surface of the substrate or below any of the "degrees", and can have its own micro-discharge. 881-A31715TWF(5.0) 48 8 1287292 The rice granules 662〇0 do not need to be in contact with the ribs 64, nor need to be completely within the ribs, but may be partially located within the RD 64. The portion is located within 768, or may be located entirely within (3) the dip. Embodiment 300 Figure 24 is a cross-sectional view showing an embodiment of another memory unit 3 of the present invention. The unit of Figure 22 is _. The difference is that the unit does not use the conductive area of FG 66100 as the CSR, but the capture dielectric with a plurality of topping centers (well 663〇〇) (4)_ &quot The electric CSR 66 system is a solution of the 663()() as a charge storage seat and can be a nitride layer formed by the low-pressure chemical vapor phase (L_Pre_e_ehen^mpOT_Depc«it_ LPeVDM) well known in the art. The charge storage scheme of both 200 #300 stores the charge in the local charge storage, wherein the partial storage of the unit 200 is a type of nanoparticle 662〇〇, and the partial storage of the unit is the type of the scale 663GG. The unit can operate in a similar manner to the inner unit 100. The advantages of the two unit structures are that the complexity of the process can be reduced, and when such units are placed in a memory array, two adjacent Unit room The interference can be neglected. In addition, if there is a local breakdown event in the insulation layer around one of the storage seats, the charge stored in the other storage holders can still be maintained. The size of the memory unit of the present invention is given The design rules of the Generati〇n are closely related. Therefore, the dimensions of the above defined units and regions are only illustrative examples. However, in general, the size of the memory unit must be available. When the voltage between TG and BG is at a higher absolute value (for example, 3v to 6V), it can be filtered by the filter and can pass through the filter, and the charge can be supplied to the voltage between TG and BG at a lower absolute value. (For example, 2·5ν or less) can be blocked by the filter and cannot pass through the filter. In addition, BG and RD must be sized to allow most of the filtered charge to typically pass through them for collection by the CSR at an injection efficiency of about 10-6 to 10-1. 0881-A31715TWF(5.0) 49 1287292 • “It should be noted that the county is not recorded here and the above implementation _ already, and han-, any all changes that fall within the _ plus patent application. For example, the unit 1. In terms of unit structure and operation, there is no need for a conductor-transitioner system and a conductor-insulator system, but a conductor capable of effectively filtering and transmitting charge carriers to the CSR - a filter-type conductor-insulator The unit structure of the system. ^ • The unit of the array can be aligned with the light path of the tree, and the peripheral circuit of the array can include traditional column address decoding circuits and lines well known in the art. a address decoding circuit, a sense amplifier circuit, an output buffer circuit, and an input buffer circuit. The memory cells of the embodiment of the present invention are typically arranged in a rectangular array having columns and rows within a plurality of § cells in the array. The structure constitutes a structure known in the art, 戋N Na structure. Figure 25 is a schematic diagram showing the structure of one of the two r arrays by taking a memory single illusion as an example. Referring to Figure 25, it is shown There is a word line (w〇rdHnes) 11〇, which contains word lines Μ small M, and M+1, and each-character line is set along a first direction (column direction). There is shown a tunneling line (_Beer 1_) 12〇, which includes a tunneling line 1^,]^, and Ι/Η, and a bit line (bit_Hnes) i3〇, which includes N4, N, N+]l, And Ν+2, all of the tunneling lines 120 and the bit lines 130 are arranged along a second direction (row direction). The BG 62 of each memory unit φ 1〇0 in the same column is by the word line no One is connected to each other. Thereby, the word line Μ+ι is connected to the BG 62 of the lowest column inner mother unit. Each thread 120 is connected to the TG 61 having the memory unit in the same line. Thus, the tunneling line L-1 is connected to the TG 61 of each of the memory cells in the leftmost row in Fig. 25. Similarly, each bit line 13 is connected to the drain 97 of all the memory cells in the same row. Thereby, the bit line N is connected to the drain 97 of each memory cell in the leftmost row in Fig. 25. Since the array presented in this example uses a virtual ground array structure, the leftmost row Memory unit used The bit line N is also used as the source-line N of a neighboring cell in the adjacent row (ie, the center row of Figure 25). Those skilled in the art will appreciate that the source is There is no polarity interchangeable name 'and the source and wave lines or the source line and the bit line are interchangeable names. In addition, the word line 110 is connected to the memory unit 62. 0881-A31715TWF(5.0) 50 8 1287292 Therefore, the BG, and BG lines can also be interchanged with the word line. The NOR array shown in Fig. 25 is a well-known array structure, which is used as an example to illustrate the _type formed by the memory unit of the present invention. . It should be appreciated that although _ only shows the array-small section, the example of Figure 25 illustrates the column size of the bribes formed in the above areas. In addition, the memory unit of the present invention can be applied to the rest of the (10) Han array organization. For example, although each bit and line 130 are arranged to share memory elements with the source lines of adjacent lines, it is possible to arrange the memory lines on each line of the memory array to have their own dedicated source lines. . Furthermore, although the present day and the month are illustrated by a single-memory unit and an N-R array, it will be apparent to those of ordinary skill in the art that a plurality of the present inventions can be arranged in a single column. The rectangular array of rows 'where the plurality of single thins constitute a well-known fine structure in the art, or a mixed structure composed of a combination of -NAND_ and _. The instantaneous erasing operation constructed in accordance with this can be implemented by performing a bit erase on a small group unit (e.g., a single unit for a library-digit character having 8 units). In addition, the erasing operation can also be implemented in a large group (for example, a unit for storing software code, which can include a unit configured as a page, or a plurality of pages constituting an array structure). φ Manufacturing method The present invention further provides a self-freshing technology for forming a memory cell and a memory array (9) Read and transfer technology (TeChmqUeS) and a manufacturing method thereof, and the unit surface (single it 100) and the 25th object shown in FIG. The object is the outline. Miscellaneous here is a single it 1GG to explain, but this way, said bribery examples only, so you can (4) repair andamp; and fine to the rest of the unit. Referring to Fig. 26A, there is shown a plan view of a % of a semiconductor substrate used as a starting material for forming a cell and an array. A cross-sectional view of this material is shown in Fig. 26B' in which the semiconductor substrate 98 is preferably a top-first conductivity type (e.g., p-type). A body 70 is formed within the semiconductor substrate by means of well-known techniques, such as ion implantation, and is assumed to have a first conductivity type. The body 7 can selectively utilize a semiconductor region (e.g., an N-type) having a second conductivity of 0881-A31715TWF(5.0) 51 1287292 to be insulated from the semiconductor substrate 98. The structure shown in Fig. 26B is further processed in accordance with the following steps. A first insulator is formed on the semiconductor substrate 98, and the thickness of the first insulator 68 is preferably between about 5 nm and 50 nm. The insulator 68 can be, for example, an oxide, and the oxide can be deposited using conventional Thermal Oxidation technology, HTO, TEOS, or by in-situ steam generation (ISSG) deposition ( Depostion) process is deposited. Next, a layer of charge storage material 66a, such as polysilicon, is deposited on the structure, for example, by conventional LPCVD techniques, which are doped in a field plus or by subsequent ion implantation. The procedure is achieved in a polycrystalline germanium film. The polycrystalline germanium layer 6 thus formed is used to form the memory cell type (cell 丨(8)) 2 CSR slave shown in FIG. 22, and can utilize the impurity of the second conductivity type to 1 X 1 〇 18 atoms/cm 3 to 5掺杂 1〇2i atomic number/cubic centimeter doping concentration is used for doping. The thickness of the polysilicon layer 66a, for example, may range from 5 nanometers to about 500 nanometers. Preferably, the undulating topography of the polysilicon thus formed is substantially planar. It should be noted that this example selects the polysilicon as the material of the charge storage layer 66a to illustrate the cell 1 〇〇. In general, other suitable materials having charge storage capabilities (e.g., nanoparticle, trapping dielectric) can be used in other units of the invention. Next, a photo-resistance_to_resistant material (hereinafter referred to as light a_t〇_resist) is locally applied to the surface of the structure, and then a conventional masking step is performed. For selectively removing the photoresist, leaving a plurality of photoresist lines extending in the second direction (row direction) on the charge storage layer 66a. The next procedure is to expose the exposed charge storage layer 66a to the insulator 68, which is used as a stop layer. Portions of the charge storage layer that are still under the remaining photoresist layer are not affected by this etching process. This step forms a plurality of polysilicon lines 66b extending in the second direction (i.e., "row direction"), and each of the two polysilicon lines 66b is separated by a first groove. The line width of the polycrystalline dream straight line 66b and the distance between two adjacent polycrystalline dream lions can be equal to: the minimum photolithographic size of the process used. An ion implantation step is then performed to dope the exposed 0881-A31715TWF(5.0) 52 1287292 矽 region for the second conductivity type to form a diffusion region that is self-aligned with the first trench 142. Such a diffusion region forms a bit line 130. The remaining photoresist is then removed using conventional methods. The next procedure is to form a second insulating layer 64a on the exposed charge storage layer 66a. The thickness of the second insulating layer 64a is preferably between about 5 nm and about 50 nm. The insulator may be an oxide deposited by a traversing, enthalpy, TEOS or ISSG deposition technique. The insulator may be in the form of a single layer or a combination of other insulators (for example, a composite layer of oxide and FSG). This second insulator 64a is primarily used to form the RD 64 of the memory cell of the present invention. Next, a conductive layer 62a of polycrystalline germanium is deposited on the structure, for example, 'can be conventional LPCVD technology, the doping method is on-site plus gold) doping or by subsequent -ion cloth The planting procedure was achieved in the polycrystalline dream film. This conductive material is used to form the BG62 of the memory cell and the word line 11 of the memory array. Typically, the conductive layer must be thick enough to fill the first trench 142 and have a thickness in the range of about 2 nanometers to nanometers. Preferably, the undulating topography of the conductive material 62a formed thereby is substantially planar, and a planarization process (i.e., CMP) of a choice of 1 ± can be used to achieve the planar relief topography. Resulting word line

、’·〇構大體上具有一較薄區域(用作每__記憶單元之62)於CSR, '〇 structure generally has a thinner area (used as 62 per __ memory unit) in CSR

上乂及八有較厚區域於位元線擴散區域13〇上以連接不同單元之BG =。應注意到,多晶梦是為了說明之用而選作導電層必(以使製程簡化)。 一般而言,其餘具有低片電阻、良好溝槽間隙填充能力以及於高溫下(例如 _C)性質穩定之導電材料皆可加以利用。舉例來說,一金屬化之多晶矽 層’比方是一其上具有鶴-多晶卿化物㈣_-P〇lyside)之多晶石夕,亦 :利用為人熟知之CVD技術來作為導電材料必。鶴—多晶抑化物之片 5 i 1()_平方’ _低於爛化之重度_晶石夕 的片電阻值,後者典型上約為1〇〇至·歐姆。 過程中輕易取得之材料,如TiN 牛導體製以 W 4專,皆亦可考慮作為導電層61a 0881-A31715TWF(5.0) 53 1287292 - 之材料。 接下來之程序是形成一介電質M3於該導電層62a上,其厚度較佳上 約為1〇奈米至4〇奈米。介電質⑷可以是一利用本領域為人熟知之LpcvD v 技術沉積之氮化物。 - ,接下來,一光阻係適當地塗於此結構表面上,並隨後利用傳統光微影 - 技術進行一光罩步驟,用以選擇性地移除光阻並於介電質143上留下複數 , 個以該第_方向(列方向)延伸之光阻直線軌跡14〇。接下來的程序是侧該 曝露介電質143並接著餘刻該曝露導電層62a,直到觀察到絕緣體糾為 馨止,而此絕緣體6如係用作-侧阻止層。電荷儲存層⑷與必當中仍位 於剩餘光阻層140下的部分不受此侧程序影響。此步驟形成複數個以該 第一方向(即「列方向」)延伸之字元線11〇,並且每兩條字元線ιι〇係以一 第二,槽144分離。字元線110讀寬以及兩相鄰字元、線11〇之間距可以 J到等於所使用製程之最小光微影尺寸。結果產生之結構的俯視圖係顯示 於第27圖中,並且此結構中沿直線^,、BB,、cc,、以及dd,之剖面圖係 分別顯示於第27A、27B、27C以及27D圖。 接下的程序是钱刻該曝露之第二層64a並接著蝕刻該曝露之電荷儲存 # 層恤,直到觀察到該第一絕緣體68為止,而此第-絕緣體68係用作一蝕 刻阻止層。此電荷儲存層66a當中位於剩餘光阻下的部分不纽侧程序 ; 鱗。此步驟形成複數個CSR66。纖之光阻繼而利用傳、统方法來移除。 . 結果產生之結構的俯視圖係顯示於第28圖中,其中字元線110係與第二溝 槽144之直線交錯排列。此結構中沿直線从,、肋,、cc,、以及,之剖 面圖係分別顯示於第28A、28B、28C以及28D圖。 接下來的程序是選擇性地形成一如氧化物之絕緣層(圖中未顯示)於字 元線no的側壁上以及曝露於第二溝槽144之CSR 66的側壁上。此氧化物 之形成方式,舉伽言,可藉由糊快速純化陶证肅_簡^如; RTO)來實行-熱氧化程序而形成,並且其厚度約為2奈米至8奈米。接下 0881-A31715TWF(5.0) ⑧ 1287292 .來,一相對上為厚之介電質層(比方是氧化物)藉由比方是傳統LPCVD之為 人熟知的技術而形成,用以充填第二溝槽144。此氧化物介電質繼而選擇性 地被移除,以形成氧化物塊146於溝槽144内的區域上。此結構較佳上係 , 氧化物塊146之上表面大體上與氮化物介電質143之上表面共面。這可藉 由’比方疋運用一化學機械磨處理(Chemical-mechanical Polishing; CMP) - 以使該厚氧化物平面化,並隨後利用氮介電質143為研磨阻止層和/或蝕刻 , 阻止層來實行反應式離子钱刻法(Reactive ion etch; RIE)來達成。如果需要清 潔殘存於氮化物介電質143上之氧化物,則隨後進行一選擇性氧化物之過 參 步驟。從而,此程序僅留下第二溝槽144内之氧化物 以形成自對準於溝槽144之氧化物塊146。結果產生之結構的俯視圖係顯示 於第29圖’其中字元線no係與氧化物塊146之直線交錯排列。此結構中 沿直線AA’、BB’、CC’、以及DD,之剖面圖係分別顯示於第29A、29B、 29C以及29D圖。 接下來的程序是進行一移除氮化物介電質143之姓刻步驟(比方是利用 熱磷酸(Phosphoric add))。接下來,一具多層結構之過濾器52係形成於字 疋線no之上。在一特定實施例中,一第三絕緣體54a與一第四絕緣體53a φ 係考慮作為過濾器52之多層介電質。第三絕緣層54a,比方是氮化物,係 於溫度為1050。C之含氨(NH3)環境中藉由快速熱氮化 • (RaPldJrhennal-Nitridation)程序而形成於字元線11〇之上。此第三絕緣體54a — 之尽度較佳上約為2奈米至5奈米。接下來的程序是形成一層如氧化物之 第四絕緣體53a於該第三絕緣層54a上。第四絕緣層53a可藉著利用如熱氧 化、HTO、TE0S、或ISSG等為人熟知的技術來形成。第四絕緣層53a之 厚度較佳上約為2奈米至4奈米。第三絕緣層54a與第四絕緣層53a係分別 用作本發明記憶單元之BD 54與TD 53。結果產生之結構的俯視圖係顯示 於第30圖中,並且此結構中沿直線aa5、BB,、CC,、以及DIT之剖面圖係 分別顯示於第30A、30B、30C以及30D圖。 0881-A31715TWF(5.0) 55 1287292 場㈣摻雜或藉由隨後 進仃離子佈植私序於夕晶矽薄膜來達成。此 =列之穿_ 12〇或記鮮元之TG61 ^,鱗電材^^^度己 平丁、米至500奈米。較佳上依此形成之導電材料6ia的起伏雜大 ^上為平面,並且_平坦錄序(比方是CMP)可料魏辭面之起伏形 ^。應注意到,多晶石夕係為了說明之用選作導電材料6ia之材料…般而 I ’如第27圖之相關描述所言’其他具有低片電阻、良好溝槽間隙填充能 力以及於高溫糊如鮮 於半導體製造過程巾輕f轉讀料,比方是魏#、♦鋪、德銘、 梦化鈦、TiN、TaN...等等’皆亦可考慮作為導電層仙之材料,更者,這 類材料還可以形成於多騎之上以形成—複合導體來作為導電材料仙。 接下來’一光阻材料(以下稱作光阻)係適當地塗於此結構表面上,並隨 後利用傳統光微影技術進行一光罩步驟,用以選擇性地移除光阻而於導 電層61a_L留下複數個以第二方向(行方向)延伸之光阻直線軌跡。接下來的 程序是侧該曝露導電層61a,直到觀察到絕雜53a為止,而此絕緣體53a 係用作一蝕刻阻止層。導電層61a當中仍位於剩餘光阻層下的部分不受此 蝕刻程序影響。此步驟形成複數個以該第二方向(即「行方向」)延伸之穿隧 線120,並且每兩條直線係以一第三溝槽147分離α穿隧線12〇之線寬以及 兩相鄰穿隧線120之間距可以小到等於所使用製程之最小光微影尺寸。結 果產生之結構的俯視圖係顯示於第31圖,其中穿隧線120係與第三溝槽147 交錯排列。此結構中沿直線ΑΑ,、ΒΒ,、CC,、以及DD,之剖面圖係分別顯 示於第31Α、31Β、31C以及31D圖。 第31圖亦顯示第22圖之記憶單元種類(單元1〇〇)内的不同區域。位元 線13〇ι以及字元線13〇2係對應到單元1〇〇之源極95與沒極97。圖、中亦顯 示出 CD 68、CSR66、RD 64、BG 62、BD 54、TD 53 以及 TG 61,這些區 0881-A31715TWF(5.0) 56 1287292 - 域分別與第22圖相關描述中單元内所對應之區域完全相同。 ’ 此記憶單元與陣列之結構係隨後沉積一具機械應力之應變材料15〇(比 方是張應力或壓縮應力)來進行處理。此應變材料15〇係用作一應變源(批血 • s〇urce),以提供如第17B與17C圖相關描述内之壓電彈道電荷注入機制, • 並可如第31圖所示般,將應變材料150沉積於該結構之上,或可藉由如 • 腿之傳統钱刻技術,在移除該曝露於第三溝槽147之内的絕緣體53a與 , 54b之後,才沉積應變材料150。在前者之情況中,應變材料150主要提供 應力至TG61。而在後者之情況中,由於應變材料亦與字元線11〇相接觸, • 因此提供應力至每一記憶單元中TG 61與BG 62。應變材料150可為一提 供不同種應力之介電質,因而可用來在TG61和/或BG62内產生壓電效應 而實現壓電彈道電荷注入。此應力可為一單軸(uniaxial)應力,其應力轴一大 體上係平行於TG 61之表面並以該第一方向(列方向)延伸。應變材料65的 個較佳實施例係包括氮化物。氮化物的應力級(Stress ievei)與物理特性可 在其形成期間以厚度與製程條件來加以控制。舉例來說,藉由在氮化物的 形成期間改變化學元素(比方是矽烷(Silane))之壓力,可達到約五千萬帕斯卡 (50 MPa)至約十億帕斯卡(1 Giga Pascal; 1 GPa)大小之應力。具有張應力或 φ 壓縮應力的氮化物可利用廣為人知的化學汽相沉積(Chemical VaporThe upper and the eighth have thicker regions on the bit line diffusion region 13〇 to connect the different units of BG =. It should be noted that polycrystalline dreams are chosen as conductive layers for illustrative purposes (to simplify the process). In general, the remaining conductive materials having low sheet resistance, good trench gap filling capability, and stable properties at high temperatures (e.g., _C) can be utilized. For example, a metallized polycrystalline germanium layer is, for example, a polycrystalline spine having a crane-polycrystalline compound (4) _-P〇lyside, and a well-known CVD technique is used as a conductive material. The crane-polycrystalline suppressor sheet 5 i 1()_square' _ is lower than the severity of the decay _ the resistance of the slab, which is typically about 1 〇〇 to ohm. Materials readily available during the process, such as TiN cattle conductors made of W 4 , can also be considered as conductive material 61a 0881-A31715TWF (5.0) 53 1287292 - material. The next procedure is to form a dielectric M3 on the conductive layer 62a, preferably having a thickness of about 1 nanometer to 4 nanometers. The dielectric (4) can be a nitride deposited using LpcvDv technology well known in the art. - Next, a photoresist is suitably applied to the surface of the structure, and then a photomask step is performed using conventional photolithography techniques to selectively remove the photoresist and leave on the dielectric 143 The lower complex number, the photoresist linear path 14 延伸 extending in the _ direction (column direction). The next procedure is to expose the dielectric 143 to the side and then leave the conductive layer 62a exposed until the insulator is observed to be slicked, and the insulator 6 is used as a -side blocking layer. The charge storage layer (4) and the portion still under the remaining photoresist layer 140 are not affected by this side process. This step forms a plurality of word lines 11 延伸 extending in the first direction (i.e., "column direction"), and each of the two word lines is separated by a second groove 144. The word line 110 read width and the distance between two adjacent characters and lines 11 可以 can be J to be equal to the minimum photolithographic size of the process used. The top view of the resulting structure is shown in Fig. 27, and the cross-sectional views along the lines ^, BB, cc, and dd in this structure are shown in Figs. 27A, 27B, 27C, and 27D, respectively. The next procedure is to engrave the exposed second layer 64a and then etch the exposed charge storage layer 1 until the first insulator 68 is observed, and the first insulator 68 serves as an etch stop layer. The portion of the charge storage layer 66a that is located under the remaining photoresist is not a side program; scale. This step forms a plurality of CSR66s. The light resistance of the fiber is then removed using a transmission method. The top view of the resulting structure is shown in Figure 28, in which the word lines 110 are staggered with the lines of the second grooves 144. The cross-sectional views of the lines from the lines, ribs, cc, and in the structure are shown in Figs. 28A, 28B, 28C, and 28D, respectively. The next procedure is to selectively form an insulating layer such as an oxide (not shown) on the sidewall of the word line no and on the sidewall of the CSR 66 exposed to the second trench 144. The formation of this oxide, which can be formed by the rapid purification of the paste, can be carried out by a thermal oxidation process, and has a thickness of about 2 nm to 8 nm. Next, 0881-A31715TWF(5.0) 8 1287292. A relatively thick dielectric layer (such as an oxide) is formed by a technique well known in the art of conventional LPCVD to fill the second trench. Slot 144. This oxide dielectric is then selectively removed to form an oxide block 146 over the area within trench 144. Preferably, the structure is such that the upper surface of the oxide block 146 is substantially coplanar with the upper surface of the nitride dielectric 143. This can be achieved by using, for example, a chemical-mechanical Polishing (CMP) - to planarize the thick oxide, and then using the nitrogen dielectric 143 as a polishing stop layer and/or etching to prevent the layer. To achieve this by implementing a reactive ion etch (RIE). If it is desired to clean the oxide remaining on the nitride dielectric 143, then a selective oxide step is performed. Thus, this process leaves only the oxide within the second trench 144 to form an oxide block 146 that is self-aligned to the trench 144. The top view of the resulting structure is shown in Fig. 29' where the word line no is staggered with the line of the oxide block 146. The cross-sectional views along the straight lines AA', BB', CC', and DD in this structure are shown in Figs. 29A, 29B, 29C, and 29D, respectively. The next procedure is to perform a step of removing the nitride dielectric 143 (for example, using a Phosphoric add). Next, a filter 52 of a multi-layer structure is formed on the word line no. In a particular embodiment, a third insulator 54a and a fourth insulator 53a φ are considered as a multilayer dielectric of the filter 52. The third insulating layer 54a, such as nitride, is at a temperature of 1050. In the ammonia-containing (NH3) environment of C, it is formed on the word line 11〇 by the rapid thermal nitridation (RaPldJrhennal-Nitridation) program. The third insulator 54a is preferably about 2 nm to 5 nm. The next procedure is to form a fourth insulator 53a, such as an oxide, on the third insulating layer 54a. The fourth insulating layer 53a can be formed by a technique well known using, for example, thermal oxidation, HTO, TEOS, or ISSG. The thickness of the fourth insulating layer 53a is preferably about 2 nm to 4 nm. The third insulating layer 54a and the fourth insulating layer 53a are used as the BD 54 and TD 53 of the memory unit of the present invention, respectively. The top view of the resulting structure is shown in Fig. 30, and the cross-sectional views along the straight lines aa5, BB, CC, and DIT in this structure are shown in Figs. 30A, 30B, 30C, and 30D, respectively. 0881-A31715TWF(5.0) 55 1287292 The field (4) is doped or achieved by subsequent implantation of cesium ions in a private order. This = column wear _ 12 〇 or remember the TG61 ^ fresh, the scale electrical material ^ ^ ^ degree has been flat, rice to 500 nm. Preferably, the undulations of the conductive material 6ia formed thereon are flat, and the _ flat recording (such as CMP) can be undulated by the Wei. It should be noted that the polycrystalline stone system is selected as the material of the conductive material 6ia for the purpose of description... I' as described in the related description of Fig. 27, the other has low sheet resistance, good groove gap filling ability and high temperature. Paste as fresh in the semiconductor manufacturing process, light f-reading materials, such as Wei #, ♦ shop, Deming, Menghua titanium, TiN, TaN, etc., can also be considered as a conductive layer of fairy material, and more Such materials can also be formed on multiple rides to form a composite conductor as a conductive material. Next, a photoresist material (hereinafter referred to as photoresist) is suitably applied to the surface of the structure, and then a photomask process is performed using conventional photolithography techniques to selectively remove the photoresist and conduct electricity. The layer 61a_L leaves a plurality of photoresist linear trajectories extending in the second direction (row direction). The next procedure is to expose the conductive layer 61a to the side until the impurity 53a is observed, and the insulator 53a serves as an etch stop layer. The portion of the conductive layer 61a that is still under the remaining photoresist layer is not affected by this etching process. This step forms a plurality of tunneling lines 120 extending in the second direction (ie, "row direction"), and each of the two lines is separated by a third trench 147 to separate the line width of the alpha tunneling line 12 and two phases. The distance between adjacent tunneling lines 120 can be as small as the minimum photolithographic size of the process used. A top view of the resulting structure is shown in Figure 31, in which the tunneling lines 120 are staggered with the third trenches 147. The cross-sectional views along the lines ΑΑ, ΒΒ, CC, and DD in this structure are shown in Figures 31, 31, 31C, and 31D, respectively. Figure 31 also shows the different areas within the memory cell type (cell 1) of Figure 22. The bit line 13〇 and the word line 13〇2 correspond to the source 95 and the gate 97 of the cell 1〇〇. The figure also shows CD 68, CSR66, RD 64, BG 62, BD 54, TD 53 and TG 61. These areas 0881-A31715TWF(5.0) 56 1287292 - the fields correspond to the corresponding elements in the description in Fig. 22 respectively. The area is exactly the same. The structure of the memory cell and the array is followed by deposition of a mechanically stressed strain material 15 (such as tensile or compressive stress). This strain material 15 is used as a strain source (bump s〇urce) to provide a piezoelectric ballistic charge injection mechanism as described in Figures 17B and 17C, and can be as shown in Figure 31. The strained material 150 is deposited on the structure, or the strained material 150 may be deposited after the insulators 53a and 54b exposed to the third trench 147 are removed by conventional techniques such as the leg. . In the former case, the strained material 150 primarily provides stress to the TG 61. In the latter case, since the strained material is also in contact with the word line 11〇, stress is thus supplied to the TG 61 and BG 62 in each memory unit. The strained material 150 can be a dielectric that provides different stresses and can therefore be used to create a piezoelectric effect in the TG61 and/or BG62 to achieve piezoelectric ballistic charge injection. The stress may be a uniaxial stress whose stress axis is substantially parallel to the surface of the TG 61 and extends in the first direction (column direction). A preferred embodiment of strained material 65 includes a nitride. The stress level (Stress ievei) and physical properties of the nitride can be controlled by thickness and process conditions during its formation. For example, by varying the pressure of a chemical element (such as a silane) during the formation of a nitride, about 50 million Pascals (50 MPa) to about 1 billion Pascals (1 Giga Pascal; 1 GPa) can be achieved. The stress of size. Nitrides with tensile stress or φ compressive stress can be used for chemical vapor deposition (Chemical Vapor)

Deposiotion ; CVD)技術來形成,比方是熱一cVD(Thermal_ CVD)(以形成張 一 應力氮化物)或電漿一CVD(Plasma-CVD)(以形成壓縮應力氮化物)。此外, 令 氮化物的應力級可修改,甚至在有需要時,可利用熟知技術來鬆弛(Relax), 比方是利用劑量高於一門檻濃度(比方是1 X 1〇14分子數/平方公分)的鍺來 離子植入氮化物。在前者之情況中所產生之結構的俯視圖係顯示於第32圖 中’其中應變材料150係沉積於整個陣列之上。此結構中沿直線aa,、BB,、 CC’、以及DD’之剖面圖係分別顯示於第32A、32B、32C以及32D圖。 具涵蓋本揭露優點之本領域之技術者應能明白,在本發明中,於BG 62 與TG 61上造成壓電效應之應變源不需要源自應變材料15〇,亦不需要源自 0881-A31715TWF(5.0) 57 ⑧ 1287292 圖中所顯示的位置,而可來自任何其他裝置(means)以及來自記憶單元内的 任何其他區域。此外,此應力不需要為單軸型,而可以為任何其他型(比方 是雙轴型(biaxial))。舉例來說,當採用多晶矽為bg 62之材料時,應變源可 . 來自BG 62。原因是多晶矽典型上可提供約200 MPa至500 Mpa範圍之張 應力。另一個可作為應變源材料的是鎢矽化物(Tungsten-Silicide),它是廣泛 . 運用於半導體IC製造之材料。鎢矽化物能提供約1·5 GPa至2 GPa範圍之 應力,並且可單獨作為BG 62之材料,或是可形成於一多晶矽層上而與該 夕曰曰梦層共同形成BG 62。其他材料,如非晶石夕(Amorphour Silicon)、多晶 # 石夕鍺(Poly SlGe)、氮化组(TaN)、氮化鈦(ΊΪΝ)等等,亦可考慮作為支持壓電 彈道電荷注入之材料。此外,引入應變之裝置不需要藉由使用應變材料來 達成,而可以經由其他種途徑,比方是離子植入重原子(比方是矽、鍺、石申 等等)至晶體内欲作應變之區域。由於高於門檻劑量的重原子(比方是石夕、 错、砷…等等)之植入干擾晶格的週期性,而產生移位環路(Dislocatioii Loops),因此會在該區域内造成應變。該區域内的應變可進一步提供應力至 其鄰近區域。接受植入區域内的應力可以由該區域内如氮之類的植入原子 來保留’以避免在單元後續製造步驟的期間被鬆馳(Relaxed)。這種離子植 鲁 入方法擁有簡化製程之優點’因其不需要沉積或姓刻應變材料。此外,它 是在受植入之區域造成應變,因此應變僅侷限於最希望存在應變效應之區 . 域。以上羅列的所有方法,皆能為本發明之壓電彈道電荷注入提供受到嚮 ~ 往之壓電效應。此外,雖然本發明記憶單元内僅顯示有一個應變源而已, 然對具本領域之通常技術者當可明白’兩個以上的應變源可同時存在於同 一單元内,用以提供任何型式之應力(張應力或壓縮應力)而皆落於所附加申 請專利範圍内之記憶單元内種種不同區域。 雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任 何熟習此技藝者,在不脫離本發明之精神和範圍内,當可作些許之更動與 潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 0881-A31715TWF(5.0) 58 1287292 【圖式簡單説明】 第1圖顯示一導體一絕緣體系統之能帶圖。圖中顯示該絕緣體能帶於 • 影像力效應與無影像力效應下導電帶之部分; 第2圖顯示一能帶圖,說明常溫電子穿隨過第1圖之導體—絕緣體系 „ 統之電位能障; — 第3入圖顯示一能帶圖,說明熱電子穿隧過第1圖之導體〜絕緣體系統 之電位能障; • 第3B圖顯示電位能障之能障高度與能障頂峰位置與絕緣體之外加介 電質電場間的函數關係; 第3C圖顯示電位能障之能障高度與具不同介電常數之介電質内介電 質電場間的函數關係; 第4圖顯示一能帶圖,說明具寬能譜之熱電子於傳輸過第i圖之導體 一絕緣體系統之能帶的電位能障; 第5圖顯示一能帶圖,說明具窄能譜之熱電子於傳輸過第i圖之導體 一絕緣體系統之能帶的電位能障; φ 第6圖顯示一能帶圖,說明具窄能譜之熱電洞於傳輸過第1圖之導體 一絕緣體系統之價電帶的電位能障; • 第7圖顯示本發明之導體一過濾器系統的能帶圖; 第8圖以外加電壓為緣示參數下,顯示臨限能量相對於費米能階之 : 能級; 第9圖顯不本發明一電荷注入系統之能帶圖實施例,說明彈道電子注 入機制所使狀爾效應麟彡像力縛降姐應; 第10圖顯示本發明另一電荷注入系統之能帶圖實施例,說明彈道電子 注入機制所使用之過濾效應與影像力能障降低效應; 第11圖顯不本發日月之一能帶圖,說明彈道電子注入機制所使用之能障 0881-A31715TWF(5.0) 59 ⑧ 1287292 高度工程學; 第12A圖顯示本發明之能障高度工程學對於彈道電子注入之效應,其 中可藉由TG與BG間電壓來使阻擋往前傳輸電子的能障高度以及阻擋往後 傳輪電洞之能障高度以不同程度改變; 第12B圖顯示本發明電壓分割功能之效應; 第13圖顯示顯示本發明另一能帶圖實施例,說明彈道輕電洞注入機制 所使用之過濾效應與影像力能障降低效應; 第14圖顯示本發明能障高度工程學對於彈道電洞注入之效應,其中可 以藉由TG與BG間電壓來使阻擋往前傳輸電洞的能障高度以及阻擋往後傳 輸電子之能障高度以不同程度改變; 第15圖顯示LH與HH之正規化穿隧機率與TD跨壓之倒數間的函數 關係; 第16圖係本發明另一電荷注入系統之能帶結構實施例; 第17A圖係-無應變石夕内能量E與衝量k間色散關係之示意圖; 第17B圖係-於張應力下之石夕内能量E與衝量七間色散關係之示意圖; 第17C圖係-於壓縮應力下之㈣能量E與衝量k間色散關係之示意 T5J · 圍, 第18 ®係說賴縮應變石夕内正規化平均自由路徑與應力之間的關係 圖; ’、 應力 第19圖係以應力軸絲示參數,卿壓縮應變彻效率提升率盘 之間的關係圖; 第20圖係以無應變石夕之平均自由路徑鱗示參數,說明壓縮 效率提升率與應力之間的關係圖; BG之片嘗阻與平均自 由 第21A圖顯示注入效率與BG厚度之關係圖 第21B圖顯示於壓電電子注入效率為⑼時‘, 路徑之關係圖; 0881-A31715TWF(5.0) 60 1287292 • f 22 _示本發明—單元結構之實施儀剖面圖; f 23 _示本發明另—單元結構之實施例的剖面圖; 第24圖顯示本發明另一單元結構之實施例的剖面圖; - f 25 ®顯示本發·鮮元_結構之示意圖; • 帛26A ®鮮本發_製造記憶單it之第-步驟所使用之—半導體基 r 板的俯視圖; • 第26B圖係顯示沿第26A圖内單元結構沿直線CC,的剖面圖; 第27至32圖係依照本發明一陣列與記憶單元隨後形成步驟之順序, 攀 顯示陣列與記憶單元結構剖面圖; 第27A至32A圖係依照本發明一陣列與記憶單元隨後形成步驟之順 序,顯示陣列與記憶單元結構沿第27至32圖之直線从剖面圖; 第27B至32B圖係依照本發明一p車列與記憶單元隨後形成步驟之順 序,顯示陣列與記憶單元結構沿第27至32圖之直線灿,剖面圖; 第27C至32C目係依照本發明一陣列與記憶單元隨後形成步驟之順 序,顯示陣列與記憶單元結構沿第27至32圖之直線〇(,剖面圖; 第27D至32D圖係依照本發明一p車列與記憶單元隨後形成步驟之順 φ 序’顯示阵列與讀單元結構沿第27至32圖之直線D-D,剖面圖。 【主要元件符號說明】 10〜導體一絕緣體系統之導體; 14〜導體與絕緣體之交界; 1650〜50内的費米能階; 1662〜62内的費米能階; I853〜具影像力效應之53的導電 12〜絕緣體; W〜費米能階; 16G1〜61内的費米能階; 18〜具影像力效應之導電帶; ;I854〜具影像力效應之54的導電帶; 1801〜具影像力效應之61的導電帶;ΙΑ2〜具影像力效應之6之的,導電帶; I%4〜具影像力效應之64的導電帶;IK6〜具影像力放應之66的導電帶; 0881-A31715TWF(5.0) 1287292 1870〜具影像力效應之70的導電帶; 18’〜不具影像力效應之導電帶;20〜具影像力效應之能障高度么; 2053b〜能障高度; 22〜不具影像力要應之能障高度< ; 24〜絕緣體之影像力電位能障; 2453〜能障高度; 2453b〜電位能障; 2454〜能障高度; 2454b〜電位能障; 2464〜影像力電位能障; 24’〜不具影像力效應之絕緣體的電位能障;Deposiotion; CVD) techniques are used to form, for example, thermal-cVD (to form a stress-nitride) or plasma-CVD (to form a compressive stress nitride). In addition, the stress level of the nitride can be modified, and even if necessary, a well-known technique can be used for relaxation, for example, using a dose higher than a threshold concentration (for example, 1 X 1 〇 14 molecules/cm 2 ) The helium ions are implanted with nitride. A top view of the structure produced in the former case is shown in Figure 32 where strained material 150 is deposited over the entire array. Cross-sectional views along the lines aa, BB, CC', and DD' in this configuration are shown in Figs. 32A, 32B, 32C, and 32D, respectively. It will be apparent to those skilled in the art having the benefit of the present disclosure that in the present invention, the strain source that causes the piezoelectric effect on BG 62 and TG 61 does not need to originate from the strained material 15〇, nor does it need to originate from 0881- A31715TWF(5.0) 57 8 1287292 The position shown in the figure can come from any other means and from any other area in the memory unit. Further, the stress does not need to be a uniaxial type, but may be any other type (for example, a biaxial type). For example, when polycrystalline germanium is used as the material of bg 62, the strain source can be derived from BG 62. The reason is that polycrystalline germanium typically provides a tensile stress in the range of about 200 MPa to 500 MPa. Another material that can be used as a strain source is Tungsten-Silicide, which is widely used in the manufacture of semiconductor ICs. The tungsten telluride can provide a stress in the range of about 1·5 GPa to 2 GPa, and can be used alone as a material of BG 62, or can be formed on a polysilicon layer to form BG 62 together with the layer. Other materials, such as Amorphour Silicon, polycrystalline #Poly SlGe, nitrided (TaN), titanium nitride, etc., can also be considered as supporting piezoelectric ballistic charge injection. Material. In addition, the device for introducing strain does not need to be achieved by using a strained material, but can be implanted with heavy atoms (such as 矽, 锗, Shishen, etc.) into the region of the crystal to be strained by other means, such as ion implantation. . Since the implantation of heavy atoms (such as Shi Xi, er, arsenium, etc.) above the threshold dose interferes with the periodicity of the lattice, resulting in a displacement loop (Dislocatioii Loops), strain is generated in this region. . The strain in this region can further provide stress to its vicinity. The stress in the receiving implanted region can be retained by implanted atoms such as nitrogen in the region to avoid being relaxed during the subsequent manufacturing steps of the unit. This ion implantation method has the advantage of simplifying the process 'because it does not require deposition or surname strain materials. In addition, it causes strain in the implanted area, so the strain is limited to the area where the strain effect is most desirable. All of the methods listed above provide the piezoelectric effect of the piezoelectric ballistic charge injection of the present invention. In addition, although only one strain source is shown in the memory unit of the present invention, it will be apparent to those skilled in the art that more than two strain sources can exist simultaneously in the same unit to provide any type of stress. (Zhang stress or compressive stress) are all in different areas of the memory unit within the scope of the appended claims. While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. 0881-A31715TWF(5.0) 58 1287292 [Simple description of the diagram] Figure 1 shows the energy band diagram of a conductor-insulator system. The figure shows that the insulator can carry the part of the conductive strip under the image force effect and the non-image effect; the second figure shows a band diagram showing that the normal temperature electrons follow the conductor-insulation system of Fig. 1 Energy barrier; — Figure 3 shows a band diagram showing the thermal energy tunneling through the potential barrier of the conductor-insulator system of Figure 1; • Figure 3B shows the barrier height of the potential barrier and the peak position of the barrier A functional relationship between the dielectric field and the dielectric field added to the insulator; Figure 3C shows the energy barrier height of the potential barrier as a function of the dielectric field of the dielectric with different dielectric constants; Figure 4 shows an energy A diagram showing the potential energy barrier of a wide-energy spectrum of the electrons transmitted through the conductor-insulator system of the i-th diagram; Figure 5 shows an energy band diagram illustrating the transmission of the hot electrons with a narrow energy spectrum. The potential energy barrier of the energy band of the conductor-insulator system of Fig. i; φ Fig. 6 shows a band diagram illustrating the thermal power hole with a narrow energy spectrum transmitted through the valence band of the conductor-insulator system of Fig. 1. Potential barrier; • Figure 7 shows the invention The energy band diagram of the conductor-filter system; Figure 8 shows the energy of the threshold energy relative to the Fermi level in the case of the applied voltage: the energy level; Figure 9 shows the energy of a charge injection system of the present invention. The embodiment with a diagram illustrates the ballistic electron injection mechanism, and the energy-bearing diagram of another charge injection system of the present invention is shown in FIG. 10, which illustrates the use of the ballistic electron injection mechanism. Filtration effect and image energy barrier reduction effect; Figure 11 shows one of the solar and monthly energy maps, indicating the energy barrier used in the ballistic electron injection mechanism 0881-A31715TWF(5.0) 59 8 1287292 Height Engineering; 12A The figure shows the effect of the high barrier engineering of the present invention on ballistic electron injection, wherein the voltage between the TG and the BG can be used to block the height of the energy barrier for transmitting electrons forward and the barrier height of the backward transmission hole. Different degrees of change; Figure 12B shows the effect of the voltage splitting function of the present invention; Figure 13 shows another embodiment of the energy band diagram of the present invention, illustrating the filtering effect and shadow used by the ballistic light tunnel injection mechanism The force barrier reduction effect; Figure 14 shows the effect of the energy barrier height engineering on the ballistic hole injection, wherein the voltage between the TG and the BG can be used to block the height of the energy barrier from the forward transmission hole and block the back. The height of the energy barrier of the transmitted electrons varies to varying degrees; Figure 15 shows the functional relationship between the normalized tunneling probability of LH and HH and the reciprocal of the TD cross-voltage; Figure 16 is the energy band structure of another charge injection system of the present invention. Example; Fig. 17A is a schematic diagram showing the relationship between the energy E and the impulse k in the unstrained stone; Fig. 17B is a schematic diagram showing the relationship between the energy E and the impulse of the seven times under the tensile stress; Diagram of the relationship between the energy distribution E and the impulse k under compressive stress T5J · circumference, the 18th series is the relationship between the normalized mean free path and stress in the slab strain; ', stress Figure 19 shows the relationship between the stress axis and the efficiency of the disk. The 20th figure shows the average free path scale of the unstrained stone, indicating the compression efficiency and stress. Between Figure; BG film taste resistance and average freedom Figure 21A shows the relationship between injection efficiency and BG thickness. Figure 21B shows the relationship between the piezoelectric electron injection efficiency (9) and the path; 0881-A31715TWF(5.0) 60 1287292 • f 22 — shows a cross-sectional view of an embodiment of the unit structure; f 23 — shows a cross-sectional view of another embodiment of the unit structure of the present invention; and FIG. 24 shows a cross-sectional view of another embodiment of the unit structure of the present invention; - f 25 ® shows the schematic diagram of the hair and fresh elements _ structure; • 帛 26A ® fresh hair _ the first step of the manufacturing memory sheet - the top view of the semiconductor-based r-plate; • the 26B-line shows the 26A is a cross-sectional view of the unit structure along the line CC; FIGS. 27 to 32 are sectional views of the array and the memory cell structure in accordance with the sequence of the subsequent steps of forming an array and the memory unit according to the present invention; FIGS. 27A to 32A are in accordance with The sequence of steps for forming an array and memory cell of the present invention, the display array and the memory cell structure are taken from the cross-sectional view along the lines 27 to 32; and the 27B to 32B are followed by a step of forming a p-column and memory unit according to the present invention. In the order of the steps, the display array and the memory cell structure are along the line 27 to 32, and the cross-sectional view; the 27C to 32C are in the order of the subsequent formation steps of an array and the memory cell according to the present invention, and the display array and the memory cell structure are along Straight line 第 of the 27th to 32th drawings (cross-sectional view; Figs. 27D to 32D are diagrams showing the arrangement of the array and the read cell structure along the subsequent steps of the p-column and the memory cell in accordance with the present invention. Straight line DD, section view. [Major component symbol description] 10~ conductor-insulator system conductor; 14~ conductor and insulator junction; Fermi level in 1650~50; Fermi level in 1662~62; I853~ with image force effect Conductive 12~insulator of 53; W~ Fermi level; Fermi level in 16G1~61; Conductive strip with image force effect; I854~ Conductive strip with image force effect 54; 1801~ The conductive band of the image force effect of 61; ΙΑ2~ with the image force effect of 6, the conductive tape; I%4~ the conductive band with the image force effect of 64; IK6~ the conductive tape with the image force of 66; 0881-A31715TWF(5.0) 1287292 1870~ Conductive tape with image force effect 70; 18'~ conductive tape without image force effect; 20~ energy barrier height with image force effect; 2053b~ energy barrier height; 22~ Image height and energy barrier without image force < 24~ insulator image potential potential barrier; 2453~ energy barrier height; 2453b~ potential barrier; 2454~ energy barrier height; 2454b~ potential barrier; 2464~ imaging force Potential barrier; 24'~electricity of insulator without image force effect Energy barrier;

26〜能障偏移量; 28〜能障頂峰; 30〜能量頂峰與導體/絕緣體交界之間距; 31〜作富爾諾罕穿隧之常溫電子;32〜熱電子; 33〜電子動能; 34〜朝前方向之箭頭; 34’〜朝後方向之箭頭; 36〜電子能量分佈之寬能譜(能障之前); 36’〜電子能量分佈之寬能譜(能障之後); 37〜單能量之熱電子; 38〜電子能量分佈之窄能譜(能障之前); 38’〜電子能量分佈之窄能譜(能障之後); 40〜單能量之熱電洞; 40’〜單能量之熱電洞(通過能障後); 41〜電洞能障高度(具有影像力效應); 4Ι53,4153b ’ 4154 ’ 4154b〜能障高度; 41’〜電洞能障高度(不具影像力效應); 41’53,41’53b,41’54,41’54b〜能障高度; 42〜影像力電洞能障; 4253〜第二電洞電位能障; 4253b〜第一電位能障; 4254〜第一電洞電位能障; 4254b〜第二電位能障; 4264〜64内之影像力能障; 0881-A31715TWF(5.0) 62 1287292 42’〜不具影像力之電洞能障丨 4½〜53之價電帶; 4401〜61之價電帶; 4464〜64之價電帶,· 447〇〜70之價電帶; 46〜電洞動能; 48p〜48之頂峰分饰; △48〜48之窄能譜; 50〜導體; 53〜穿隧介電質; 54〜阻擋介電質; 55〜導電帶偏移量; 56’〜穿隧後之電子; 57p〜57之頂聲分佈; A 57〜57之能譜; △ 57’〜57’之能量分佈; 59〜導體一過濾器系統; 61〜穿隧閘; 64〜保留介電質; 66〜電荷儲存區域; 662〇〇〜奈米顆粒; 44〜價電帶; 4454〜54之價電帶; 4462〜62之價電帶; 4466〜66之價電帶; 44’〜不具影像力之價電帶; 48〜電子能量分佈(能障之前); 48t〜48之尾端分佈; 48’〜電子能量分佈(能障之後); 52〜過濾器; 53a〜第四絕緣體; 54a〜第三絕緣體; 56〜作直接穿隧之常溫電子; 57〜穿隧電子能量分佈(能障之前); 57t〜57之尾端分佈; 57’〜穿隧電子能量分佈(能障之後); 58〜臨限能量; 60〜導體一絕緣體系統; 62〜彈道閘; 64a〜第二絕緣體; 6610〇〜浮動閘; 66300〜牌; 68〜通道介電質/製造程序中 第一絕緣體; 70〜主體; 71〜電荷儲存區域上之電子; 72〜輕制(減雜); 73〜重__雜); 74〜朝後方向之箭頭’ 75〜輕電洞(於穿隨閘内往前注入) 76〜重電洞(於穿隧閘内往前注入); 0881-A31715TWF(5.0) 63 128729226~ energy barrier offset; 28~ energy barrier peak; 30~ energy peak to conductor/insulator boundary; 31~ for Furnham tunneling at room temperature; 32~ hot electron; 33~ electron kinetic energy; ~ arrow pointing forward; 34'~ arrow in the backward direction; 36~ broad energy spectrum of electron energy distribution (before energy barrier); 36'~ broad energy spectrum of electron energy distribution (after energy barrier); 37~ single Thermal electrons of energy; 38~ narrow energy spectrum of electron energy distribution (before energy barrier); 38'~ narrow energy spectrum of electron energy distribution (after energy barrier); 40~ single energy thermoelectric hole; 40'~ single energy Thermal hole (after passing the energy barrier); 41~ hole energy barrier height (with image force effect); 4Ι53, 4153b ' 4154 ' 4154b ~ energy barrier height; 41' ~ hole energy barrier height (without image force effect); 41'53, 41'53b, 41'54, 41'54b~ energy barrier height; 42~ image force hole energy barrier; 4253~ second hole potential energy barrier; 4253b~ first potential energy barrier; 4254~ a hole potential energy barrier; 4254b ~ second potential energy barrier; 4264~64 image force barrier; 0881-A31715T WF(5.0) 62 1287292 42'~Electrical hole energy barrier with no image force 丨41⁄2~53 price band; 4401~61 price band; 4464~64 price band, · 447〇~70 price Band; 46~ hole kinetic energy; 48p~48 peak peak decoration; △48~48 narrow energy spectrum; 50~ conductor; 53~ tunneling dielectric; 54~ blocking dielectric; 55~ conductive tape offset 56'~ electrons after tunneling; top sound distribution of 57p~57; energy spectrum of 57~57; energy distribution of △57'~57'; 59~conductor-filter system; 61~through tunnel 64~retention dielectric; 66~ charge storage area; 662〇〇~nano particles; 44~ valence band; 4454~54 price band; 4462~62 price band; 4466~66 price Belt; 44'~ image power strip; 48~ electron energy distribution (before energy barrier); 48t~48 tail distribution; 48'~ electron energy distribution (after energy barrier); 52~ filter; 53a ~ fourth insulator; 54a ~ third insulator; 56 ~ for direct tunneling of normal temperature electrons; 57 ~ tunneling electron energy distribution (before energy barrier); 57t ~ 57 tail distribution; 57'~ tunneling electron energy distribution (after energy barrier); 58~ threshold energy; 60~ conductor-insulator system; 62~ ballistic gate; 64a~second insulator; 6610〇~floating gate; 66300~ card; Channel dielectric / manufacturing process first insulator; 70 ~ body; 71 ~ charge storage area of the electron; 72 ~ light (subtractive); 73 ~ heavy __ miscellaneous; 74 ~ backward direction arrow ' 75~ light hole (injected forward in the gate) 76~ heavy hole (injected in the tunnel); 0881-A31715TWF(5.0) 63 1287292

75’〜輕電洞(於阻擋介電質内往前注入); 76’〜重電洞(於阻檔介電質内往前注入); 77〜電洞之能量分佈; 78〜彈道輕電洞(於彈道閘内往前注入); 79〜散射之重電洞(於彈道閘内往前穿隧); 80〜彈道輕電洞之能量分佈; 82〜電荷儲存區域内之電洞; 84〜彈道閘内往後穿隧之電子; 85〜導電帶能谷内之電子; 86〜導電帶能谷一電子質量重; 87〜導電帶能谷一電子質量輕; 86m〜42之最小值; 87m〜44之最小值; 88〜LH次能帶; 89〜HH次能帶; 90〜電洞; 91〜價電帶簡併; 92〜無應變情況之能帶間隙; 93〜張力應變情況之能帶間隙; 94〜壓縮應變情況之能帶間隙; 95〜源極; 96〜沒極; 97〜通道; 98〜基板; 110〜字元線; 120〜穿隧線; 130〜位元線; 140〜光阻; 142〜第一溝槽; 143〜阻擋介電質上之氮化物介電質 9 146〜溝槽氧化物過濾器; 147〜第三溝槽; 150〜應變材料; ED〜絕緣體12之外加電場; LH〜輕電洞; πιφ*〜無應_^之平均自由路徑; TBD二且擋〃電質之厚度; Ttd〜穿隧介電質之厚度;75'~light hole (injected into the blocking dielectric); 76'~ heavy hole (injected into the dielectric under the barrier); 77~ energy distribution of the hole; 78~ ballistic light Hole (injected in the ballistic gate); 79~scattered heavy hole (through tunnel in the ballistic gate); 80~ ballistic light hole energy distribution; 82~ charge storage area hole; 84 ~ Electron tunneling inside the ballistic gate; 85~ Conductive band can be electrons in the valley; 86~ Conductive band energy can be a mass of electrons; 87~ Conductive band energy can be a light electron; the minimum value of 86m~42; 87m Minimum value of ~44; 88~LH sub-band; 89~HH sub-band; 90~ hole; 91~ valence band degenerate; 92~ no strain condition band gap; 93~ strain strain condition With gap; 94~ compressive strain condition band gap; 95~ source; 96~ no pole; 97~ channel; 98~ substrate; 110~word line; 120~ tunneling; 130~bit line; ~ photoresist; 142~ first trench; 143~ barrier dielectric on nitride dielectric 9 146~ trench oxide filter ; 147 ~ third groove; 150 ~ strain material; ED ~ insulator 12 plus electric field; LH ~ light hole; πιφ * ~ no _ ^ average free path; TBD two and the thickness of the barrier ;; Ttd ~ the thickness of the tunnel dielectric;

Va也田、跨於過濾器52之外加電壓;〜阻檔介電質之跨壓; Vid〜穿隧介電質之跨壓。 0881-A31715TWF(5.0) 64 (S)Va also, across the filter 52 plus voltage; ~ blocking the dielectric across the voltage; Vid ~ tunneling dielectric across the voltage. 0881-A31715TWF(5.0) 64 (S)

Claims (1)

128了^@22357號申請專利範圍修正本 十、申請專利範園: 1·一種導體一材料系統,包括·· ‘體,其具有電荷载子,t中該等 有-能量分m 何載子係具 一材料,其與該導體係具有一 障鄰近於該界面,苴中节箄 /、有電位月匕 〃 τ忒4電位能障係可電性修改 以控制該等電荷载子之傳輸。 …少改用 其中2.如中請專利範圍第1項所述之導體-材料系統, 該等電荷載子係常溫電荷載子,以及 該材料係—過遽器,其中該過濾器係舆該導體於兮 乂面處相接觸並包括介電#以提供—種對某極荷載 :,功能,其中該過遽器係包括可電性修了: 月^早,用以控制沿某一方向通 十 载子的流動。 極性電荷 3·如申請專利範圍第 其中該過濾器更提供:128 ^^22357 Application for Patent Scope Amendment 10, Patent Application Fan Park: 1. A conductor-material system, including · · 'body, which has electric charge carriers, and t there are - energy points m The device is provided with a material adjacent to the interface with the barrier, and the potential energy barrier is electrically modified to control the transmission of the charge carriers. ...there is no change to 2. The conductor-material system of claim 1 of the patent scope, the charge carrier is a normal temperature charge carrier, and the material system is a filter, wherein the filter system The conductor is in contact with the surface of the crucible and includes a dielectric # to provide a pair of pole loads: a function, wherein the filter system includes an electrical repair: month ^ early to control the passage in a certain direction The flow of the carrier. Polar charge 3· As claimed in the scope of the patent, the filter provides: 一材料系統 -電壓分割功能,用以降低該等介電質内之 4. 如申請專利範圍第2項所述之導體— 其中該過濾功能係一種帶通過濾功能。 〜、'、、 5. 如中請專利範圍第2項所述之導體—材料 其中該過濾功能係一種質量過濾功能。 ’、、、、 6·如申請專利範圍第2項所述之導體— 其中該過濾功能係一種電荷過濾功能。 ’、、 0881 -A31715TWF1 ;(20060816) 65 1287292 7·如申請專利範圍第6項所述之導體一材料系統, 其中該等電位能障係一第一組能障,以及該過濾器更包 括一第二組可電性修改之電位能障,用以控制沿另一與 该某一方向大體上相反之方向通過該過濾器之相反極性 電荷載子的流動。 8·如申請專利範圍第7項所述之導體一材料系統, 其中忒第二組電位能障之能障高度與橫跨於過濾器之壓 降間的關係係較該第一組電位能障之能障高度與橫跨於 過濾器之壓降間的關係微弱。 、 9·如申請專利範圍第2項所述之導體一材料系統, 其中該過濾器係包括: 一第一介電質,其設置於該導體之鄰近區域;以及 、 第一介電質,其設置於該第一介電質之鄰近區 域其中该第一介電質之能帶間隙係較該第一介電質之 能帶間隙為窄。 、 10·如申請專利範圍第9項所述之導體一材料系統, 其中該第二介電質之介電常數與該第一介電質厚度之乘 積係大體上大於該第一介電質之介電常數與該第二介電 質厚度之乘積。 11·如申請專利範圍第9項所述之導體一材料系統, 其中其中該第一介電質係包括氧化物,以及該第二介電 貝係包括由氮化物、氮氧化物、A1203、、Ti02、、 Τ&amp;2〇5’以及以上化合物構成之合金所組成群組中選擇出 的材料。 0881 -A31715TWF1 ;(20060816) 66 1287292 其中 12.如申請專利範圍第〗項所述之導體—材料系 統 4等電荷載子係高能電荷載子, 该材料係一絕緣體,以及 。亥等電位能障係包括一 | 障,用以控制兮冑雷^ ^改之衫像力電位能 輸。 ^4電何載子越過該影像力電位能障之傳A material system - a voltage splitting function for reducing the dielectric within the dielectric material. 4. The conductor of claim 2, wherein the filtering function is a belt pass filter function. ~, ',, 5. Conductor-material as described in item 2 of the patent scope, wherein the filtering function is a mass filtering function. ',,,, 6. The conductor of claim 2, wherein the filtering function is a charge filtering function. The conductor-material system of claim 6, wherein the potential energy barrier is a first set of energy barriers, and the filter further comprises a A second set of electrically configurable potential energy barriers for controlling the flow of opposite polarity charge carriers through the filter in substantially opposite directions to the direction. 8. The conductor-material system of claim 7, wherein the relationship between the energy barrier height of the second set of potential energy barriers and the voltage drop across the filter is compared to the first set of potential energy barriers. The relationship between the height of the barrier and the pressure drop across the filter is weak. 9. The conductor-material system of claim 2, wherein the filter comprises: a first dielectric disposed adjacent to the conductor; and a first dielectric; And disposed in the adjacent region of the first dielectric, wherein the energy gap of the first dielectric is narrower than the energy gap of the first dielectric. The conductor-material system of claim 9, wherein the product of the dielectric constant of the second dielectric and the thickness of the first dielectric is substantially greater than the first dielectric The product of the dielectric constant and the thickness of the second dielectric. The conductor-material system of claim 9, wherein the first dielectric system comprises an oxide, and the second dielectric shell comprises a nitride, an oxynitride, an A1203, A material selected from the group consisting of Ti02, Τ &amp; 2〇5' and an alloy composed of the above compounds. 0881 -A31715TWF1 ;(20060816) 66 1287292 Where: 12. The conductor-material system 4, such as the application of the patent scope, is a high-energy charge carrier of the charge carrier, the material is an insulator, and . The EW potential energy barrier system includes a barrier to control the power of the smashing force. ^4 electric carrier over the image of the force potential barrier 如申明專利範圍帛12項所述之導體—材 統,其中該等高能電科恭尽技目* 材科糸 能*八心“: 具有一能量分佈,其中該 刀佈係具有一介於約3〇meV至約300 meV之能^ '如申請專利_ 12項所述之導體—材料系 '''八5亥絕緣體係包括由氧化物、FSG、SiLK、CDO、 氮化物、氮氧化物、Al2〇3、Hf〇2、Ti〇2、Zr〇2、Ta2〇5, X及以上材料形成之合金所組成群組中選擇出的材料。 Η·一種電荷注入系統,包括: 一導體一過濾器系統,包括: 一第一導體,用以供應常溫電荷載子;以及 一過濾器,其與該第一導體相接觸,並包括介電質 以提供一對某極性電荷載子之過濾功能,其中該過濾器 係包括可電性修改之電位能障,用以控制沿某一方向通 過該過濾、器之某極性電荷載子的流動;以及 一導體一絕緣體系統,包括: 一第二導體,其與該過濾器相接觸並具有來自該過 濃裔之同此電何載子;以及 0881 -A31715TWF1 ;(20060816) 67 1287292 具有—旦f、彖體,其與該第二導體相接觸於一交界,並且 像力電: = 】 =障於該交界之鄰近地區’其中該影 能越過它來傳輸。 改’以允許料高能電荷載子 其中申Λ專Γ範圍第15項所述之電荷注入系統, 括一 ‘二“立此ρ早係一第一組能障,以及該過濾、器更包 該掌一古△可電眭修改之電位能障,用以控制沿另一與 電荷載子相反之方向通過該過濾器之相反極性 其中利範圍第15項所述之電荷注入系統, 分佈#且:1何載子係具有—能量分佈,其中該能量 =、有一介於約3〇 mev至約則μ之能譜。 1中^專利範圍第15項所述之電荷注入系統, 〜中忒4向能電荷载子係輕電洞。 i中二如Λ請專利範圍第15項所述之電荷注入系統, 其中该專兩能電荷载子係電子。 申請專利範圍第15項所述之電荷注入系統, 八中5亥專向能電荷载子係壓電電洞。 並中二1箄如-申Λ專利範圍第15項所述之電荷注入系統, 八中5亥專鬲旎電荷载子係壓電電子。 22· —種記憶單元,包括: 一導體一過濾器系統,其具有: 二導體二用以供應常溫電荷载子;以及 n玄導體相接觸,並包括介電質以提 〇881-A31715TWFl;(2〇〇6〇816) 68 1287292 供一種對某極性電荷载子之過遽功能,其令該過濟哭係 包括: 一第一組可電性修改之電位能障,用以控制沿某一 方向通過該過濾器之某極性電荷載子之流動,以及 一第二組可電性修改之電位能障,用以控制沿另一 與該某一方向大體上相反之方向通過該過濾器之相反極 性電荷載子之流動。For example, the conductor-material system described in the scope of Patent Application 帛12, wherein the high-energy electric sciences are doing their best to meet the technical principles*, the material science, and the eight-hearted “have an energy distribution, wherein the knives have an energy of about 3 〇meV to about 300 meV ^ 'As claimed in the patent _ 12 conductor-materials '''8 5 Hai insulation system consists of oxide, FSG, SiLK, CDO, nitride, nitrogen oxides, Al2 〇3, Hf〇2, Ti〇2, Zr〇2, Ta2〇5, X and materials selected from the group consisting of the above materials. Η· A charge injection system, including: a conductor-filter The system includes: a first conductor for supplying a normal temperature charge carrier; and a filter in contact with the first conductor and including a dielectric to provide a filter function for a pair of polar charge carriers, wherein The filter includes an electrically configurable potential energy barrier for controlling the flow of a polar charge carrier passing through the filter in a certain direction; and a conductor-insulator system comprising: a second conductor In contact with the filter and having too much And the same as the electric carrier; and 0881 -A31715TWF1; (20060816) 67 1287292 has a f, a body, which is in contact with the second conductor at an interface, and the image is electric: = 】 = barrier The vicinity of the junction 'where the shadow can be transmitted over it. Change 'to allow the high-energy charge carriers to be filled with the charge injection system described in item 15 of the scope of the application, including a 'two' stand The first set of energy barriers, and the filter device further includes a potential energy barrier that can be modified by the palm of the hand to control the opposite polarity of the filter in the opposite direction to the charge carrier. The charge injection system of item 15, wherein #1:1 carrier has an energy distribution, wherein the energy = has an energy spectrum between about 3 〇 meV and about μ. 1 In the charge injection system described in Item 15 of the patent range, ~ Zhongyu 4-way energy charge sub-system light hole. In the second embodiment of the invention, the charge injection system described in claim 15 of the patent, wherein the special two-charge charge electrons. Applying for the charge injection system described in item 15 of the patent scope, the Bazhong 5 Hai is dedicated to the chargeable sub-system piezoelectric hole. And in the second one, such as the charge injection system described in Item 15 of the application scope of the patent, the electric charge system of the Bazhong 5hai special charge. 22. A memory unit, comprising: a conductor-filter system having: two conductors 2 for supplying a normal temperature charge carrier; and n n-conductor contacts, and comprising a dielectric material for lifting 881-A31715TWFl; 2〇〇6〇816) 68 1287292 For a function of over-the-counter charge of a certain polarity, which causes the over-cry crying system to include: a first set of electrically-correctable potential energy barriers for controlling along a certain a direction of flow through a polarity of charge carriers of the filter, and a second set of electrically configurable potential barriers for controlling the opposite of passing the filter in a direction generally opposite the direction The flow of polar charge carriers. 上、23·如申請專利範圍第22項所述之記憶單元,其中 4導體係-第-導體,以及該記憶單元更包括一導體一 絕緣體系統,其中該導體_絕緣體系統係包括: …一f二導體,其與該過滤器相接觸並具有來自該過 遽為之南能電荷載子; ' ^絕緣體,其與該第二導體相接觸於一交界並具有 一影像力電位能障於該交界之鄰近地區, 一其巾該影像力電位能障射電性修改,以允許 高能電荷載子能越過它來傳輸。 / 24·如申請專利範圍第23項所述之記憶單元,並 否亥荨南能電荷載子且右^^处旦八y^ 7戰于具有此里分佈,其中該能量分佈具 有一介於約3〇meV至約3〇〇meV之能譜。 ’、 j5.如申請專利範圍第23項所述之記憶單元,1 該等咼能電荷载子係輕電洞。 八 26. 如中請專利範圍第23項所述 該等高能電荷载子係電子。 早兀八中 27. 如申請專利範圍第23項所述之記憶單元,其中 0881-A31715TWFl;(2〇〇6〇8l6) 69 1287292 该等高能電荷载子係壓電電洞。 认如申請專利範圍第23項所述之記憶 该專雨能電荷载子係壓電電子。 # 凡,、中 ^一種記憶單元之方法,包括以下步驟· 形成〜、苐-導電型之主體於 . 形成一笫一绍綠昆w 卞守篮丞板内; 減# '絕緣層於該半導體基板上. 形成-電荷儲存區域於該第一絕緣層上; 形成-具第二導電型之第—區域和— 之第二區域於該主體内; ,、弟一V電型 、形成-通道區域於該主體内於該第—區域與一 區域之間,並且該通道區域盘 ^ — 絕緣; 亥電何储存區域相鄰且相 :=二=層於該電荷错存區域之鄰近區域; y 、冷电區域,其中該第一導電區域具有至 y-部分區域與該電荷儲存區域相鄰且相絕緣;- 鄰近具有㈣功能之_器於該第—導電區域之 第-二成:域第:至導電區域’其中該第二導電區域係與該 D° s 夕一部分區域相鄰且利用該過濾器相 %緣。 30.如申請專利範圍第29項所述之形成—記 之方法,其中 該第一導電區域與該第二導電區域相重疊於一重Α 區域;以及 且 0881-A31715TWF1;(20060816) 70 1287292 區域區域之至少—部分區域係設置於該重叠 之方^如申言青專利範圍第29項所述之形成一記憶單元 中该過濾裔係包括多層介電質並更提供·· 二電壓分割功能,用以降低該等介電質内之壓降。 之方專利範圍第29項所述之形成-記憶單元 /、中該過濾功能係一種帶通過濾功能。 之方專利範圍第29項所述之形成-記憶單元 &quot;中該過濾功能係-種質量過據功能。 之方=申二專利範圍第29項所述之形成-記憶單元 /、中該過濾功能係一種電荷過濾功能。 之方法專=圍第29項所述之形成一記憶單元 ,、中5亥過;慮器係包括: -ϊ二1:1’其設置於該導體之鄰近區域;以及 域,其中今第1广八二其設置於該第-介電質之鄰近區 能帶間卩:為;r電質之能帶間隙係較該第-介電質之 36. 如申請專利範 之方法,1中Μ〜一貝料之形成-記憶單元 米顆粒。電何儲存區域係包括複數個相分離之奈 37. 如申請專利範圍第29項所 … 之方法’其中該電荷儲存區域係包括— :早兀 中心之捕捉介電質。 /、有複數個捕捉 38. -種形成一記憶單元陣列之方法,包括以下步 0881-A31715TWF1;(20060816) 71 1287292The memory unit of claim 22, wherein the 4-lead system-the first conductor, and the memory unit further comprises a conductor-insulator system, wherein the conductor_insulator system comprises: a two conductor that is in contact with the filter and has a south energy charge carrier from the pass; the '^ insulator is in contact with the second conductor at an interface and has an image force potential barrier to the junction In the vicinity, the image force potential barrier is radio-modified to allow high-energy charge carriers to pass over it. / 24 · If the memory unit described in claim 23 of the patent scope, and whether it is a South China electric charge carrier and a right ^ ^ at the end of the eight y ^ 7 battle with a distribution, wherein the energy distribution has a 3〇meV to about 3〇〇meV energy spectrum. ???, j5. The memory unit of claim 23, wherein the 咼 energy charge sub-system light hole. VIII 26. Such high-energy charge carrier electrons as described in item 23 of the patent scope. As early as the eighth, 27. The memory unit described in claim 23, 0881-A31715TWFl; (2〇〇6〇8l6) 69 1287292 These high-energy charge sub-system piezoelectric holes. It is recognized as the memory described in item 23 of the patent application. The rain can charge the piezoelectric electrons. #凡,中中^ A method of a memory cell, comprising the following steps: forming a body of the ~, 苐-conductivity type. Forming a 笫一绍 绿 昆 绿 卞 卞 卞 ; ; ; ; ; ; ; ; ' ' ' ' ' ' ' ' ' ' ' ' Forming a charge storage region on the first insulating layer; forming a second region having a second conductivity type and a second region in the body; and, a V-electric type, forming a channel region Between the first region and a region, and the channel region is insulated; the storage region is adjacent and the phase: = two = layer adjacent to the charge storage region; y, a cold-electric region, wherein the first conductive region has a y-partial region adjacent to and insulated from the charge storage region; - adjacent to the (fourth) function of the first conductive region of the first conductive region: To the conductive region 'where the second conductive region is adjacent to a portion of the D° s and utilizing the filter phase. 30. The method according to claim 29, wherein the first conductive region and the second conductive region overlap with a plurality of regions; and 0881-A31715TWF1; (20060816) 70 1287292 region region At least a part of the region is disposed on the side of the overlap. In the memory unit formed in claim 29 of the claim, the filter system includes a plurality of dielectric materials and further provides a two-voltage division function for reducing The pressure drop within the dielectric. The formation-memory unit described in item 29 of the patent scope is a filter pass function. In the formation-memory unit described in Item 29 of the patent scope, the filtering function is a quality-based function. The formation/memory unit described in item 29 of the patent scope of Shen 2, and the filtering function is a charge filtering function. The method is specifically for forming a memory unit as described in item 29, and the medium is over 5; the device includes: - ϊ2 1:1' which is disposed adjacent to the conductor; and the domain, wherein the first广八二 is disposed in the vicinity of the first dielectric-intermediate band: ;; r energy energy band gap is compared with the first-dielectric material 36. As in the patent application method, 1 Μ~ The formation of a shell material - memory unit rice particles. The electrical storage region includes a plurality of phase separations. 37. The method of claim 29, wherein the charge storage region comprises: a capture dielectric of the early collapse center. /, there are multiple captures 38. - A method of forming a memory cell array, including the following steps 0881-A31715TWF1; (20060816) 71 1287292 形成一具第一 等電型之主體於 / ---一股々;一千导體基板内; 形成一第一絕緣層於該半導體基板上; , 、形成彼此分離且以一第一方向沿伸之位元線 母遠位兀線係形成於該主體之至少一部分區域内,、 形成複數個電荷儲存區域於該安 η中’其㈣列係由沿該第一方向延伸 #及&gt;。-垂直於該第-方向之第二方向延伸之列構成.丁乂 形成複數個具第二導電型之第—區域於該主體内. 形成複數個具第二導電型之第二區域於該主體内. 形成複數個通道區域於該主體内,其中每一該 於該複數個第一區域當中之-與該複數個ί :域田中之—之間’並且每—該通道區域大體上與該 硬數個㈣儲存區域當中之一相鄰且相絕緣; 形成複數個第-導電區域,其中每一該第一導電區 或具有至少-部分區域與該複數個電荷儲存區域當中之 一相鄰且相絕緣; 、尚,成複數個具有一過遽功能之過渡器,纟巾每一該 過據器具有至少一部分區域與該複數個第一導電區域當 中之一相鄰; 形成複數個第二導電區域,其中每一該第二導電區 或係與該複數個第—導電區域當中之-之至少-部分區 域相鄰且利用該複數個過㈣當中之-相絕緣。 39.如申4專利範圍第38項所述之形成一記憶單元 0881- A31715TWF1 ;(20060816) 72 1287292 電材料構成之複數個相平行並相分離且由導 線,並且每= 字;^1 之第二方向延伸橫越該位元 -導電區域電性:接線输等記憶單元當中〜第 40‘如申請專利範圍第%項所述之形成一記 電:二=,ΐ包括形成複數個相平行並相分離且由導 :電:::伸並與該等記憶單謝-些之第二導電區 礼如申請專利範圍第%項所述 陣列之方法’其中每一該第一導電 = 電,彼此重疊於一重疊區域,其中每一該電二二 £域係设置於該等重疊區域當中之—的鄰近區域。 陣列Γ方如專中利範圍第38項所述之形成一記憶單元 其中母一該位元線係與該等記憶單元杏中 一些之第二區域電性相接。 田T 43.如中請專利範圍第38項所述之形成—記憶單元 陣列之方法,其中每m線係與該等記憶單元 :些之第二區域電性相接於-行上,以及與該等記 兀當中一些之第一區域電性相接於—相鄰行上。 0881 -A31715TWF1 ;(20060816) 73Forming a body of the first isoelectric type in / --- a stack of enthalpy; one thousand conductor substrates; forming a first insulating layer on the semiconductor substrate; , forming separate from each other and in a first direction The extended bit line female distal line is formed in at least a portion of the body, and a plurality of charge storage regions are formed in the 'n' of the 'fourth column' extending along the first direction # and &gt;. Forming a column extending perpendicularly to the second direction of the first direction; forming a plurality of first regions having a second conductivity type in the body. Forming a plurality of second regions having a second conductivity type on the body Forming a plurality of channel regions within the body, each of which is between the plurality of first regions - and between the plurality of ί : domain fields - and each of the channel regions is substantially associated with the hard One of the plurality of (four) storage regions is adjacent and insulated; forming a plurality of first conductive regions, wherein each of the first conductive regions or having at least a partial region adjacent to one of the plurality of charge storage regions Insulating; and a plurality of transitioners having a function of crossing the enthalpy, each of the diapers having at least a portion of the region adjacent to one of the plurality of first conductive regions; forming a plurality of second conductive regions Each of the second conductive regions or regions is adjacent to at least a portion of the plurality of first conductive regions and is insulated by a phase of the plurality of (four). 39. Forming a memory unit 0881-A31715TWF1 as described in claim 38 of the patent scope of claim 4; (20060816) 72 1287292 A plurality of electrical materials are formed in parallel and separated by a wire, and each = word; The two-direction extension traverses the bit-conducting area electrical: the memory unit is connected to the memory unit, and the 40th' is formed as described in item 5% of the patent application: two =, ΐ includes forming a plurality of parallel and Phase separation and by conduction: electricity::: stretch and the second conductive area of the memory, such as the method of claim </ RTI> </ RTI> <RTIgt; Overlapping an overlapping region, wherein each of the electrical domains is disposed adjacent to the overlapping regions. The array unit forms a memory unit as described in item 38 of the specification, wherein the mother line is electrically connected to the second area of some of the memory unit apricots. The method of forming a memory cell array according to claim 38, wherein each m-line system and the second memory regions of the memory cells are electrically connected to the line, and The first regions of some of the records are electrically connected to adjacent rows. 0881 -A31715TWF1 ;(20060816) 73
TW94122357A 2004-07-01 2005-07-01 Method and apparatus transporting charges in semiconductor device and semiconductor memory device TWI287292B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US58523804P 2004-07-01 2004-07-01
US62632604P 2004-11-08 2004-11-08
US11/007,907 US7115942B2 (en) 2004-07-01 2004-12-08 Method and apparatus for nonvolatile memory
US11/120,691 US7759719B2 (en) 2004-07-01 2005-05-02 Electrically alterable memory cell

Publications (2)

Publication Number Publication Date
TW200607078A TW200607078A (en) 2006-02-16
TWI287292B true TWI287292B (en) 2007-09-21

Family

ID=39460273

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94122357A TWI287292B (en) 2004-07-01 2005-07-01 Method and apparatus transporting charges in semiconductor device and semiconductor memory device

Country Status (1)

Country Link
TW (1) TWI287292B (en)

Also Published As

Publication number Publication date
TW200607078A (en) 2006-02-16

Similar Documents

Publication Publication Date Title
US10079314B2 (en) Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region
US7741177B2 (en) Method and apparatus transporting charges in semiconductor device and semiconductor memory device
CN100394604C (en) Method and apparatus transporting charges in semiconductor device and semiconductor memory device
EP3262690B1 (en) Memory cell with high-k charge trapping layer
Hubert et al. A stacked SONOS technology, up to 4 levels and 6nm crystalline nanowires, with gate-all-around or independent gates (Φ-Flash), suitable for full 3D integration
TWI306608B (en) Electrically alterable non-volatile memory cells and arrays
TW200908345A (en) Blocking dielectric engineered charge trapping memory cell with high speed erase
EP3262689B1 (en) Method of forming memory cell with high-k charge trapping layer
US20090152621A1 (en) Nonvolatile charge trap memory device having a high dielectric constant blocking region
TW201027724A (en) Depletion-mode charge-trapping flash device
TW201232763A (en) A multi-layer single crystal 3D stackable memory
WO2008156756A1 (en) Highly scalable thin film transistor
CN109087941A (en) The manufacturing method of MOSFET cells, memory component and charge storing structure
US20080237687A1 (en) Flash memory device
JP2008078504A (en) Nonvolatile semiconductor storage device
KR100889167B1 (en) Nonvolatile semiconductor memory device
US20220173251A1 (en) Thin-film storage transistor with ferroelectric storage layer
US7462521B2 (en) Dual-gate device and method
TW200907974A (en) Charge trapping memory cell with high speed erase
JP4761946B2 (en) NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, ITS MANUFACTURING METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT
JPWO2008146760A1 (en) Storage element and reading method thereof
KR100988092B1 (en) Nonvolatile semiconductor storage device and manufacturing method thereof
TWI470774B (en) Nand flash with non-trapping switch transistors
TW556345B (en) Transistor-arrangement, method for operating a transistor-arrangement as a data storage element and method for producing a transistor-arrangement
TWI287292B (en) Method and apparatus transporting charges in semiconductor device and semiconductor memory device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees