TWI286351B - Semiconductor wafer and process for producing the semiconductor wafer - Google Patents

Semiconductor wafer and process for producing the semiconductor wafer Download PDF

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Publication number
TWI286351B
TWI286351B TW92122298A TW92122298A TWI286351B TW I286351 B TWI286351 B TW I286351B TW 92122298 A TW92122298 A TW 92122298A TW 92122298 A TW92122298 A TW 92122298A TW I286351 B TWI286351 B TW I286351B
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wire
semiconductor wafer
semiconductor
wafer
saw
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TW92122298A
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Chinese (zh)
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TW200402787A (en
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Gerhard Palme
Maximilian Kaeser
Manfred Grundner
Johann Steiner
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Siltronic Ag
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23DPLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
    • B23D57/00Sawing machines or sawing devices not covered by one of the preceding groups B23D45/00 - B23D55/00
    • B23D57/003Sawing machines or sawing devices working with saw wires, characterised only by constructional features of particular parts
    • B23D57/0053Sawing machines or sawing devices working with saw wires, characterised only by constructional features of particular parts of drives for saw wires; of wheel mountings; of wheels
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/04Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
    • B28D5/045Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools by cutting with wires or closed-loop blades

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Weting (AREA)

Abstract

The invention relates to a semiconductor wafer made from silicon as based material for the fabrication of electronic components, which has a gloss of at least 70% and a roughness Ra of 0.1 mum to 0.5 mum, which are achieved by wire-sawing of a single crystal as the only mechanical processing step in the production of the semiconductor wafer. The invention also relates to a process for producing the semiconductor wafer.

Description

1286351 五、發明説明(1) 發明所屬之技術領域 石夕^導體晶圓係製作電子元件之主要材料。適於作此 用途之半導體晶圓,至少一個面必須盡可能平整。所以通 常需採用許多機械加工步驟始可使該表面具有此類性能。1286351 V. INSTRUCTIONS OF THE INVENTION (1) Technical Field to Which the Invention A Shi Xi ^ Conductor Wafer is the main material for making electronic components. At least one side of the semiconductor wafer suitable for this purpose must be as flat as possible. Therefore, it is often necessary to employ a number of mechanical processing steps to achieve such properties on the surface.

該等機械加工步驟包含:自單晶體切割成半導體晶圓及該 半導體晶圓之精研、研磨及拋光。 X 本,明可達成之目的是:以低成本製得一半導體晶 及付合製作電子元件所需主要材料之要求。The machining steps include: cutting from a single crystal into a semiconductor wafer and lapping, grinding, and polishing the semiconductor wafer. X, the purpose of the achievable is to produce a semiconductor crystal at a low cost and to meet the requirements of the main materials required for the production of electronic components.

驚::是’依照本發明製造半導體晶目,除鋼絲鋸巧 :再需要其他機械加工步驟’例如:精㊉ 拋先。視切割實施之方式而冑,為使半導體晶圓 J 咸低牛ΐ施另一非機械加工步驟將較為有利: 因其他機械加工步料略’所以本方法特別經 依照本發明製造之半導體晶圓,1 米’尤以100至3 00微米更佳,所以相為100微 時形成許多此類半導體晶圓。該鋼:继鋼、、,糸鋸割可同 絲-導引輥上並VL該等蟫旌銘 …’、纏、%在鋼絲鋸之鋼 守W輥上亚m a寺螺紅移動。為鋸割 研磨齊m材料移除,該等研磨劑係黏合在+鑛導曰曰H:、藉 割懸浮液形式加入而由鋸鋼絲帶至 、、’ 、’、5以鋸 ,程度之磨.,若所考量之鑛二U = f 不良影響’蓋因位於單晶體一端 4具有 蝕而變細之鋸鋼絲部分區段存在$二:體日日圓係在有因磨 又存在之情況下離開單晶體。該Surprisingly: It is a manufacture of semiconductor crystals in accordance with the present invention, except for wire saws: other mechanical processing steps are required, for example: fine polishing. Depending on the manner in which the cutting is performed, it may be advantageous to have another non-machining step for the semiconductor wafer J: the other method is a semiconductor wafer manufactured in accordance with the present invention. , 1 m' is preferably 100 to 300 μm, so many such semiconductor wafers are formed at a phase of 100 μm. The steel: following steel,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, For the sawing and grinding of the m material removal, the abrasives are bonded to the + mineral guide H:, by the addition of the suspension, the saw wire is brought to, , ', ', 5 to the saw, the degree of grinding If the consideration of the mineral II U = f adverse effect 'cain is located at one end of the single crystal 4 has a etched and thinned section of the saw wire section $ two: the body of the Japanese yen leaves the single crystal in the presence of grinding . The

五、發明說明(2) 等半導體晶圓較來自單晶體 曾承受負荷或至少曾2者為厚,而且係在有未 之情況下離開單晶體。又乂 -、何之鋸鋼絲部分區段存在 就本發明之觀點而言,藉 間隔設計為並非恆常不變以導引輥上溝槽間之 間隐从 交以抵4該不利效果。因溝择門夕 ]h及鋼絲之直徑對離開單晶 U彝槽間之 關鍵性影響。利用對應較 $導體曰曰圓之厚度具有 之厘ft 吉果,目時離開單晶體之許多半導體曰二 之厚度分佈變得非常嚴格。厚声八夕牛導體日曰® 值與預期值之差異)以最多+1();刀乎佈2广曰圓厚度實際 半導體晶圓之數目Μ準/# 為佳(以一次雜割所得 圆心数a局暴旱),尤以± 5微米更佳。 :圖僅將本發明所用不同鋼絲_導引輥不 j方法所得結果加以比較。 種刀 涛槽間之間隔恆常不變,作在方絲-導引輕 溝描卩日 巾个i 仁在方法B中,所用鋼絲-導引輕 所::之間隔自鋼絲進入側至鋼絲外出側逐漸減小。該圖 情ΐ糸ΐ放大後之溝槽間隔及所得半導體晶圓之厚度分佈 。乂。才木用方法Β,可製得實質上厚度均勻之半導體晶圓 一、【先前技術】 屬、ϋ 2用一種鋼絲鋸割方法以形成低度起伏半導體晶圓亦 ^ a。舉例言之,德國專利DE-1 0 054265 Α1中曾述及此 ' ^該方法之重要特徵是:鋼絲運動之方向重複變換 〔振盪法),鋸鋼絲速率恆常不變之時段遠較鋸鋼絲加速或 減速之時段為短。 1286351 i、發明綱⑶ --- 德國專利DE-1 00542 65中所引證恆常速率時段持声髮 間與增加速率或減低速率時段持續期間之比值、、=期 达,· 々他於0 · 5 依照德國工業標準DIN 4774,起伏度Wt之定義為·量 剩片段起伏度圖中最高點與最低點間之垂直距離。自單1 體分開之半導體晶圓之起伏度至多為8微米,尤以夕二 微米更佳。 夕為3 半導體晶圓之光澤度係用光加以測定,例如:雷射光 ,以特定角度(40。至80。,尤以60。更佳)輻射在半導體 晶圓上,並量測反射部分。所用參考標準係依照德國工業 標準DIN 675 30/國際標準化組織ISO 2813内之標準A。本、 發明半導體晶圓之光澤度以至少70%為佳,尤以至少9〇%更 佳,粗度Ra以0· 1微米至〇· 5微米為佳,尤以〇. 15至〇 35微 米更佳。 · ^ 依照DIN 4 7 6 8,粗度Ra係粗度剖面圖與總剖面圖中心 線所有差異之算術平均值。粗度之測定係利用一可商購之 量測裝置(例如:附有量測針、稱之為Perth〇mete;f者)掃 描一特定片段(例如:5公厘)以測定上述之差显。 三、【發明内容】V. INSTRUCTIONS (2) A semiconductor wafer is thicker than a single crystal that has been subjected to a load or at least two, and leaves the single crystal if it is not present. Further, there is a section of the wire portion of the saw wire. From the viewpoint of the present invention, the interval is designed so as not to be constant so as to impede the adverse effect between the grooves on the guide roller. The key influence of the diameter of the wire and the diameter of the wire on leaving the single crystal U groove. The thickness distribution of many semiconductors leaving the single crystal is very strict with the thickness of the circle corresponding to the thickness of the conductor. The difference between the value of the thick octopus and the expected value of the 八 牛 ) ) 以 以 以 以 以 最多 最多 最多 最多 最多 最多 最多 最多 最多 最多 最多 最多 最多 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 A number of bureaucratic droughts, especially ± 5 microns. The figure only compares the results obtained by the different wire-guide rolls of the present invention. The spacing between the shovel grooves is constant, and is used in the square wire-guided light ditch to describe the day towel. In the method B, the wire-guided light is used: the interval from the wire entry side to the wire The exit side gradually decreases. The figure shows the enlarged trench spacing and the thickness distribution of the resulting semiconductor wafer. Hey. By using the method of wood, a semiconductor wafer having a substantially uniform thickness can be obtained. [Prior Art] 属 2 用 2 A wire sawing method is used to form a low-rise semiconductor wafer. For example, the German patent DE-1 0 054 265 Α1 has described this '^ The important feature of this method is that the direction of the wire movement is repeatedly changed [oscillating method), and the time of the saw wire is constant and the time is much longer than that of the saw wire. The period of acceleration or deceleration is short. 1286351 i, invention program (3) --- German patent DE-1 00542 65 cited in the constant rate period between the duration of the increase and the rate of increase or decrease the duration of the period, the period of time, · 々 he at 0 · 5 According to the German industrial standard DIN 4774, the undulation Wt is defined as the vertical distance between the highest point and the lowest point in the fragment fluctuation map. Semiconductor wafers separated from a single body have a undulation of at most 8 microns, especially preferably two microns. The gloss of the semiconductor wafer is measured by light, for example, laser light, radiated on the semiconductor wafer at a specific angle (40 to 80, especially 60. More preferably), and the reflection portion is measured. The reference standard used is in accordance with the German Industrial Standard DIN 675 30/Standard A in ISO 2813. Preferably, the semiconductor wafer of the invention has a gloss of at least 70%, more preferably at least 9%, and a thickness Ra of from 0.1 μm to 〇·5 μm, especially from 15 to 35 μm. Better. · ^ According to DIN 4 7 6 8 , the arithmetic mean of all the differences between the coarseness profile of the roughness Ra and the centerline of the total profile. The measurement of the roughness is performed by scanning a specific segment (for example, 5 mm) using a commercially available measuring device (for example, a measuring probe, called Perth〇mete; f) to determine the difference . Third, [invention content]

本發明之内容係一由矽製之半導體晶圓及製造該矽半 導體晶圓之方法 本發明之内谷係一由石夕製成、用作製作電子元件主要 材料之半導體晶圓,該半導體晶圓之光澤度至少為7〇%及 粗度Ra為0.1微米至0.5微米,該等特性係藉製造半導體晶The present invention relates to a semiconductor wafer fabricated by tantalum and a method of manufacturing the same. The inner valley of the present invention is a semiconductor wafer made of Shi Xi, which is used as a main material for manufacturing electronic components. The gloss of the circle is at least 7〇% and the roughness Ra is 0.1 μm to 0.5 μm. These properties are obtained by manufacturing a semiconductor crystal.

第7頁 1286351 五、發明說明(4) 圓過程中唯一機械加工步 該半導體晶圓最好用伟,絲錯割單晶體而達成。 本發明之内容係一 1作電子元件之主要材料。 該方法中,該半導體P 由石夕製造半導體晶圓之方法,在 由鋼絲-導引輕之溝槽θ曰内圓’連同許多半導體晶圓係在有經 ,自單晶體鋸割而成曰,宜運轉之鋼絲鋸鋼絲存在之情況下 用以製造半導體晶圓之^中由鋼絲鋸鋸割成半導體晶圓係 四、【實施方式】 機械加工步驟。 ’可增加半導體晶圓之光澤度並降 低其粗度。 將藉鋼絲鋸割 餘刻係用以改良半 〇 將藉鋼絲鋸割 隨後加以清洗,且 度及粗度之僅有加 在半導體晶圓 硝酸(ΗΝ〇3)者為佳 用自晶圓每個面移 米至1 2微米更佳。 用以清洗半導 佳0 以餘刻且 加工步驟 以餘刻並 晶圓光澤 劑以含有 ,蝕刻作 尤以8微 性劑者為 =單晶體分開之半導體晶圓加 導體晶圓光澤度及粗度之唯一 自單晶體分開之半導體晶圓加 钱刻及清洗係用以改良半導體 工步驟。 之餘刻作用過程中,所用蝕刻 °為移除接近表面之晶體損傷 除之材料以高達35微米為佳, 體晶圓之清洗劑以含有界面活Page 7 1286351 V. INSTRUCTIONS (4) The only mechanical processing step in the round process The semiconductor wafer is preferably achieved by using a monofilament and a single crystal. The content of the present invention is the main material of the electronic component. In the method, the semiconductor P is fabricated by the method of manufacturing a semiconductor wafer by Shi Xi, and is formed by a wire-guided light groove θ 曰 inner circle along with a plurality of semiconductor wafers, which are sawed from a single crystal saw. In the case where a wire saw wire suitable for operation is used to manufacture a semiconductor wafer, it is sawed into a semiconductor wafer by a wire saw. Fourth, [Embodiment] Mechanical processing steps. ' can increase the gloss of semiconductor wafers and reduce their thickness. Will use the wire saw to cut the residual system to improve the half-turn will be cut by wire sawing and then cleaned, and the degree and thickness of the only added to the semiconductor wafer nitric acid (ΗΝ〇3) is better from the wafer each It is better to shift the surface to 12 microns. Used to clean the semi-conducting good 0 for the remainder and the processing steps to the left and the wafer gloss agent to contain, etch for 8 micro-agents = single crystal separated semiconductor wafer plus conductor wafer gloss and thickness The only semiconductor wafers that are separate from the single crystal are used to improve the semiconductor process steps. During the remaining action, the etching used is to remove the crystal damage near the surface, except that the material is preferably up to 35 microns, and the cleaning agent of the wafer wafer contains the interface.

1286351 圖式簡單說明 五、【圖式簡單說明】 第一圖A :示方法A之厚度分佈情形,特徵為溝槽間隔為等 距離。 第一圖B :示方法B之厚度分佈情形,不同者為溝槽間隔之 距離不同。1286351 Brief description of the diagram V. [Simple description of the diagram] The first diagram A shows the thickness distribution of the method A, characterized by the groove spacing being equidistant. First Figure B: shows the thickness distribution of Method B, which differs in the distance between trenches.

第9頁Page 9

Claims (1)

讲黎珠 月日修(吏)正替換頁丨 Ui 六、申請專利範圍 1. 一種由 導體晶圓連 之溝槽内運 而成,其特 導體晶圓之 親之溝槽内 之間隔自鋼 小;及自單 至多± 1 0微 2. 如申請 半導體晶圓 圓光澤度之 3. 如申請 半導體晶圓 洗工作係用 步驟。 4. 一種如 導體晶圓, 電子元件之 矽製造半導體晶圓之方法,在該方法中,該半 同許多半導體晶圓,係在有經由鋼絲-導引輥 轉之鋼絲鋸鋼絲存在之情況下,自單晶體鋸割 徵為由鋼絲据据割成半導體晶圓係用以製造半 唯一機械加工步驟,該鋸鋼絲通過鋼絲-導引 且該等溝槽係沿軸向各自隔開,相鄰兩溝槽間 絲-導引輥一端至鋼絲-導引輥對面一端逐漸減 晶體分開之許多半導體晶圓具有之厚度分佈為 米,以一次鋼絲鋸之切割量為基準。 專利範圍第1項之方法,其中自單晶體分開之 係加以蝕刻,且蝕刻作用係用以增加半導體晶 方法中僅有之加工步驟。 專利範圍第1項之方法,其中自單晶體分開之 係加以蝕刻並隨後加以清洗,且蝕刻作用及清 以增加半導體晶圓光澤度之方法中僅有之加工 申請專利範圍第1、2或3項之方法所製造之半 係由區域-抽拉之矽所組成且係用作製作電力 主要材料。It is said that Li Zhuyue Xiu repair (吏) is replacing the page 丨Ui. VI. Patent application scope 1. A kind of groove is connected by the conductor wafer, and the groove of the special conductor wafer is separated from the steel. Small; and from single to ± 1 0 micro 2. If applying for semiconductor wafer round gloss 3. If applying for semiconductor wafer washing work system steps. 4. A method of manufacturing a semiconductor wafer, such as a conductor wafer, an electronic component, in which the plurality of semiconductor wafers are in the presence of a wire saw wire via a wire-guide roll The single crystal saw is cut into a semiconductor wafer by a steel wire to produce a semi-single machining step, the saw wire is guided by a wire and the grooves are respectively spaced apart in the axial direction, adjacent to the two A plurality of semiconductor wafers from one end of the inter-groove-guide roll to the opposite side of the wire-guide roll are gradually reduced in size by a crystal, and have a thickness distribution of meters, based on the amount of cutting of the wire saw. The method of claim 1, wherein the etching is performed separately from the single crystal, and the etching is used to increase the only processing step in the semiconductor crystal method. The method of claim 1, wherein the method of etching, and then cleaning, and etching and clearing to increase the gloss of the semiconductor wafer is only the processing patent range 1, 2 or 3 The half system manufactured by the method is composed of a region-drawing crucible and is used as a main material for making electric power. 第10頁Page 10
TW92122298A 2002-08-14 2003-08-13 Semiconductor wafer and process for producing the semiconductor wafer TWI286351B (en)

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DE2002137247 DE10237247B4 (en) 2002-08-14 2002-08-14 Method of manufacturing a silicon wafer

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DE10054165B4 (en) * 2000-11-02 2005-07-28 Siltronic Ag A method of separating a plurality of slices from a workpiece

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